Low-loss semiconductor power device substrate preparation method
By using silicon wafer bonding and weak sandblasting, the problem of silicon wafer warpage was solved, enabling the fabrication of low-loss semiconductor power devices with a high yield, reducing fabrication costs and improving device performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ANHUI MICROSEMI SEMICON TECH CO LTD
- Filing Date
- 2023-12-28
- Publication Date
- 2026-05-08
AI Technical Summary
In existing technologies, silicon wafer warping leads to high losses, and incomplete removal of the inversion layer affects device performance and yield.
Two silicon wafers are bonded together through a silica interface, with no gaps at the interface. After high-concentration pre-deposition and advancement, hydrofluoric acid is used to separate the silicon wafers, and a weak sandblasting process is used to remove excess oxide layer, ensuring that the silicon wafers do not warp.
This has resulted in a low-loss semiconductor power device substrate that is non-warping, has low stress, and a high yield, thereby reducing manufacturing costs and improving device performance.
Smart Images
Figure CN122003138A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of substrate fabrication technology, and in particular to a method for fabricating a substrate for a low-loss semiconductor power device. Background Technology
[0002] In existing technologies, thicker silicon wafers with higher costs are typically used. These wafers are cleaned, pre-deposited into deep junctions, and advanced to create a high-concentration substrate. Then, the other side of the substrate (i.e., the inversion layer caused by high-concentration diffusion vapor pressure) is removed by sandblasting or grinding. Even with good pressing technology or well-controlled diffusion gas flow, this inversion layer still needs to reach 2 / 3 or more of the diffusion junction. Another problem with this method is that, since the high-concentration diffusion is on one side, after the diffusion impurities fill the surface and back edge of the silicon wafer, lattice compression causes unidirectional deformation (i.e., silicon wafer warping), which easily leads to fragmentation during sandblasting or grinding. Summary of the Invention
[0003] The purpose of this invention is to solve the problems existing in the prior art:
[0004] Existing methods involve a large number of inversion layers on the silicon wafer.
[0005] A method for fabricating a low-loss semiconductor power device substrate is proposed.
[0006] To achieve the above objectives, the present invention adopts the following technical solutions:
[0007] A method for fabricating a low-loss semiconductor power device substrate includes the following steps:
[0008] Step 1: Take at least two silicon wafers as a group, and oxidize at least one of the silicon wafers.
[0009] Step 2: First, process and clean each silicon wafer body, then stack and bond each silicon wafer body sequentially to form a bonded silicon wafer; at least one of the two adjacent sides of two adjacent silicon wafer bodies has an oxide layer;
[0010] Step 3: Remove the oxide layer from the non-bonded surface of the bonded silicon wafer, and then clean the bonded silicon wafer.
[0011] Step 4: Perform deep junction pre-deposition and advance processing on the bonded silicon wafer;
[0012] Step 5: Soak the bonded silicon wafer in hydrofluoric acid to separate it into two diffused silicon wafers. Then rinse the diffused silicon wafers with clean water and deionized water.
[0013] Step 6: Perform a weak sandblasting treatment on the non-diffusion side of the diffused silicon wafer, then perform ultrasonic cleaning and spin dry.
[0014] As a further technical solution of the present invention, in step one, the two silicon wafers have the same thickness, resistivity and crystal orientation.
[0015] As a further technical solution of the present invention, in step six, a thickness of 2-5 μm is removed by weak sandblasting.
[0016] As a further technical solution of the present invention, in step three, the method for removing excess oxide layer is one of photoresist-assisted method combined with wet etching, UV film-assisted method combined with wet etching, and sandblasting.
[0017] As a further technical solution of the present invention, in step three, when the method for removing excess oxide layer is photoresist-assisted method combined with wet etching, the excess oxide layer end face of the silicon wafer body is masked with photoresist, then the oxide layer on the non-bonded surface is removed with hydrofluoric acid, then rinsed with deionized water, then dried, and then the photoresist is removed with a mixture of sulfuric acid and hydrogen peroxide heated.
[0018] As a further technical solution of the present invention, in step three, when the method for removing excess oxide layer is UV film-assisted method combined with wet etching, the excess oxide layer end face of the silicon wafer body is shielded with UV film, then the oxide layer on the non-bonded surface is removed with hydrofluoric acid, then rinsed with deionized water, then dried, and then irradiated with UV to make the film lose its adhesiveness, and the silicon wafer body is detached from the UV film.
[0019] As a further technical solution of the present invention, in step three, when the method for removing excess oxide layer is sandblasting, the oxide layer on the non-bonded surface is blown with a 300-mesh to 700-mesh powder material, and then the powder material on the silicon wafer is ultrasonically cleaned with a cleaning agent, then rinsed with deionized water, and dried. The powder material is one of garnet corundum powder and silicon carbide powder.
[0020] As a further technical solution of the present invention, in steps two and three, the cleaning method is either the distribution method or the direct method. The distribution method is plasma etching cleaning plus wet cleaning, and the direct method is wet cleaning.
[0021] The beneficial effects of this invention are:
[0022] This invention enables two silicon wafers to be bonded together through a silicon dioxide interface. There are no gaps between the bonding interfaces. After high-concentration pre-deposition and advancement, the high-concentration diffusion vapor pressure can only reach the edge of the bonding. The silicon wafers do not warp and have the fewest inversion layers. Moreover, since silicon dioxide is used, after pre-deposition and advancement, the bonding silicon wafers can be easily separated with hydrofluoric acid, thereby obtaining a substrate that does not warp, has low stress, and has a high yield. Attached Figure Description
[0023] Figure 1 This is a process flow diagram of the present invention. Detailed Implementation
[0024] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.
[0025] Reference Figure 1 A method for fabricating a low-loss semiconductor power device substrate includes the following steps:
[0026] Step 1: Take at least two silicon wafers as a group, and oxidize at least one of the silicon wafers.
[0027] Step 2: First, process and clean each silicon wafer body, then stack and bond each silicon wafer body sequentially to form a bonded silicon wafer; at least one of the two adjacent sides of two adjacent silicon wafer bodies has an oxide layer;
[0028] Step 3: Remove the oxide layer from the non-bonded surface of the bonded silicon wafer, and then clean the bonded silicon wafer.
[0029] Step 4: Perform deep junction pre-deposition and advance processing on the bonded silicon wafer;
[0030] Step 5: Soak the bonded silicon wafer in hydrofluoric acid to separate it into two diffused silicon wafers. Then rinse the diffused silicon wafers with clean water and deionized water.
[0031] Step 6: Perform a weak sandblasting treatment on the non-diffusion side of the diffused silicon wafer, then perform ultrasonic cleaning and spin dry.
[0032] In step two, if the bonding process in the next step involves two wafers as a group, then the surfaces on the silicon wafer body where the two oxide layers are grown can both be retained.
[0033] In step three, the method for removing excess oxide layer is one of photoresist-assisted method combined with wet etching, UV film-assisted method combined with wet etching, and sandblasting.
[0034] In step three, when the method for removing excess oxide layer is photoresist-assisted method combined with wet etching, the excess oxide layer end face of the silicon wafer body is masked with photoresist, then the oxide layer on the non-bonded surface is removed with hydrofluoric acid, then rinsed with deionized water, then dried, and then the photoresist is removed with a hot mixture of sulfuric acid and hydrogen peroxide.
[0035] In step three, when the method for removing excess oxide layer is UV film-assisted method combined with wet etching, the excess oxide layer end face of the silicon wafer body is shielded with UV film, then the oxide layer on the non-bonded surface is removed with hydrofluoric acid, then rinsed with deionized water, then dried, and then irradiated with UV to make the film lose its adhesiveness, and the silicon wafer body is detached from the UV film.
[0036] In step three, when the method for removing excess oxide layer is sandblasting, the oxide layer on the non-bonded surface is blown away with a 300-mesh to 700-mesh powder material, and then the powder material on the silicon wafer is ultrasonically cleaned with a cleaning agent, then rinsed with deionized water, and dried. The powder material is one of garnet corundum powder and silicon carbide powder.
[0037] In steps two and three, the cleaning method is either the distribution method or the direct method. The distribution method is plasma etching cleaning plus wet cleaning, while the direct method is wet cleaning.
[0038] In step three, hydrofluoric acid or diluted hydrofluoric acid is generally used to remove the oxide layer.
[0039] In step one, the two silicon wafers have the same thickness, resistivity, and crystal orientation.
[0040] In step four, the pre-deposition and propulsion are high-concentration pre-deposition and propulsion.
[0041] In step four, the pre-deposition and propulsion are not limited to pentavalent elements, such as phosphorus diffusion or trivalent element boron diffusion. If it is phosphorus diffusion, the preferred method is phosphorus paper source phosphorus application method, which has high batch operation capability but slightly higher cost and is suitable for large-size silicon wafers. Another method is phosphorus oxychloride gas-carried source method, which has slightly lower cost but slightly lower batch operation capability.
[0042] In step six, a 2-5 μm thickness is removed by weak sandblasting. The inversion layer obtained by the method of this invention is ≤1 μm. The main purpose of this step is to prevent the other side from sticking together after subsequent stacking and diffusion.
[0043] Taking a 600V rectifier diode as an example, this includes fabricating a low forward voltage, low loss, ultrafast recovery mesa rectifier diode / LOW VF low forward voltage, low loss mesa rectifier diode, etc., selecting a total thickness of 260-270µm, N-type, crystal orientation... <111> The silicon wafers with a resistivity of 8-15 OHM·CM are bonded together with two silicon wafers in each group. Phosphorus is applied to both sides simultaneously, with a phosphorus junction depth of 150 μm. Then, a boron diffusion junction depth of 60 μm is formed, and the base region is 50-60 μm.
[0044] This invention enables two silicon wafers to be bonded together through a silicon dioxide interface. There are no gaps between the bonding interfaces. After high-concentration pre-deposition and advancement, the high-concentration diffusion vapor pressure can only reach the edge of the bonding. The silicon wafers do not warp and have the fewest inversion layers. Moreover, since silicon dioxide is used, after pre-deposition and advancement, the bonding silicon wafers can be easily separated with hydrofluoric acid, thereby obtaining a substrate that does not warp, has low stress, and has a high yield.
[0045] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.
Claims
1. A method for fabricating a low-loss semiconductor power device substrate, characterized in that, Includes the following steps: Step 1: Take at least two silicon wafers as a group, and oxidize at least one of the silicon wafers. Step 2: First, process and clean each silicon wafer body, then stack and bond each silicon wafer body sequentially to form a bonded silicon wafer; at least one of the two adjacent sides of two adjacent silicon wafer bodies has an oxide layer; Step 3: Remove the oxide layer from the non-bonded surface of the bonded silicon wafer, and then clean the bonded silicon wafer. Step 4: Perform deep junction pre-deposition and advance processing on the bonded silicon wafer; Step 5: Soak the bonded silicon wafer in hydrofluoric acid to separate it into two diffused silicon wafers. Then rinse the diffused silicon wafers with clean water and deionized water. Step 6: Perform a weak sandblasting treatment on the non-diffusion side of the diffused silicon wafer, then perform ultrasonic cleaning and spin dry.
2. The method for fabricating a low-loss semiconductor power device substrate according to claim 1, characterized in that, In step one, the two silicon wafers have the same thickness, resistivity, and crystal orientation.
3. The method for fabricating a low-loss semiconductor power device substrate according to claim 1, characterized in that, In step six, a 2-5µm thickness is removed by gentle sandblasting.
4. The method for fabricating a low-loss semiconductor power device substrate according to claim 1, characterized in that, In step three, the method for removing excess oxide layer is one of photoresist-assisted method combined with wet etching, UV film-assisted method combined with wet etching, and sandblasting.
5. The method for fabricating a low-loss semiconductor power device substrate according to claim 4, characterized in that, In step three, when the method for removing excess oxide layer is photoresist-assisted method combined with wet etching, the excess oxide layer end face of the silicon wafer body is masked with photoresist, then the oxide layer on the non-bonded surface is removed with hydrofluoric acid, then rinsed with deionized water, then dried, and then the photoresist is removed with a hot mixture of sulfuric acid and hydrogen peroxide.
6. The method for fabricating a low-loss semiconductor power device substrate according to claim 4, characterized in that, In step three, when the method for removing excess oxide layer is UV film-assisted method combined with wet etching, the excess oxide layer end face of the silicon wafer body is shielded with UV film, then the oxide layer on the non-bonded surface is removed with hydrofluoric acid, then rinsed with deionized water, then dried, and then irradiated with UV to make the film lose its adhesiveness, and the silicon wafer body is detached from the UV film.
7. The method for fabricating a low-loss semiconductor power device substrate according to claim 4, characterized in that, In step three, when the method for removing excess oxide layer is sandblasting, the oxide layer on the non-bonded surface is blown away with a 300-mesh to 700-mesh powder material, and then the powder material on the silicon wafer is ultrasonically cleaned with a cleaning agent, then rinsed with deionized water, and dried. The powder material is one of garnet corundum powder and silicon carbide powder.
8. The method for fabricating a low-loss semiconductor power device substrate according to claim 1, characterized in that, In steps two and three, the cleaning method is either the distribution method or the direct method. The distribution method is plasma etching cleaning plus wet cleaning, while the direct method is wet cleaning.