Solar cell conduction defect processing method, device and system and storage medium

Abstract

The invention provides a solar cell conduction defect processing method, device and system and a storage medium, relates to the technical field of cells, and can improve the yield of solar cells. The method comprises the following steps: determining the position of a conduction defect of a solar cell; the solar cell comprises a first grid line located in the first polarity doped region and a first grid line located in the second polarity doped region. The polarity of the first polarity doped region is different from that of the second polarity doped region; the conduction defect is a defect causing electric conduction between the first grid line and the second grid line; and according to the position of the conduction defect, the conduction defect is burnt and fused, and the first polarity doped region and the second polarity doped region are in a non-electric conduction state at the position of the burnt and fused conduction defect.

Description

Technical Field

[0001] This application relates to the field of battery technology, and in particular to a method, device, system and storage medium for handling conduction defects in solar cells. Background Technology

[0002] In some solar cells, the grid lines in different polarity regions overlap, causing electrical conduction between the grid lines in different polarity regions.

[0003] In existing solutions, solar cells with grid lines that are electrically conductive in different polarity regions are usually downgraded, which results in a poor yield of solar cells. Summary of the Invention

[0004] This application provides a method, apparatus, system, and storage medium for handling conduction defects in solar cells, which can improve the yield of solar cells.

[0005] To achieve the above objectives, this application adopts the following technical solution: In a first aspect, a method for treating conduction defects in a solar cell is provided. The solar cell includes a first grid line located in a first polar doped region and a first grid line located in a second polar doped region. The first polar doped region and the second polar doped region have different polarities. The conduction defect is a defect that causes electrical conduction between the first grid line and the second grid line. The method includes: determining the location of the conduction defect in the solar cell; and melting the conduction defect according to its location, wherein the first polar doped region and the second polar doped region are in a non-conductive state at the location of the conduction defect after melting.

[0006] Based on this scheme, when the conduction defect is an electrical conduction defect between the first grid line and the second grid line, the position of the conduction defect is melted to make the first polar doped region and the second polar doped region non-electrically conductive at the position of the conduction defect after melting. In this way, there is no need to degrade the solar cell with the conduction defect, thus improving the yield of the solar cell.

[0007] In conjunction with the first aspect, in some embodiments of the first aspect, melting the conduction defect according to its location includes: illuminating the location of the conduction defect with a preset light source to melt the conduction defect; wherein the center point of the light spot corresponding to the preset light source coincides with the location of the conduction defect.

[0008] In conjunction with the first aspect, in some embodiments of the first aspect, the preset light source is a laser light source.

[0009] In conjunction with the first aspect, in some embodiments of the first aspect, the spot diameter of the laser light source is 0.1 mm to 1 mm.

[0010] In conjunction with the first aspect, in some embodiments of the first aspect, the preset light source is a high-intensity light source; the high-intensity light source is a light source with a light intensity greater than or equal to a light intensity threshold.

[0011] In conjunction with the first aspect, in some embodiments of the first aspect, the spot diameter of the high-intensity light source is 0.1 mm to 10 mm.

[0012] In conjunction with the first aspect, in some embodiments of the first aspect, the illumination time for illuminating the location of the conduction defect using a preset light source is 10ms to 200ms.

[0013] In conjunction with the first aspect, in some embodiments of the first aspect, the light intensity of the preset light source is from 1 solar intensity to 60 solar intensities.

[0014] In conjunction with the first aspect, in some embodiments of the first aspect, an isolation region is provided between the first grid line and the second grid line. Determining the location of a conduction defect in a solar cell includes: determining the overlapping area between the conduction defect and the isolation region based on a defect detection device; and using the overlapping area as the location of the conduction defect in the solar cell.

[0015] In conjunction with the first aspect, in some embodiments of the first aspect, the defect detection device is a fully automated optical inspection device (AOI); the resolution of the AOI is less than 100 μm.

[0016] Secondly, an electronic device is provided for implementing the defect handling method of the first aspect described above. The electronic device includes modules, units, or means corresponding to the above method, which can be implemented in hardware, software, or by hardware executing corresponding software. The hardware or software includes one or more modules or units corresponding to the above functions.

[0017] In conjunction with the second aspect, in some embodiments of the second aspect, the solar cell includes a first grid line located in a first polar doped region and a first grid line located in a second polar doped region; the first polar doped region and the second polar doped region have different polarities; the conduction defect is a defect that causes electrical conduction between the first grid line and the second grid line; the electronic device includes: a determination module and a processing module; The determination module is used to determine the location of the conduction defect in the solar cell; the processing module is used to melt the conduction defect according to its location, and the first polar doped region and the second polar doped region are in a non-conductive state at the location of the conduction defect after melting.

[0018] In conjunction with the first aspect, in some embodiments of the first aspect, the processing module is specifically used to: illuminate the location of the conduction defect using a preset light source to melt the conduction defect; wherein the center point of the light spot corresponding to the preset light source coincides with the location of the conduction defect.

[0019] In conjunction with the second aspect, in some embodiments of the second aspect, the preset light source is a laser light source.

[0020] In conjunction with the second aspect, in some embodiments of the second aspect, the spot diameter of the laser light source is 0.1 mm to 1 mm.

[0021] In conjunction with the second aspect, in some embodiments of the second aspect, the preset light source is a high-intensity light source; the high-intensity light source is a light source with a light intensity greater than or equal to a light intensity threshold.

[0022] In conjunction with the second aspect, in some embodiments of the second aspect, the spot diameter of the high-intensity light source is 0.1 mm to 10 mm.

[0023] In conjunction with the second aspect, in some embodiments of the second aspect, the illumination time for illuminating the location of the conduction defect using a preset light source is 10ms to 200ms.

[0024] In conjunction with the second aspect, in some embodiments of the second aspect, the light intensity of the preset light source is from 1 solar intensity to 60 solar intensities.

[0025] In conjunction with the second aspect, in some embodiments of the second aspect, an isolation region is provided between the first grid line and the second grid line. The determining module is specifically used to: determine the overlapping area between the conduction defect and the isolation region based on the defect detection equipment; and determine the overlapping area between the conduction defect and the isolation region as the location of the conduction defect of the solar cell.

[0026] In conjunction with the second aspect, in some embodiments of the second aspect, the defect detection device is a fully automated optical inspection (AOI) device; the resolution of the AOI is less than 100 μm.

[0027] Thirdly, a defect processing system is provided, which includes an electronic device, a preset light source, and a defect detection device. The preset light source is used to illuminate the location of the conductive defect, the defect detection device is used to detect the location of the conductive defect in the solar cell, and the electronic device is used to perform the defect processing method as described in the first aspect above.

[0028] Fourthly, an electronic device is provided, comprising: at least one processor and a memory for storing processor-executable instructions; wherein the processor is configured to execute the instructions to implement the methods provided by the first aspect and any possible implementation thereof.

[0029] Fifthly, a computer-readable storage medium is provided, wherein when instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the methods provided in the first aspect and any possible embodiments thereof.

[0030] In a sixth aspect, a computer program product containing instructions is provided that, when run on a computer, enables the computer to perform the methods provided in the first aspect and any possible implementation thereof.

[0031] The technical effects of any one of the second to sixth aspects can be found in the technical effects of the different embodiments of the first aspect described above, and will not be repeated here. Attached Figure Description

[0032] Figure 1 A schematic diagram of the structure of a defect handling system provided in this application; Figure 2 A flowchart illustrating a defect handling method provided in this application; Figure 3 A schematic diagram illustrating a conduction defect in a solar cell provided in this application; Figure 4 A schematic diagram of a solar cell after melting away conduction defects, provided in this application; Figure 5 A flowchart illustrating yet another defect handling method provided in this application; Figure 6 A schematic diagram of the structure of an electronic device provided in this application; Figure 7 A schematic diagram of the structure of another electronic device provided in this application. Detailed Implementation

[0033] In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can mean: a, b, c, a~b, a~c, b~c, or a~b~c, where a, b, and c can be single or multiple.

[0034] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0035] In this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being better or more advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0036] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, various embodiments throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0037] It is understood that in this application, "when," "if," and "if" all refer to the corresponding processing that will be carried out under certain objective circumstances, and are not limited to a specific time, nor do they require that there must be a judgment action when implemented, nor do they imply any other limitations.

[0038] It is understood that some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current solution on which they are based, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in certain scenarios. Correspondingly, the electronic devices given in the embodiments of this application can also implement these features or functions, which will not be elaborated here.

[0039] In this application, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments and implementation methods of the various embodiments in this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments and between the implementation methods of the various embodiments are consistent and can be mutually referenced. The technical features in different embodiments and between the implementation methods of the various embodiments can be combined according to their inherent logical relationships to form new embodiments, implementation methods, implementation methods, or implementation approaches. The following embodiments of this application do not constitute a limitation on the scope of protection of this application.

[0040] In some solar cells, the grid lines in different polarity regions overlap, causing electrical conduction between the grid lines in different polarity regions.

[0041] In existing solutions, solar cells with grid lines that are electrically conductive in different polarity regions are usually downgraded, which results in a poor yield of solar cells.

[0042] To address the above problems, this application provides a defect handling method. Figure 1 This application provides a schematic diagram of a solar cell conduction defect system. The method can be applied to… Figure 1 The solar cell shows a system with conduction defects. For example... Figure 1 As shown, the solar cell conduction defect system includes an electronic device 101, a preset light source 102, and a defect detection device 103.

[0043] The electronic device 101 is used to execute the defect handling method provided in this application.

[0044] The preset light source 102 and the defect detection device 103 are respectively connected to the electronic device 101. The defect detection device 103 is used to detect the location of the conduction defect of the solar cell and send the detected location of the conduction defect of the solar cell to the electronic device 101.

[0045] The preset light source 102 is used to receive the location of the conduction defect of the solar cell sent by the electronic device 101, and to illuminate the location of the conduction defect.

[0046] Optional, Figure 1 In the defect handling system shown, the type of solar cell may include OBB, MBB IBC, ABC, HPBC, PERC, TBC, TOPcon, HJT or perovskite tandem cells, and this application does not impose specific limitations on this.

[0047] In some embodiments, Figure 1 In the defect processing system shown, the electronic equipment and the image acquisition equipment can be integrated into the same device, or the electronic equipment and the image acquisition equipment can be independent devices. This application does not impose any specific restrictions on this.

[0048] The defect handling method provided in this application embodiment will be described below with reference to the accompanying drawings, taking the application of the defect handling method to an electronic device as an example.

[0049] Figure 2 A flowchart illustrating a defect handling method provided in this application is shown below. Figure 2 As shown, the method includes the following steps: S301. Determine the location of the conduction defect in the solar cell.

[0050] The solar cell includes a first grid line located in a first polar doped region and a first grid line located in a second polar doped region; the polarities of the first polar doped region and the second polar doped region are different; the conduction defect is a defect that causes electrical conduction between the first grid line and the second grid line.

[0051] For example, the first polar doped region can be an N-type doped region. The second polar doped region can be a P-type doped region.

[0052] As one possible implementation, the solar cell can be placed on a defect detection device, which can detect the location of a continuity defect and send the location of the continuity defect to an electronic device; accordingly, the electronic device determines the location of the continuity defect in the solar cell.

[0053] It should be noted that the defect detection equipment can preset the coordinate system of the solar cell and use the coordinate information of the solar cell coordinate system corresponding to the conduction defect as the location of the conduction defect.

[0054] In practical applications, the coordinate information corresponding to the coordinate system of the solar cell can be a range of coordinates or a single coordinate point, without restriction.

[0055] In one example, Figure 3 A schematic diagram of a conduction defect in a solar cell is shown, such as... Figure 3 As shown, the solar cell includes a first grid line 11, a first doped layer 12, an isolation region 13, a second doped layer 14, a second grid line 15, and a conduction defect 16.

[0056] One end of the conductive defect 16 is connected to the first gate line 11, and the other end of the conductive defect 16 is connected to the second gate line 15. The conductive defect 16 has conductive properties, thus making electrical connection between the first gate line 11 and the second gate line 15, forming a short circuit.

[0057] The continuity defect 16 is a gate line located in the isolation region 13. The continuity defect 16 can be an extra gate line that falls into the isolation region 13 during the fabrication of the gate line.

[0058] In some embodiments, the conduction defect 16 can be other conductive metal that falls on the isolation region 13 during the fabrication of the gate line, and is not limited thereto.

[0059] S302. Based on the location of the conduction defect, the conduction defect is melted.

[0060] Among them, the first polar doped region and the second polar doped region are in a non-electrically conductive state at the location of the conductive defect after melting.

[0061] As one possible implementation, an electronic device is connected to a preset light source, which can control the preset light source to illuminate the position of the conduction defect in order to melt the conduction defect.

[0062] The center point of the light spot corresponding to the preset light source coincides with the location of the conduction defect.

[0063] Understandably, the center point of the light spot corresponding to the preset light source coincides with the location of the conductive defect. In this way, energy can be precisely focused on the defect, achieving efficient ablation repair, reducing damage to the surrounding normal area, improving repair quality and the degree of restoration of conductivity, improving energy utilization, saving repair time and costs, ensuring stable product repair results, and enhancing product reliability and stability.

[0064] Figure 4 A schematic diagram of a solar cell after melting away conduction defects is shown, as follows. Figure 4 As shown, the solar cell includes a first grid line 11, a first doped layer 12, an isolation region 13, a second doped layer 14, a second grid line 15, and a conductive defect 16 after melting.

[0065] In this process, the conduction defect 16 is melted at the isolation region 13, thus making the first gate line 11 and the second gate line 15 non-electrically conductive after the conduction defect 16 is melted.

[0066] Based on this scheme, when the conduction defect is an electrical conduction defect between the first grid line and the second grid line, the position of the conduction defect is melted to make the first polar doped region and the second polar doped region non-electrically conductive at the position of the conduction defect after melting. In this way, there is no need to degrade the solar cell with the conduction defect, thus improving the yield of the solar cell.

[0067] The above is a general description of the defect handling method provided in this application. The following will provide a further description of the defect handling method provided in this application in conjunction with the accompanying drawings.

[0068] In one possible embodiment, the preset light source can be a laser light source.

[0069] In this way, the laser source can directly melt the position of the conduction defect, so that the first polar doped region and the second polar doped region are in a non-conductive state at the position of the conduction defect after melting. Thus, there is no need to degrade the solar cell with conduction defect, thereby improving the yield of solar cell.

[0070] In one possible embodiment, the laser spot diameter is 0.1 mm to 1 mm. For example, it can be any value among 0.1 mm, 0.3 mm, 0.5 mm, 0.7 mm, 0.9 mm, 1 mm, or 0.1 mm to 1 mm, without limitation.

[0071] This ensures that the laser spot diameter is within a suitable range, preventing the conduction defects from remaining partially connected due to an excessively small laser spot diameter, which would prevent the conduction defects from being completely melted. It also prevents the first or second grid line from burning out due to an excessively large laser spot diameter, which would affect the reliability of the solar cell.

[0072] In one possible embodiment, the preset light source can be a high-intensity light source. A high-intensity light source is a light source with a light intensity greater than or equal to a light intensity threshold. The light intensity threshold can be one solar intensity.

[0073] In this way, after the strong light source illuminates the conduction defect, charge carriers are generated at the location of the conduction defect. Since the area other than the conduction is an open circuit, the generated charge carriers only pass through the conduction defect. According to the heat dissipation I*I*R, a large amount of heat will be generated to melt the conduction defect, so that the first polar doped region and the second polar doped region are in a non-electrically conductive state at the location of the melted conduction defect. Thus, there is no need to degrade the solar cell with the conduction defect, which improves the yield of the solar cell.

[0074] In one possible embodiment, the spot diameter of the high-intensity light source is 0.1 mm to 10 mm. For example, it can be any value among 0.1 mm, 1 mm, 3 mm, 5 mm, 7 mm, 9 mm, 10 mm or 0.1 to 10 mm, without limitation.

[0075] This ensures that the beam diameter of the strong light source is within a suitable range. It avoids the situation where the beam diameter is too small, causing partial conduction defects that cannot be completely melted off. It also avoids the situation where the beam diameter is too large, causing the first or second grid line to burn out, which would affect the reliability of the solar cell.

[0076] In one possible embodiment, the illumination time of the light source on the location of the conduction defect is preset to be 10ms to 200ms. For example, it can be any value among 10ms, 30ms, 50ms, 70ms, 90ms, 110ms, 130ms, 150ms, 170ms, 200ms or 10 to 200ms, without limitation.

[0077] In this way, the illumination time of the preset light source on the location of the conduction defect is within an appropriate range. This avoids the situation where the conduction defect remains partially conductive due to insufficient illumination time, preventing the conduction defect from being completely melted. It also avoids the situation where the passivation layer of the solar cell melts due to excessive illumination time, which would affect the reliability of the solar cell.

[0078] In some embodiments, after a preset light source illuminates the location of the conduction defect for 10 to 200 ms, a defect detection device can be used for retesting. If there is no conduction defect, the process proceeds to the next wafer. If there is still a conduction defect, the location of the conduction defect in the solar cell is illuminated again until the first polar doped region and the second polar doped region are in a non-conductive state at the location of the conduction defect after melting.

[0079] This ensures the effective melting of conduction defects, guaranteeing that the first and second polar doped regions are in a non-conductive state at the location of the conduction defects after melting, thereby improving the performance and yield of solar cells.

[0080] In one possible embodiment, the light intensity of the preset light source is between 1 and 60 solar irradiances. For example, it can be any value among 1, 10, 20, 30, 40, 50, 60 solar irradiances, or between 1 and 60 solar irradiances, without limitation.

[0081] It should be noted that solar intensity is used to calibrate light intensity, and the standard value of one solar intensity is 1000 W / m².

[0082] In this way, the light intensity of the preset light source is kept within an appropriate range. This avoids the situation where the conduction defects remain partially connected due to insufficient light intensity, preventing the conduction defects from being completely melted. It also avoids the situation where the passivation layer of the solar cell is burned off due to excessive light intensity, which would affect the reliability of the solar cell.

[0083] In one design, there is an isolation zone between the first and second gate lines. Figure 5 A flowchart illustrating another defect handling method provided in this application is shown below. Figure 5 As shown in the specific embodiment of this application, in order to determine the location of the conduction defect in the solar cell, the following steps are specifically included: S401. Based on the defect detection equipment, determine the overlapping area between the conductive defect and the isolation zone.

[0084] Among them, in combination with the above Figure 3The regions with conduction defects may include regions overlapping with the first gate line, regions overlapping with the first doped layer, regions overlapping with the isolation region, regions overlapping with the second doped layer, and regions overlapping with the second gate line.

[0085] As one possible implementation, the defect detection device can detect the coordinate information corresponding to the overlapping area of ​​the conductive defect and the isolation area, and send the coordinate information to the electronic device; accordingly, the electronic device receives the coordinate information to determine the overlapping area of ​​the conductive defect and the isolation area.

[0086] S402. The overlapping area between the conduction defect and the isolation area is determined as the location of the conduction defect in the solar cell.

[0087] As one possible implementation, electronic devices can identify the location of the conduction defect in a solar cell by determining all overlapping areas between the conduction defect and the isolation zone.

[0088] As another possible implementation, electronic devices can determine the location of the solar cell's continuity defect by identifying the center point of the overlapping area between the continuity defect and the isolation zone.

[0089] For example, if the overlapping area of ​​the conduction defect and the isolation area is defined as x1 to x2 on the x-axis and y1 to y2 on the y-axis, then the center point of the overlapping area of ​​the conduction defect and the isolation area is (x2 to x1, y2 to y1).

[0090] It is understandable that the overlapping area of ​​the conduction defect and the isolation area is identified as the location of the conduction defect in the solar cell. In this way, when melting the conduction defect, the illumination position can be kept as far away as possible from the first grid line and the second grid line, so as to avoid melting the first grid line or the second grid line and affecting the reliability of the solar cell.

[0091] In one possible embodiment, the defect detection device is a fully automated optical inspection (AOI) device; the resolution of the AOI is less than 100 μm. For example, it can be any value among 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, or less than 100 μm, without limitation.

[0092] Thus, AOI (Automated Optical Inspection) offers high resolution, enabling precise detection of minute conductivity defects between the first and second grid lines of solar cells, avoiding missed detections. During the illumination treatment and retesting stages, it can clearly distinguish whether conductivity defects between the first and second grid lines have been eliminated, reducing false positives and ensuring that only qualified products proceed to the next process. This effectively improves product quality and production efficiency, and reduces the defect rate.

[0093] The above primarily describes the solutions provided by the embodiments of this application from the perspective of defect handling methods for electronic devices. To achieve the above functions, the electronic device includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0094] This application embodiment can divide the electronic device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. Optionally, the module division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation. Furthermore, "module" here can refer to an application-specific integrated circuit (ASIC), a circuit, a processor and memory that executes one or more software or firmware programs, integrated logic circuits, and / or other devices that can provide the above functions.

[0095] When using functional module division Figure 6 A schematic diagram of the structure of an electronic device is shown. Figure 6 As shown, the electronic device 60 includes a determining module 601 and a processing module 602.

[0096] In some embodiments, the electronic device 60 may further include a storage module ( Figure 6 (not shown in the image) is used to store program instructions and data.

[0097] The determination module 601 is used to determine the location of the conduction defect in the solar cell. The solar cell includes a first grid line located in a first polar doped region and a first grid line located in a second polar doped region. The polarities of the first polar doped region and the second polar doped region are different. The conduction defect is a defect that causes electrical conduction between the first grid line and the second grid line. The processing module 602 is used to melt the conduction defect according to its location. After melting, the first polar doped region and the second polar doped region are in a non-conductive state at the location of the conduction defect.

[0098] Optionally, the processing module 602 is specifically used to: illuminate the location of the conduction defect using a preset light source to melt the conduction defect; wherein the center point of the light spot corresponding to the preset light source coincides with the location of the conduction defect.

[0099] Optionally, the preset light source is a laser light source.

[0100] Optionally, the laser spot diameter is 0.1mm to 1mm.

[0101] Optionally, the preset light source is a strong light source; a strong light source is a light source with a light intensity greater than or equal to the light intensity threshold.

[0102] Optionally, the spot diameter of the high-intensity light source is 0.1mm to 10mm.

[0103] Optionally, the illumination time for illuminating the location of the conduction defect using a preset light source is 10ms to 200ms.

[0104] Optionally, the preset light source intensity ranges from 1 solar intensity to 60 solar intensity.

[0105] Optionally, there is an isolation region between the first grid line and the second grid line. The determining module 601 is specifically used to: determine the overlapping area of ​​the conduction defect and the isolation region based on the defect detection equipment; and determine the overlapping area of ​​the conduction defect and the isolation region as the location of the conduction defect of the solar cell.

[0106] Optionally, the defect detection equipment is a fully automated optical inspection (AOI) device; the resolution of the AOI is less than 100 μm.

[0107] Optionally, there is an isolation region between the first gate line and the second gate line, and the conduction defect is the gate line located in the isolation region.

[0108] All relevant content of each step involved in the above method embodiments can be referenced from the functional description of the corresponding functional module, and will not be repeated here.

[0109] When the functions of the above modules are implemented in hardware... Figure 7 A schematic diagram of the structure of yet another electronic device is shown. For example... Figure 7 As shown, the electronic device 70 includes a processor 701, a memory 702, and a bus 703. The processor 701 and the memory 702 can be connected via the bus 703.

[0110] Processor 701 is the control center of electronic device 70. It can be a single processor or a collective term for multiple processing elements. For example, processor 701 can be a general-purpose central processing unit (CPU) or other general-purpose processors. Among them, the general-purpose processor can be a microprocessor or any conventional processor.

[0111] As one embodiment, processor 701 may include one or more CPUs, for example Figure 7 CPU 0 and CPU 1 are shown in the diagram.

[0112] The memory 702 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto.

[0113] As one possible implementation, the memory 702 can exist independently of the processor 701. The memory 702 can be connected to the processor 701 via a bus 703 and is used to store instructions or program code. When the processor 701 calls and executes the instructions or program code stored in the memory 702, it can implement the defect handling method provided in the embodiments of this application.

[0114] In another possible implementation, the memory 702 can also be integrated with the processor 701.

[0115] Bus 703 can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. This bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 7 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0116] It should be pointed out that, Figure 7 The structure shown does not constitute a limitation on the electronic device 70. Except... Figure 7 In addition to the components shown, the electronic device 70 may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0117] As an example, combined Figure 6 The functions implemented by the determining module 601 and the processing module 602 in the electronic device 60 are the same as those of the other two modules. Figure 7 The processor 701 in it has the same function.

[0118] Optional, such as Figure 7 As shown, the electronic device 70 provided in this application embodiment may further include a communication interface 704.

[0119] Communication interface 704 is used to connect to other devices via a communication network. This communication network can be Ethernet, a wireless access network, a wireless local area network (WLAN), etc. Communication interface 704 may include a receiving unit for receiving data and a transmitting unit for transmitting data.

[0120] In one possible implementation, the communication interface 704 in the electronic device 70 provided in this application embodiment can also be integrated into the processor 701, and this application embodiment does not specifically limit this.

[0121] As one possible product form, the electronic device of the present application embodiment can also be implemented using the following: one or more field programmable gate arrays (FPGAs), programmable logic devices (PLDs), controllers, state machines, gate logic, discrete hardware components, any other suitable circuits, or any combination of circuits capable of performing the various functions described throughout this application.

[0122] Through the above description of the embodiments, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional units is used as an example. In practical applications, the above functions can be assigned to different functional units as needed, that is, the internal structure of the device can be divided into different functional units to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0123] This application also provides a computer-readable storage medium storing a computer program or instructions thereon, which, when executed, causes a computer to perform the various steps in the method flow shown in the above method embodiments.

[0124] Embodiments of this application provide a computer program product containing instructions that, when executed on a computer, cause the computer to perform the various steps in the method flow shown in the above-described method embodiments.

[0125] This application provides a chip system, including: a processor and an interface circuit; the interface circuit is used to receive computer programs or instructions and transmit them to the processor; the processor is used to execute the computer programs or instructions so that the chip system performs each step in the method flow shown in the above method embodiments.

[0126] The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), registers, hard disks, optical fibers, compact disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing, or any other form of computer-readable storage medium in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may reside in a purpose-specific ASIC. In the embodiments of this application, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0127] Since the electronic device, computer-readable storage medium, and computer program product provided in this embodiment can be applied to the defect handling method provided in this embodiment, the technical effects they can achieve can also be referred to the above method embodiments. The embodiments of this application will not be repeated here.

[0128] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0129] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A method for handling conduction defects in solar cells, characterized in that, The solar cell includes a first grid line located in a first polar doped region and a first grid line located in a second polar doped region, wherein the polarities of the first polar doped region and the second polar doped region are different. The method includes: The location of the conduction defect in the solar cell is determined, wherein the conduction defect is a defect that causes electrical conduction between the first grid line and the second grid line; Based on the location of the conduction defect, the conduction defect is melted, and the first polar doped region and the second polar doped region are in a non-conductive state at the location of the conduction defect after melting.

2. The method according to claim 1, characterized in that, The step of melting the conduction defect according to its location includes: The location of the conduction defect is illuminated using a preset light source to melt the conduction defect; The center point of the light spot corresponding to the preset light source coincides with the position of the conduction defect.

3. The method according to claim 2, characterized in that, The preset light source is a laser light source.

4. The method according to claim 3, characterized in that, The laser light source has a spot diameter of 0.1 mm to 1 mm.

5. The method according to claim 2, characterized in that, The preset light source is a high-intensity light source; the high-intensity light source is a light source with a light intensity greater than or equal to a light intensity threshold.

6. The method according to claim 5, characterized in that, The diameter of the light spot of the high-intensity light source is 0.1 mm to 10 mm.

7. The method according to claim 2, characterized in that, The illumination time for illuminating the location of the conduction defect using the preset light source is 10ms to 200ms.

8. The method according to claim 2, characterized in that, The light intensity of the preset light source is between 1 solar intensity and 60 solar intensity.

9. The method according to any one of claims 1-8, characterized in that, An isolation region exists between the first grid line and the second grid line. Determining the location of the conduction defect in the solar cell includes: Based on the defect detection equipment, the overlapping area between the conductive defect and the isolation area is determined; the overlapping area is taken as the location of the conductive defect of the solar cell.

10. The method according to claim 9, characterized in that, The defect detection equipment is a fully automated optical inspection (AOI) device; the resolution of the AOI is less than 100 μm.

11. A defect handling system, characterized in that, The defect handling system includes an electronic device, a preset light source, and a defect detection device. The preset light source is used to illuminate the location of the conduction defect, the defect detection device is used to detect the location of the conduction defect in the solar cell, and the electronic device is used to execute the defect handling method as described in any one of claims 1-10.

12. An electronic device, characterized in that, The electronic device includes: a determining module and a processing module; The determining module is used to determine the location of a conduction defect in a solar cell; the solar cell includes a first grid line located in a first polar doped region and a first grid line located in a second polar doped region; the first polar doped region and the second polar doped region have different polarities; the conduction defect is a defect that causes electrical conduction between the first grid line and the second grid line; The processing module is used to melt the conduction defect according to its location, wherein the first polar doped region and the second polar doped region are in a non-conductive state at the location of the conduction defect after melting.

13. An electronic device, characterized in that, The electronic device includes: a processor coupled to a memory for storing programs or instructions that, when executed by the processor, cause the electronic device to perform the method as described in any one of claims 1-10.

14. A computer-readable storage medium having a computer program or instructions stored thereon, characterized in that, When the computer program or instructions are executed, they cause the computer to perform the method as described in any one of claims 1-10.

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