Solar cell, photovoltaic module and photovoltaic system

Abstract

The invention provides a solar cell, a photovoltaic module and a photovoltaic system. The solar cell includes: a semiconductor substrate having a first surface, the first surface including a first region and a second region disposed adjacent to each other in a first direction, the first direction being parallel to the first surface; the first doping layer is located on one side of the semiconductor substrate, and the first doping layer comprises a first sub-doping part located in the first region and a second sub-doping part located in the second region; at least part of the second doping layer is located on the second sub-doping part, the distance between the second doping layer and the first surface in the second direction is larger than the distance between the first sub-doping part and the first surface, the second direction is perpendicular to the first surface, and the doping types of the first doping layer and the second doping layer are opposite. According to the invention, the problem of poor surface passivation quality consistency of the solar cell in the prior art is solved.

Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology, and more specifically, to a solar cell, a photovoltaic module, and a photovoltaic system. Background Technology

[0002] Traditional solar cells, such as TBC (Back-Contact) or similar crystalline silicon solar cells, form their pn junctions on a silicon substrate. Typically, the N-type and P-type doped polycrystalline silicon layers on the back side are in direct contact with the silicon wafer to construct the basic functional structure of the cell. However, this traditional structure has several drawbacks, such as poor consistency in surface passivation quality, particularly in the P-type doped polycrystalline silicon region, where the surface recombination rate is often higher than in the N-type doped polycrystalline silicon region, which degrades the overall performance of the cell. Furthermore, forming the pn junction and the associated back surface field usually requires multiple masking and patterning steps, increasing manufacturing complexity and cost.

[0003] The information disclosed in the background section is only intended to enhance the understanding of the background art of the art described herein. Therefore, the background art may contain certain information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] The main objective of this application is to provide a solar cell, photovoltaic module, and photovoltaic system to at least solve the problem of poor surface passivation quality consistency in the prior art.

[0005] To achieve the above objectives, according to one aspect of this application, a solar cell is provided, comprising: a semiconductor substrate having a first surface, the first surface including a first region and a second region disposed adjacent to each other along a first direction, the first direction being parallel to the first surface; a first doped layer located on one side of the semiconductor substrate, the first doped layer including a first sub-doped portion located in the first region and a second sub-doped portion located in the second region; a second doped layer, at least a portion of the second doped layer being located on the second sub-doped portion, and the distance between the second doped layer and the first surface in a second direction being greater than the distance between the first sub-doped portion and the first surface, the second direction being perpendicular to the first surface, and the doping types of the first doped layer and the second doped layer being opposite.

[0006] Optionally, the second doped layer is located on the second sub-doped portion.

[0007] Optionally, the doping type of the semiconductor substrate is the same as the doping type of the first doped layer.

[0008] Optionally, the semiconductor substrate is doped with N-type, the first doped layer is doped with N-type, and the second doped layer is doped with P-type.

[0009] Optionally, the first doped layer contains a first doping element, and the second doped layer contains a second doping element, wherein the first doping element includes phosphorus and the second doping element includes boron.

[0010] Optionally, the first region and the second region are distributed alternately along the first direction.

[0011] Optionally, the first region and the second region are interdigitated along the first direction.

[0012] Optionally, the solar cell includes a fine grid, which includes a first fine grid and a second fine grid. The first fine grid is located at least in a first region, and the second fine grid is located at least in a second region. The first fine grid and the second fine grid are alternately arranged along a first direction and extend along a third direction, with the first direction and the third direction intersecting. The first fine grid is electrically connected to a first sub-doped portion, and the second fine grid is electrically connected to a second doped layer.

[0013] Optionally, the solar cell includes a main grid, which includes a first main grid and a second main grid. The first main grid and the second main grid are alternately distributed in a third direction, and the first main grid is electrically connected to a first fine grid, and the second main grid is electrically connected to a second fine grid.

[0014] Optionally, at least one first main grid is located between two adjacent second fine grids arranged side by side along a third direction and intersects with at least one first fine grid, and at least one second main grid is located between two adjacent first fine grids arranged side by side along a third direction and intersects with at least one second fine grid.

[0015] Optionally, the first and second gratings have opposite polarities.

[0016] Optionally, the first sub-doped portion and the second sub-doped portion are arranged in contact in a first direction.

[0017] Optionally, the first sub-doped portion and the second sub-doped portion are spaced apart.

[0018] Optionally, at least a portion of the trench is disposed in the first doped layer, and at least a portion of the trench is located between the first sub-doped portion and the second sub-doped portion in the first direction.

[0019] Optionally, the trench is disposed in the first doped layer.

[0020] Optionally, the trench is disposed in the first doped layer and the semiconductor substrate.

[0021] Optionally, the orthographic projection of the first fine gate on the first surface is a first orthographic projection, and the orthographic projection of the first sub-doped portion on the first surface is a second orthographic projection, with the first orthographic projection falling within the second orthographic projection region.

[0022] Optionally, the orthographic projection of the second fine gate on the first surface is a third orthographic projection, and the orthographic projection of the second doped layer on the first surface is a fourth orthographic projection, with the third orthographic projection falling into the region of the fourth orthographic projection.

[0023] Optionally, the orthographic projection of the second fine grid on the first surface is a third orthographic projection, and the orthographic projection of the second doped layer on the first surface is a fourth orthographic projection. The third orthographic projection covers the fourth orthographic projection and extends along the first direction into the region of the second orthographic projection. The solar cell further includes an insulating dielectric layer, at least a portion of which is located between the second fine grid and the first sub-doped portion.

[0024] Optionally, the insulating dielectric layer includes a first insulating portion and a second insulating portion. The first insulating portion is located between the second fine gate and the first sub-doped portion. The second insulating portion includes the first sub-insulating portion and the second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion and has a first via. At least a portion of the material of the first fine gate fills the first via. The second sub-insulating portion covers the second doped layer and has a second via. At least a portion of the material of the second fine gate fills the second via.

[0025] Optionally, when the first sub-doped portion and the second sub-doped portion are disposed in contact in a first direction, the orthographic projection of the first fine grid on the first surface is a first orthographic projection, the orthographic projection of the first sub-doped portion on the first surface is a second orthographic projection, the first orthographic projection covers the second orthographic projection and extends along the first direction to the fourth orthographic projection region, and the solar cell further includes: an insulating dielectric layer, at least a portion of the material of the insulating dielectric layer being located between the first fine grid and the second doped layer.

[0026] Optionally, the insulating dielectric layer includes a first insulating portion and a second insulating portion. The first insulating portion is located between a first fine gate and a second sub-doped portion. The second insulating portion includes a first sub-insulating portion and a second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion and has a first via. At least a portion of the material of the first fine gate fills the first via. The second sub-insulating portion covers the second doped layer and has a second via. At least a portion of the material of the second fine gate fills the second via.

[0027] Optionally, the orthographic projection of the first fine gate on the first surface is a first orthographic projection, and the orthographic projection of the first sub-doped portion on the first surface is a second orthographic projection. The first orthographic projection covers the second orthographic projection and extends along the first direction into the trench region. The solar cell further includes: an insulating dielectric layer, at least a portion of the material of the insulating dielectric layer is located in the trench, and at least a portion of the material is located between the first fine gate and the semiconductor substrate and between the first fine gate and the second doped layer.

[0028] Optionally, the orthographic projection of the second fine grid on the first surface is a third orthographic projection, and the orthographic projection of the second doped layer on the first surface is a fourth orthographic projection. The third orthographic projection covers the fourth orthographic projection and extends along the first direction into the trench region. The solar cell further includes: an insulating dielectric layer, at least a portion of which is located in the trench, and at least a portion of which is located between the second fine grid and the semiconductor substrate and between the second fine grid and the first doped layer.

[0029] Optionally, the insulating dielectric layer includes a first insulating portion and a second insulating portion. The first insulating portion includes at least a portion of material located in the trench. The second insulating portion includes a first sub-insulating portion and a second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion and has a first via. At least a portion of the material of the first fine gate fills the first via. The second sub-insulating portion covers the second doped layer and has a second via. At least a portion of the material of the second fine gate fills the second via.

[0030] Optionally, the first surface is a textured surface.

[0031] Alternatively, textured surfaces may include velvety and polished surfaces.

[0032] Optionally, the first surface includes a contact surface between the first doped layer and the semiconductor substrate, the contact surface being a textured surface; and / or, the first surface includes a bottom surface of a trench, the bottom surface being a velvety surface.

[0033] Optionally, the velvet surface may include a regular pyramid shape or an inverted pyramid shape.

[0034] Optionally, the solar cell further includes a first tunneling layer located between the semiconductor substrate and the first doped layer.

[0035] Optionally, the first tunneling layer is a membrane with a porous structure.

[0036] Optionally, the solar cell further includes a second tunneling layer located between the second sub-doped portion and the second doped layer.

[0037] Optionally, the second tunneling layer is a membrane with a porous structure.

[0038] Optionally, the semiconductor substrate is a silicon substrate.

[0039] Optionally, at least one of the first doped layer and the second doped layer comprises polycrystalline silicon.

[0040] Optionally, the doping type of the semiconductor substrate is opposite to that of the first doped layer.

[0041] To achieve the above objectives, according to another aspect of this application, a solar cell is provided. The solar cell includes: a semiconductor substrate having a first surface, the first surface including a first region and a second region disposed adjacent to each other along a first direction, the first direction being parallel to the first surface; a first doped layer located on one side of the semiconductor substrate, the first doped layer including a first sub-doped portion located in the first region and a second sub-doped portion located in the second region; and a doped region extending from a surface region on the side of the second sub-doped portion away from the semiconductor substrate along a second direction into the second sub-doped portion, wherein the doping types of the first doped layer and the doped region are opposite, and the second direction is perpendicular to the first surface.

[0042] Optionally, the solar cell further includes: a first tunneling layer located between the semiconductor substrate and the first doped layer, wherein the first tunneling layer is a film layer with a porous structure.

[0043] According to another aspect of this application, a photovoltaic module is provided, comprising: a solar cell as described above, or a solar cell as described above.

[0044] According to another aspect of this application, a photovoltaic system is provided, including the photovoltaic module as described above.

[0045] Optionally, the photovoltaic system includes an off-grid solar power generation system, which includes the aforementioned photovoltaic modules.

[0046] This application provides a solar cell comprising a semiconductor substrate, a first doped layer, and a second doped layer. Specifically, the semiconductor substrate has a first surface, which includes a first region and a second region adjacent to each other along a first direction parallel to the first surface. The first doped layer is located on one side of the semiconductor substrate and includes a first sub-doped portion and a second sub-doped portion. The first sub-doped portion is located in the first region of the first surface, and the second sub-doped portion is located in the second region of the first surface. At least a portion of the second doped layer is located on the second sub-doped portion, and the doping types of the first and second doped layers are opposite. Therefore, through this application, both the first region and the second region of the first surface of the semiconductor substrate are passivated by the same doped layer of the same doping type as the semiconductor substrate—namely, the first doped layer. This avoids the problem of reduced surface passivation consistency caused by doped layers of different doping types on the semiconductor substrate, thus solving the problem of poor surface passivation quality consistency in existing solar cells. Furthermore, the P / N junction formed between the second sub-doped portion and the second doped layer can generate a stronger built-in electric field, thereby more effectively separating photogenerated electrons and holes, reducing recombination losses, and improving the photoelectric conversion efficiency of the cell. Based on the above, the distance between the second doped layer and the first surface is greater than the distance between the first sub-doped portion and the first surface in the second direction, and the second direction is perpendicular to the first surface. This results in a wider space charge region and increased parallel resistance of the battery, which helps improve the stability and reliability of the battery. Attached Figure Description

[0047] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0048] Figure 1 A cross-sectional structural schematic diagram of a solar cell according to a first embodiment of this application is shown;

[0049] Figure 2 A cross-sectional structural schematic diagram of a solar cell according to a second embodiment of this application is shown;

[0050] Figure 3 A cross-sectional structural schematic diagram of a solar cell according to a third embodiment of this application is shown;

[0051] Figure 4 A cross-sectional structural schematic diagram of a solar cell according to a fourth embodiment of this application is shown;

[0052] Figure 5 A cross-sectional structural schematic diagram of a solar cell according to a fifth embodiment of this application is shown;

[0053] Figure 6 A cross-sectional structural schematic diagram of a solar cell according to a sixth embodiment of this application is shown;

[0054] Figure 7 A cross-sectional structural schematic diagram of a solar cell according to the seventh embodiment of this application is shown;

[0055] Figure 8 A cross-sectional structural schematic diagram of a solar cell according to the eighth embodiment of this application is shown.

[0056] The above figures include the following reference numerals:

[0057] 10. Semiconductor substrate; 20. First doped layer; 210. First sub-doped portion; 220. Second sub-doped portion; 30. Second doped layer; 310. Doped region; 40. Fine gate; 410. First fine gate; 420. Second fine gate; 50. Insulating dielectric layer; 501. First insulating portion; 60. First tunneling layer; 70. Second tunneling layer; S1. First region; S2. Second region; S3. Trench region. Detailed Implementation

[0058] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0059] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0060] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of the invention described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0061] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be an intermediate element present. Furthermore, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element via a third element.

[0062] As described in the background section, conventional solar cells in the prior art suffer from several problems, such as poor consistency in surface passivation quality, particularly in P-type doped polycrystalline silicon regions, where the surface recombination rate is often higher than that in N-type doped polycrystalline silicon regions, which reduces the overall performance of the cell. Furthermore, forming the p / n junction and associated back surface field typically requires multiple masking and patterning steps, increasing manufacturing complexity and cost. To at least address the problem of poor surface passivation quality consistency in prior art solar cells, embodiments of this application provide a solar cell, a photovoltaic module, and a photovoltaic system.

[0063] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0064] Figures 1 to 5 This is a cross-sectional structural diagram of a solar cell according to the first to fifth embodiments of this application. Figures 1 to 5 As shown, the solar cell includes: a semiconductor substrate 10 having a first surface, the first surface including a first region S1 and a second region S2 disposed adjacent to each other along a first direction A, the first direction A being parallel to the first surface; a first doped layer 20 located on one side of the semiconductor substrate 10, the first doped layer 20 including a first sub-doped portion 210 located in the first region S1 and a second sub-doped portion 220 located in the second region S2; and a second doped layer 30, at least partially located on the second sub-doped portion 220. Furthermore, in a second direction, the distance between the second doped layer 30 and the first surface is greater than the distance between the first sub-doped portion 210 and the first surface, the second direction being perpendicular to the first surface, and the doping types of the first doped layer 20 and the second doped layer 30 being opposite.

[0065] Applying the technical solution of this application, a solar cell is provided, including a semiconductor substrate 10, a first doped layer 20, and a second doped layer 30. Specifically, the semiconductor substrate 10 has a first surface, which includes a first region S1 and a second region S2 disposed adjacent to each other along a first direction A, the first direction A being parallel to the first surface. The first doped layer 20 is located on one side of the semiconductor substrate 10 and includes a first sub-doped portion 210 and a second sub-doped portion 220. The first sub-doped portion 210 is located in the first region S1 of the first surface, and the second sub-doped portion 220 is located in the second region S2 of the first surface. At least a portion of the second doped layer 30 is located on the second sub-doped portion 220. The doping types of the first doped layer 20 and the second doped layer 30 are opposite. Therefore, through this application, both the first region S1 and the second region S2 of the first surface of the semiconductor substrate 10 are doped layers of the same doping type as the semiconductor substrate 10, namely the first doped layer 20, which achieves surface passivation. This avoids the problem of reduced surface passivation uniformity caused by different doping types on the semiconductor substrate 10, thus solving the problem of poor surface passivation quality uniformity in existing solar cells. Furthermore, the P / N junction formed between the second sub-doped portion 220 and the second doped layer 30 can generate a stronger built-in electric field, thereby more effectively separating photogenerated electrons and holes, reducing recombination losses, and improving the photoelectric conversion efficiency of the cell. Based on the above, the distance between the second doped layer 30 and the first surface is greater in the second direction than the distance between the first sub-doped portion 210 and the first surface, and the second direction is perpendicular to the first surface. This results in a wider space charge region and increased parallel resistance of the cell, contributing to improved cell stability and reliability.

[0066] In addition, the p / n junction in traditional solar cell structures is formed directly on the silicon wafer, which usually requires multiple masking and patterning processes to prepare the first doped layer 20 and the second doped layer 30 respectively. In contrast, in the solar cell of this application, there is no need to perform additional masking and patterning processing on the second region S2 during the preparation of the first doped layer 20, thereby simplifying the process steps, reducing the process complexity and the production cost of solar cells.

[0067] In this application, the second doped layer may be located on the second sub-doped portion; or, the first surface may include other regions besides the first region and the second region, and the second doped layer may include a portion of the second doped layer located on the second sub-doped portion and another portion of the second doped layer extending from the portion of the second extension layer to other regions on the first surface besides the first region and the second region.

[0068] Specifically, such as Figures 1 to 5As shown, when the second doped layer 30 can all be located on the second sub-doped portion 220, the entire second doped layer 30 is isolated from the semiconductor substrate 10 in the second direction by the second sub-doped portion 220. This means that the second sub-doped portion 220, not the second doped layer 30, is used to passivate the second region S2 on the surface of the semiconductor substrate 10. Thus, the doped layer used to passivate the first region S1 and the second region S2 on the surface of the semiconductor substrate 10 is the first doped layer 20, thereby effectively improving the surface passivation quality uniformity of the solar cell.

[0069] In this embodiment, where the second doped layer may include a portion of the second doped layer located on the second sub-doped portion and another portion of the second doped layer, the portion of the second doped layer located on the second sub-doped portion is isolated from the semiconductor substrate in the second direction by the second sub-doped portion. This means that the second sub-doped portion, not the second doped layer, is used to passivate the second region on the surface of the semiconductor substrate. Thus, the doped layers used to passivate the first and second regions on the surface of the semiconductor substrate are both first doped layers, thereby effectively improving the uniformity of surface passivation quality of the solar cell. Furthermore, the other portion of the second doped layer located on the first surface, excluding the first and second regions, does not have a second sub-doped portion between it and the semiconductor substrate in the second direction; that is, there is no isolation between the other portion of the second doped layer and the semiconductor substrate. This reduces the series resistance inside the solar cell. Therefore, through this embodiment, not only is the problem of poor surface passivation uniformity of the solar cell improved by the portion of the second doped layer located on the second sub-doped portion, but the series resistance inside the solar cell is also reduced by the other portion of the second doped layer located on the first surface.

[0070] In some implementations, such as Figures 1 to 5 As shown, the doping type of the semiconductor substrate 10 can be the same as or opposite to the doping type of the first doped layer 20.

[0071] In cases where the doping type of the semiconductor substrate 10 is opposite to that of the first doped layer 20, p / n junctions can be formed between the first doped layer 20 and the semiconductor substrate 10, and between the second sub-doped portion 220 and the second doped layer 30, respectively. These p / n junctions provide the basis for the photovoltaic conversion of the solar cell. Furthermore, each p / n junction can create a built-in electric field. This dual p / n junction further promotes carrier separation, enhances the carrier collection efficiency and charge separation effect of the solar cell, and thus further improves the overall performance.

[0072] For example, such as Figures 1 to 5As shown, when the doping type of the semiconductor substrate 10 is N-type, the doping type of the first doped layer 20 is P-type, and the doping type of the second doped layer 30 is N-type; or, when the doping type of the semiconductor substrate 10 is P-type, the doping type of the first doped layer 20 is N-type, and the doping type of the second doped layer 30 is P-type.

[0073] When the doping type of the semiconductor substrate 10 is the same as that of the first doped layer 20, high-low junctions can be formed between the first sub-doped portion 210 and the semiconductor substrate 10, and between the second sub-doped portion 220 and the semiconductor substrate 10, respectively. A p / n junction can be formed between the second sub-doped portion 220 and the second doped layer 30. It is understood that the solar cell does not form a p / n junction on the semiconductor substrate 10 (silicon substrate). Instead, a high-low junction is formed by depositing the first doped layer 20 on the surface of the semiconductor substrate 10 (silicon substrate), and a second doped layer 30 of another doping type is formed in the local high-low junction region (the second region S2 corresponding to the second sub-doped portion 220), thereby forming a p / n structure outside the semiconductor substrate 10 (silicon substrate). Thus, the solar cell in this embodiment replaces the existing photovoltaic cells that achieve a p / n junction through the semiconductor substrate 10 (silicon substrate) and can exhibit a significant photovoltaic effect. The p / n junction provides the foundation for photovoltaic conversion in solar cells, and its built-in electric field facilitates the separation of photogenerated carriers. The high / low junction helps accelerate carrier separation and collection, reducing carrier residence time in the depletion layer, thereby reducing recombination losses and improving solar cell performance. To further improve the passivation quality of solar cell surfaces while enhancing surface uniformity, some optional implementations include... Figures 1 to 5 As shown, when the doping type of the semiconductor substrate 10 is the same as the doping type of the first doped layer 20, the doping type of the semiconductor substrate 10 includes N-type, the doping type of the first doped layer 20 includes N-type, and the doping type of the second doped layer 30 includes P-type.

[0074] In some alternative implementations, such as Figures 1 to 5 As shown, the first doped layer 20 contains a first doping element, and the second doped layer 30 contains a second doping element. The first doping element includes phosphorus, and the second doping element includes boron. Thus, by using phosphorus and boron as doping elements, existing mature processes can be used to achieve low-cost and high-efficiency solar cell manufacturing.

[0075] The semiconductor substrate 10 can also be p-type doped, and the first doped layer 20 can be p-type doped, while the second doped layer 30 can be n-type doped. In this case, the first dopant element in the first doped layer 20 is a p-type dopant element, and the second dopant element in the second doped layer 30 is an n-type dopant element. Conversely, if the first doped layer 20 is n-type and the second doped layer 30 is p-type, then the first dopant element in the first doped layer 20 is an n-type dopant element, and the second doped element in the second doped layer 30 is a p-type dopant element.

[0076] In addition to phosphorus, N-type dopants may include, but are not limited to, arsenic, antimony, and nitrogen; in addition to boron, P-type dopants may include, but are not limited to, gallium, indium, aluminum, and germanium.

[0077] like Figures 1 to 5 As shown, based on the first sub-doped portion 210 being provided in the first region S1 and the second doped layer 30 being provided in the second region S2, in some embodiments, the first region S1 and the second region S2 can be alternately distributed along the first direction A. In this way, the first sub-doped portion 210 and the second doped layer 30 can be alternately distributed along the first direction A, which means that the distribution of the first sub-doped portion 210 and the second doped layer 30 on the entire first surface of the solar cell is more uniform. This is beneficial to the transport of photogenerated carriers inside the solar cell, thereby helping to improve the stability and reliability of the cell, and also helping to optimize the overall output of the solar cell.

[0078] In some optional embodiments, the first region S1 and the second region S2 are interdigitated along the first direction A. Specifically, since the first region S1 is provided with the first sub-doped portion 210 and the second region S2 is provided with the second doped layer 30, the first sub-doped portion 210 and the second doped layer 30 can be interdigitated along the first direction A. This further reduces the movement path of photogenerated carriers, thereby further reducing energy loss of carriers during transmission and further improving the overall efficiency of the solar cell.

[0079] like Figures 1 to 5As shown, in order to quickly collect photogenerated carriers inside the solar cell, in some optional embodiments, the solar cell includes a fine grid 40, which includes a first fine grid 410 and a second fine grid 420. The first fine grid 410 is located at least in the first region S1, and the second fine grid 420 is located at least in the second region S2. The first fine grid 410 and the second fine grid 420 are alternately arranged along the first direction A and extend along a third direction, and the first direction A and the third direction intersect. Optionally, the first fine grid 410 and the second fine grid 420 have opposite polarities. The first fine grid 410 is electrically connected to the first sub-doped portion 210, and the second fine grid 420 is electrically connected to the second doped layer 30.

[0080] Specifically, such as Figures 1 to 5 As shown, in addition to the semiconductor substrate 10, the first doped layer 20, and the second doped layer 30, the solar cell may also include a fine grid 40. The fine grid 40 includes a first fine grid 410 and a second fine grid 420 with opposite polarities. The first fine grid 410 is electrically connected to the first doped layer 20, and the second fine grid 420 is electrically connected to the second doped layer 30. It should be noted that the first fine grid 410 and the second fine grid 420 are insulated from each other, the first fine grid 410 and the second doped layer 30 are insulated from each other, and the second fine grid 420 and the first doped layer 20 are insulated from each other.

[0081] Furthermore, such as Figures 1 to 5 As shown, when the first doped layer 20 is provided in the first region S1, in order to make the first fine gate 410 electrically connected to the first doped layer 20, the first fine gate 410 can be arranged in the first region S1 where the first doped layer 20 is provided; when the second doped layer 30 is provided in the second region S2, in order to make the second fine gate 420 electrically connected to the second doped layer 30, the second fine gate 420 can be arranged in the second region S2 where the second doped layer 30 is provided.

[0082] Optionally, such as Figures 1 to 5 As shown, when the first region S1 and the second region S2 are arranged adjacent to each other along the first direction A, the first fine gate 410 and the second fine gate 420 can be arranged adjacent to each other along the first direction A.

[0083] Optionally, such as Figures 1 to 5As shown, the first fine gate 410 is located at least in the first region S1, and the second fine gate 420 is located at least in the second region S2. The first fine gate 410 is electrically connected to the first sub-doped portion 210, and the second fine gate 420 is electrically connected to the second doped layer 30. When the first region S1 and the second region S2 are alternately distributed or interdigitated along the first direction A, the first fine gate 410 and the second fine gate 420 are alternately arranged along the first direction A and extend along a third direction, where the first direction A and the third direction intersect. The third direction is parallel to the first surface.

[0084] In the above embodiments, the first fine gate 410 and the first sub-doped portion 210 can be electrically connected through direct contact, and the second fine gate 420 and the second doped layer 30 can be electrically connected through direct contact. When the first fine gate 410 and the second fine gate 420 are alternately distributed along the first direction A, the generated photogenerated carriers can move towards the nearest first fine gate 410 or second fine gate 420. This significantly improves the carrier collection efficiency, reduces recombination losses during carrier transport, and allows the photogenerated current to be uniformly distributed inside the solar cell, avoiding the generation of local hot spots. Of course, when the first fine gate 410 and the second fine gate 420 are interdigitated along the first direction A, the carrier collection efficiency can be further improved, thereby further reducing recombination losses during carrier transport.

[0085] It should be noted here that, as Figures 1 to 5 As shown, since a first sub-doped portion 210 is provided on the first region S1, the first fine gate 410 being at least located in the first region S1 means that the first sub-doped portion 210 on the first region S1 is located on the side opposite to the semiconductor substrate 10. Similarly, since a second doped layer 30 is provided on the second region S2, the second fine gate 420 being at least located in the second region S2 means that the second doped layer 30 on the second region S2 is located on the side opposite to the semiconductor substrate 10.

[0086] To shorten the current collection path and reduce resistance, in some optional embodiments, the solar cell includes a main grid, which comprises a first main grid and a second main grid. The first main grid and the second main grid are alternately distributed in the third direction, and the first main grid is electrically connected to the first fine grid, and the second main grid is electrically connected to the second fine grid. Both the first and second main grids can extend along a first direction.

[0087] Specifically, in addition to the aforementioned semiconductor substrate, first doped layer, second doped layer, and fine grid, the solar cell also includes a main grid. The main grid comprises a first main grid and a second main grid with opposite polarities. The first main grid is electrically connected to a first fine grid, and the second main grid is electrically connected to a second fine grid. Thus, the combination of the main grid and the fine grid shortens the current collection path and reduces the resistance. It should be noted that the first and second main grids are insulated from each other, as are the first and second doped layers, and the second main grid and the first doped layer.

[0088] Furthermore, when the first region is provided with a first doped layer and a first fine gate, in order to make the first main gate electrically connected to multiple first fine gates and collect the current of multiple first fine gates, the first main gate may be disposed on the side of the first doped layer away from the semiconductor substrate and in contact with multiple first fine gates; when the second region is provided with a second doped layer and a second fine gate, in order to make the second main gate electrically connected to multiple second fine gates and collect the current of multiple second fine gates, the second main gate may be disposed on the side of the second doped layer away from the semiconductor substrate and in contact with multiple second fine gates.

[0089] Optionally, when multiple first fine gates and multiple second fine gates are alternately distributed in a first direction, in order to allow the first main gate to be electrically connected to the multiple first fine gates without affecting the electrical connection between the second main gate and the multiple second fine gates, at least a portion of each of the multiple first fine gates and at least a portion of each of the multiple second fine gates are distributed between the first main gate and the second main gate in a third direction. Thus, the first main gate may be located on the side of the multiple first fine gates away from the second main gate in the third direction and intersect with the multiple first fine gates, and the second main gate may be located on the side of the multiple second fine gates away from the first main gate in the third direction and intersect with the multiple second fine gates.

[0090] A portion of the first main gate may be in contact with the first doped layer, or the first main gate may only be in contact with the first fine gate; a portion of the second main gate may be in contact with the second doped layer, or the second main gate may only be in contact with the second fine gate.

[0091] Optionally, at least one first main grid can be located between two adjacent second fine grids arranged side-by-side along a third direction and intersect with at least one first fine grid, and at least one second main grid can be located between two adjacent first fine grids arranged side-by-side along a third direction and intersect with at least one second fine grid. Thus, when multiple first fine grids and multiple second fine grids are arranged side-by-side along a third direction, the current path on each first fine grid or each second fine grid can be shortened. This improves the current collection efficiency of the solar cell while reducing resistance loss in the metal contact area.

[0092] Furthermore, in order to reduce processes and lower costs, such as Figures 1 to 3 And such as Figures 6 to 8 As shown, the first sub-doped portion 210 and the second sub-doped portion 220 can be disposed in contact along the first direction A; or, as... Figure 4 and Figure 5 As shown, to improve the parallel resistance of the device, the first sub-doped portion 210 and the second sub-doped portion 220 can also be spaced apart in the first direction A. Of course, the first and second sub-doped portions can be partially contacted and partially isolated by trenches. It is important to emphasize that regardless of how the first and second sub-doped portions 210 and 220 are arranged, at least a portion of the second doped layer 30 will be located on the second sub-doped portion 220. This effectively improves the problem of poor surface passivation uniformity of the semiconductor substrate 10 caused by forming doped layers of different doping types in the first region S1 and the second region S2, thereby effectively improving the uniformity of the surface passivation effect of the semiconductor substrate 10 and the stability of the device performance.

[0093] Optionally, such as Figure 4 and Figure 5 As shown, in order to ensure that the first sub-doped portion 210 and the second sub-doped portion 220 are spaced apart in the first direction A, the solar cell may further include trenches (not shown in the figure, but it can be understood that the area corresponding to the trench region S3 is the location of the trench). That is, in some optional embodiments, at least a portion of the trenches are disposed in the first doped layer 20, and at least a portion of the trenches are located between the first sub-doped portion 210 and the second sub-doped portion 220 in the first direction A.

[0094] It is understandable that, since the trench is mainly used to separate the first sub-doped portion and the second sub-doped portion, its depth in the second direction only needs to ensure that the first sub-doped portion and the second sub-doped portion are separated, and no specific limitation is made here. For example, as shown... Figure 4 and Figure 5 As shown, the trench can be disposed in the first doped layer 20, that is, the trench can penetrate the first doped layer 20 and the bottom surface of the trench can be flush with the lower surface of the first doped layer 20 or flush with the first surface. In other embodiments, the trench can be disposed in the first doped layer and the semiconductor substrate, that is, it can penetrate the first doped layer 20 and extend into the semiconductor substrate, so that the semiconductor substrate has a recessed portion from the first surface into the interior of the semiconductor substrate, and the bottom surface of the trench is the bottom surface of the recessed portion.

[0095] It should be noted here that, as Figures 1 to 5As shown, the orthographic projection of the first fine gate 410 on the first surface can be a first orthographic projection, the orthographic projection of the first sub-doped portion 210 on the first surface can be a second orthographic projection, the orthographic projection of the second fine gate 420 on the first surface can be a third orthographic projection, and the orthographic projection of the second doped layer 30 on the first surface can be a fourth orthographic projection.

[0096] like Figure 1 , Figure 2 and Figure 4 As shown, in order to ensure effective contact between the first fine gate 410 and the first doped layer 20, in some optional embodiments, the first orthographic projection corresponding to the first fine gate 410 falls within the second orthographic projection region corresponding to the first sub-doped portion 210; and / or, as Figure 1 , Figure 3 and Figure 4 As shown, in order to ensure effective contact between the second fine gate 420 and the second doped layer 30, in some optional embodiments, the third orthographic projection of the second fine gate 420 falls into the fourth orthographic projection region of the second doped layer 30.

[0097] Among them, such as Figure 1 and Figure 4 As shown, when the first orthographic projection corresponding to the first fine grid 410 falls within the second orthographic projection region corresponding to the first sub-doped portion 210 and the third orthographic projection corresponding to the second fine grid 420 falls within the fourth orthographic projection region corresponding to the second doped layer 30, the solar cell further includes: an insulating dielectric layer 50, which at least covers the first sub-doped portion 210 and the second doped layer 30 and has a first through-hole (not shown in the figure) and a second through-hole (not shown in the figure). The first through-hole penetrates the insulating dielectric layer 50 to the first sub-doped portion 210, and the second through-hole penetrates the second doped layer 30 of the insulating dielectric layer 50. At least a portion of the material of the first fine grid 410 fills the first through-hole, and at least a portion of the material of the second fine grid 420 fills the second through-hole. Further, as... Figure 4 As shown, when the solar cell also includes trenches and the first sub-doped portion 210 and the second sub-doped portion 220 are arranged at intervals through the trenches, the insulating dielectric layer 50 also covers the entire bottom surface and all sidewalls of the trenches.

[0098] Optionally, the doped layer can be activated by annealing in an H atmosphere to improve the passivation effect of the first doped layer, thereby reducing the thickness of the insulating dielectric layer. For example, the thickness of the insulating dielectric layer can be reduced to <40 nm, or even eliminated, thus reducing production costs.

[0099] like Figure 2As shown, in some alternative embodiments, when the first orthographic projection corresponding to the first fine grid 410 falls within the second orthographic projection region corresponding to the first sub-doped portion 210, the third orthographic projection corresponding to the second fine grid 420 covers the fourth orthographic projection corresponding to the second doped layer 30 and extends along the first direction A into the second orthographic projection region corresponding to the first sub-doped portion 210. The solar cell further includes an insulating dielectric layer 50, at least a portion of which is located between the second fine grid 420 and the first sub-doped portion 210 (e.g., a first insulating portion 501). It is understood that this portion of material in the insulating dielectric layer 50 located between the second fine grid 420 and the first sub-doped portion 210 insulates the second fine grid 420 and the first sub-doped portion 210, thus increasing the coverage area of ​​the second fine grid 420 and forming a back reflector with a "textured structure + high-reflectivity metal," thereby increasing the light-trapping effect of the cell. The insulating dielectric layer 50 is used to insulate the second fine grid 420 and the first doped layer 20.

[0100] Furthermore, such as Figure 2 As shown, in order to enhance or supplement the surface passivation effect of the first doped layer 20 on the semiconductor substrate 10, and to ensure that the first fine gate 410 can contact the first sub-doped portion 210 and that the second fine gate 420 can contact the second doped layer 30, in some optional embodiments, the insulating dielectric layer 50 includes a first insulating portion 501 and a second insulating portion (not shown in the figure, the portion of the insulating dielectric layer 50 other than the first insulating portion 501). The first insulating portion 501 is located between the second fine gate 420 and the first sub-doped portion 210. The second insulating portion includes the first sub-insulating portion and the second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion 210 and has a first through-hole. At least a portion of the material of the first fine gate 410 fills the first through-hole. The second sub-insulating portion covers the second doped layer 30 and has a second through-hole. At least a portion of the material of the second fine gate 420 fills the second through-hole.

[0101] like Figure 3As shown, in some alternative embodiments, when the third orthographic projection corresponding to the second fine grid 420 falls within the fourth orthographic projection region corresponding to the second doped layer 30, and the first sub-doped portion 210 and the second sub-doped portion 220 are contacted in the first direction A, the first orthographic projection corresponding to the first fine grid 410 covers the second orthographic projection corresponding to the first sub-doped portion 210 and extends along the first direction A to the fourth orthographic projection region corresponding to the second doped layer 30. The solar cell further includes an insulating dielectric layer 50, at least a portion of which is located between the first fine grid 410 and the second doped layer 30 (e.g., a first insulating portion 501). It is understood that this portion of material in the insulating dielectric layer 50 located between the first fine grid 410 and the second doped layer 30 insulates the first fine grid 410 and the second doped layer 30, thus increasing the coverage area of ​​the first fine grid 410 and forming a back reflector with a "textured structure + high-reflectivity metal," thereby increasing the light-trapping effect of the cell. The insulating dielectric layer 50 is used to insulate the first fine gate 410 and the second doped layer 30.

[0102] Furthermore, such as Figure 3 As shown, in order to enhance or supplement the surface passivation effect of the first doped layer 20 on the semiconductor substrate 10, and to ensure that the first fine gate 410 can contact the first sub-doped portion 210 and that the second fine gate 420 can contact the second doped layer 30, the insulating dielectric layer 50 includes a first insulating portion 501 and a second insulating portion (not shown in the figure, the portion of the insulating dielectric layer 50 other than the first insulating portion 501). The first insulating portion 501 is located between the first fine gate 410 and the second sub-doped portion 220. The second insulating portion includes the first sub-insulating portion and the second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion 210 and has a first through-hole. At least a portion of the material of the first fine gate 410 fills the first through-hole. The second sub-insulating portion covers the second doped layer 30 and has a second through-hole. At least a portion of the material of the second fine gate 420 fills the second through-hole.

[0103] In addition, such as Figure 5As shown, in some optional embodiments, when the solar cell further includes trenches, the first orthographic projection corresponding to the first fine grid 410 covers the second orthographic projection corresponding to the first sub-doped portion 210 and extends along the first direction A into the trench region S3. The solar cell further includes: an insulating dielectric layer 50, at least a portion of the material of the insulating dielectric layer 50 being located in the trenches, and the at least a portion of the material being located between the first fine grid 410 and the semiconductor substrate 10, and between the first fine grid 410 and the second doped layer 30; and / or, in some optional embodiments, when the solar cell further includes trenches, the third orthographic projection corresponding to the second fine grid 420 covers the fourth orthographic projection corresponding to the second doped layer 30 and extends along the first direction A into the trench region S3. The solar cell further includes: an insulating dielectric layer 50, at least a portion of the material of the insulating dielectric layer 50 being located in the trenches, and the at least a portion of the material being located between the second fine grid 420 and the semiconductor substrate 10, and between the second fine grid 420 and the first doped layer 20. Thus, by increasing the parallel resistance of the device and increasing the coverage area of ​​the first fine gate 410 and / or the second fine gate 420, a back reflector with "textured structure + high reflective metal" is formed, thereby simultaneously increasing the light trapping effect of the battery.

[0104] It is understandable that, such as Figure 5 As shown, in order to avoid the device short circuit caused by direct contact between the first fine gate 410 and the second fine gate 420, the first fine gate 410 and the second fine gate 420 are arranged at intervals in the trench when the first orthographic projection of the first fine gate 410 covers the second orthographic projection of the first sub-doped portion 210 and extends along the first direction A into the trench region S3, and the third orthographic projection of the second fine gate 420 covers the fourth orthographic projection of the second doped layer 30 and extends along the first direction A into the trench region S3.

[0105] Furthermore, such as Figure 5As shown, in order to enhance or supplement the surface passivation effect of the first doped layer 20 on the semiconductor substrate 10, and to ensure that the first fine gate 410 can contact the first sub-doped portion 210 and that the second fine gate 420 can contact the second doped layer 30, the insulating dielectric layer 50 includes a first insulating portion 501 and a second insulating portion (not shown in the figure, the portion of the insulating dielectric layer 50 other than the first insulating portion 501). The first insulating portion 501 includes at least a portion of the material located in the trench. The second insulating portion includes a first sub-insulating portion and a second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion 210 and has a first through-hole. At least a portion of the material of the first fine gate 410 fills the first through-hole. The second sub-insulating portion covers the second doped layer 30 and has a second through-hole. At least a portion of the material of the second fine gate 420 fills the second through-hole.

[0106] In other embodiments, when the first orthographic projection corresponding to the first fine gate 410 covers the second orthographic projection corresponding to the first sub-doped portion 210 and extends along the first direction into the trench region, the third orthographic projection corresponding to the second fine gate 420 may fall into the fourth orthographic projection region corresponding to the second doped layer 30; when the third orthographic projection corresponding to the second fine gate 420 covers the fourth orthographic projection corresponding to the second doped layer 30 and extends along the first direction into the trench region, the first orthographic projection corresponding to the first fine gate 410 may fall into the second orthographic projection region corresponding to the first sub-doped portion 210.

[0107] Of course, in cases where the solar cell also includes the aforementioned first main grid and second main grid, a trench can be used to separate the first main grid and the second fine grid in a third direction. Furthermore, to form a back reflector with a "textured structure + highly reflective metal" and enhance the light-trapping effect of the cell, in some optional embodiments, a portion of the first main grid can extend upwards into the trench located between the first main grid and the second fine grid. Additionally, insulation is provided between the first main grid and the second grid line, between the first main grid and the second doped layer, and between the first main grid and the semiconductor substrate. Similarly, in some optional embodiments, a portion of the second main grid can extend upwards into the trench located between the second main grid and the first fine grid. Additionally, insulation is provided between the second main grid and the first grid line, between the second main grid and the first doped layer, and between the second main grid and the semiconductor substrate.

[0108] In the above embodiments, such as Figures 1 to 5 As shown, the material of the insulating dielectric layer 50 may include, but is not limited to, alumina + SiN. x SiO x SiO x N y At least one of them.

[0109] In some alternative embodiments, the first surface described above is a textured surface. This can enhance the light absorption efficiency of the solar cell. Exemplarily, the textured surface includes a velvety surface and a polished surface.

[0110] The first surface includes the contact surface between the first doped layer and the semiconductor substrate, and the bottom surface of the trench. In this case, to further optimize the light absorption effect of the solar cell, the contact surface between the first doped layer and the semiconductor substrate can be the textured surface; and / or, the bottom surface of the trench can be the textured surface.

[0111] Furthermore, the bottom surface of the aforementioned trench can be a textured surface. For example, the textured surface includes an upright pyramid shape or an inverted pyramid shape. Thus, when the metal corresponding to the gate line is located in the trench, the pyramid + high-reflectivity metal layer exhibits better light-trapping effect, while the surface morphology remains controllable.

[0112] In some alternative implementations, such as Figures 1 to 5 As shown, in order to further optimize the surface passivation effect of the semiconductor substrate 10, the solar cell further includes a first tunneling layer 60 located between the semiconductor substrate 10 and the first doped layer 20.

[0113] In some alternative implementations, such as Figures 1 to 5 As shown, in order to reduce the width of the space charge region and thus reduce recombination, the solar cell further includes a second tunneling layer 70 located between the second sub-doped portion 220 and the second doped layer 30.

[0114] Furthermore, the first tunneling layer 60 can be a membrane with a porous structure; and / or, the second tunneling layer 70 can be a membrane with a porous structure. Thus, the porous structures on the first tunneling layer 60 and / or the second tunneling layer 70 provide a fast path for current transmission, helping to further reduce the series resistance of the battery.

[0115] Furthermore, in the case where the aforementioned solar cell includes the first tunneling layer 60 and the second tunneling layer 70 with a porous structure, in the second region, minority carriers can pass through the first tunneling layer 60 and the second tunneling layer 70 through the porous structure to achieve localized low-resistance non-selective passage. This greatly improves the minority carrier transport rate, thus solving the transport failure caused by the selective transmission of majority carriers and selective blocking of minority carriers by the first tunneling layer 60. Therefore, the conversion efficiency of the solar cell is improved on the basis of solving the minority carrier transport failure problem.

[0116] Of course, in some alternative embodiments, there may be no tunneling layer between the semiconductor substrate and the first doped layer, or between the first tunneling layer and the second tunneling layer. In this way, the space charge region is wider and the parallel resistance of the battery is increased, which helps to improve the stability and reliability of the battery.

[0117] In some alternative implementations, such as Figures 1 to 5 As shown, the semiconductor substrate 10 is a silicon substrate; and / or, at least one of the first doped layer 20 and the second doped layer 30 comprises polycrystalline silicon. Polycrystalline silicon has good conductivity and can be easily transformed into a P-type or N-type semiconductor through doping, forming an effective charge collection and transport path. Furthermore, the polycrystalline silicon layer can form a lower contact resistance when in contact with metals. Additionally, when the solar cell includes the first tunneling layer 60, it can provide excellent surface passivation with the first tunneling layer 60.

[0118] To enable those skilled in the art to better understand the technical solution of this application, the implementation process of the solar cell fabrication method of this application will be described in detail below with reference to specific embodiments.

[0119] This embodiment relates to a specific method for fabricating a solar cell, including the following steps:

[0120] Step 1: Etch the surface of the semiconductor substrate (silicon wafer);

[0121] Step 2: Deposit the first tunneling layer;

[0122] Step 3: Deposit a first doped layer containing the first doping element;

[0123] Step 4: Thermal oxidative annealing;

[0124] Step 5: Deposit the second doped layer;

[0125] Step 6: High-temperature annealing;

[0126] Step 7: Laser film opening in the first region;

[0127] Step 8: Etch the second doped layer on the first region;

[0128] Step 9: Deposition of the insulating dielectric layer (cover film) on the front surface;

[0129] Step 10: Backside metallization formation (fine gate and main gate).

[0130] Figures 6 to 8 This is a cross-sectional structural diagram of a solar cell according to embodiments six to eight of this application. Figures 6 to 8As shown, in some optional embodiments, a solar cell is provided, the solar cell comprising: a semiconductor substrate 10 having a first surface, the first surface including a first region S1 and a second region S2 disposed adjacent to each other along a first direction A, the first direction A being parallel to the first surface; a first doped layer 20 located on one side of the semiconductor substrate 10, the first doped layer 20 including a first sub-doped portion 210 located in the first region S1 and a second sub-doped portion 220 located in the second region S2; a doped region 310 extending from a surface region of the second sub-doped portion 220 away from the semiconductor substrate 10 along a second direction into the second sub-doped portion 220, the doping types of the first doped layer 20 and the doped region 310 being opposite, the second direction being perpendicular to the first surface.

[0131] By applying the technical solution of this application, based on the first doped layer 20 including a first sub-doped portion 210 located in the first region S1 and a second sub-doped portion 220 located in the second region S2, since the doped region 310 extends from the surface region of the second sub-doped portion 220 away from the semiconductor substrate 10 along the second direction into the second sub-doped portion 220, and thus a second sub-doped portion 220 is formed between the doped region 310 and the first surface in the second direction, the first doped layer 20 is used for surface passivation of both the first region S1 and the second region S2 on the first surface of the semiconductor substrate 10. This avoids the problem of reduced surface passivation consistency caused by doped layers or doped regions 310 of different doping types on the semiconductor substrate 10, thereby solving the problem of poor surface passivation quality consistency in existing solar cells. Furthermore, the P / N junction formed between the second sub-doped region 220 and the doped region 310 can generate a stronger built-in electric field, thereby more effectively separating photogenerated electrons and holes, reducing recombination losses, and improving the photoelectric conversion efficiency of the battery.

[0132] like Figures 6 to 8 As shown, in some optional embodiments, to further optimize the surface passivation effect of the semiconductor substrate 10, the solar cell further includes a first tunneling layer 60 located between the semiconductor substrate 10 and the first doped layer 20, and the first tunneling layer 60 is a film layer with a porous structure. Furthermore, the porous structure provides a fast channel for current transmission, which helps to further reduce the series resistance of the cell.

[0133] It is understandable that, such as Figures 6 to 8As shown, the aforementioned solar cell may further include at least one of a fine grid 40, a main grid, and an insulating dielectric layer 50. The arrangement of either the main grid or the insulating dielectric layer is as described above and will not be repeated here. The fine grid 40 includes a first fine grid 410 and a second fine grid 420, arranged as follows.

[0134] It should be noted here that, as Figures 6 to 8 As shown, the orthographic projection of the first fine gate 410 on the first surface can be a first orthographic projection, the orthographic projection of the first sub-doped portion 210 on the first surface can be a second orthographic projection, the orthographic projection of the second fine gate 420 on the first surface can be a third orthographic projection, and the orthographic projection of the doped region 310 on the first surface can be a fourth orthographic projection.

[0135] like Figure 6 and Figure 7 As shown, in order to ensure effective contact between the first fine gate 410 and the first doped layer 20, in some optional embodiments, the first orthographic projection corresponding to the first fine gate 410 falls within the second orthographic projection region corresponding to the first sub-doped portion 210; and / or, as Figure 6 and Figure 8 As shown, in order to ensure effective contact between the second fine gate 420 and the doped region 310, in some optional embodiments, the third orthographic projection of the second fine gate 420 falls into the fourth orthographic projection region of the second doped layer 30.

[0136] like Figure 7 As shown, in some alternative embodiments, when the first orthographic projection corresponding to the first fine gate 410 falls within the second orthographic projection region corresponding to the first sub-doped portion 210, the third orthographic projection corresponding to the second fine gate 420 covers the fourth orthographic projection corresponding to the second doped layer 30 and extends along the first direction A into the second orthographic projection region corresponding to the first sub-doped portion 210.

[0137] like Figure 8 As shown, in some alternative embodiments, when the third orthographic projection corresponding to the second fine gate 420 falls within the fourth orthographic projection region corresponding to the second doped layer 30, the first orthographic projection corresponding to the first fine gate 410 covers the second orthographic projection corresponding to the first sub-doped portion 210 and extends along the first direction A into the fourth orthographic projection region corresponding to the second doped layer 30.

[0138] To enable those skilled in the art to better understand the technical solution of this application, the implementation process of the solar cell fabrication method of this application will be described in detail below with reference to specific embodiments.

[0139] This embodiment relates to a specific method for fabricating a solar cell, including the following steps:

[0140] Step 10: Perform surface etching on the semiconductor substrate (silicon wafer);

[0141] Step 20: Deposit the first tunneling layer;

[0142] Step 30: Deposit the first doped layer (polysilicon layer) containing the first doping element;

[0143] Step 40: Localized ion implantation of the second dopant element;

[0144] Step 50: Anneal and crystallize the first doped layer and activate the doping elements (first doping element and second doping element);

[0145] Step 60: Deposition of the front insulating dielectric layer (alumina and capping film);

[0146] Step 70: Backside metallization formation (fine gate, main gate).

[0147] In some alternative embodiments, a photovoltaic module is provided, comprising: any of the solar cells described above. Because any of the aforementioned solar cells have good surface passivation uniformity, a photovoltaic module comprising any of the aforementioned solar cells can reduce internal electrical losses, including a reduction in series resistance and an increase in parallel resistance, which helps to improve the overall power output of the module.

[0148] In some alternative embodiments, a photovoltaic system is provided, including the photovoltaic module as described above. Increasing the parallel resistance of the photovoltaic module helps improve the electrical stability of the photovoltaic system.

[0149] Furthermore, the aforementioned photovoltaic system includes an off-grid solar power generation system, which includes the aforementioned photovoltaic modules. Of course, the aforementioned photovoltaic system can also be a grid-connected solar power generation system, which also includes the aforementioned photovoltaic modules.

[0150] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0151] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A solar cell, characterized in that, include: A semiconductor substrate has a first surface, the first surface including a first region and a second region disposed adjacent to each other along a first direction, the first direction being parallel to the first surface; A first doped layer is located on one side of the semiconductor substrate, and the first doped layer includes a first sub-doped portion located in the first region and a second sub-doped portion located in the second region; The second doped layer, at least a portion of which is located on the second sub-doped portion, is located in a second direction at a distance greater than that between the first sub-doped portion and the first surface. The second direction is perpendicular to the first surface. The doping types of the first and second doped layers are opposite.

2. The solar cell according to claim 1, characterized in that, The second doped layer is located on the second sub-doped portion.

3. The solar cell according to claim 1, characterized in that, The doping type of the semiconductor substrate is the same as that of the first doped layer.

4. The solar cell according to claim 3, characterized in that, The semiconductor substrate is doped with N-type, the first doped layer is doped with N-type, and the second doped layer is doped with P-type.

5. The solar cell according to claim 4, characterized in that, The first doped layer contains a first doping element, and the second doped layer contains a second doping element. The first doping element includes phosphorus, and the second doping element includes boron.

6. The solar cell according to claim 1, characterized in that, The first region and the second region are distributed alternately along the first direction.

7. The solar cell according to claim 6, characterized in that, The first region and the second region are interdigitated along the first direction.

8. The solar cell according to claim 7, characterized in that, The solar cell includes a fine grid, which includes a first fine grid and a second fine grid. The first fine grid is located at least in the first region, and the second fine grid is located at least in the second region. The first fine grid and the second fine grid are alternately arranged along the first direction and extend along a third direction. The first direction and the third direction intersect. The first fine grid is electrically connected to the first sub-doped portion, and the second fine grid is electrically connected to the second doped layer.

9. The solar cell according to claim 8, characterized in that, The solar cell includes a main grid, which includes a first main grid and a second main grid. The first main grid and the second main grid are alternately distributed in the third direction, and the first main grid is electrically connected to the first fine grid, and the second main grid is electrically connected to the second fine grid.

10. The solar cell according to claim 9, characterized in that, At least one first main gate is located between two adjacent second fine gates arranged side by side along the third direction and intersects with at least one first fine gate; at least one second main gate is located between two adjacent first fine gates arranged side by side along the third direction and intersects with at least one second fine gate.

11. The solar cell according to claim 8, characterized in that, The first and second gratings have opposite polarities.

12. The solar cell according to claim 8, characterized in that, The first sub-doped portion and the second sub-doped portion are disposed in contact in the first direction.

13. The solar cell according to claim 8, characterized in that, The first sub-doped portion and the second sub-doped portion are spaced apart.

14. The solar cell according to claim 13, characterized in that, At least a portion of the trench is disposed in the first doped layer, and in the first direction, the at least a portion of the trench is located between the first sub-doped portion and the second sub-doped portion.

15. The solar cell according to claim 14, characterized in that, The trench is disposed in the first doped layer.

16. The solar cell according to claim 14, characterized in that, The trench is disposed in the first doped layer and the semiconductor substrate.

17. The solar cell according to claim 12 or 14, characterized in that, The orthographic projection of the first fine gate on the first surface is the first orthographic projection, and the orthographic projection of the first sub-doped portion on the first surface is the second orthographic projection. The first orthographic projection falls within the second orthographic projection region.

18. The solar cell according to claim 12 or 14, characterized in that, The orthographic projection of the second fine gate on the first surface is the third orthographic projection, and the orthographic projection of the second doped layer on the first surface is the fourth orthographic projection. The third orthographic projection falls within the region of the fourth orthographic projection.

19. The solar cell according to claim 17, characterized in that, The orthographic projection of the second fine grating onto the first surface is a third orthographic projection, and the orthographic projection of the second doped layer onto the first surface is a fourth orthographic projection. The third orthographic projection covers the fourth orthographic projection and extends along the first direction into the region of the second orthographic projection. The solar cell further includes: An insulating dielectric layer, wherein at least a portion of the material of the insulating dielectric layer is located between the second fine gate and the first sub-doped portion.

20. The solar cell according to claim 19, characterized in that, The insulating dielectric layer includes a first insulating portion and a second insulating portion. The first insulating portion is located between the second fine gate and the first sub-doped portion. The second insulating portion includes a first sub-insulating portion and a second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion and has a first through-hole. At least a portion of the material of the first fine gate fills the first through-hole. The second sub-insulating portion covers the second doped layer and has a second through-hole. At least a portion of the material of the second fine gate fills the second through-hole.

21. The solar cell according to claim 18, characterized in that, When the first sub-doped portion and the second sub-doped portion are contacted and disposed in the first direction, the orthographic projection of the first fine gate on the first surface is a first orthographic projection, the orthographic projection of the first sub-doped portion on the first surface is a second orthographic projection, the first orthographic projection covers the second orthographic projection and extends along the first direction to the fourth orthographic projection region, and the solar cell further includes: An insulating dielectric layer, wherein at least a portion of the material of the insulating dielectric layer is located between the first fine gate and the second doped layer.

22. The solar cell according to claim 21, characterized in that, The insulating dielectric layer includes a first insulating portion and a second insulating portion. The first insulating portion is located between the first fine gate and the second sub-doped portion. The second insulating portion includes a first sub-insulating portion and a second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion and has a first through-hole. At least a portion of the material of the first fine gate fills the first through-hole. The second sub-insulating portion covers the second doped layer and has a second through-hole. At least a portion of the material of the second fine gate fills the second through-hole.

23. The solar cell according to claim 14, characterized in that, The orthographic projection of the first fine grid on the first surface is a first orthographic projection, and the orthographic projection of the first sub-doped portion on the first surface is a second orthographic projection. The first orthographic projection covers the second orthographic projection and extends along the first direction into the trench region. The solar cell further includes: An insulating dielectric layer, wherein at least a portion of the material of the insulating dielectric layer is located in the trench, and the at least a portion of the material is located between the first fine gate and the semiconductor substrate and between the first fine gate and the second doped layer.

24. The solar cell according to claim 14, characterized in that, The orthographic projection of the second fine grid on the first surface is a third orthographic projection, and the orthographic projection of the second doped layer on the first surface is a fourth orthographic projection. The third orthographic projection covers the fourth orthographic projection and extends along the first direction into the trench region. The solar cell further includes: An insulating dielectric layer, at least a portion of which is located in the trench, and the at least a portion of which is located between the second fine gate and the semiconductor substrate and between the second fine gate and the first doped layer.

25. The solar cell according to claim 23 or 24, characterized in that, The insulating dielectric layer includes a first insulating portion and a second insulating portion. The first insulating portion includes at least a portion of the material located in the trench. The second insulating portion includes a first sub-insulating portion and a second sub-insulating portion. The first sub-insulating portion covers the first sub-doped portion and has a first via. At least a portion of the material of the first fine gate fills the first via. The second sub-insulating portion covers the second doped layer and has a second via. At least a portion of the material of the second fine gate fills the second via.

26. The solar cell according to claim 14, characterized in that, The first surface is a textured surface.

27. The solar cell according to claim 26, characterized in that, The textured surface includes a velvety surface and a polished surface.

28. The solar cell according to claim 26, characterized in that, The first surface includes a contact surface between the first doped layer and the semiconductor substrate, wherein the contact surface is the textured surface; and / or, The first surface includes the bottom surface of the groove, and the bottom surface is a velvety surface.

29. The solar cell according to claim 28, characterized in that, The velvet surface includes either a regular pyramid shape or an inverted pyramid shape.

30. The solar cell according to any one of claims 1 to 16, characterized in that, The solar cell further includes a first tunneling layer located between the semiconductor substrate and the first doped layer.

31. The solar cell according to claim 30, characterized in that, The first tunneling layer is a membrane layer with a porous structure.

32. The solar cell according to any one of claims 1 to 16, characterized in that, The solar cell further includes a second tunneling layer located between the second sub-doped portion and the second doped layer.

33. The solar cell according to claim 32, characterized in that, The second tunneling layer is a membrane layer with a porous structure.

34. The solar cell according to claim 1, characterized in that, The semiconductor substrate is a silicon substrate.

35. The solar cell according to claim 1, characterized in that, At least one of the first doped layer and the second doped layer comprises polycrystalline silicon.

36. The solar cell according to claim 1, characterized in that, The doping type of the semiconductor substrate is the opposite of that of the first doped layer.

37. A solar cell, characterized in that, The solar cell includes: A semiconductor substrate has a first surface, the first surface including a first region and a second region disposed adjacent to each other along a first direction, the first direction being parallel to the first surface; A first doped layer is located on one side of the semiconductor substrate, and the first doped layer includes a first sub-doped portion located in the first region and a second sub-doped portion located in the second region; The doped region extends from the surface region of the second sub-doped portion on the side opposite to the semiconductor substrate along a second direction into the second sub-doped portion. The doping types of the first doped layer and the doped region are opposite, and the second direction is perpendicular to the first surface.

38. The solar cell according to claim 37, characterized in that, The solar cell also includes: The first tunneling layer is located between the semiconductor substrate and the first doped layer, and the first tunneling layer is a film layer with a porous structure.

39. A photovoltaic module, characterized in that, include: The solar cell as claimed in any one of claims 1 to 36, or the solar cell as claimed in any one of claims 37 to 38.

40. A photovoltaic system, characterized in that, Including the photovoltaic module as described in claim 39.

41. The photovoltaic system according to claim 40, characterized in that, The photovoltaic system includes an off-grid solar power generation system, and the off-grid solar power generation system includes the photovoltaic modules.

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