Back contact solar cell and preparation method thereof

Abstract

The invention provides a back contact solar cell and a preparation method thereof. The back surface of a silicon wafer of the back contact solar cell is provided with N-type selective emitter regions and P-type selective emitter regions which are arranged in a staggered and interdigital manner, an electrically insulated gap region is arranged between the N-type selective emitter regions and the P-type selective emitter regions, and (a) the line width of the N-type selective emitter regions in the transverse pointing direction is 100-200 m; (b) the line width of the P-type selective emitter region in the transverse pointing direction is 100-200 m; (c) the width of the gap region is 70 to 200 m; and (d) the gap region has no extra doping and has the same polarity as the silicon wafer. The preparation method comprises the following steps: constructing a PN junction on the back surface of a silicon wafer through deposition and doping treatment; the N-type selective emitter region and the P-type selective emitter region are arranged in a staggered and interdigital mode, and the gap region is arranged between the N-type selective emitter region and the P-type selective emitter region. The line width of the N-type selective emitter region and the line width of the P-type selective emitter region are 100-200 m. The width of the gap region is 70-200 m, and the gap region is free of extra doping and has the same polarity as a silicon wafer.

Description

Technical Field

[0001] This disclosure relates to the field of solar cell technology, and in particular to a back-contact solar cell and its fabrication method. Background Technology

[0002] In back-contact solar cells, the back side of the silicon wafer typically has staggered, interlaced N-type selective emission regions and P-type selective emission regions (hereinafter referred to as "N-regions" and "P-regions"), with an electrically insulating gap region (Gap region) between them. Lateral collection of charge carriers is achieved through appropriate metal electrodes and busbar designs. To achieve lower series resistance and good soldering / interconnect reliability, existing technologies often tend to use relatively large grid linewidths and small gaps. Meanwhile, the back-side metal coverage and mask openings affect bifacial gain; the higher the back-side shading rate, the greater the loss of effective photons incident from the back side due to absorption or reflection by the metal and conductive layers, thus limiting the bifaciality and equivalent power generation gain at the cell and module levels. Summary of the Invention

[0003] This disclosure provides a back-contact solar cell. The back side of the silicon wafer of the back-contact solar cell has an N-type selective emission region and a P-type selective emission region. The N-type selective emission region includes a first N-type emission region extending along a first direction and multiple second N-type emission regions extending along a second direction from the first N-type emission region. The P-type selective emission region includes a first P-type emission region extending along the first direction and multiple second P-type emission regions extending along a second direction from the first P-type emission region. Multiple second N-type emission regions and multiple second P-type emission regions are located between the first N-type emission region and the first P-type emission region, and are staggered along the first direction. An electrically insulating gap region is provided between the N-type selective emission region and the P-type selective emission region. The linewidth of the second N-type emission region in the first direction is 100-200 µm. The linewidth of the second P-type emission region in the first direction is 100-200 µm. The width of the gap region is 70-200 µm. The polarity of the gap region is the same as the polarity of the silicon wafer.

[0004] According to the back-contact solar cell of this disclosure, the linewidth ratio of the N-type selective emission region to the P-type selective emission region is 0.5 to 2.0.

[0005] According to the back-contact solar cell of this disclosure, the pitch of the N-type selective emission region, the P-type selective emission region, and the gap region is 270-600 µm.

[0006] According to the back-contact solar cell of this disclosure, the width of the gap region is in the ratio of the pitch formed by the N-type selective emission region, the P-type selective emission region and the gap region to 0.11 to 0.45.

[0007] According to the back-contact solar cell of the present disclosure, the back metal electrode of the back-contact solar cell is disposed in a region outside the gap region and is electrically connected to the N-type selective emission region and the P-type selective emission region respectively.

[0008] According to the back-contact solar cell of this disclosure, the linewidth of the second N-type emitter region and the second P-type emitter region in the first direction is 120-180 µm, and the width of the gap region is 80-160 µm.

[0009] According to the back-contact solar cell of the present disclosure, the gap region includes a passivation / dielectric layer covering the surface of the silicon wafer.

[0010] This disclosure also provides a method for fabricating a back-contact solar cell, comprising: constructing a PN junction on the back side of a silicon wafer through deposition and doping; and forming an N-type selective emitter region, a P-type selective emitter region, and an electrically insulating gap region through patterning. The N-type selective emitter region includes a first N-type emitter region extending along a first direction and multiple second N-type emitter regions extending along a second direction from the first N-type emitter region; the P-type selective emitter region includes a first P-type emitter region extending along the first direction and multiple second P-type emitter regions extending along the second direction from the first P-type emitter region; the multiple second N-type emitter regions and the multiple second P-type emitter regions are located between the first N-type emitter region and the first P-type emitter region, and are staggered along the first direction; the gap region is located between the N-type selective emitter region and the P-type selective emitter region; wherein the linewidth of the second N-type emitter region in the first direction is 100-200 μm; the linewidth of the second P-type emitter region in the first direction is 100-200 µm; and the width of the gap region is 70-200 µm. µm, and the polarity of the gap region is the same as that of the silicon wafer.

[0011] According to the method for fabricating a back-contact solar cell described in this disclosure, after forming an N-type selective emission region, a P-type selective emission region, and an electrically insulating gap region through patterning, the method further includes: metallizing the region outside the gap region, forming a metal electrode on the back side of the back-contact solar cell, wherein the metal electrode is electrically connected to the N-type selective emission region and the P-type selective emission region respectively.

[0012] According to the method for fabricating a back-contact solar cell as described in this disclosure, the roughness of the patterned line edge is no greater than ±10 µm, and the alignment tolerance is no greater than ±20 µm.

[0013] According to the back-contact solar cell described in this disclosure, the bifaciality is significantly improved by reducing the back-side shading rate and optimizing the G / P ratio; the series resistance and lateral transport loss are kept within acceptable range by controlling the pitch, linewidth ratio N:P, and selective contact stacking; furthermore, the metal electrode is located only in the non-opening region and the gap region is covered with a passivation / dielectric layer, which reduces back-side conductivity and parasitic absorption of the metal layer, improves back-side reflection, and increases short-circuit current. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the back structure of a back-contact solar cell according to the present disclosure.

[0015] Figure 2 This is a schematic diagram of the overall structure of the back-contact solar cell according to the present disclosure.

[0016] Figure 3 This is a flowchart of a method for fabricating a back-contact solar cell according to the present disclosure. Detailed Implementation

[0017] To enable those skilled in the art to better understand the technical solutions of this disclosure, the technical solutions of this disclosure will be described in detail below with reference to the accompanying drawings.

[0018] Exemplary embodiments will be described more fully below with reference to the accompanying drawings; however, these exemplary embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this disclosure.

[0019] Where there is no conflict, the various embodiments of this disclosure and the features thereof in the embodiments may be combined with each other.

[0020] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded.

[0022] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined herein.

[0023] The inventors discovered that with the increase in silicon wafer bulk lifetime, especially for N-type silicon wafers where the bulk lifetime has exceeded 20ms, the carrier diffusion length has increased significantly. This trend allows for further optimization of solar cell grid design to improve photoelectric conversion efficiency. Specifically, the increased bulk lifetime reduces the area of ​​N-type contacts, increases the area of ​​the gap region, and simultaneously reduces the grid line spacing, allowing carriers to rely more on the silicon wafer bulk region for transport, thereby improving efficiency. Grid geometry parameters (N, P linewidth, gap, pitch, and their ratios) have a significant coupled impact on electrical and optical performance: 1. Electrically, increased linewidth typically reduces grid resistance and lateral transport losses, and can relax patterning / metallization process tolerances; however, excessively large linewidths will lead to increased metal / conductive layer coverage and increased back-side shading. Meanwhile, an excessively small gap may lead to enhanced electric field coupling, under-etching, or short-circuit risks due to metal expansion; an excessively large gap will increase the pitch or force a reduction in the number of lines, resulting in increased minority carrier lateral transport distance, increased series resistance, and increased wiring complexity. 2. Contact and recombination: The specific contact resistance (ρc) and stack recombination (J0) of selective contact areas have limited tolerance to linewidth reduction. When the linewidth is reduced, if the contact opening or local doping / stack quality is insufficient, a trade-off between a significant increase in contact resistance and enhanced local recombination is likely to occur. 3. Optics and thermal: Parasitic absorption of the back conductive / metal layer, back reflection of the dielectric / metal stack, and scattering caused by line edge roughness jointly determine the effective utilization rate of back incident light. Wide lines and high coverage tend to reduce bifaciality, while the increased Joule heat and local hot spot risks of excessively narrow lines may affect long-term reliability. 4. Manufacturing and Yield: Patterning methods such as laser, inkjet printing, and photolithography each have their advantages and disadvantages in terms of resolution, line edge roughness (LER / LWR), over-etching control, alignment tolerance, and batch consistency. As linewidth and gap shrinkage, the requirements for equipment precision, mask / ink systems, annealing shrinkage, and metal diffusion control increase rapidly, putting pressure on mass production yield and cost. It is evident that the back geometry parameters of back-contact TOPCon cells cannot be arbitrarily scaled, but are constrained by the coupling of electrical, optical, and manufacturing aspects. The industry still needs to establish a mass-producible "optimal window" for the quantitative relationship between N and P linewidths, gaps, and pitches, maintaining or improving FF / η while increasing bifaciality, and ensuring sufficient robustness to process deviations and environmental stresses.

[0024] This disclosure provides a back-contact solar cell, such as Figure 1 , Figure 2 As shown, the back surface of the silicon wafer of the battery has N-type selective emission regions and P-type selective emission regions arranged in an interlaced, forked pattern, that is, the N-type selective emission regions include those along a first direction ( Figure 1The first N-type launch area extends in the lateral direction and multiple launch lines originating from the first N-type launch area along the second direction (in the lateral direction). Figure 1 The second N-type emission region extends along the longitudinal direction of the first direction; the P-type selective emission region includes a first P-type emission region extending along the first direction and multiple second P-type emission regions extending along the second direction from the first P-type emission region; the multiple second N-type emission regions and the multiple second P-type emission regions are located between the first N-type emission region and the first P-type emission region, and are staggered along the first direction; an electrically insulating gap region is provided between the N-type selective emission region and the P-type selective emission region (see [link]). Figure 1 (a) The linewidth of the N-type selective emitter region (hereinafter also referred to as the N region) in the lateral direction is 100-200 µm; (b) The linewidth of the P-type selective emitter region (hereinafter also referred to as the P region) in the lateral direction is 100-200 µm; (c) The width of the gap region (hereinafter also referred to as the Gap region) is 70-200 µm; (d) The gap region has no additional doping and has the same polarity as the silicon wafer.

[0025] In some embodiments, the linewidth of the N-type selective emission region and the P-type selective emission region is 120-180 µm.

[0026] In the back-contact solar cell of this disclosure, the linewidth ratio of the N-type selective emission region to the P-type selective emission region is 0.5 to 2.0.

[0027] The edge fillet radius of the N-type selective emission region and the P-type selective emission region is ≥5 µm to reduce the risk of electric field concentration and metal fracture.

[0028] In the back-contact solar cell described in this disclosure, the pitch formed by the N-type selective emission region, the P-type selective emission region, and the gap region is 270-600 µm, preferably 400-520 µm.

[0029] In this disclosure, pitch refers to the total width of the smallest repeating unit consisting of an N-type selective emission region, a P-type selective emission region, and the electrically insulating gap between them.

[0030] In some embodiments, the width of the gap region is 80-160 µm. The gap region is undoped, maintains the same polarity as the bulk silicon, and is optionally covered with a passivation / dielectric layer to suppress surface recombination and optical parasitic absorption.

[0031] In the back-contact solar cell of this disclosure, the ratio G / P of the width of the gap region to the pitch formed by the N-type selective emission region, the P-type selective emission region, and the gap region is 0.11-0.45.

[0032] In some embodiments, the ratio G / P of the width of the gap region to the pitch formed by the N-type selective emission region, the P-type selective emission region, and the gap region is 0.20-0.40.

[0033] In the back-contact solar cell described in this disclosure, the back metal electrode can be disposed in a non-opening region, that is, in a region outside the gap region, and is electrically connected to the N-type selective emission region and the P-type selective emission region respectively. The back metal electrode is disposed only in the non-opening region, resulting in a total back-side shading rate of less than 30%.

[0034] This disclosure also provides a method for fabricating a back-contact solar cell, such as... Figure 3 As shown, it includes: S1. A PN junction is constructed on the back side of a silicon wafer through deposition and doping processes; and S2. An N-type selective emission region, a P-type selective emission region, and an electrically insulating gap region are formed through patterning processing. The N-type selective emission region includes a first N-type emission region extending along a first direction and multiple second N-type emission regions extending along a second direction from the first N-type emission region; the P-type selective emission region includes a first P-type emission region extending along the first direction and multiple second P-type emission regions extending along the second direction from the first P-type emission region; the multiple second N-type emission regions and the multiple second P-type emission regions are located between the first N-type emission region and the first P-type emission region, and are staggered along the first direction; the gap region is located between the N-type selective emission region and the P-type selective emission region; wherein, the linewidth of the second N-type emission region in the first direction is 100-200 μm; the linewidth of the second P-type emission region in the first direction is 100-200 µm; the width of the gap region is 70-200 µm, and the polarity of the gap region is the same as the polarity of the silicon wafer.

[0035] In step S1, the silicon wafer is an n-type or p-type silicon wafer with a thickness of 100-180 µm and a resistivity of 0.5-30 Ω•cm; a PN junction can be constructed using LPCVD and boron diffusion processes.

[0036] In step S2, the BSG on the back side of the silicon wafer is selectively removed by at least one of patterning, inkjet printing patterning, or photolithography patterning, and the corresponding PN junction is removed by alkaline polishing, thereby forming an interleaved arrangement of N-type and P-type selective emitter regions and a gap region between them.

[0037] To achieve fine finger grid patterns, high-precision patterning processes are required, such as laser patterning, inkjet printing patterning, or photolithography. The line edge roughness (3σ) of the patterning process is no greater than ±10 µm, and the alignment tolerance is no greater than ±20 µm.

[0038] In this disclosure, after forming the N-type selective emission region, the P-type selective emission region, and the electrically insulating gap region through patterning processing, the method further includes: metallizing the region outside the gap region, forming a metal electrode on the back side of the back contact solar cell, and the metal electrode being electrically connected to the N-type selective emission region and the P-type selective emission region respectively.

[0039] In this disclosure, the roughness of the line edges in the graphical processing is no greater than ±10 µm, and the alignment tolerance is no greater than ±20 µm.

[0040] The following specific embodiment further illustrates the fabrication method of the back-contact solar cell disclosed herein.

[0041] Methods for fabricating back-contact solar cells include: S1: Apply alkaline polishing chemical treatment to the surface of the silicon substrate to form a low-roughness silicon wafer surface morphology; S2: Low-pressure chemical vapor deposition (LPCVD) and boron diffusion are performed on the silicon wafer surface to construct a PN junction; S3: Selectively remove part of the BSG using a single-sided laser process, and remove part of the PN junction structure using an alkaline polishing solution; S4: A tunneling oxide layer and an intrinsic polycrystalline silicon layer i poly-Si are grown on the surface of the laser-processed silicon wafer using low-pressure chemical vapor deposition (LPCVD) technology. S5: Phosphorus doping is performed using thermal diffusion technology to form n + poly-Si layer S6: An isolation trench is formed in the full-area phosphorus-doped polycrystalline silicon passivated contact area using laser processing; S7: The silicon thin film structure on the front side of the silicon wafer is removed using a chain-type single-sided chemical etching equipment; S8: A pyramid structure is selectively formed on the non-SiOx region of the silicon wafer surface using a trench chemical etching device; S9: An aluminum oxide passivation film is deposited on the surface of the silicon substrate using atomic layer deposition (ALD) technology; S10: Apply anti-reflection coating to the front and back sides of the silicon substrate; S11: Metal grid lines are printed on the back side and sintered to form an electrode pattern.

[0042] In this disclosure, electrodes can be formed in a conventional manner, such as by metallization with electroplated copper or sintering silver / copper paste, and achieving stable ohmic contact in a subsequent annealing step. Specifically, the back metal electrode is formed by electroplating copper, copper / silver composite, or low-temperature sintering of silver / copper paste, and the contact resistivity ρc ≤ 5 mΩ•cm².

[0043] Optionally, metallization is performed only in the non-opening areas, allowing the metal electrodes to be electrically connected to the N-type and P-type selective emission regions. The back metal electrodes achieve ohmic contact with the metal electrodes through localized openings, are arranged in a one-to-one correspondence with the selective emission regions, and have a total back-side occlusion rate of less than 30%.

[0044] The back-contact solar cell obtained according to the method of this disclosure includes an N-type selective emitter region and / or a P-type selective emitter region comprising a tunneling oxide layer and a doped polycrystalline silicon stack structure. The tunneling oxide layer is SiOx, the doped polycrystalline silicon is an n-type or p-type polycrystalline silicon layer, and a silicon nitride / silicon oxide dielectric stack is disposed above the stack. No metal conductors or conductive vias are disposed within the gap region.

[0045] As mentioned earlier, there has always been a trade-off between bifaciality and series resistance in back-contact solar cells: in order to pursue low series resistance and high welding reliability, wide metal grid lines are used in the design, resulting in severe back-side shading and low bifaciality; conversely, simply narrowing the grid lines to improve bifaciality will cause a sharp increase in series resistance, leading to a decrease in FF and efficiency.

[0046] The technical solution disclosed herein provides an optimized back-side finger grid geometry design through synergistic innovation in functional area and metal grid line design. This design precisely controls the linewidth of the N-type and P-type regions and the gap between them within a specific range. Furthermore, it optimizes the distribution of functional areas. Therefore, it can significantly reduce back-side occlusion while ensuring efficient carrier collection, thereby synergistically improving difaciality and flyback factor.

[0047] To enable those skilled in the art to more clearly understand the technical solutions provided by the embodiments of this disclosure, the technical solutions provided by the embodiments of this disclosure will be described in detail below through specific embodiments.

[0048] Example 1 S1: Select an n-type silicon wafer with a thickness of 150 µm, and construct a PN junction using LPCVD and boron diffusion processes.

[0049] S2: A patterned P-region is formed on the back of the silicon wafer through laser patterning.

[0050] S3: A tunneling oxide layer and an intrinsic polysilicon layer (i poly-Si) are formed on the surface of a silicon wafer with the PN junction removed using low-pressure chemical vapor deposition (LPCVD) technology.

[0051] S4: Phosphorus doping is performed using thermal diffusion technology to form n + The poly-Si layer is formed on the back of the silicon wafer by laser patterning, creating interlaced N-type and P-type selective emission regions and the gap region between them.

[0052] S5: Deposit an aluminum oxide passivation film and an antireflection film on the surface of the silicon substrate using atomic layer deposition (ALD) technology.

[0053] S6: The back metal electrode is formed by sintering metal paste, and the contact resistance ρc ≤ 5 mΩ•cm².

[0054] The main parameters of the obtained back-contact solar cell are as follows: The linewidth of the N region is 150µm, the linewidth of the P region is 150µm, the width of the gap region is 100µm, the pitch is 400µm, and the G / P ratio is 0.67.

[0055] Example 2 A back-contact solar cell was prepared in accordance with Example 1, except that electrodes were formed only in the non-opening region.

[0056] The main parameters of the obtained back-contact solar cell are as follows: The linewidth of the N region is 100µm, the linewidth of the P region is 100µm, the width of the gap region is 200µm, the pitch is 400µm, and the G / P ratio is 2.

[0057] Example 3 The back-contact solar cell was prepared according to the method of Example 1, except that after forming the phosphorus-doped polycrystalline silicon layer, the following steps were also included: S5: Selectively remove part of the phosphorus-doped polysilicon stack on the back side of the silicon wafer through laser processing to form an electrically isolated region; S6: The silicon thin film structure on the front side of the silicon wafer is removed using a chain-type single-sided chemical etching device.

[0058] S7: A pyramid structure is selectively formed on the non-SiOx region of the silicon wafer surface using a trench chemical etching device.

[0059] S8: Deposit an aluminum oxide passivation film and an antireflection film on the surface of the silicon substrate using atomic layer deposition (ALD) technology.

[0060] S9: The metal electrode on the back is formed by copper plating technology, and the contact resistance ρc ≤ 5 mΩ•cm².

[0061] The main parameters of the obtained back-contact solar cell are as follows: The linewidth of the N-region is 150µm, the linewidth of the P-region is 150µm, the width of the gap region is 100µm, the pitch is 400µm, and the G / P ratio is 0.66.

[0062] Comparative Example 1 A back-contact solar cell was fabricated according to Example 1, except that the gap pitch was >600 μm and the G / P ratio was <0.25. The main parameters of the resulting back-contact solar cell are as follows: The linewidth of the N / P region is 400µm, the width of the gap region is 100µm, and the pitch is 900µm.

[0063] The main performance parameters of the back-contact solar cells prepared in the above examples and comparative examples were measured under standard test conditions (AM1.5G, 25℃, 1000 W / m²), and the results are shown in Table 1.

[0064]

Effect Comparison Analysis

[0065] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in connection with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of this disclosure as set forth by the appended claims.

Claims

1. A back-contact solar cell, wherein the back side of the silicon wafer of the back-contact solar cell is provided with an N-type selective emission region and a P-type selective emission region, the N-type selective emission region comprising a first N-type emission region extending along a first direction and a plurality of second N-type emission regions extending along a second direction from the first N-type emission region; the P-type selective emission region comprising a first P-type emission region extending along the first direction and a plurality of second P-type emission regions extending along a second direction from the first P-type emission region; the plurality of second N-type emission regions and the plurality of second P-type emission regions are located between the first N-type emission region and the first P-type emission region, and are staggered along the first direction; an electrically insulating gap region is provided between the N-type selective emission region and the P-type selective emission region, characterized in that: The linewidth of the second N-type emission region in the first direction is 100-200 µm; The linewidth of the second P-type emission region in the first direction is 100-200 µm; The width of the gap region is 70-200 µm; The polarity of the gap region is the same as the polarity of the silicon wafer.

2. The back-contact solar cell according to claim 1, characterized in that, The linewidth ratio of the N-type selective emission region to the P-type selective emission region is 0.5 to 2.

0.

3. The back-contact solar cell according to claim 1, characterized in that, The pitch formed by the N-type selective emission region, the P-type selective emission region, and the gap region is 270-600 µm.

4. The back-contact solar cell according to claim 3, characterized in that, The ratio of the width of the gap region to the pitch formed by the N-type selective emission region, the P-type selective emission region, and the gap region is 0.11 to 0.

45.

5. The back-contact solar cell according to any one of claims 1 to 4, characterized in that, The back metal electrode of the back contact solar cell is disposed in the area outside the gap region and is electrically connected to the N-type selective emission region and the P-type selective emission region, respectively.

6. The back-contact solar cell according to any one of claims 1 to 4, characterized in that, The linewidth of the second N-type emission region and the second P-type emission region in the first direction is 120-180 µm, and the width of the gap region is 80-160 µm.

7. The back-contact solar cell according to any one of claims 1 to 4, characterized in that, The gap region includes a passivation / dielectric layer covering the surface of the silicon wafer.

8. A method for fabricating a back-contact solar cell, characterized in that, include: A PN junction is constructed on the back side of a silicon wafer through deposition and doping processes. as well as An N-type selective emission region, a P-type selective emission region, and an electrically insulating gap region are formed through graphical processing. The N-type selective emission region includes a first N-type emission region extending along a first direction and multiple second N-type emission regions extending along a second direction from the first N-type emission region. The P-type selective emission region includes a first P-type emission region extending along the first direction and multiple second P-type emission regions extending along a second direction from the first P-type emission region. The multiple second N-type emission regions and the multiple second P-type emission regions are located between the first N-type emission region and the first P-type emission region, and are staggered along the first direction. The gap region is located between the N-type selective emission region and the P-type selective emission region. Wherein, the linewidth of the second N-type emitter region in the first direction is 100-200 μm; the linewidth of the second P-type emitter region in the first direction is 100-200 µm; the width of the gap region is 70-200 µm, and the polarity of the gap region is the same as the polarity of the silicon wafer.

9. The method for preparing a back-contact solar cell according to claim 8, characterized in that, After forming the N-type selective emission region, P-type selective emission region, and electrically insulating gap region through graphical processing, it also includes: Metallization is performed in the area outside the gap region to form a metal electrode on the back side of the back contact solar cell. The metal electrode is electrically connected to the N-type selective emission region and the P-type selective emission region, respectively.

10. The method for preparing a back-contact solar cell according to claim 8 or 9, characterized in that, The roughness of the line edges in the graphical processing is no greater than ±10 µm, and the alignment tolerance is no greater than ±20 µm.

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