Circuit board processing method and circuit board

Abstract

The invention provides a circuit board processing method and a circuit board, and belongs to the technical field of circuit boards. According to the processing method, first copper layers are plated on the upper and lower surfaces of a multi-layer core board and the inner wall of an open slot, and a first photosensitive film layer is attached to the surface of each first copper layer; an electroplating window is formed in the first photosensitive film layer facing the open slot, and a second copper layer is plated on the inner wall of the open slot through the electroplating window, so that the first copper layer and the second copper layer are plated in the shielding slot, and only the first copper layer is plated on the upper surface and the lower surface of the multi-layer core plate, namely, the copper layer in the shielding slot is thick, and the copper layers on the upper surface and the lower surface of the multi-layer core plate are thin; therefore, while the shielding effect of the shielding groove is ensured, fine lines can be manufactured on the thin copper layers on the upper and lower surfaces of the multi-layer core board, and the technical problem that the copper layers on the upper and lower surfaces of the existing circuit board with the shielding groove are thick is solved.

Description

Technical Field

[0001] This application relates to the field of circuit board technology, and in particular to a method for processing a circuit board and a circuit board. Background Technology

[0002] Some circuit boards require shielding slots with copper layers inside. The copper layers provide shielding. The sidewalls of the shielding slots are either metallic or non-metallic, with the non-metallic sidewalls lacking copper layers.

[0003] When manufacturing circuit boards with shielding grooves using existing processing methods, the copper layer thickness on the upper and lower surfaces of the manufactured circuit board is the same as the copper layer thickness inside the shielding groove.

[0004] Because the copper layer thickness inside the shielding groove must reach a certain value to achieve the shielding effect, and because the copper layer thickness on the upper and lower surfaces of the circuit board made by the existing processing method is the same as the copper layer thickness inside the shielding groove, the copper layer thickness on the upper and lower surfaces of the circuit board with the shielding groove is relatively thick, making it impossible to make fine lines on the upper and lower surfaces of the circuit board with the shielding groove. Summary of the Invention

[0005] This application provides a method for processing a circuit board and a circuit board to solve the technical problem that the copper layer thickness on the upper and lower surfaces of existing circuit boards with shielding grooves is too thick.

[0006] A first aspect of this application provides a method for processing a circuit board, the method comprising:

[0007] An opening groove is made in a multilayer core board. The inner wall of the opening groove includes a groove side wall and a groove bottom wall. The groove side wall includes a first groove side wall and a second groove side wall. A reserved amount is provided on the first groove side wall.

[0008] A first copper layer is plated on the upper and lower surfaces of the multilayer core board and the inner wall of the opening groove, and a first photosensitive film layer is attached to the surface of each first copper layer.

[0009] An electroplating window is formed on the first photosensitive film layer facing the opening groove, and the electroplating window is located within the area enclosed by the opening groove;

[0010] A second copper layer and a tin layer are sequentially plated on the inner wall of the opening groove through the electroplating window;

[0011] Remove the tin layer, the second copper layer, the first copper layer, and the reserved amount from the first tank sidewall to form a non-metallic tank sidewall for the first tank sidewall and a metallic tank sidewall for the second tank sidewall.

[0012] Remove the first photosensitive film layer and the tin layer inside the opening groove to make the opening groove form a shielding groove;

[0013] Ink is screen-printed inside the shielding groove to fill the shielding groove with ink.

[0014] In one possible implementation, the multilayer core board includes a first core board and a plurality of second core boards, and the step of creating openings in the multilayer core board includes:

[0015] A film to be peeled is provided on one side of the first core board, and the film to be peeled is located in the area enclosed by the opening groove;

[0016] At least one second core board is laminated onto the upper and lower surfaces of the first core board using an adhesive layer to form the multilayer core board;

[0017] An annular groove is provided on the multilayer core board, the annular groove is located above the film to be peeled, and the projection of the outer edge of the film to be peeled toward the annular groove is located inside the annular groove;

[0018] The bottom wall of the annular groove is ablated so that the top surface of a portion of the first core plate forms the bottom wall of the groove.

[0019] Remove the film to be peeled and the multilayer core board above the film to be peeled, so that the annular groove forms a preliminary processing opening groove;

[0020] Remove the remaining film to be peeled and the residual carbon produced by ablation from the initial processing opening groove, so that the initial processing opening groove forms the opening groove.

[0021] In one possible implementation, setting the film to be peeled on one side of the first core board includes:

[0022] A polyimide film is attached to one side of the first core board, and the polyimide film covers the first core board;

[0023] The polyimide film is laser-cut to divide it into a film to be peeled and a film to be removed.

[0024] Remove the film to be peeled so that the film to be peeled is placed on the first core board.

[0025] In one possible implementation, after laminating at least one second core board onto the upper and lower surfaces of the first core board using an adhesive layer to form the multilayer core board, the method further includes:

[0026] Drill holes on the upper and lower surfaces of the multilayer core board;

[0027] The hole formed after drilling is filled with a conductive material.

[0028] Reduce the thickness of the copper layers on the upper and lower surfaces of the multilayer core board so that the thickness of the copper layers on the upper and lower surfaces of the multilayer core board reaches a preset value.

[0029] In one possible implementation, providing an annular groove on the multilayer core board includes:

[0030] The annular groove is milled into the multilayer core board by controlled depth milling.

[0031] In one possible implementation, removing the residual film to be peeled and the residual carbon generated by ablation from the initial processing opening groove includes:

[0032] The initial processing opening groove is sprayed with a 3-5% NaOH solution to remove the residual film to be peeled from the initial processing opening groove;

[0033] The residual carbon in the initial processing opening groove is removed by plasma degumming method.

[0034] In one possible implementation, forming an electroplating window on the first photosensitive film layer facing the opening groove includes:

[0035] The electroplating window is created on the first photosensitive film layer using a pattern transfer method.

[0036] In one possible implementation, removing the tin layer, the second copper layer, the first copper layer, and the reserved amount from the sidewall of the first tank includes:

[0037] By controlling the depth of milling, the tin layer, the second copper layer, the first copper layer, and the reserved amount on the sidewall of the first slot are milled away;

[0038] The copper flash generated by the controlled-depth milling is removed using an alkaline etching solution.

[0039] In one possible implementation, prior to screen printing ink within the shielding groove, the method further includes:

[0040] The adhesive layer below the reserved amount is burned to expose the first core board;

[0041] Remove the adhesive layer and residual carbon produced by burning from the sidewall of the first groove and the exposed first core board.

[0042] A second aspect of this application provides a circuit board, which is manufactured using the circuit board processing method described in any one of the preceding claims.

[0043] This application provides a method for processing a circuit board and the circuit board itself. A first copper layer is plated on the upper and lower surfaces of a multilayer core board and on the inner wall of an opening slot. A first photosensitive film layer is attached to the surface of each first copper layer. An electroplating window is opened on the first photosensitive film layer facing the opening slot, and a second copper layer is plated on the inner wall of the opening slot through the electroplating window. Thus, the shielding slot contains both the first and second copper layers, while the upper and lower surfaces of the multilayer core board are only plated with the first copper layer. That is, the copper layer inside the shielding slot is thicker, while the copper layers on the upper and lower surfaces of the multilayer core board are thinner. This ensures the shielding effect of the shielding slot while allowing fine circuitry to be fabricated on the thinner copper layers on the upper and lower surfaces of the multilayer core board. Simultaneously, ink is screen-printed inside the shielding slot, protecting it from etching. After the fine circuitry is fabricated on the thinner copper layers on the upper and lower surfaces of the multilayer core board, the ink can be removed, resulting in a circuit board with a shielding slot and fine circuitry. This solves the technical problem of excessively thick copper layers on the upper and lower surfaces of existing circuit boards with shielding slots. Attached Figure Description

[0044] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0045] Figure 1 A schematic flowchart illustrating the circuit board processing method provided in this application embodiment;

[0046] Figure 2 A schematic diagram of the structure of the first core board after processing in step S201 in the circuit board processing method provided in the embodiments of this application;

[0047] Figure 3 A schematic diagram of the structure of the first core board after step S203 in the circuit board processing method provided in the embodiments of this application;

[0048] Figure 4 A schematic diagram of the structure of the multilayer core board after step S204 in the circuit board processing method provided in the embodiments of this application;

[0049] Figure 5 A schematic diagram of the structure of the multilayer core board after step S208 in the circuit board processing method provided in the embodiments of this application;

[0050] Figure 6 A schematic diagram of the structure of the multilayer core board after step S209 in the circuit board processing method provided in the embodiments of this application;

[0051] Figure 7 A schematic diagram of the structure of the multilayer core board after step S210 in the circuit board processing method provided in the embodiments of this application;

[0052] Figure 8 A schematic diagram of the structure of the multilayer core board after processing in steps S211 and S212 in the circuit board processing method provided in the embodiments of this application;

[0053] Figure 9 A schematic diagram of the structure of the multilayer core board after the first copper layer is plated in step S213 in the processing method of the circuit board provided in the embodiment of this application;

[0054] Figure 10 A schematic diagram of the structure of the multilayer core board after step S214 in the circuit board processing method provided in the embodiments of this application;

[0055] Figure 11 A schematic diagram of the structure of the multilayer core board after step S215 in the circuit board processing method provided in the embodiments of this application;

[0056] Figure 12 A schematic diagram of the structure of the multilayer core board after step S216 in the circuit board processing method provided in the embodiments of this application;

[0057] Figure 13 A schematic diagram of the structure of the multilayer core board after step S218 in the circuit board processing method provided in the embodiments of this application;

[0058] Figure 14 A schematic diagram of the structure of the multilayer core board after processing in steps S219 and S220 in the circuit board processing method provided in the embodiments of this application;

[0059] Figure 15 A schematic diagram of the structure of the multilayer core board after step S221 in the circuit board processing method provided in the embodiments of this application;

[0060] Figure 16 A schematic diagram of the structure of the multilayer core board after processing in steps S222 and S223 in the circuit board processing method provided in the embodiments of this application;

[0061] Figure 17 This is a schematic diagram of the structure of the multilayer core board after step S224 in the circuit board processing method provided in the embodiments of this application.

[0062] Explanation of reference numerals in the attached figures:

[0063] 10-Opening groove, 20-Groove sidewall, 21-First groove sidewall, 22-Second groove sidewall, 30-Groove bottom wall, 40-Fine circuit, 100-Multilayer core board, 110-First core board, 111-First dielectric layer, 112-First core board copper layer, 120-Second core board, 121-Second dielectric layer, 122-Second core board copper layer, 200-Polyimide film, 210-Film to be peeled off, 300-Adhesive layer, 400-Annular groove, 500-Residual carbon, 600-First copper layer, 700-First photosensitive film layer, 710-Electroplation window, 800-Second copper layer, 900-Tin layer, 1000-Ink, 1100-Second photosensitive film layer.

[0064] The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0065] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0066] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0067] In this application, unless otherwise expressly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0068] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the meaning of "and / or" throughout the text includes three parallel solutions; for example, "A and / or B" includes solution A, solution B, or a solution where both A and B are satisfied simultaneously. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0069] Some circuit boards require shielding slots with copper layers inside. The copper layers provide shielding. The sidewalls of the shielding slots are either metallic or non-metallic, with the non-metallic sidewalls lacking copper layers.

[0070] When manufacturing circuit boards with shielding grooves using existing processing methods, the copper layer thickness on the upper and lower surfaces of the manufactured circuit board is the same as the copper layer thickness inside the shielding groove.

[0071] Because the copper layer thickness inside the shielding groove must reach a certain value to achieve the shielding effect, and because the copper layer thickness on the upper and lower surfaces of the circuit board made by the existing processing method is the same as the copper layer thickness inside the shielding groove, the copper layer thickness on the upper and lower surfaces of the circuit board with the shielding groove is relatively thick, making it impossible to make fine lines on the upper and lower surfaces of the circuit board with the shielding groove.

[0072] To address the technical problem of excessively thick copper layers on the upper and lower surfaces of existing circuit boards with shielding slots, this application proposes a circuit board processing method and a circuit board. The processing method involves plating a first copper layer on the upper and lower surfaces of a multilayer core board and on the inner wall of the slot. A first photosensitive film layer is then attached to the surface of each first copper layer. An electroplating window is created on the first photosensitive film layer facing the slot, and a second copper layer is plated on the inner wall of the slot through this window. Thus, the shielding slot contains both the first and second copper layers, while the upper and lower surfaces of the multilayer core board are only plated with... The first copper layer, namely the copper layer inside the shielding groove, is thick, while the copper layers on the upper and lower surfaces of the multilayer core board are thin. Thus, while ensuring the shielding effect of the shielding groove, fine circuits can be fabricated on the thinner copper layers on the upper and lower surfaces of the multilayer core board. At the same time, by screen printing ink inside the shielding groove, the shielding groove is protected from etching by the ink. After the fine circuits are fabricated on the thinner copper layers on the upper and lower surfaces of the multilayer core board, the ink can be removed, thereby obtaining a circuit board with a shielding groove and fine circuits. This solves the technical problem of the thicker copper layer on the upper and lower surfaces of existing circuit boards with shielding grooves.

[0073] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0074] The first aspect of this application provides a method for processing a circuit board. Figure 1 Flowchart of the circuit board processing method provided in this application Figure 1 ,like Figure 1 As shown, the method includes:

[0075] S101. An opening groove 10 is made on the multilayer core board 100. The inner wall of the opening groove 10 includes a groove side wall 20 and a groove bottom wall 30. The groove side wall 20 includes a first groove side wall 21 and a second groove side wall 22. A reserved amount is provided on the first groove side wall 21.

[0076] It should be noted that in this step, the multilayer core board 100 is formed by laminating multiple core boards, and each core board includes a dielectric layer and copper layers disposed on the upper and lower surfaces of the dielectric layer.

[0077] An opening groove 10 is provided on the upper surface of the multilayer core board 100, and the reserved amount on the first groove sidewall 21 of the opening groove 10 can be 0.25-0.30mm thick.

[0078] S102. A first copper layer 600 is plated on the upper and lower surfaces of the multilayer core board 100 and the inner wall of the opening groove 10, and a first photosensitive film layer 700 is attached to the surface of each first copper layer 600.

[0079] It should be noted that in this step, a thin layer of copper is plated on the upper and lower surfaces of the multilayer core board 100 and the inner wall of the opening groove 10 by flash plating. The thickness of the thin copper is 5-6 μm, and the total copper thickness on the upper and lower surfaces of the multilayer core board 100 is controlled to be 20 + / - 3 μm.

[0080] The first photosensitive film layer 700 can be a dry film. Dry film is a polymer material that undergoes a polymerization reaction after being irradiated by ultraviolet light, forming a stable substance that adheres to the board surface, thereby achieving the function of blocking electroplating and etching.

[0081] S103. An electroplating window 710 is formed on the first photosensitive film layer 700 facing the opening groove 10. The electroplating window 710 is located in the area enclosed by the opening groove 10.

[0082] It should be noted that in this step, an electroplating window 710 can be opened on the first photosensitive film layer 700 by a pattern transfer method. The electroplating window 710 is located in the area enclosed by the opening groove 10. At this time, the first photosensitive film layer 700 completely covers the upper and lower surfaces of the multilayer core board 100, only exposing the opening groove 10, so as to avoid the upper and lower surfaces of the multilayer core board 100 being subjected to subsequent electroplating and to avoid the copper layer on the upper and lower surfaces of the multilayer core board 100 from thickening.

[0083] The electroplating window 710 is 50-100µm smaller on one side than the opening groove 10, thus ensuring that the first photosensitive film layer 700 completely covers the upper and lower surfaces of the multilayer core board 100.

[0084] S104. A second copper layer 800 and a tin layer 900 are sequentially plated on the inner wall of the opening groove 10 through the electroplating window 710.

[0085] It should be noted that in this step, copper and tin are plated through the electroplating window 710 to ensure that the copper thickness of the inner wall of the opening groove 10 meets the design requirements, thus guaranteeing the thickness of the copper layer on the inner wall of the opening groove 10. Specifically, the copper thickness of the inner wall of the opening groove 10 is an average of 20um.

[0086] The tin layer 900 electroplated on the inner wall of the opening groove 10 protects the second copper layer 800 and prevents damage to the second copper layer 800 in subsequent steps.

[0087] S105. Remove the tin layer 900, the second copper layer 800, the first copper layer 600 and the reserved amount on the first tank sidewall 21 so that the first tank sidewall 21 forms a non-metallic tank sidewall and the second tank sidewall 22 forms a metallic tank sidewall.

[0088] It should be noted that in this step, by removing the tin layer 900, the second copper layer 800, the first copper layer 600, and the reserved amount on the side wall 21 of the first slot, the size of the opening slot 10 is the same as the preset size of the shielding slot.

[0089] S106. Remove the first photosensitive film layer 700 and the tin layer 900 in the opening groove 10 so that the opening groove 10 forms a shielding groove.

[0090] In this embodiment, since the opening groove 10 has been processed, the tin layer 900 inside the opening groove 10 is removed, so that the opening groove 10 forms a preset shielding groove, and the first photosensitive film layer 700 is removed to facilitate subsequent processing.

[0091] S107. Silk screen ink 1000 in the shielding groove so that ink 1000 fills the shielding groove.

[0092] It should be noted that in this step, the shielding groove is filled with ink 1000 to facilitate the subsequent dry film coverage of the shielding groove. The screen printing ink 1000 includes screen printing, pre-baking, exposure, development, and UV curing. Using UV-cured ink 1000 and a dotted screen, the shielding groove is filled by screen printing. The size of the exposure area is 50-75um smaller than one side of the groove. This way, the board surface is not contaminated by ink 1000 after development, which facilitates the etching of the circuit. At the same time, the inside of the groove is protected by ink 1000 and is not etched.

[0093] Finally, fine lines can be made on the upper and lower surfaces of the multilayer core board 100, and then the ink 1000 can be removed.

[0094] It should be noted that since the upper and lower surfaces of the multilayer core board 100 are only plated with the first copper layer 600, the copper layer thickness on the upper and lower surfaces of the multilayer core board 100 is relatively thin. Then, fine lines are made on the upper and lower surfaces of the multilayer core board 100 by using a pattern transfer method. Finally, the ink 1000 is removed to obtain a circuit board with shielding grooves and fine lines.

[0095] The circuit board processing method of this application involves plating a first copper layer 600 on the upper and lower surfaces of the multilayer core board 100 and the inner wall of the opening groove 10, and attaching a first photosensitive film layer 700 to the surface of each first copper layer 600. An electroplating window 710 is opened on the first photosensitive film layer 700 facing the opening groove 10, and a second copper layer 800 is plated on the inner wall of the opening groove 10 through the electroplating window 710. Thus, the shielding groove is plated with both the first copper layer 600 and the second copper layer 800, while the upper and lower surfaces of the multilayer core board 100 are only plated with the first copper layer 600, meaning the copper layer thickness in the shielding groove is [not specified]. The copper layers on the upper and lower surfaces of the multilayer core board 100 are thin, thus ensuring the shielding effect of the shielding groove while allowing fine circuits to be fabricated on the thin copper layers on the upper and lower surfaces of the multilayer core board 100. At the same time, by screen printing ink 1000 inside the shielding groove, the shielding groove is protected from etching by the ink 1000. After the fine circuits are fabricated on the thin copper layers on the upper and lower surfaces of the multilayer core board 100, the ink 1000 can be removed, thereby obtaining a circuit board with shielding grooves and fine circuits, which solves the technical problem of the thick copper layer on the upper and lower surfaces of existing circuit boards with shielding grooves.

[0096] This embodiment is in Figure 1 Based on the embodiments, the processing method of the circuit board is described in detail, which includes:

[0097] S201, reference Figure 2 As shown, a polyimide film 200 is attached to one side of the first core board 110, and the polyimide film 200 covers the first core board 110.

[0098] It should be noted that in this step, polyimide film 200 (PI film) is a polymer material with excellent performance.

[0099] In this embodiment, the thickness of the PI film can be selected as 25-50 μm. The first core board 110 includes a first dielectric layer 111 and copper layers of the first core board 110 disposed on the upper and lower surfaces of the first dielectric layer 111.

[0100] S202, Laser cutting of polyimide film 200, dividing polyimide film 200 into film to be torn and film to be peeled 210.

[0101] S203, reference Figure 3 As shown, the film to be peeled is removed so that the film to be peeled 210 is placed on the first core plate 110.

[0102] It should be noted that in this step, the PI film outside the area corresponding to the opening groove 10 is removed, i.e. the film to be peeled off is removed. The laser cutting path is 0.2-0.3mm away from the inner side of the opening groove 10. That is, the size of the cut PI film block is 0.2-0.3mm smaller than one side of the opening groove 10, which facilitates the subsequent peeling off of the entire film 210.

[0103] S204, reference Figure 4 As shown, at least one second core board 120 is laminated onto the upper and lower surfaces of the first core board 110 through an adhesive layer 300 to form a multilayer core board 100.

[0104] It should be noted that in this step, the second core board 120 includes a second dielectric layer 121 and a copper layer of the second core board 120 disposed on the upper and lower surfaces of the second dielectric layer 121.

[0105] S205. Drill holes on the upper and lower surfaces of the multilayer core board 100.

[0106] It should be noted that in this step, the upper and lower surfaces of the multilayer core board 100 are drilled with a laser, and then impurities in the holes can be removed by plasma descaling technology.

[0107] S206. Fill the hole formed after drilling with conductive material.

[0108] It should be noted that in this step, conductive material is filled into the holes through copper plating, flash plating, and via filling.

[0109] S207. Reduce the thickness of the copper layer on the upper and lower surfaces of the multilayer core board 100 so that the thickness of the copper layer on the upper and lower surfaces of the multilayer core board 100 reaches the preset value.

[0110] It should be noted that in this step, after copper reduction, the copper layer thickness on the upper and lower surfaces of the multilayer core board 100 is controlled to be 15+ / -3um.

[0111] S208, reference Figure 5 As shown, an annular groove 400 is milled into the multilayer core board 100 by controlled depth milling. The annular groove 400 is located above the film to be peeled 210, and the projection of the outer edge of the film to be peeled toward the annular groove 400 is located inside the annular groove 400.

[0112] It should be noted that in this step, a circular controlled-depth milling is performed along the upper surface of the multilayer core board 100, with the depth distance controlled to be 25-125um from the upper surface of the film to be removed 210; and, in the direction of the non-metallized sidewall, the milling cutter path is reduced by 0.25-0.30mm to leave a reserve, which is the feed amount of the controlled-depth milling in the subsequent steps.

[0113] S209, reference Figure 6 As shown, the bottom wall of the annular groove 400 is ablated to form a groove bottom wall 30 on the upper surface of a portion of the first core plate 110.

[0114] It should be noted that in this step, the remaining substrate and the film to be removed 210 within the controlled depth milling path are ablated by laser, so that the upper surface of the first core board 110 is exposed: laser ablation is performed along the outside of the controlled depth milling path, with an ablation width of 0.5-0.8mm, to cleanly ablate the substrate and the film to be removed 210 below the controlled depth milling groove.

[0115] Furthermore, since the projection of the outer edge of the film to be removed 210 toward the annular groove 400 is located inside the annular groove 400, after ablation, the outer ring wall of the annular groove 400 will not retain the film to be removed 210.

[0116] S210, reference Figure 7 As shown, the film to be peeled 210 and the multilayer core board 100 above the film to be peeled 210 are removed, so that the annular groove 400 forms the initial processing opening groove 10.

[0117] It should be noted that this step is a cap removal operation. After removing the film to be removed 210 and the multilayer core board 100 above the film to be removed 210, the annular groove 400 forms a preliminary processing opening groove 10.

[0118] S211. Spray the initial processing opening groove 10 with 3~5% NaOH solution to remove the residual film 210 to be peeled in the initial processing opening groove 10.

[0119] It should be noted that in this step, a horizontal film removal production line is used, and the film is rinsed for 5 minutes under a 3-5% NaOH solution to remove impurities such as the film to be removed from the bottom of the tank.

[0120] S212, Reference Figure 8 As shown, the residual carbon 500 in the initial processing opening groove 10 is removed by plasma degumming method, so that the initial processing opening groove 10 is formed into the opening groove 10.

[0121] It should be noted that in this step, the plasma descaling method is the same as the Plasma descaling method. The Plasma process is used to remove the carbon residue left after laser ablation.

[0122] The inner wall of the opening groove 10 includes a groove side wall 20 and a groove bottom wall 30. The groove side wall 20 includes a first groove side wall 21 and a second groove side wall 22. The first groove side wall 21 is provided with a reserved amount.

[0123] It should be noted that steps S211 and S212 ensure the flatness of the bottom of the tank, so that there is no PI residue or pits on the side walls and bottom walls.

[0124] S213, reference Figure 9 As shown, a first copper layer 600 is plated on the upper and lower surfaces of the multilayer core board 100 and the inner wall of the opening groove 10, and a first photosensitive film layer 700 is attached to the surface of each first copper layer 600.

[0125] It should be noted that in this step, a thin layer of copper is plated on the upper and lower surfaces of the multilayer core board 100 and the inner wall of the opening groove 10 by flash plating. The thickness of the thin copper is 5-6 μm, and the total copper thickness on the upper and lower surfaces of the multilayer core board 100 is controlled to be 20 + / - 3 μm.

[0126] The first photosensitive film layer 700 can be a dry film. Dry film is a polymer material that undergoes a polymerization reaction after being irradiated by ultraviolet light, forming a stable substance that adheres to the board surface, thereby achieving the function of blocking electroplating and etching.

[0127] S214, reference Figure 10 As shown, an electroplating window 710 is formed on the first photosensitive film layer 700 by a pattern transfer method. The electroplating window 710 is located in the area enclosed by the opening groove 10.

[0128] It should be noted that in this step, the first photosensitive film layer 700 is a dry film. The pattern transfer method includes steps such as pattern making, exposure, development, etching and film removal. The window size of the dry film exposure is 50-100um smaller than the single side of the opening groove 10, so as to ensure that only the bottom and sidewalls of the opening groove 10 are electroplated in the subsequent process, while the upper and lower surfaces of the multilayer core board 100 are not electroplated.

[0129] S215, Reference Figure 11 As shown, a second copper layer 800 and a tin layer 900 are sequentially plated on the inner wall of the opening groove 10 through the electroplating window 710.

[0130] It should be noted that in this step, copper and tin are plated through the electroplating window 710 to ensure that the copper thickness of the inner wall of the opening groove 10 meets the design requirements, thus guaranteeing the thickness of the copper layer on the inner wall of the opening groove 10. Specifically, the copper thickness of the inner wall of the opening groove 10 is an average of 20um.

[0131] The tin layer 900 electroplated on the inner wall of the opening groove 10 protects the second copper layer 800 and prevents damage to the second copper layer 800 in subsequent steps.

[0132] S216, Reference Figure 12 As shown, by controlled depth milling, the tin layer 900, the second copper layer 800, the first copper layer 600 and the reserved amount on the first groove sidewall 21 are milled away, so that the first groove sidewall 21 forms a non-metallic groove sidewall and the second groove sidewall 22 forms a metallic groove sidewall.

[0133] It should be noted that in this step, the 0.25-0.30mm thick groove wall is milled off in the direction of the first groove sidewall 21. At this time, the tin layer 900, the second copper layer 800, the first copper layer 600 and the reserved amount of the first groove sidewall 21 are milled off, so that the first groove sidewall 21 forms a non-metallic groove sidewall.

[0134] S217. Use alkaline etching solution to remove the copper flash generated by controlled deep milling.

[0135] It should be noted that in this step, the multilayer core board 100 with dry film passes through the etching tank quickly for about 30 seconds. The etching tank is filled with alkaline etching solution, which is used to remove the copper flash generated by controlled-depth milling.

[0136] In this step, it is possible to achieve a smooth surface at the bottom of the groove by eliminating protruding burrs on the local non-metallic sidewalls and the interface with the metallic sidewalls, thus ensuring the flatness of the metallized sidewalls without any steps.

[0137] S218, Reference Figure 13 As shown, the first photosensitive film layer 700 and the tin layer 900 in the opening groove 10 are removed so that the opening groove 10 forms a shielding groove.

[0138] It should be noted that in this step, the size of the opening slot 10 is consistent with the size of the designed shielding slot.

[0139] S219, reference Figure 14 As shown, the adhesive layer 300 below the pre-reserved amount is burned to expose the first core board 110.

[0140] S220, reference Figure 14 As shown, the adhesive layer 300 and residual carbon 500 generated by burning are removed from the side wall 21 of the first groove and the exposed first core plate 110.

[0141] S221, reference Figure 15 As shown, ink 1000 is screen-printed inside the shielding groove so that ink 1000 fills the shielding groove.

[0142] It should be noted that in this step, the shielding groove is filled with ink 1000 to facilitate the subsequent dry film coverage of the shielding groove. The screen printing ink 1000 includes screen printing, pre-baking, exposure, development, and UV curing. Using UV-cured ink 1000 and a dotted screen, the shielding groove is filled by screen printing. The size of the exposure area is 50-75um smaller than one side of the groove. This way, the board surface is not contaminated by ink 1000 after development, which facilitates the etching of the circuit. At the same time, the inside of the groove is protected by ink 1000 and is not etched.

[0143] S222, reference Figure 16 As shown, a second photosensitive film layer 1100 is attached to both the upper and lower surfaces of the multilayer core board 100.

[0144] It should be noted that in this step, the second photosensitive film layer 1100 can also be a dry film.

[0145] S223. Fine lines 40 are etched on the upper and lower surfaces of the multilayer core board 100 through the second photosensitive film layer 1100.

[0146] It should be noted that in this step, the fine circuit 40 can be fabricated using a pattern transfer method. After transferring the pattern onto the second photosensitive film layer 1100, the fine circuit 40 is etched onto the upper and lower surfaces of the multilayer core board 100. Because the upper and lower surfaces of the multilayer core board 100 are only plated with the first copper layer 600, the copper layer on the upper and lower surfaces of the multilayer core board 100 is relatively thin, thus allowing the fine circuit 40 to be fabricated on the copper layer on the upper and lower surfaces of the multilayer core board 100.

[0147] S224, reference Figure 17 As shown, the multilayer core board 100 is sprayed with a 3-5% NaOH solution to remove the second photosensitive film layer 1100 and the ink 1000.

[0148] It should be noted that in this step, the dry film and ink 1000 in the tank are removed by spraying with a 3-5% NaOH solution, thus creating a shielding groove, fine lines 40, and other patterns that meet the design standards, thereby obtaining a circuit board with shielding grooves and fine lines 40. The specific location of the fine lines 40 can be set according to design requirements; they can be etched on the lower surface of the multilayer core board 100, on the upper surface of the multilayer core board 100, or on both the upper and lower surfaces of the multilayer core board 100.

[0149] It should be noted that in the circuit board with shielding groove and fine line 40 obtained by the circuit board processing method of the present application embodiment, the bottom of the shielding groove is flat, the metal groove sidewall has no steps, and there is no PI residue or pit at the bottom of the sidewall and bottom wall; at the same time, the local non-metallized sidewall and the interface with the metallized sidewall have no protruding burrs.

[0150] A second aspect of this application provides a circuit board, which is manufactured using the circuit board processing method described in any of the above embodiments.

[0151] The circuit board of this application embodiment is manufactured by using the processing method of the circuit board of any of the above embodiments. The copper layer in the shielding groove of the circuit board is thick, and the shielding groove has metal groove sidewalls and non-metal groove sidewalls, thereby ensuring the shielding effect in the shielding groove. Furthermore, there are no protruding burrs on the non-metallized sidewalls and the interface with the metallized sidewalls. The bottom of the shielding groove is flat, there are no steps on the metal groove sidewalls, and there are no PI residues or pits at the bottom of the sidewalls and bottom walls.

[0152] Furthermore, the upper and lower surfaces of the circuit board in this embodiment can be etched with fine lines 40, which meets the circuit design requirements.

[0153] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0154] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A method for processing a circuit board, characterized in that, The processing method includes: An opening groove is made in a multilayer core board. The inner wall of the opening groove includes a groove side wall and a groove bottom wall. The groove side wall includes a first groove side wall and a second groove side wall. A reserved amount is provided on the first groove side wall. A first copper layer is plated on the upper and lower surfaces of the multilayer core board and the inner wall of the opening groove, and a first photosensitive film layer is attached to the surface of each first copper layer. An electroplating window is formed on the first photosensitive film layer facing the opening groove, and the electroplating window is located within the area enclosed by the opening groove; A second copper layer and a tin layer are sequentially plated on the inner wall of the opening groove through the electroplating window; Remove the tin layer, the second copper layer, the first copper layer, and the reserved amount from the first tank sidewall to form a non-metallic tank sidewall for the first tank sidewall and a metallic tank sidewall for the second tank sidewall. Remove the first photosensitive film layer and the tin layer inside the opening groove to make the opening groove form a shielding groove; Ink is screen-printed inside the shielding groove to fill the shielding groove with ink.

2. The circuit board processing method according to claim 1, characterized in that, The multilayer core board includes a first core board and a plurality of second core boards, and the step of creating opening grooves on the multilayer core board includes: A film to be peeled is provided on one side of the first core board, and the film to be peeled is located in the area enclosed by the opening groove; At least one second core board is laminated onto the upper and lower surfaces of the first core board using an adhesive layer to form the multilayer core board; An annular groove is provided on the multilayer core board, the annular groove is located above the film to be peeled, and the projection of the outer edge of the film to be peeled toward the annular groove is located inside the annular groove; The bottom wall of the annular groove is ablated so that the top surface of a portion of the first core plate forms the bottom wall of the groove. Remove the film to be peeled and the multilayer core board above the film to be peeled, so that the annular groove forms a preliminary processing opening groove; Remove the remaining film to be peeled and the residual carbon produced by ablation from the initial processing opening groove, so that the initial processing opening groove forms the opening groove.

3. The circuit board processing method according to claim 2, characterized in that, The step of setting the film to be peeled on one side of the first core board includes: A polyimide film is attached to one side of the first core board, and the polyimide film covers the first core board; The polyimide film is laser-cut to divide it into a film to be peeled and a film to be removed. Remove the film to be peeled so that the film to be peeled is placed on the first core board.

4. The circuit board processing method according to claim 2, characterized in that, After laminating at least one second core board onto the upper and lower surfaces of the first core board using an adhesive layer to form the multilayer core board, the process further includes: Drill holes on the upper and lower surfaces of the multilayer core board; The hole formed after drilling is filled with a conductive material. Reduce the thickness of the copper layers on the upper and lower surfaces of the multilayer core board so that the thickness of the copper layers on the upper and lower surfaces of the multilayer core board reaches a preset value.

5. The circuit board processing method according to claim 2, characterized in that, The provision of an annular groove on the multilayer core board includes: The annular groove is milled into the multilayer core board by controlled depth milling.

6. The circuit board processing method according to claim 2, characterized in that, The process of removing the residual film to be peeled and the residual carbon generated by ablation from the initial processing opening groove includes: The initial processing opening groove is sprayed with a 3-5% NaOH solution to remove the residual film to be peeled from the initial processing opening groove; The residual carbon in the initial processing opening groove is removed by plasma degumming method.

7. The method for processing a circuit board according to any one of claims 1 to 6, characterized in that, The step of creating an electroplating window on the first photosensitive film layer facing the opening groove includes: The electroplating window is created on the first photosensitive film layer using a pattern transfer method.

8. The method for processing a circuit board according to any one of claims 1 to 6, characterized in that, The removal of the tin layer, the second copper layer, the first copper layer, and the reserved amount from the sidewall of the first tank includes: By controlling the depth of milling, the tin layer, the second copper layer, the first copper layer, and the reserved amount on the sidewall of the first slot are milled away; The copper flash generated by the controlled-depth milling is removed using an alkaline etching solution.

9. The method for processing a circuit board according to any one of claims 2 to 6, characterized in that, Before screen printing ink in the shielding groove, the process also includes: The adhesive layer below the reserved amount is burned to expose the first core board; Remove the adhesive layer and residual carbon produced by burning from the sidewall of the first groove and the exposed first core board.

10. A circuit board, characterized in that, The circuit board is manufactured using the circuit board processing method described in any one of claims 1 to 9.

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