Solar cell, photovoltaic module and preparation method of solar cell

Abstract

The invention relates to a solar cell, a photovoltaic module and a preparation method of the solar cell. The solar cell includes a semiconductor substrate including a first face; the first doped semiconductor layer is arranged on the first surface and located in the first polarity region, and the first doped semiconductor layer is provided with a first doped element; the second doped semiconductor layer is arranged on the first surface and located in the second polarity region, the second doped semiconductor layer is provided with a second doped element, and the doping types of the first doped element and the second doped element are opposite; the third doped semiconductor layer is arranged on the side, away from the semiconductor substrate, of the first doped semiconductor layer, at least part of the third doped semiconductor layer is provided with a second doped element, and the doping concentration of the second doped element of the third doped semiconductor layer is smaller than that of the second doped element of the second doped semiconductor layer. Therefore, according to the solar cell, the photovoltaic module and the preparation method of the solar cell provided by the invention, the conversion efficiency of the solar cell can be improved.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to solar cells, photovoltaic modules, and methods for preparing solar cells. Background Technology

[0002] Solar cells, also known as photovoltaic cells, are semiconductor devices that directly convert sunlight into electrical energy. Because they are green and environmentally friendly products that do not cause pollution, and because solar energy is a renewable resource, solar cells are a new type of battery with broad development prospects.

[0003] In related technologies, heterojunction back contact (HBC) solar cells place the metal electrodes on the back side of the cell, so that the light-facing side of the cell is not blocked by the metal electrodes, increasing the light absorption area and thus improving the photoelectric conversion efficiency. However, the efficiency of the aforementioned HBC cells needs further improvement. Summary of the Invention

[0004] Therefore, it is necessary to provide a solar cell, a photovoltaic module, and a method for preparing a solar cell that can improve the conversion efficiency of solar cells.

[0005] In a first aspect, embodiments of this application provide a solar cell having a first polarity region and a second polarity region with opposite polarities. The solar cell includes:

[0006] Semiconductor substrate, including a first surface;

[0007] A first doped semiconductor layer is disposed on a first surface and located in a first polar region, and the first doped semiconductor layer contains a first doping element;

[0008] A second doped semiconductor layer is disposed on the first surface and located in the second polar region. The second doped semiconductor layer has a second doping element, and the doping types of the first doping element and the second doping element are opposite.

[0009] A third doped semiconductor layer is disposed on the side of the first doped semiconductor layer away from the semiconductor substrate. At least a portion of the third doped semiconductor layer contains a second doping element. The doping concentration of the second doping element in the third doped semiconductor layer is less than the doping concentration of the second doping element in the second doped semiconductor layer. The orthographic projection of the third doped semiconductor layer onto the semiconductor substrate and the orthographic projection of the second doped semiconductor layer onto the semiconductor substrate do not overlap.

[0010] In one embodiment, the semiconductor substrate includes a second side and a first side, the first side and the second side being disposed opposite to each other along the thickness direction of the semiconductor substrate, and the first side being connected to the first side and the second side.

[0011] The third doped semiconductor layer includes a first doped portion, which contains a second doped element. The orthographic projection of the first doped portion onto the plane containing the first side surface does not overlap with the orthographic projection of the first doped semiconductor layer onto the plane containing the first side surface.

[0012] In one embodiment, the surface of the first doped semiconductor layer facing away from the semiconductor substrate includes a first sub-surface. The orthographic projection of the first sub-surface onto the semiconductor substrate does not overlap with the orthographic projection of the second doped semiconductor layer onto the semiconductor substrate. The area of ​​the orthographic projection of the first doped portion onto the semiconductor substrate is smaller than the area of ​​the orthographic projection of the first sub-surface onto the semiconductor substrate. The first doped portion is disposed on the first sub-surface.

[0013] In one embodiment, the first sub-face includes a first extension and a second extension, the first extension being located between the second extension and the second polarity region;

[0014] The first polar region and the second polar region are arranged adjacent to each other, and there is a boundary line between the first polar region and the second polar region. The first doped portion includes a first sub-portion, which is located on the first extension portion and extends along the extension direction of the boundary line.

[0015] In one embodiment, the dimension of the first sub-part gradually decreases along the thickness direction of the semiconductor substrate from the first extension to the second extension.

[0016] In one embodiment, the first sub-face includes a first extension and a second extension, the first extension being located between the second extension and the second polarity region;

[0017] The first doped portion includes a plurality of second sub-portions spaced apart, the second sub-portions being located on the second extension portion.

[0018] In one embodiment, within the same second sub-section, the dimension of the second sub-section gradually decreases from the center to the edge along the thickness direction of the semiconductor substrate; and / or,

[0019] The maximum dimension of the multiple second sub-parts along the thickness direction of the semiconductor substrate increases sequentially from the center to the edge of the second extension.

[0020] In one embodiment, the solar cell includes a first passivation layer and a second passivation layer, the first passivation layer being located in a first polar region and between a first doped semiconductor layer and a semiconductor substrate, and the second passivation layer being located in a second polar region and between a second doped semiconductor layer and a semiconductor substrate.

[0021] The first doped portion, along the maximum dimension of the semiconductor substrate, is less than or equal to the sum of the thicknesses of the second passivation layer and the second doped semiconductor layer, and is greater than the thickness of the second passivation layer;

[0022] Alternatively, the maximum dimension of the first doped portion along the thickness direction of the semiconductor substrate is less than or equal to the thickness of the second passivation layer.

[0023] In one embodiment, the ratio of the maximum dimension of the first doped portion along the thickness direction of the semiconductor substrate to the thickness of the second passivation layer ranges from 0.1 to 1.5.

[0024] In one embodiment, the second passivation layer includes a third surface and a fourth surface disposed opposite to each other along the thickness direction of the semiconductor substrate, and a second side surface connected to the third surface and the fourth surface; the second doped semiconductor layer includes a fifth surface and a sixth surface disposed opposite to each other along the thickness direction of the semiconductor substrate, and a third side surface connected to the fifth surface and the sixth surface.

[0025] The first doped portion covers the second side surface, and the third side surface is exposed outside the first doped portion; or...

[0026] The first doped portion covers the second and third sides.

[0027] In one embodiment, the ratio of the area of ​​the first doped portion projected onto the semiconductor substrate to the area of ​​the first sub-surface projected onto the semiconductor substrate is less than or equal to 0.5.

[0028] In one embodiment, the first doped semiconductor layer has a recess on the side opposite to the semiconductor substrate, and the third doped semiconductor layer includes a second doped portion located in the recess. The orthographic projections of the recess and the second doped portion on the plane where the first side is located are both located within the orthographic projection of the first doped semiconductor layer on the plane where the first side is located. The second doped portion contains a first doping element.

[0029] In one embodiment, the doping concentration of the first doping element in the second doped portion is greater than the doping concentration of the first doping element in the first doped semiconductor layer.

[0030] The orthographic projection of the first doped portion onto the semiconductor substrate does not overlap with the orthographic projection of the second doped portion onto the semiconductor substrate at least partially.

[0031] In one embodiment, the second doped portion includes a plurality of third sub-parts spaced apart, and the orthographic projection of each third sub-part on the semiconductor substrate does not overlap at least partially with the orthographic projection of the first doped portion on the semiconductor substrate.

[0032] In one embodiment, the second doped portion has a first position and a second position arranged along the extension direction of the first sub-surface. The size of the second doped portion at the first position along the thickness direction of the semiconductor substrate is greater than the size of the second doped portion at the second position along the thickness direction of the semiconductor substrate. The doping concentration of the first doped element in the second doped portion at the first position is greater than the doping concentration of the first doped element in the second doped portion at the second position.

[0033] In one embodiment, the first sub-face includes a first extension and a second extension, the first extension being located between the second extension and the second polarity region;

[0034] The second doped portion is located in the second extension, and the second doped portion located at the center of the second extension is connected to the second doped portion located at the edge of the second extension.

[0035] In one embodiment, the size of the second doped portion along the thickness direction of the semiconductor substrate gradually decreases from the center to the edge of the second extension.

[0036] In one embodiment, the ratio of the maximum dimension of the second doped portion along the thickness direction of the semiconductor substrate to the maximum thickness of the first doped semiconductor layer is in the range of 0-0.4.

[0037] In one embodiment, the first polar region includes at least one first sub-polar region, the second polar region includes at least one second sub-polar region, the first sub-polar region and the second sub-polar region are arranged alternately along a first direction, the first direction intersecting the thickness direction of the semiconductor substrate;

[0038] In the first sub-polar region, the sum of the dimensions of the orthographic projection of the first doped portion onto the semiconductor substrate along the first direction is L1, the sum of the dimensions of the orthographic projection of the second doped portion onto the semiconductor substrate along the first direction is L2, and the dimension of the orthographic projection of the first sub-surface onto the semiconductor substrate along the first direction is L.

[0039] The ratio of L2 to L ranges from 0 to 0.9; and / or,

[0040] The ratio of the sum of L1 and L2 to L ranges from 0.3 to 1.5.

[0041] In one embodiment, the semiconductor material of the first doped semiconductor layer includes polycrystalline silicon; and / or,

[0042] The semiconductor material of the second doped semiconductor layer includes amorphous silicon; and / or,

[0043] The semiconductor material of the third doped semiconductor layer includes amorphous silicon.

[0044] Secondly, embodiments of this application provide a photovoltaic module, including the solar cell of the first aspect.

[0045] Thirdly, embodiments of this application provide a method for fabricating a solar cell, the solar cell having a first polarity region and a second polarity region with opposite polarities, the fabrication method comprising:

[0046] A semiconductor substrate is provided; the semiconductor substrate includes a first surface;

[0047] A first doped semiconductor layer is formed on the first surface located in the first polar region; the first doped semiconductor layer contains a first doping element;

[0048] A second doped semiconductor layer and a third doped semiconductor layer are formed on the first surface; the second doped semiconductor layer is located in a second polar region and has a second doping element, the doping types of the first doping element and the second doping element are opposite; the third doped semiconductor layer is disposed on the side of the first doped semiconductor layer away from the semiconductor substrate, at least a portion of the third doped semiconductor layer has a second doping element, the doping concentration of the second doping element in the third doped semiconductor layer is less than the doping concentration of the second doping element in the second doped semiconductor layer, and the orthographic projection of the third doped semiconductor layer on the semiconductor substrate and the orthographic projection of the second doped semiconductor layer on the semiconductor substrate do not overlap.

[0049] In one embodiment, at least a portion of the first polarity region is configured as a first sub-region;

[0050] Forming a second doped semiconductor layer and a third doped semiconductor layer on the first surface includes:

[0051] A passivation material layer and a doped semiconductor material layer are sequentially formed on the first surface, and both the passivation material layer and the doped semiconductor material layer are located in the first polarity region and the second polarity region.

[0052] The passivation material layer and the doped semiconductor material layer in the first sub-region are processed by laser to etch the passivation material layer and the doped semiconductor material layer located in the first sub-region. At least one of the remaining passivation material layer and the doped semiconductor material layer located in the first sub-region forms the first doped portion of the third doped semiconductor layer. The passivation material layer and the doped semiconductor material layer located outside the first sub-region respectively form the second passivation layer and the second doped semiconductor layer.

[0053] In one embodiment, laser processing of the passivation material layer and the doped semiconductor material layer of the first sub-region includes: laser processing of the passivation material layer, the doped semiconductor material layer and a portion of the first doped semiconductor layer of the first sub-region, so that the portion of the first doped semiconductor layer forms a second doped portion of the third doped semiconductor layer.

[0054] The solar cell, photovoltaic module, and solar cell fabrication method provided in this application form a third doped semiconductor layer on the side of the first doped semiconductor layer away from the semiconductor substrate. During the process of patterning the doped semiconductor material layer with a laser to form the second doped semiconductor layer, the third doped semiconductor layer can reduce the damage to the film layer below the third doped semiconductor layer when the laser ablates the second doped semiconductor layer. For example, it can reduce the damage to the first doped semiconductor layer. In addition, by retaining the third doped semiconductor layer, wet etching is no longer required to remove the third doped semiconductor layer, thereby avoiding damage to other film layers of the solar cell during the wet etching process of the third doped semiconductor layer. Therefore, it can not only reduce the damage to the solar cell and improve the efficiency of the solar cell, but also expand the process window. Attached Figure Description

[0055] Figure 1 A top view of a solar cell provided in an embodiment of this application.

[0056] Figure 2 Another top view of a solar cell provided in an embodiment of this application.

[0057] Figure 3 for Figure 1 Sectional view along the AA direction.

[0058] Figure 4 A cross-sectional view of a solar cell provided in an embodiment of this application.

[0059] Figure 5 for Figure 4 A magnified structural diagram of B in the diagram.

[0060] Figure 6 This is a partially enlarged structural diagram of a solar cell provided in an embodiment of this application.

[0061] Figure 7 This is a schematic diagram of the structure after the formation of the first doped semiconductor layer, provided in an embodiment of this application.

[0062] Figure 8 This is a schematic diagram of the structure after forming a doped semiconductor material layer, as provided in an embodiment of this application.

[0063] Figure 9 This is a schematic diagram of the structure after forming the second doped semiconductor layer, provided in an embodiment of this application.

[0064] Figure 10 This is a schematic flowchart illustrating the method for fabricating a solar cell according to an embodiment of this application.

[0065] Explanation of reference numerals in the attached figures:

[0066] 100, Solar cell; 100a, First polar region; 100a1, First sub-region; 100a2, Second sub-region; 100b, Second polar region; 100c1, First sub-polar region; 100c2, Second sub-polar region; 100c3, Third sub-polar region; 100c4, Fourth sub-polar region; 110, Semiconductor substrate; 111, First surface; 112, Second surface; 113, First side surface; 121, First doped semiconductor layer; 1211, First sub-surface; 1211a, First extension; 1211b, Second extension; 1212, Second sub-surface; 122, Second doped semiconductor layer; 122a, Doped semiconductor material layer; 1223, Third side surface; 123, Third doped semiconductor layer; 1231, First doped portion; 1232, Second doped portion; 1233a, First sub-part; 1233b, Second sub-part; 1233c, Third sub-part; 140, Conductive layer; 141, First conductive portion; 142, Second conductive portion; 151, First passivation layer; 152, Second passivation layer; 1522, Second side surface; 152a, Passivation material layer; 153, Third passivation layer; 154, Anti-reflection layer; 161, First electrode; 162, Second electrode; 170, Isolation opening; I, Interface; E, Boundary line; X, First direction; Y, Second direction; Z, Third direction. Detailed Implementation

[0067] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0068] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0069] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0070] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0071] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0072] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0073] In related technologies, HBC cells have N-type regions and P-type regions. HBC cells include a semiconductor substrate with a first surface and a second surface disposed opposite to each other. A tunneling oxide layer and an N-type doped semiconductor layer are sequentially disposed on the first surface located in the N-type region, and an intrinsic amorphous silicon layer and a P-type doped semiconductor layer are sequentially disposed on the first surface located in the P-type region.

[0074] A tunneling oxide layer and an N-type doped semiconductor layer can be formed first on the first surface of the N-type region. Then, an intrinsic amorphous silicon layer and a P-type doped semiconductor layer are sequentially formed on the first surface, with both layers located in the N-type and P-type regions, respectively. Laser ablation is then used to remove the intrinsic amorphous silicon layer and P-type doped semiconductor layer in the N-type region, exposing the N-type doped semiconductor layer. During laser ablation, the laser can easily damage the N-type doped semiconductor layer; this damage can be removed using wet chemical etching.

[0075] However, wet chemical etching easily damages the intrinsic amorphous silicon layer, leading to HBC cell damage and adversely affecting its efficiency. Therefore, it is necessary to strictly control the damage to the N-type doped semiconductor layer caused by laser ablation, finding a balance between laser ablation and damage, resulting in a narrow process window. The N-type doped semiconductor layer can be a doped polycrystalline silicon layer. If the doped polycrystalline silicon layer is too thick, it will lead to significant optical losses, affecting the cell's short-circuit current and conversion efficiency. Reducing the thickness of the polycrystalline silicon layer, on the other hand, presents even greater challenges to laser ablation and damage control.

[0076] To address the aforementioned issues, this application provides a method for fabricating a solar cell, a photovoltaic module, and a solar cell, which can improve the efficiency of solar cells.

[0077] The following will combine Figures 1-10 The solar cells, photovoltaic modules, and methods for preparing solar cells provided in the embodiments of this application will be described.

[0078] See Figure 1 This application provides a solar cell 100, which includes a first polar region 100a and a second polar region 100b. The polarities of the first polar region 100a and the second polar region 100b are opposite, and one of the first polar region 100a and the second polar region 100b can be an N-type region and the other can be a P-type region.

[0079] See some examples. Figure 1 The first polarity region 100a and the second polarity region 100b are arranged adjacent to each other, and there is a boundary line E between the first polarity region 100a and the second polarity region 100b. For example, the first polarity region 100a includes a first sub-region 100a1 and a second sub-region 100a2, and the second sub-region 100a2 may be located between the first sub-region 100a1 and the second polarity region 100b.

[0080] In other examples, the first polarity region 100a and the second polarity region 100b can be set alternately, with an isolation region between the first polarity region 100a and the second polarity region 100b.

[0081] This application provides an example of a first polarity region 100a and a second polarity region 100b being arranged adjacently.

[0082] See Figure 3 The solar cell 100 includes a semiconductor substrate 110, which can provide support for subsequently formed film layers. The semiconductor substrate 110 can be used to receive incident light and generate photogenerated carriers.

[0083] For example, see Figure 3 The semiconductor substrate 110 may have a first surface 111 and a second surface 112 disposed opposite to each other along the thickness direction (i.e., the third direction Z) of the semiconductor substrate 110, and at least one of the first surface 111 and the second surface 112 may be used to receive sunlight. In this embodiment, the second surface 112 is used to receive sunlight as an example, that is, the second surface 112 is close to the light-facing surface of the solar cell 100, and the first surface 111 is close to the back-facing surface of the solar cell 100.

[0084] See Figure 3 The solar cell 100 includes a first doped semiconductor layer 121, which is disposed on a first surface 111 and located in a first polar region 100a. The first doped semiconductor layer 121 contains a first doping element.

[0085] See Figure 3 The solar cell 100 includes a first passivation layer 151 located in a first polar region 100a. The first passivation layer 151 is situated between a first doped semiconductor layer 121 and a semiconductor substrate 110. The first passivation layer 151 can improve photoelectric conversion efficiency by reducing the surface recombination rate, thereby increasing the open-circuit voltage and conversion efficiency of the solar cell 100. The first passivation layer 151 may contact a first surface 111 located in the first polar region 100a. The region where the first passivation layer 151 contacts the first surface 111 defines the first polar region 100a.

[0086] See Figure 3 The solar cell 100 includes a second doped semiconductor layer 122, which is disposed on the first surface 111 and located in the second polar region 100b. The second doped semiconductor layer 122 has a second doping element, and the doping types of the first doping element and the second doping element are opposite.

[0087] See Figure 3The solar cell 100 includes a second passivation layer 152 located in a second polar region 100b. The second passivation layer 152 is situated between a second doped semiconductor layer 122 and a semiconductor substrate 110. The second passivation layer 152 can improve photoelectric conversion efficiency by reducing the surface recombination rate, thereby increasing the open-circuit voltage and conversion efficiency of the solar cell 100. The second passivation layer 152 may contact a first surface 111 located in the second polar region 100b. The region where the second passivation layer 152 contacts the first surface 111 defines the second polar region 100b.

[0088] For example, see Figure 3 The second passivation layer 152 and the second doped semiconductor layer 122 can extend into the second sub-region 100a2, and the second passivation layer 152 and the second doped semiconductor layer 122 located in the second sub-region 100a2 can be located on the side of the first doped semiconductor layer 121 opposite to the semiconductor substrate 110. An interface I is formed between the second passivation layer 152 and the first doped semiconductor layer 121 in the second sub-region 100a2.

[0089] See Figure 3 The solar cell 100 includes a third doped semiconductor layer 123, which is disposed on the side of the first doped semiconductor layer 121 facing away from the semiconductor substrate 110. At least a portion of the third doped semiconductor layer 123 contains a second doping element. The orthographic projection of the third doped semiconductor layer 123 onto the semiconductor substrate 110 does not overlap with the orthographic projection of the second doped semiconductor layer 122 onto the semiconductor substrate 110. For example, the third doped semiconductor layer 123 includes a first doped portion 1231, which contains a second doping element. Thus, by forming the first doped portion 1231 on the side of the first doped semiconductor layer 121 facing away from the semiconductor substrate 110, during the process of patterning the doped semiconductor material layer 122a with a laser to form the second doped semiconductor layer 122, the first doped portion 1231 can reduce the damage to the film layer below the first doped portion 1231 when the laser ablates the second doped semiconductor layer 122. For example, it can reduce the damage to the first doped semiconductor layer 121. In addition, by retaining the first doped portion 1231, it is no longer necessary to remove at least part of the third doped semiconductor layer using wet etching. The conductor layer 123 prevents damage to other film layers of the solar cell 100 during wet etching of at least a portion of the third doped semiconductor layer 123. Therefore, it not only reduces damage to the solar cell 100 and improves the efficiency of the solar cell 100, but also expands the process window. Secondly, since the damage to the first doped semiconductor layer 121 is reduced, it is not necessary to make the first doped semiconductor layer 121 too thick. This helps to avoid excessive optical loss caused by excessive thickness of the first doped semiconductor layer 121, thereby reducing its adverse effects on the short-circuit current and conversion efficiency of the cell.

[0090] The doping concentration of the second doped element in the third doped semiconductor layer 123 is less than that of the second doped element in the second doped semiconductor layer 122. This makes the doping concentration of the second doped element in the first doped portion 1231 smaller, which helps to reduce the adverse effects of the first doped portion 1231 on carrier transport between the first doped semiconductor layer 121 and the first conductive portion 141.

[0091] It should be noted that, see Figure 8 and Figure 9 The second doped semiconductor layer 122 can be formed using a doped semiconductor material layer 122a. When forming the second doped semiconductor layer 122, a passivation material layer 152a and a doped semiconductor material layer 122a are formed sequentially. The passivation material layer 152a and the doped semiconductor material layer 122a are located in the first polar region 100a and the second polar region 100b. Then, the passivation material layer 152a and the doped semiconductor material layer 122a in the first sub-region 100a1 are removed by laser processing (e.g., laser ablation). The passivation material layer 152a and the doped semiconductor material layer 122a located in the second polar region 100b are retained to form the second passivation layer 152 and the second doped semiconductor layer 122, respectively. That is, the passivation material layer 152a and the doped semiconductor material layer 122a are opened by laser processing. In order to reduce the damage to the first doped semiconductor layer 121 caused by laser processing, the laser energy can be set to a lower level. This also makes it difficult to completely remove the passivation material layer 152a and the doped semiconductor material layer 122a on the first polar region 100a, leaving residues. The first doped portion 1231 is formed from the residual passivation material layer 152a in the first polar region 100a, or the first doped portion 1231 is formed jointly by the residual passivation material layer 152a and the doped semiconductor material layer 122a in the first polar region 100a. In this case, the first doped portion 1231 and the second passivation layer 152 can be disposed in the same layer and with the same material, or the first doped portion 1231 can be disposed in the same layer and with the same material as the second passivation layer 152 and the second doped semiconductor layer 122.

[0092] During laser processing, some of the second doped element in the doped semiconductor material layer 122a diffuses into the residual passivation material layer 152a, resulting in a certain amount of second doped element in the residual passivation material layer 152a, but with a low concentration. Furthermore, in embodiments where both the passivation material layer 152a and the doped semiconductor material layer 122a remain, some of the second doped element in the residual doped semiconductor material layer 122a can diffuse into the residual passivation material layer 152a, reducing the amount of second doped element in the residual doped semiconductor material layer 122a. Therefore, the doping concentration of the second doped element in the first doped portion 1231 can be lower than the doping concentration of the second doped element in the second doped semiconductor layer 122.

[0093] Therefore, in this embodiment of the application, the passivation material layer 152a and the doped semiconductor material layer 122a are opened by low-energy laser processing, so that the passivation material layer 152a and the doped semiconductor material layer 122a of the first sub-region 100a1 have residues to form the first doped part 1231. The first doped part 1231 has a certain blocking effect on the laser, which can reduce the damage of the laser to the first doped semiconductor layer 121. In addition, the low-energy laser processing is less likely to cause damage to the first doped semiconductor layer 121.

[0094] It should be noted that "same layer, same material" in the embodiments of this application refers to forming a base film layer from the same material, and then, after patterning and / or other processing of the base film layer, forming various structural film layers from different parts of the base film layer. The processing processes for the different structural film layers can be the same or different, and the different structural film layers can have the same or different thicknesses, and can also be on the same horizontal plane or different horizontal planes.

[0095] In some embodiments, see Figure 3 The semiconductor substrate 110 includes a first side surface 113 connected to the first surface 111 and the second surface 112. The orthographic projection of the first doped portion 1231 onto the plane of the first side surface 113 does not overlap with the orthographic projection of the first doped semiconductor layer 121 onto the plane of the first side surface 113. In other words, the first doped portion 1231 is located above the plane of interface I.

[0096] In some embodiments, see Figure 3The surface of the first doped semiconductor layer 121 facing away from the semiconductor substrate 110 includes a first sub-surface 1211 located in the first sub-region 100a1 and a second sub-surface 1212 located in the second sub-region 100a2. The second sub-surface 1212 is covered by the second passivation layer 152 and the second doped semiconductor layer 122, while the first sub-surface 1211 is exposed outside the second passivation layer 152 and the second doped semiconductor layer 122. The orthographic projection of the first sub-surface 1211 onto the semiconductor substrate 110 does not overlap with the orthographic projection of the second doped semiconductor layer 122 onto the semiconductor substrate 110. A first doped portion 1231 is disposed on the first sub-surface 1211. The area of ​​the orthogonal projection of the first doped portion 1231 onto the semiconductor substrate 110 is smaller than the area of ​​the orthogonal projection of the first sub-surface 1211 onto the semiconductor substrate 110, so that part of the first sub-surface 1211 is not blocked by the first doped portion 1231, which helps to reduce the transport of charge carriers between the first doped semiconductor layer 121 and the first conductive portion 141 by the first doped portion 1231.

[0097] In some embodiments, see Figure 4 and Figure 5 The first sub-surface 1211 includes a first extension 1211a and a second extension 1211b. The first extension 1211a is located between the second extension 1211b and the second polarity region 100b. The first extension 1211a is located at the edge of the first sub-surface 1211 near the second polarity region 100b.

[0098] In some embodiments, see Figure 5 The first doped portion 1231 includes a first sub-portion 1233a, which is located on the first extension portion 1211a and extends along the extension direction of the boundary line E. Thus, the first sub-portion 1233a is continuously disposed along the extension direction of the boundary line E. During laser film opening, the first sub-portion 1233a can provide relatively complete coverage of the film layer below it, thus forming good protection. Furthermore, the laser energy in the region corresponding to the first extension portion 1211a is lower, further reducing laser damage to the film layer below the first sub-portion 1233a.

[0099] For example, when laser-deforms the passivation material layer 152a and the doped semiconductor material layer 122a, the laser energy at the edge of the first sub-region 100a1 near the second sub-region 100a2 is lower than that of the rest of the first sub-region 100a1. That is, the laser energy corresponding to the first extension 1211a is lower than the laser energy corresponding to the second extension 1211b. This helps to reduce laser damage to the second doped semiconductor layer 122 and the second passivation layer 152. When using a low-energy laser for laser deformation, the laser energy corresponding to the first extension 1211a is further reduced, which helps to ensure that the first sub-region 1233a is continuously disposed along the extension direction of the boundary line E.

[0100] In some embodiments, see Figure 5 The dimension of the first sub-part 1233a gradually decreases along the thickness direction of the semiconductor substrate 110 from the first extension 1211a to the second extension 1211b. When using a low-energy laser for laser delamination, the greater the thickness of the first sub-part 1233a, the lower the corresponding laser energy. By setting the thickness of the first sub-part 1233a closer to the second sub-polar region 100c2 to be larger, it is equivalent to setting the laser energy closer to the second sub-polar region 100c2 to be smaller, which can better prevent the laser from damaging the second passivation layer 152 and the second doped semiconductor layer 122.

[0101] In some embodiments, see Figure 5 The first doped portion 1231 includes a plurality of second sub-parts 1233b spaced apart. The second sub-parts 1233b are located on the second extension portion 1211b. This allows the second sub-parts 1233b to be distributed more evenly on the second extension portion 1211b, so that the plurality of second sub-parts 1233b can form uniform protection for the underlying film layer. In addition, the fact that two adjacent second sub-parts 1233b are spaced apart without obstructing the first doped portion 1231 helps to reduce the adverse effects of the second sub-parts 1233b on the transport of charge carriers between the first doped semiconductor layer 121 and the first conductive portion 141.

[0102] In some embodiments, see Figure 5 In the same second sub-part 1233b, the size of the second sub-part 1233b along the thickness direction of the semiconductor substrate 110 gradually decreases from the center to the edge of the second sub-part 1233b. For example, the surface of the second sub-part 1233b facing away from the semiconductor substrate 110 can be an arc surface.

[0103] In some embodiments, see Figure 5The maximum size of the multiple second sub-parts 1233b along the thickness direction of the semiconductor substrate 110 increases sequentially from the center to the edge of the second extension 1211b, resulting in a larger thickness of the second sub-parts 1233b near the second sub-surface 1212. The laser ablation energy corresponding to the second sub-parts 1233b is lower, which helps to reduce the damage of the laser ablation to the film layer below the second sub-parts 1233b, and also helps to reduce the damage of the laser ablation to the second passivation layer 152 and the second doped semiconductor layer 122. In addition, the thickness of the second sub-parts 1233b at the center of the second extension 1211b is smaller, which helps to reduce the adverse effect of the second sub-parts 1233b on the carrier transport between the first doped semiconductor layer 121 and the first conductive part 141.

[0104] In some embodiments, the maximum dimension of the first doped portion 1231 along the semiconductor substrate 110 is less than or equal to the sum of the thicknesses of the second passivation layer 152 and the second doped semiconductor layer 122, and greater than the thickness of the second passivation layer 152. Thus, the maximum thickness of the first doped portion 1231 is larger, which can reduce the damage to the first doped semiconductor layer 121 caused by laser delamination.

[0105] For example, when the first doped portion 1231 is formed by the residue of the passivation material layer 152a and the doped semiconductor material layer 122a, it is advantageous to achieve a maximum size of the first doped portion 1231 along the semiconductor substrate 110 that is less than or equal to the sum of the thicknesses of the second passivation layer 152 and the second doped semiconductor layer 122, and greater than the thickness of the second passivation layer 152.

[0106] In other embodiments, the maximum dimension of the first doped portion 1231 along the thickness direction of the semiconductor substrate 110 is less than or equal to the thickness of the second passivation layer 152. Thus, the maximum thickness of the first doped portion 1231 is smaller, which helps to reduce the adverse effects of the first doped portion 1231 on carrier transport between the first doped semiconductor layer 121 and the first conductive portion 141.

[0107] For example, when the third doped semiconductor layer 123 is formed by the residual passivation material layer 152a, it is advantageous to achieve a maximum size of the first doped portion 1231 along the thickness direction of the semiconductor substrate 110 that is less than or equal to the thickness of the second passivation layer 152.

[0108] In some embodiments, the ratio of the maximum dimension of the first doped portion 1231 along the thickness direction of the semiconductor substrate 110 to the thickness of the second passivation layer 152 is in the range of 0.1-1.5. For example, the ratio can be 0.1, 0.3, 0.5, 1, 1.2, 1.5 or any value between 0.1 and 1.5.

[0109] In some embodiments, see Figure 5The second passivation layer 152 includes a third surface and a fourth surface disposed opposite to each other along the thickness direction of the semiconductor substrate 110, and a second side surface 1522 connected to the third surface and the fourth surface. The second doped semiconductor layer 122 includes a fifth surface and a sixth surface disposed opposite to each other along the thickness direction of the semiconductor substrate 110, and a third side surface 1223 connected to the fifth surface and the sixth surface.

[0110] See some examples. Figure 5 The first doped portion 1231 covers at least a portion of the second side 1522, and the third side 1223 is exposed outside the first doped portion 1231. The first doped portion 1231 is not covered by the third side 1223. This is beneficial to make the maximum thickness of the first doped portion 1231 smaller, which is beneficial to reduce the adverse effect of the first doped portion 1231 on the carrier transport between the first doped semiconductor layer 121 and the first conductive portion 141.

[0111] In other examples, the first doped portion 1231 may cover the second side 1522 and at least part of the third side 1223. The first doped portion 1231 may extend from the second side 1522 to the third side 1223, thereby making the maximum thickness of the first doped portion 1231 larger, which can reduce the damage to the first doped semiconductor layer 121 caused by laser delamination.

[0112] In some embodiments, see Figure 5 The ratio of the area of ​​the orthographic projection of the first doped portion 1231 onto the semiconductor substrate 110 to the area of ​​the orthographic projection of the first sub-surface 1211 onto the semiconductor substrate 110 is less than or equal to 0.5. This minimizes the area of ​​the first doped semiconductor layer 121 at the first sub-surface 121 obstructed by the first doped portion 1231, thus reducing the adverse effects of the first doped portion 1231 on carrier transport between the first doped semiconductor layer 121 and the first conductive portion 141. For example, this ratio can be any value of 0.2, 0.3, 0.4, 0.5, or less than 0.5.

[0113] In some embodiments, see Figure 3The first doped semiconductor layer 121 has a recess on the side opposite to the semiconductor substrate 110. The third doped semiconductor layer 123 includes a second doped portion 1232, which is located within the recess. The orthographic projections of the recess and the second doped portion 1232 onto the plane of the first side surface 113 are both located within the orthographic projection of the first doped semiconductor layer 121 onto the plane of the first side surface 113. The second doped portion 1232 contains a first doping element. Thus, the second doped portion 1232 is located inside the first doped semiconductor layer 121. The second doped portion 1232 can be formed by partially forming the first doped semiconductor layer 121 during laser delamination. For example, the semiconductor material of the first doped semiconductor layer 121 includes polycrystalline silicon. During laser delamination, the laser can transform the polycrystalline silicon of the first doped semiconductor layer 121 into amorphous silicon.

[0114] In some embodiments, the doping concentration of the first doped element in the second doped portion 1232 is greater than the doping concentration of the first doped element in the first doped semiconductor layer 121. Thus, the higher doping concentration of the first doped element in the second doped portion 1232 is beneficial for improving carrier transport. In addition, when the second doped portion 1232 contacts the first conductive portion 141, the contact resistance between the second doped portion 1232 and the first conductive portion 141 is lower.

[0115] It should be noted that the third doped semiconductor layer 123 in this embodiment is formed from the original film layer of the solar cell 100, without changing the film layer structure of the solar cell 100. By adjusting the parameters of laser ablation, the laser-ablated film layer can be partially retained, thus avoiding excessive damage to the solar cell 100. Simultaneously, forming a highly doped second doped portion 1232 in the first sub-region 100a1 can improve the contact between the first doped semiconductor layer 121 and the first conductive portion 141, reduce contact resistance, and improve cell efficiency.

[0116] In some embodiments, see Figure 3 The first doped portion 1231 and the second doped portion 1232 are both located in the first sub-region 100a1. The orthographic projection of the first doped portion 1231 on the semiconductor substrate 110 does not overlap with the orthographic projection of the second doped portion 1232 on the semiconductor substrate 110 at least partially. Thus, at least part of the second doped portion 1232 can be exposed outside the first doped portion 1231 to make contact with the first conductive portion 141, thereby facilitating the transport of charge carriers.

[0117] In some embodiments, see Figure 6The second doped portion 1232 includes a plurality of third sub-parts 1233c spaced apart. The orthographic projection of each third sub-part 1233c on the semiconductor substrate 110 does not overlap with the orthographic projection of the first doped portion 1231 on the semiconductor substrate 110 at least partially. This allows at least a portion of each third sub-part 1233c to be exposed outside the first doped portion 1231 and to contact the first conductive portion 141, which is beneficial for carrier transport. In addition, since the plurality of third sub-parts 1233c are spaced apart, the distribution of the plurality of third sub-parts 1233c in the first sub-region 100a1 is relatively uniform, which is beneficial for improving the uniformity of carrier transport.

[0118] In some embodiments, the second doped portion 1232 has a first position and a second position arranged along the extension direction of the first sub-surface 1211. The dimension of the second doped portion 1232 at the first position along the thickness direction of the semiconductor substrate 110 is larger than that at the second position along the thickness direction of the semiconductor substrate 110, and the doping concentration of the first doped element in the second doped portion 1232 at the first position is greater than that in the second doped portion 1232 at the second position. During laser film opening, the greater the laser energy at the corresponding position, the greater the thickness of the first doped semiconductor layer 121 that the laser energy can affect, resulting in a greater thickness of the second doped portion 1232 at the corresponding position and a higher doping concentration of the first doped element.

[0119] In some embodiments, see Figure 3 The second doped portion 1232 may be located in the second extension portion 1211b ( Figure 5 The second doped portion 1232 located at the center of the second extension 1211b is connected to the second doped portion 1232 located at the edge of the second extension 1211b. In this way, the second doped portion 1232 located at the center of the second extension 1211b and the second doped portion 1232 located at the edge of the second extension 1211b form a continuous integral structure, which is beneficial to increasing the installation area of ​​the second doped portion 1232 and is beneficial to the transport of charge carriers.

[0120] In some embodiments, see Figure 3 The dimension of the second doped portion 1232 along the thickness direction of the semiconductor substrate 110 is determined by the second extension portion 1211b ( Figure 5 The laser energy gradually decreases from the center to the edge of the second extension 1211b. Thus, during the laser film-opening process, the laser energy near the edge of the second extension 1211b is lower, which helps to reduce the damage to the second doped semiconductor layer 122 and the second passivation layer 152 caused by the laser film-opening. In addition, the laser energy near the center of the second extension 1211b is higher, which helps to reduce the obstruction of the second extension 1211b by the first doped part 1231 and prevents the first doped part 1231 from remaining too much, which is beneficial to the transport of charge carriers.

[0121] In some embodiments, the ratio of the maximum dimension of the second doped portion 1232 along the thickness direction of the semiconductor substrate 110 to the maximum thickness of the first doped semiconductor layer 121 is in the range of 0-0.4. This prevents the thickness of the second doped portion 1232 from being too large, which helps to prevent the adverse effects of laser delamination on the first passivation layer 151. For example, this ratio can be 0, 0.1, 0.2, 0.3, 0.4, or any value between 0 and 0.4.

[0122] See Figure 1 and Figure 3 The solar cell 100 may have a first direction X, a second direction Y, and a third direction Z, all of which are different. The first direction X, the second direction Y, and the third direction Z can be perpendicular to each other. For example, the third direction Z can be the thickness direction of the solar cell 100, and the first direction X and the second direction Y can be any two different directions perpendicular to the thickness direction of the solar cell 100. The first direction X can be the length direction of the solar cell 100, and the second direction Y can be the width direction of the solar cell 100. The length, width, and thickness in the embodiments of this application are merely for descriptive convenience and do not imply any limitation on the dimensions. For example, the width can be greater than, equal to, or less than the length. The orientation of the solar cell 100 can be consistent with the orientation of the film layers such as the semiconductor substrate 110.

[0123] In some embodiments, see Figure 1 and Figure 2 The first polarity region 100a includes at least one first sub-polarity region 100c1, and the second polarity region 100b includes at least one second sub-polarity region 100c2. The first sub-polarity region 100c1 and the second sub-polarity region 100c2 are arranged alternately along the first direction X. The first sub-polarity region 100c1 is provided with a first sub-region 100a1 and a second sub-region 100a2. The second sub-region 100a2 of the first sub-polarity region 100c1 is located between the first sub-region 100a1 and the second sub-polarity region 100c2 of the first sub-polarity region 100c1.

[0124] In some embodiments, see Figure 1 and Figure 2 The first polar region 100a includes a third sub-polar region 100c3, which is connected to one end of each of the first sub-polar regions 100c1 along the second direction Y.

[0125] In some embodiments, see Figure 1 and Figure 2The first polar region 100a includes a fourth sub-polar region 100c4, which is connected to the end of each first sub-polar region 100c1 away from the third sub-polar region 100c3 along the second direction Y. Alternatively, the second polar region 100b includes a fourth sub-polar region 100c4, which is connected to the end of each second sub-polar region 100c2 away from the third sub-polar region 100c3 along the second direction Y.

[0126] In the first sub-polar region 100c1, the sum of the dimensions of the orthographic projection of the first doped portion 1231 onto the semiconductor substrate 110 along the first direction X is L1, and the sum of the dimensions of the orthographic projection of the second doped portion 1232 onto the semiconductor substrate 110 along the first direction X is L2. The dimension of the orthographic projection of the first sub-surface 1211 onto the semiconductor substrate 110 along the first direction X is L.

[0127] For example, the ratio of L2 to L ranges from 0 to 0.9. For instance, the ratio can be 0, 0.1, 0.3, 0.5, 0.7, 0.9, or any value between 0 and 0.9.

[0128] For example, the ratio of the sum of L1 and L2 to L is in the range of 0.3-1.5. For instance, the ratio can be 0.3, 0.5, 0.7, 0.9, 1.1, 1.3, 1.5 or any value between 0.3 and 1.5.

[0129] For example, the semiconductor material of the first doped semiconductor layer 121 includes polycrystalline silicon.

[0130] For example, the semiconductor material of the second doped semiconductor layer 122 includes amorphous silicon.

[0131] For example, the semiconductor material of the third doped semiconductor layer 123 includes amorphous silicon.

[0132] For example, the third doped semiconductor layer 123 may be doped with at least one element selected from boron and phosphorus.

[0133] For example, the third doped semiconductor layer 123 can be a plurality of isolated island structures or a continuous irregular structure.

[0134] The semiconductor substrate 110 provided in the embodiments of this application will be described below.

[0135] In some embodiments, the semiconductor substrate 110 may be a silicon substrate, and the material of the silicon substrate may include at least one of monocrystalline silicon and polycrystalline silicon. This application uses monocrystalline silicon as an example for illustration.

[0136] For example, the semiconductor substrate 110 can be doped with N-type ions, which can be at least one of phosphorus, arsenic, and antimony. Alternatively, the semiconductor substrate 110 can be doped with P-type ions, which can be at least one of aluminum and boron. This application embodiment uses N-type doping of the semiconductor substrate 110 as an example for illustration.

[0137] In some embodiments, at least a portion of at least one of the first surface 111 and the second surface 112 may have a textured surface. The textured surface may be a pyramidal textured surface, a pitted textured surface, etc. The textured surface has a low reflectivity to incident light, thus resulting in a high absorption and utilization rate of incident light, leading to a high photoelectric conversion efficiency of the solar cell 100. In other embodiments, at least a portion of at least one of the first surface 111 and the second surface 112 may not have a textured surface.

[0138] The first passivation layer 151 and the first doped semiconductor layer 121 provided in the embodiments of this application will be described below.

[0139] For example, the material of the first doped semiconductor layer 121 includes doped polycrystalline silicon, a stack of doped polycrystalline silicon and intrinsic polycrystalline silicon, doped amorphous silicon, or doped microcrystalline silicon. The doping type of the first doped semiconductor layer 121 is the same as or opposite to the doping type of the semiconductor substrate 110.

[0140] For example, the first passivation layer 151 may include tunneling oxide or intrinsic amorphous silicon.

[0141] For example, the first passivation layer 151 may include a tunneling oxide, and the first doped semiconductor layer 121 may include doped polysilicon.

[0142] For example, the first passivation layer 151 may include intrinsic amorphous silicon, and the first doped semiconductor layer 121 may include a doped amorphous silicon layer or a doped microcrystalline silicon layer.

[0143] The second passivation layer 152 and the second doped semiconductor layer 122 provided in the embodiments of this application will be described below.

[0144] The doping type of the second doped semiconductor layer 122 is opposite to that of the first doped semiconductor layer 121, and the conductivity type of the second doped semiconductor layer 122 is opposite to that of the first doped semiconductor layer 121. One of the first doped semiconductor layer 121 and the second doped semiconductor layer 122 can be N-type doped, and the other can be P-type doped.

[0145] For example, the material of the second passivation layer 152 includes intrinsic amorphous silicon.

[0146] For example, the material of the second doped semiconductor layer 122 may include a doped amorphous silicon layer or a doped microcrystalline silicon layer.

[0147] The conductive layer 140 provided in the embodiments of this application will be described below.

[0148] In some embodiments, see Figure 3 The solar cell 100 includes a conductive layer 140, which can be a transparent conductive layer. The conductive layer 140 is disposed on the side of the first doped semiconductor layer 121, the second doped semiconductor layer 122, and the third doped semiconductor layer 123 facing away from the semiconductor substrate 110. The conductive layer 140 includes a first conductive portion 141 and a second conductive portion 142 spaced apart, with an isolation opening 170 formed between the first conductive portion 141 and the second conductive portion 142. The isolation opening 170 penetrates the conductive layer 140 along the thickness direction of the semiconductor substrate 110. The first conductive portion 141 and the second conductive portion 142 are separated by the isolation opening 170 and are insulated from each other. The first conductive portion 141 is located in a first polar region 100a, and the second conductive portion 142 is located in a second polar region 100b. The conductive layer 140 has high conductivity, which can promptly export collected charge carriers and reduce the carrier recombination rate. In addition, the conductive layer 140 can serve as an anti-reflection coating to improve the light absorption rate of the solar cell 100.

[0149] In some embodiments, the first conductive portion 141 may be located in the first polar region 100a without extending to the second polar region 100b, and a portion of the first conductive portion 141 may cover the side of the second doped semiconductor layer 122 of the second sub-region 100a2 away from the semiconductor substrate 110.

[0150] In some embodiments, the second conductive portion 142 may be located in the second polar region 100b, and a portion of the second conductive portion 142 may extend to the second sub-region 100a2. Thus, by extending the second conductive portion 142 from the second polar region 100b to the second sub-region 100a2, the area of ​​the second conductive portion 142 can be made larger, which can increase the contact area between the second conductive portion 142 and the second doped semiconductor layer 122, which is beneficial to improving the conduction of charge carriers by the second conductive portion 142 and improving the efficiency of the solar cell 100.

[0151] For example, the material of the conductive layer 140 may include one or more transparent conductive oxides, such as zinc oxide, indium oxide, and tin oxide. The doping elements in the conductive layer 140 include one or more of gallium (Ga), tin (Sn), titanium (Ti), zirconium (Zr), molybdenum (Mo), cerium (Ce), fluorine (F), tungsten (W), and aluminum (Al).

[0152] The first electrode 161 and the second electrode 162 provided in the embodiments of this application will be described below.

[0153] In some embodiments, see Figure 3 The solar cell 100 includes a first electrode 161 located on the side of the first conductive portion 141 opposite to the semiconductor substrate 110. The first conductive portion 141 is ohmically connected to the first electrode 161, and the first electrode 161 can collect and transport charge carriers. The first electrode 161 may be located in a first polar region 100a (e.g., a first sub-region 100a1).

[0154] In some embodiments, see Figure 3 The solar cell 100 includes a second electrode 162, which is located on the side of the second conductive portion 142 opposite to the semiconductor substrate 110. The second conductive portion 142 is ohmically connected to the second electrode 162, and the second electrode 162 can collect and transport charge carriers. The second electrode 162 may be located in the second polarity region 100b. The first electrode 161 and the second electrode 162 may be arranged at intervals.

[0155] For example, at least one of the first electrode 161 and the second electrode 162 may be made of conductive metals such as silver, copper, and tin.

[0156] The following describes the film layer of the second surface 112 provided in the embodiments of this application.

[0157] In some embodiments, see Figure 3 The solar cell 100 includes a third passivation layer 153, which is located on the second surface 112.

[0158] For example, the third passivation layer 153 includes one or more of intrinsic amorphous silicon, a composite layer of intrinsic amorphous silicon and doped microcrystalline silicon or doped amorphous silicon, a composite layer of tunneling oxide and doped polycrystalline silicon, silicon oxide, aluminum oxide, silicon nitride, and silicon oxynitride.

[0159] In some embodiments, see Figure 3 The solar cell 100 includes an antireflection layer 154, which is located on the side of the third passivation layer 153 away from the semiconductor substrate 110.

[0160] For example, the antireflective layer 154 includes one or more of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, magnesium fluoride, and transparent conductive oxide.

[0161] The following describes the preparation method of the solar cell 100 provided in the embodiments of this application.

[0162] This application provides a method for fabricating a solar cell 100. The solar cell 100 has a first polarity region 100a and a second polarity region 100b with opposite polarities. See [link to previous document]. Figure 10 The preparation methods include:

[0163] S100: Provides a semiconductor substrate; the semiconductor substrate includes a first surface.

[0164] See Figure 7 First, a semiconductor substrate 110 is provided, which may have a first surface 111 and a second surface 112 disposed opposite to each other along the thickness direction of the semiconductor substrate 110. The semiconductor substrate 110 can provide support for the film layer subsequently formed.

[0165] S200: A first doped semiconductor layer is formed on the first surface located in the first polarity region; the first doped semiconductor layer has a first doping element.

[0166] See Figure 7 After providing the semiconductor substrate 110, a first doped semiconductor layer 121 may be formed on a first surface 111 located in the first polarity region 100a. The first doped semiconductor layer 121 has a first doping element.

[0167] For example, a deposition process can be used to form the first doped semiconductor layer 121.

[0168] For example, the deposition process may include atomic layer deposition (ALD), physical vapor deposition (PVD), chemical vapor deposition (CVD), or reactive plasma deposition (RPD), etc. Other structural layers in the embodiments of this disclosure may also be formed by deposition, which will not be described in detail here.

[0169] S300: A second doped semiconductor layer and a third doped semiconductor layer are formed on the first surface; the second doped semiconductor layer is located in the second polar region and has a second doping element, the doping types of the first doping element and the second doping element are opposite; the third doped semiconductor layer is disposed on the side of the first doped semiconductor layer away from the semiconductor substrate, at least a portion of the third doped semiconductor layer has a second doping element, the doping concentration of the second doping element in the third doped semiconductor layer is less than the doping concentration of the second doping element in the second doped semiconductor layer, and the orthographic projection of the third doped semiconductor layer on the semiconductor substrate and the orthographic projection of the second doped semiconductor layer on the semiconductor substrate do not overlap.

[0170] See Figure 9 After forming a first doped semiconductor layer 121 on the first surface 111 of the first polarity region 100a, a second doped semiconductor layer 122 and a third doped semiconductor layer 123 may be formed on the first surface 111. The second doped semiconductor layer 122 is located in the second polarity region 100b and has a second doped element, with the doping types of the first and second doped elements being opposite. The third doped semiconductor layer 123 is disposed on the side of the first doped semiconductor layer 121 facing away from the semiconductor substrate 110. At least a portion of the third doped semiconductor layer 123 has a second doped element, and the doping concentration of the second doped element in the third doped semiconductor layer 123 is less than the doping concentration of the second doped element in the second doped semiconductor layer 122. The orthographic projection of the third doped semiconductor layer 123 onto the semiconductor substrate 110 does not overlap with the orthographic projection of the second doped semiconductor layer 122 onto the semiconductor substrate 110. For example, the third doped semiconductor layer 123 includes a first doped portion 1231, in which a second doped element is present. Thus, by forming the first doped portion 1231 on the side of the first doped semiconductor layer 121 facing away from the semiconductor substrate 110, during the process of patterning the doped semiconductor material layer 122a with a laser to form the second doped semiconductor layer 122, the first doped portion 1231 can reduce the damage to the film layer below the first doped portion 1231 when the laser ablates the second doped semiconductor layer 122. For example, it can reduce the damage to the first doped semiconductor layer 121. In addition, by retaining the first doped portion 1231, it is no longer necessary to remove at least part of the third doped semiconductor layer using wet etching. The conductor layer 123 prevents damage to other film layers of the solar cell 100 during wet etching of at least a portion of the third doped semiconductor layer 123. Therefore, it not only reduces damage to the solar cell 100 and improves the efficiency of the solar cell 100, but also expands the process window. Secondly, since the damage to the first doped semiconductor layer 121 is reduced, it is not necessary to make the first doped semiconductor layer 121 too thick. This helps to avoid excessive optical loss caused by excessive thickness of the first doped semiconductor layer 121, thereby reducing its adverse effects on the short-circuit current and conversion efficiency of the cell.

[0171] In some embodiments, see Figure 8At least a portion of the first polar region 100a is constructed as a first sub-region 100a1, and a second doped semiconductor layer 122 and a third doped semiconductor layer 123 are formed on the first surface 111. This may include the sequential formation of a passivation material layer 152a and a doped semiconductor material layer 122a on the first surface 111, with both the passivation material layer 152a and the doped semiconductor material layer 122a located in the first polar region 100a and the second polar region 100b. Then, the passivation material layer 152a and the doped semiconductor material layer 122a of the first sub-region 100a1 are laser-processed to etch the passivation material layer 152a and the doped semiconductor material layer 122a located in the first sub-region 100a1. At least one of the remaining passivation material layer 152a and the doped semiconductor material layer 122a located in the first sub-region 100a1 can form the first doped portion 1231 of the third doped semiconductor layer 123. The passivation material layer 152a and the doped semiconductor material layer 122a located outside the first sub-region 100a1 respectively form the second passivation layer 152 and the second doped semiconductor layer 122. Thus, the first doped portion 1231 is formed by at least one of the passivation material layer 152a and the doped semiconductor material layer 122a remaining in the first polar region 100a. The laser energy can be set to a lower level, so that at least one of the passivation material layer 152a and the doped semiconductor material layer 122a located in the first sub-region 100a1 is not easily removed completely and has residue, thereby avoiding damage to the first doped semiconductor layer 121 caused by excessive laser energy.

[0172] In some embodiments, laser processing of the passivation material layer 152a and the doped semiconductor material layer 122a of the first sub-region 100a1 may include laser processing of the passivation material layer 152a, the doped semiconductor material layer 122a and a portion of the first doped semiconductor layer 121 of the first sub-region 100a1, so that the portion of the first doped semiconductor layer 121 forms the second doped portion 1232 of the third doped semiconductor layer 123. Thus, while performing laser film opening on the passivation material layer 152a and the doped semiconductor material layer 122a of the first sub-region 100a1, the portion of the first doped semiconductor layer 121 is laser processed to transform the polycrystalline silicon of the portion of the first doped semiconductor layer 121 into amorphous silicon under the action of the laser, thereby forming the second doped portion 1232.

[0173] In some embodiments, see Figure 3 After laser processing, a first conductive portion 141 and a second conductive portion 142 may be formed.

[0174] In some embodiments, see Figure 3 After forming the first conductive portion 141 and the second conductive portion 142, the first electrode 161 and the second electrode 162 may be formed.

[0175] The photovoltaic modules provided in the embodiments of this application are described below.

[0176] This application also provides a photovoltaic module, which may include a solar cell 100. The photovoltaic module may have at least one solar cell 100. This application example illustrates a photovoltaic module with multiple solar cells 100, where multiple solar cells 100 together constitute a battery string layer.

[0177] In some embodiments, the photovoltaic module may include a first encapsulation and a second encapsulation located on both sides of the cell string layer, which encapsulate the cell string layer to protect it. The first and second encapsulations may include an encapsulating adhesive layer and a cover plate, with the encapsulating adhesive layer located on the side of the cover plate facing the cell string layer. The cover plate protects the cell string layer, and the encapsulating adhesive layer connects the cover plate and the cell string layer.

[0178] For example, the solar cell 100 may include a back contact cell (BC), a heterojunction back contact cell (HBC), a hybrid fully passivated back contact cell (hybrid HBC), an interdigitated back contact cell (IBC), etc.

[0179] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0180] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A solar cell having a first polarity region and a second polarity region with opposite polarities, characterized in that, The solar cell includes: Semiconductor substrate, including a first surface; A first doped semiconductor layer is disposed on the first surface and located in the first polar region, and the first doped semiconductor layer has a first doping element. A second doped semiconductor layer is disposed on the first surface and located in the second polar region. The second doped semiconductor layer has a second doping element, and the doping types of the first doping element and the second doping element are opposite. A third doped semiconductor layer is disposed on the side of the first doped semiconductor layer away from the semiconductor substrate. At least a portion of the third doped semiconductor layer contains the second doping element. The doping concentration of the second doping element in the third doped semiconductor layer is less than the doping concentration of the second doping element in the second doped semiconductor layer. The orthographic projection of the third doped semiconductor layer on the semiconductor substrate and the orthographic projection of the second doped semiconductor layer on the semiconductor substrate do not overlap.

2. The solar cell according to claim 1, characterized in that, The semiconductor substrate includes a second side and a first side side, the first side and the second side being disposed opposite each other along the thickness direction of the semiconductor substrate, and the first side side being connected to the first side and the second side. The third doped semiconductor layer includes a first doped portion, which contains the second doping element. The orthographic projection of the first doped portion onto the plane containing the first side side does not overlap with the orthographic projection of the first doped semiconductor layer onto the plane containing the first side side.

3. The solar cell according to claim 2, characterized in that, The surface of the first doped semiconductor layer facing away from the semiconductor substrate includes a first sub-surface. The orthographic projection of the first sub-surface onto the semiconductor substrate does not overlap with the orthographic projection of the second doped semiconductor layer onto the semiconductor substrate. The area of ​​the orthographic projection of the first doped portion onto the semiconductor substrate is smaller than the area of ​​the orthographic projection of the first sub-surface onto the semiconductor substrate. The first doped portion is disposed on the first sub-surface.

4. The solar cell according to claim 3, characterized in that, The first sub-face includes a first extension and a second extension, wherein the first extension is located between the second extension and the second polarity region; The first polar region and the second polar region are arranged adjacent to each other, and there is a boundary line between the first polar region and the second polar region. The first doped portion includes a first sub-portion, which is located on the first extension portion and extends along the extension direction of the boundary line.

5. The solar cell according to claim 4, characterized in that, The dimension of the first sub-part gradually decreases along the thickness direction of the semiconductor substrate from the first extension to the second extension.

6. The solar cell according to claim 3, characterized in that, The first sub-face includes a first extension and a second extension, wherein the first extension is located between the second extension and the second polarity region; The first doped portion includes a plurality of second sub-portions spaced apart, the second sub-portions being located on the second extension portion.

7. The solar cell according to claim 6, characterized in that, In the same second sub-section, the dimension of the second sub-section along the thickness direction of the semiconductor substrate gradually decreases from the center to the edge of the second sub-section; and / or, The maximum dimension of the plurality of second sub-parts along the thickness direction of the semiconductor substrate increases sequentially from the center to the edge of the second extension.

8. The solar cell according to any one of claims 2-7, characterized in that, The solar cell includes a first passivation layer and a second passivation layer. The first passivation layer is located in a first polar region and between the first doped semiconductor layer and the semiconductor substrate. The second passivation layer is located in a second polar region and between the second doped semiconductor layer and the semiconductor substrate. The first doped portion, along the maximum dimension of the semiconductor substrate, is less than or equal to the sum of the thicknesses of the second passivation layer and the second doped semiconductor layer, and is greater than the thickness of the second passivation layer; Alternatively, the maximum dimension of the first doped portion along the thickness direction of the semiconductor substrate is less than or equal to the thickness of the second passivation layer.

9. The solar cell according to claim 8, characterized in that, The ratio of the maximum dimension of the first doped portion along the thickness direction of the semiconductor substrate to the thickness of the second passivation layer ranges from 0.1 to 1.

5.

10. The solar cell according to claim 8, characterized in that, The second passivation layer includes a third surface and a fourth surface disposed opposite to each other along the thickness direction of the semiconductor substrate, and a second side surface connected to the third surface and the fourth surface; the second doped semiconductor layer includes a fifth surface and a sixth surface disposed opposite to each other along the thickness direction of the semiconductor substrate, and a third side surface connected to the fifth surface and the sixth surface. The first doped portion covers the second side surface, and the third side surface is exposed outside the first doped portion; or... The first doped portion covers the second side and the third side.

11. The solar cell according to any one of claims 3-7, characterized in that, The ratio of the area of ​​the first doped portion projected onto the semiconductor substrate to the area of ​​the first sub-surface projected onto the semiconductor substrate is less than or equal to 0.

5.

12. The solar cell according to any one of claims 3-7, characterized in that, The first doped semiconductor layer has a recess on the side away from the semiconductor substrate. The third doped semiconductor layer includes a second doped portion, which is located in the recess. The orthographic projections of the recess and the second doped portion onto the plane of the first side are both located within the orthographic projection of the first doped semiconductor layer onto the plane of the first side. The second doped portion contains the first doping element.

13. The solar cell according to claim 12, characterized in that, The doping concentration of the first doped element in the second doped portion is greater than the doping concentration of the first doped element in the first doped semiconductor layer; The orthographic projection of the first doped portion onto the semiconductor substrate does not overlap with the orthographic projection of the second doped portion onto the semiconductor substrate at least partially.

14. The solar cell according to claim 12, characterized in that, The second doped portion includes a plurality of third sub-parts spaced apart, and the orthographic projection of each third sub-part on the semiconductor substrate does not overlap at least partially with the orthographic projection of the first doped portion on the semiconductor substrate.

15. The solar cell according to claim 12, characterized in that, The second doped portion has a first position and a second position arranged along the extension direction of the first sub-surface. The size of the second doped portion at the first position along the thickness direction of the semiconductor substrate is greater than the size of the second doped portion at the second position along the thickness direction of the semiconductor substrate. The doping concentration of the first doped element in the second doped portion at the first position is greater than the doping concentration of the first doped element in the second doped portion at the second position.

16. The solar cell according to claim 12, characterized in that, The first sub-face includes a first extension and a second extension, wherein the first extension is located between the second extension and the second polarity region; The second doped portion is located in the second extension, and the second doped portion located at the center of the second extension is connected to the second doped portion located at the edge of the second extension.

17. The solar cell according to claim 16, characterized in that, The dimension of the second doped portion along the thickness direction of the semiconductor substrate gradually decreases from the center to the edge of the second extension.

18. The solar cell according to claim 12, characterized in that, The ratio of the maximum dimension of the second doped portion along the thickness direction of the semiconductor substrate to the maximum thickness of the first doped semiconductor layer is in the range of 0-0.

4.

19. The solar cell according to claim 12, characterized in that, The first polar region includes at least one first sub-polar region, and the second polar region includes at least one second sub-polar region. The first sub-polar region and the second sub-polar region are arranged alternately along a first direction, which intersects the thickness direction of the semiconductor substrate. In the first sub-polar region, the sum of the dimensions of the orthographic projection of the first doped portion onto the semiconductor substrate along the first direction is L1, the sum of the dimensions of the orthographic projection of the second doped portion onto the semiconductor substrate along the first direction is L2, and the dimension of the orthographic projection of the first sub-surface onto the semiconductor substrate along the first direction is L. The ratio of L2 to L ranges from 0 to 0.9; and / or, The ratio of the sum of L1 and L2 to L is in the range of 0.3-1.

5.

20. The solar cell according to any one of claims 1-7, characterized in that, The semiconductor material of the first doped semiconductor layer includes polycrystalline silicon; and / or, The semiconductor material of the second doped semiconductor layer includes amorphous silicon; and / or, The semiconductor material of the third doped semiconductor layer includes amorphous silicon.

21. A photovoltaic module, characterized in that, Includes the solar cell described in any one of claims 1-20.

22. A method for preparing a solar cell, characterized in that, The solar cell has a first polarity region and a second polarity region with opposite polarities, and the fabrication method includes: A semiconductor substrate is provided; the semiconductor substrate includes a first surface; A first doped semiconductor layer is formed on the first surface located in the first polar region; the first doped semiconductor layer contains a first doping element; A second doped semiconductor layer and a third doped semiconductor layer are formed on the first surface; the second doped semiconductor layer is located in the second polar region and has a second doping element, the doping types of the first doping element and the second doping element are opposite; the third doped semiconductor layer is disposed on the side of the first doped semiconductor layer away from the semiconductor substrate, at least a portion of the third doped semiconductor layer has the second doping element, the doping concentration of the second doping element in the third doped semiconductor layer is less than the doping concentration of the second doping element in the second doped semiconductor layer, and the orthographic projection of the third doped semiconductor layer on the semiconductor substrate and the orthographic projection of the second doped semiconductor layer on the semiconductor substrate do not overlap.

23. The method for preparing a solar cell according to claim 22, characterized in that, At least a portion of the first polarity region is constructed as the first sub-region; The formation of the second doped semiconductor layer and the third doped semiconductor layer on the first surface includes: A passivation material layer and a doped semiconductor material layer are sequentially formed on the first surface, wherein the passivation material layer and the doped semiconductor material layer are both located in the first polar region and the second polar region; The passivation material layer and the doped semiconductor material layer in the first sub-region are laser-processed to etch the passivation material layer and the doped semiconductor material layer located in the first sub-region. At least one of the passivation material layer and the doped semiconductor material layer remaining in the first sub-region forms the first doped portion of the third doped semiconductor layer. The passivation material layer and the doped semiconductor material layer remaining outside the first sub-region form the second passivation layer and the second doped semiconductor layer, respectively.

24. The method for preparing a solar cell according to claim 23, characterized in that, The laser processing of the passivation material layer and the doped semiconductor material layer of the first sub-region includes: laser processing the passivation material layer, the doped semiconductor material layer and a portion of the first doped semiconductor layer of the first sub-region, so that the portion of the first doped semiconductor layer forms the second doped portion of the third doped semiconductor layer.

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