Wafer binding method and device based on double-workbench photoetching machine
By using historical operation data to alternately bind the worktables in a dual-stage lithography machine, the problem of idle worktables during odd-batch wafer processing is solved, thus improving the production efficiency of the lithography machine.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI OPTICAL COMMUNICATIONS CORP
- Filing Date
- 2024-11-25
- Publication Date
- 2026-05-26
AI Technical Summary
In existing technologies, when dual-stage lithography machines process an odd number of wafer batches, one stage becomes idle, resulting in a loss of lithography machine capacity.
By acquiring historical operation data, the cutoff historical wafer is determined, and its corresponding workbench is designated as the first workbench. Another workbench is designated as the workbench for the first target wafer to be processed. The workbench for each target wafer to be processed is bound in an alternating manner to avoid idle workbench.
This enabled efficient use of the worktable and increased the production capacity of the lithography machine.
Smart Images
Figure CN122085605A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip manufacturing, and in particular to a wafer bonding method and apparatus based on a dual-stage lithography machine. Background Technology
[0002] Photolithography machines are the main components in chip manufacturing, including a photoresist coating and developing machine, an exposure stage, and a control unit. The exposure stage has a measurement end and an exposure end. A dual-stage photolithography machine has two stages in its exposure stage; when one stage is at the measurement end, the other is at the exposure end. When manufacturing a batch of chips, for each wafer in that batch, photoresist is first applied at the photoresist coating and developing machine. Then, the control unit sends the photoresist-coated wafer to the stage at the measurement end for alignment and measurement. After measurement, the control unit controls the stage to send the wafer to the exposure end for exposure. Finally, the control unit controls the stage to return to the measurement end, sending the exposed wafer to the photoresist coating and developing machine for development, and simultaneously sending the next photoresist-coated wafer to the stage at the measurement end. This cycle repeats until the measurement, exposure, and development of each wafer in the batch are completed, thus completing the manufacturing of that batch of chips.
[0003] In the prior art, before sending the wafers to the measurement stage, the control device first arranges each wafer in the batch into odd-numbered and even-numbered wafers according to their position, binding all the odd-numbered wafers to one stage and all the even-numbered wafers to another stage. After the stage to which the wafers are bound arrives at the measurement end, the control device then places the wafers onto the bound stage.
[0004] However, with existing technology, if the number of wafers in a batch is odd, the workstation bound to the last wafer in that batch will be the same as the workstation bound to the first wafer in the next batch, resulting in one round of idle workstations and thus loss of lithography machine capacity. Summary of the Invention
[0005] In a first aspect, embodiments of this application provide a wafer bonding method based on a dual-stage lithography machine, comprising: the dual-stage lithography machine including an exposure stage and a control device for controlling the operation of the lithography machine, wherein the exposure stage includes two stages, and the method is applied to the control device, including:
[0006] Acquire historical operation data, which includes information about the workstation corresponding to each historical wafer, wherein the historical wafer is a wafer that has been exposed by the exposure machine.
[0007] The cutoff historical wafer is determined based on the historical operation data;
[0008] The workstation corresponding to the cutoff history wafer is designated as the first workstation.
[0009] Obtain the arrangement order of each target wafer to be processed, and determine the first target wafer to be processed based on the arrangement order;
[0010] The second workbench is defined as the workbench corresponding to the first target wafer to be processed, wherein the second workbench is another workbench other than the first workbench;
[0011] The worktable corresponding to each target wafer after the first target wafer is determined by alternating the first worktable and the second worktable.
[0012] Each target wafer to be processed is bound to its corresponding worktable.
[0013] In one possible implementation, the historical operation data also includes the exposure time for each historical wafer;
[0014] Accordingly, determining the cutoff historical wafer based on the historical operation data includes:
[0015] Extract the exposure time corresponding to each historical wafer from the historical operation data;
[0016] The cutoff historical wafer is determined based on the exposure time of the historical wafer.
[0017] In one possible implementation, prior to determining the cutoff history wafer based on the historical operation data, the method further includes:
[0018] Based on the historical operation data, determine whether each wafer to be processed is a historical wafer;
[0019] If the wafer to be processed is not a historical wafer, then the wafer to be processed is identified as the target wafer to be processed.
[0020] In one possible implementation, it also includes:
[0021] If the wafer to be processed is a historical wafer, then the wafer to be processed is bound to the corresponding workbench recorded in the historical operation data.
[0022] In one possible implementation, determining the worktable corresponding to each target wafer after the first target wafer to be processed, according to the alternating correspondence between the first worktable and the second worktable, includes:
[0023] The second workbench is used as the workbench corresponding to each target wafer located in an odd-numbered position;
[0024] The first workbench is used as the workbench corresponding to each target wafer located at an even-numbered position.
[0025] In one possible implementation, the method further includes:
[0026] Record the stage and exposure time for each wafer to be processed to obtain historical operation data for each wafer to be processed;
[0027] The historical operation data corresponding to each wafer to be processed is stored locally.
[0028] Secondly, this application provides a wafer bonding apparatus based on a dual-stage lithography machine, wherein the dual-stage lithography machine includes an exposure stage and a control device for controlling the operation of the lithography machine, wherein the exposure stage includes two stages, and the apparatus is applied to the control device, including:
[0029] The acquisition module is used to acquire historical operation data, which includes information about the workbench corresponding to each historical wafer, wherein the historical wafer is a wafer that has been exposed by the exposure machine.
[0030] The determination module is used to determine the cutoff historical wafer based on the historical operation data;
[0031] The determining module is also used to determine the worktable corresponding to the cutoff history wafer as the first worktable;
[0032] The acquisition module is also used to acquire the arrangement order of each target wafer to be processed, and to determine the first target wafer to be processed based on the arrangement order;
[0033] The determining module is further configured to determine the second workbench as the workbench corresponding to the first target wafer to be processed, wherein the second workbench is another workbench other than the first workbench;
[0034] The processing module is used to determine the worktable corresponding to each target wafer to be processed after the first target wafer to be processed, in a manner in which the first worktable and the second worktable are alternately matched;
[0035] The processing module is also used to bind each target wafer to its corresponding worktable.
[0036] In one possible implementation, the historical operation data also includes the exposure time for each historical wafer;
[0037] Accordingly, the determination module is specifically used to extract the exposure time corresponding to each historical wafer from the historical operation data;
[0038] The determination module is also used to determine the cutoff historical wafer based on the exposure time of the historical wafer.
[0039] In one possible implementation, the processing module is further configured to determine, based on the historical operation data, whether each wafer to be processed is a historical wafer;
[0040] The processing module further determines the wafer to be processed as the target wafer if the wafer to be processed is not a historical wafer.
[0041] In one possible implementation, the processing module is further configured to bind the wafer to be processed to the corresponding workbench recorded in the historical operation data if the wafer to be processed is a historical wafer.
[0042] In one possible implementation, the determining module is further configured to use the second workbench as the workbench corresponding to each target wafer to be processed located in an odd-numbered position.
[0043] The determination module is further configured to use the first workbench as the workbench corresponding to each target wafer to be processed located at an even-numbered position.
[0044] In one possible implementation, the processing module is further configured to record the worktable and exposure time corresponding to each wafer to be processed, so as to obtain historical operation data corresponding to each wafer to be processed.
[0045] The processing module is also used to store the historical operation data corresponding to each wafer to be processed locally.
[0046] Thirdly, this application provides an electronic device, including: a memory and a processor;
[0047] The memory stores computer-executed instructions;
[0048] The processor executes computer execution instructions stored in the memory, causing the processor to perform the method described above.
[0049] Fourthly, this application provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the method described above.
[0050] Fifthly, this application provides a computer program product, including a computer program that, when executed by a processor, is used to implement the method described above. Attached Figure Description
[0051] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0052] Figure 1A schematic diagram illustrating a scenario for manufacturing chips using a lithography machine provided in this application;
[0053] Figure 2 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 1 ;
[0054] Figure 3 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 2 ;
[0055] Figure 4 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 3 ;
[0056] Figure 5 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 4 ;
[0057] Figure 6 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 5 ;
[0058] Figure 7 This is a schematic diagram of a scene corresponding to a lithography machine workstation;
[0059] Figure 8 This application provides a schematic diagram of the structure of a wafer bonding device based on a dual-stage lithography machine;
[0060] Figure 9 A schematic diagram of the structure of the electronic device provided in this application.
[0061] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0062] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application.
[0063] First, let me explain the terms used in this application:
[0064] Cut-off historical wafer: refers to the last historical wafer to undergo an exposure operation.
[0065] Figure 1 This is a schematic diagram of a scenario for manufacturing chips using a lithography machine, as provided in this application. Figure 1 As shown, a photolithography machine includes a photoresist coating and developing machine, an exposure stage, and a control unit. The photoresist coating and developing machine is used to coat and develop photoresist on the surface of the wafer. The exposure stage has a measurement end and an exposure end, and is equipped with two work stages, namely work stage 1 and work stage 2. When one work stage is in the measurement end, the other work stage is in the exposure end. The measurement end is used for wafer alignment and measurement operations, and the exposure end is used for wafer exposure operations.
[0066] In existing technology, before sending the wafers to the measurement stage, the control device first arranges each wafer in the batch into odd-numbered and even-numbered wafers according to their position. All odd-numbered wafers are then bound to one stage, and all even-numbered wafers are bound to another stage. After the stage to which the wafers are bound arrives at the measurement end, the control device places the wafers onto the bound stage.
[0067] Based on the above scenario, it can be seen that in the existing technology, if the number of wafers in a batch is odd, the workbench bound to the last wafer in that batch is the same as the workbench bound to the first wafer in the next batch, resulting in one round of idle workbench and thus causing a loss of lithography machine capacity.
[0068] This application provides a wafer bonding method based on a dual-stage lithography machine. The dual-stage lithography machine includes an exposure stage and a control device for controlling the operation of the lithography machine. The exposure stage includes two stages. Workstage information corresponding to each historical wafer is obtained through historical data. The workstage corresponding to the last historical wafer is designated as the first workstage, and the other workstage is designated as the workstage corresponding to the first target wafer to be processed. This process is repeated for each target wafer after the first target wafer, and finally, each target wafer is bonded to its corresponding workstage. This method allows the workstages to be bonded to the target wafers in turn, avoiding idle workstages and improving the lithography machine's throughput.
[0069] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.
[0070] Figure 2 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 1The dual-stage lithography machine includes an exposure stage and a control device for controlling the operation of the lithography machine. The exposure stage comprises two worktables, and the method is applied to the control device, such as... Figure 2 As shown, the method includes:
[0071] S201. Obtain historical operation data, which includes information about the workstation corresponding to each historical wafer, wherein the historical wafer is a wafer that has been exposed by an exposure machine.
[0072] The execution subject in this embodiment is the control device of a dual-stage lithography machine, which can be implemented by a computer program.
[0073] Combined with scenario examples, Figure 1 In a dual-stage lithography machine, the stages can be defined as stage 1 and stage 2, which can move back and forth between the measurement end and the exposure end. Each wafer has a unique stage. For example, if wafer a corresponds to stage 1, the control device will place wafer a on stage 1 when stage 1 is at the measurement end. After wafer a completes alignment and measurement operations at the measurement end, stage 1 is controlled to move wafer a from the measurement end to the exposure end. When wafer a completes the exposure operation at the exposure end, the exposed wafer a can be considered a historical wafer, thus indicating that it has undergone at least one exposure operation.
[0074] S202. Determine the cutoff historical wafer based on the historical operation data.
[0075] Based on the scenario example, the historical operation data includes the workbench corresponding to each historical wafer, as well as the operation data of each historical wafer at the measurement and exposure ends. Therefore, the cutoff historical wafer can be determined based on the historical operation data. The cutoff historical wafer represents the last historical wafer that has undergone measurement and exposure.
[0076] S203. Determine the first workbench corresponding to the cutoff history wafer.
[0077] In the example scenario, if the workbench corresponding to the cutoff historical wafer is workbench 1, then workbench 1 can be used as the first workbench. Similarly, if the workbench corresponding to the cutoff historical wafer is workbench 2, then workbench 2 can be used as the first workbench.
[0078] S204. Obtain the arrangement order of each target wafer to be processed, and determine the first target wafer to be processed based on the arrangement order.
[0079] In this scenario, the target wafer to be processed is a wafer that has not yet undergone measurement and exposure. Chip manufacturing often involves processing wafers from the same batch simultaneously. If the next batch to be processed consists of 25 target wafers, these 25 wafers can be labeled according to their position. Therefore, the target wafers in this batch can be labeled 1-25, with the wafer labeled 1 being the first target wafer in the list.
[0080] S205. The second workbench is determined as the workbench corresponding to the first target wafer to be processed, wherein the second workbench is another workbench other than the first workbench.
[0081] Based on the scenario example, the second workbench corresponding to the first target wafer to be processed is determined as another workbench besides the first workbench. For example, if the first workbench is workbench 1, then workbench 2 is used as the second workbench. Similarly, if the first workbench is workbench 2, then workbench 1 is used as the second workbench.
[0082] S206. Determine the worktable corresponding to each target wafer after the first target wafer to be processed, in a manner that alternates between the first worktable and the second worktable;
[0083] In a scenario example, if the second workbench is workbench 1, the workbench corresponding to each target wafer in the batch after the first target wafer to be processed is obtained by alternating the workbench correspondences, namely: workbench 2, workbench 1, workbench 2, workbench 1, workbench 2, workbench 1... workbench 1. That is, the workbench corresponding to the first target wafer to be processed with the sequence number 1 is workbench 1, the workbench corresponding to the target wafer to be processed with the sequence number 2 is workbench 2, the workbench corresponding to the target wafer to be processed with the sequence number 3 is workbench 1, and so on, until the workbench corresponding to the target wafer to be processed with the sequence number 25 is workbench 1.
[0084] Similarly, if the second workbench is workbench 2, the workbench corresponding to each target wafer after the first target wafer in the batch is obtained by alternating the workbench correspondences, namely: workbench 1, workbench 2, workbench 1, workbench 2, workbench 1, workbench 2... workbench 2. That is, the workbench corresponding to the first target wafer with the sequence number 1 is workbench 2, the workbench corresponding to the target wafer with the sequence number 2 is workbench 1, the workbench corresponding to the target wafer with the sequence number 3 is workbench 2, and so on, until the workbench corresponding to the target wafer with the sequence number 25 is workbench 2.
[0085] S207. Bind each target wafer to be processed to its corresponding worktable.
[0086] Based on the scenario example, each target wafer to be processed is finally bound to the corresponding worktable. The control device will then place each target wafer to be processed on the corresponding worktable in sequence according to the target wafer to be processed and the corresponding worktable.
[0087] This application designates a workbench other than the one corresponding to the historical wafer as the workbench for the first target wafer to be processed in this batch, thus avoiding idle workbench and achieving the goal of increasing the production capacity of the lithography machine.
[0088] Optional, Figure 3 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 2 The historical operation data also includes the exposure time for each historical wafer;
[0089] Accordingly, such as Figure 3 As shown, in S202, determining the cutoff historical wafer based on the historical operation data includes:
[0090] S301. Extract the exposure time corresponding to each historical wafer from the historical operation data.
[0091] Combined with scenario examples, the historical operation data also includes the exposure time of each historical wafer during the exposure operation at the exposure end.
[0092] S302. Determine the cutoff historical wafer based on the exposure time of the historical wafer.
[0093] Based on scenario examples, the historical wafer corresponding to the exposure time closest to the current moment can be used as the cutoff historical wafer.
[0094] Based on the method provided in this application, the cutoff history wafer can be accurately obtained according to the order of exposure time.
[0095] Optional, Figure 4 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 3 ,like Figure 4 As shown, before S202, it also includes:
[0096] S401. Based on the historical operation data, determine whether each wafer to be processed is a historical wafer.
[0097] Based on the scenario example, the wafer to be processed can be part of a batch of wafers to be manufactured next. It can be a wafer being processed for the first time, or it can be a wafer that has already been processed. Historical operation data can be used to determine if the wafer to be processed is a historical wafer. If the historical operation data includes historical operation data for the wafer to be processed, it means that the wafer has been processed before, and therefore it can be considered a historical wafer.
[0098] S402. If the wafer to be processed is not a historical wafer, then the wafer to be processed is determined as the target wafer to be processed.
[0099] In the scenario example, if there is no historical operation data for the wafer to be processed in the historical operation data, it means that the wafer to be processed is the first wafer to be processed, so the wafer to be processed can be used as the target wafer to be processed. Based on the method provided in this example, the target wafer to be processed can be determined through historical operation data.
[0100] Optionally, if the wafer to be processed is a historical wafer, the wafer to be processed is bound to the corresponding workbench recorded in the historical operation data.
[0101] Based on the scenario example, the first scenario for wafers to be processed that are historical wafers can be that the entire batch of wafers has already completed the first layer of process or multiple layers of process fabrication, and the current process is to prepare for the next layer of process fabrication. Taking the wafers in batch LotA as an example, if there are 25 wafers in LotA, as shown in Table 1 below, Table 1 records the workstations bound to each wafer when fabricating the first layer of process. Therefore, as shown in Table 2, Table 2 records the workstations corresponding to fabricating the second layer of process and each subsequent layer of process on the 25 wafers in LotA, all of which are consistent with the workstations bound when fabricating the first layer of process.
[0102] Table 1
[0103]
[0104] Table 2
[0105]
[0106] Table 3
[0107]
[0108] The second scenario for reworking historical wafers involves defective wafers. For example, if stage 2 is contaminated during the fabrication of Layer 1 for Lot A, causing contamination of the wafer exposed on stage 2, then the wafer exposed on stage 2 needs to undergo the Layer 1 process again. Since the wafer exposed on stage 2 also has historical operation data, when reprocessing Layer 1 on the wafer exposed on stage 2, the wafer exposed on stage 2 is considered a historical wafer. Therefore, the stage corresponding to reprocessing Layer 1 is the stage bound to the historical operation data, i.e., stage 2. As shown in Table 3, wafers operated on stage 2 (i.e., wafers with even-numbered labels) also use stage 2 when reprocessing Layer 1.
[0109] Based on the method provided in this example, the workbench corresponding to the historical wafer can be directly identified as the workbench bound to the historical wafer in the historical operation data. This can ensure that all processes on the same wafer are fabricated on the same process platform, thereby ensuring the integrity of each layer of processes on the wafer.
[0110] Optional, Figure 5 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 4 ,like Figure 5 As shown, S206 includes:
[0111] S501. The second worktable is used as the worktable corresponding to each target wafer to be processed located in an odd-numbered position.
[0112] In the scenario example, since workbench 1 and workbench 2 alternately correspond to the target wafers to be processed, all odd-numbered target wafers correspond to the same workbench, and all even-numbered target wafers correspond to the same workbench. Since the first target wafer corresponds to the second workbench, all odd-numbered target wafers correspond to the second workbench.
[0113] S502, The first workbench is used as the workbench corresponding to each target wafer to be processed located in an even-numbered position.
[0114] Based on the scenario example, since the workbench corresponding to the first target wafer to be processed is the second workbench, the workbench corresponding to all even-numbered target wafers to be processed is the first workbench.
[0115] For example, if the first worktable is worktable 1, then worktable 1 is used as the worktable corresponding to all even-numbered target wafers to be processed, and worktable 2 is used as the worktable corresponding to all odd-numbered target wafers to be processed. If the first worktable is worktable 2, then worktable 2 is used as the worktable corresponding to all even-numbered target wafers to be processed, and worktable 1 is used as the worktable corresponding to all odd-numbered target wafers to be processed.
[0116] Based on the method provided in this application, the worktable corresponding to each target wafer to be processed is obtained.
[0117] Optional, Figure 6 The flowchart of the wafer bonding method based on a dual-stage lithography machine provided in this application is shown below. Figure 5 ,like Figure 6 As shown, the method further includes:
[0118] S601. Record the stage and exposure time for each wafer to be processed to obtain historical operation data for each wafer to be processed.
[0119] Combined with scenario examples, Figure 7 This is a schematic diagram illustrating the scenario corresponding to the lithography machine's workstation. Taking LotA as an example, when processing LotA, the use of the lithography machine is first reserved. After the reservation is completed, each wafer in LotA can be considered a wafer to be processed. The historical operation records stored locally in the lithography machine are used to determine whether each wafer to be processed in LotA is a historical wafer. In the first scenario, each wafer to be processed in LotA is a historical wafer. In this case, the workstation corresponding to each wafer to be processed in the historical operation records is directly referenced to obtain the workstation corresponding to each wafer to be processed in LotA for the current operation. For example, if there are 25 wafers to be processed in LotA, and the corresponding workstations for each wafer in the historical operation data are arranged in the following order according to the wafer number: Workstation 1, Workstation 2, Workstation 1, Workstation 2, Workstation 1, Workstation 2... Workstation 1, then after booking the lithography machine this time, if there are 25 wafers to be processed in LotA, the corresponding workstations will be directly referenced from the corresponding workstations in the historical operation data, namely: Workstation 1, Workstation 2, Workstation 1, Workstation 2, Workstation 1, Workstation 2... Workstation 1.
[0120] In the second scenario, each wafer to be processed in LotA is not a historical wafer; that is, each wafer to be processed in LotA is undergoing its first exposure operation. In this case, each wafer to be processed in LotA can be considered a target wafer. For this scenario, the second workstation (excluding the first workstation corresponding to the historical wafer) can be used as the workstation corresponding to the first target wafer in LotA. Then, by alternating between the first and second workstations, the workstations corresponding to each target wafer in LotA can be obtained. For example, if the first workstation corresponding to the historical wafer is workstation 1, and if there are 25 wafers to be processed in LotA, all of which are target wafers, the workstations corresponding to each target wafer, arranged according to their wafer numbers, would be: workstation 2, workstation 1, workstation 2, workstation 1, workstation 2… workstation 2.
[0121] In the third scenario, some wafers in LotA are historical wafers. In this scenario, the processing method for the historical wafers in LotA is used to obtain the corresponding workstation for each historical wafer. For the target wafers to be processed in LotA, the processing method for the target wafers to be processed is used to obtain the corresponding workstation for each target wafer to be processed. For example, if there are 25 wafers to be processed in LotA, and the first ten wafers are historical wafers, the workstations corresponding to these ten wafers recorded in the historical operation data are as follows: Workstation 1, Workstation 2, Workstation 1, Workstation 2... Workstation 1, Workstation 2. Therefore, in this operation, the workstations corresponding to the first ten wafers are determined by referring to the historical operation data to obtain the corresponding workstations for these ten wafers as follows: Workstation 1, Workstation 2, Workstation 1, Workstation 2... Workstation 1, Workstation 2. For wafers numbered 11 to 25, i.e. target wafers to be processed, in the third scenario, up to the historical wafer numbered 10, it can be seen from the above method that the workbench corresponding to the wafer numbered 10 is workbench 2. Therefore, the workbench corresponding to the wafers numbered 11 to 25 are in the following order: workbench 1, workbench 2, workbench 1, workbench 2... workbench 1.
[0122] S602. Store the historical operation data corresponding to each wafer to be processed locally.
[0123] Based on the scenario example, the workbench corresponding to each wafer to be processed and the exposure time for completing the exposure are recorded in this operation to obtain the historical operation data corresponding to each wafer to be processed in this operation. The historical operation data corresponding to each wafer to be processed in this operation is saved locally to provide a reference for the processing of subsequent wafers to be processed.
[0124] The method provided in this application allows the worktable to be bonded to the target wafer to be processed in turn, avoiding the idleness of the worktable and thus improving the production capacity of the lithography machine.
[0125] Figure 8 This application provides a schematic diagram of a wafer bonding device based on a dual-stage lithography machine. The dual-stage lithography machine includes an exposure stage and a control device for controlling the operation of the lithography machine. The exposure stage includes two stages, and the control device includes:
[0126] The acquisition module 81 is used to acquire historical operation data, which includes information about the workbench corresponding to each historical wafer, wherein the historical wafer is a wafer that has been exposed by the exposure machine.
[0127] Determining module 82 is used to determine the cutoff historical wafer based on the historical operation data;
[0128] The determination module 82 is also used to determine the workbench corresponding to the cutoff history wafer as the first workbench;
[0129] The acquisition module 81 is also used to acquire the arrangement order of each target wafer to be processed, and to determine the first target wafer to be processed based on the arrangement order;
[0130] The determining module 82 is further configured to determine the second workbench as the workbench corresponding to the first target wafer to be processed, wherein the second workbench is another workbench other than the first workbench;
[0131] Processing module 83 is used to determine the worktable corresponding to each target wafer to be processed after the first target wafer to be processed, in a manner in which the first worktable and the second worktable are alternately matched;
[0132] The processing module 83 is also used to bind each target wafer to be processed to its corresponding worktable.
[0133] Optionally, the historical operation data may also include the exposure time for each historical wafer;
[0134] Accordingly, the determination module 82 is specifically used to extract the exposure time corresponding to each historical wafer from the historical operation data;
[0135] The determination module 82 is specifically used to determine the cutoff historical wafer based on the exposure time of the historical wafer.
[0136] Optionally, the processing module 83 is also used to determine whether each wafer to be processed is a historical wafer based on the historical operation data.
[0137] The processing module 83 further determines the wafer to be processed as the target wafer if the wafer to be processed is not a historical wafer.
[0138] Optionally, the processing module 83 is further configured to bind the wafer to be processed to the corresponding workbench recorded in the historical operation data if the wafer to be processed is a historical wafer.
[0139] Optionally, the determining module 82 is further configured to use the second workbench as the workbench corresponding to each target wafer to be processed located in an odd-numbered position;
[0140] The determination module 82 is further configured to use the first workbench as the workbench corresponding to each target wafer to be processed located at an even-numbered position.
[0141] Optionally, the processing module 83 is also used to record the worktable and exposure time corresponding to each wafer to be processed, so as to obtain the historical operation data corresponding to each wafer to be processed.
[0142] The processing module 83 is also used to store the historical operation data corresponding to each wafer to be processed locally.
[0143] The wafer bonding device based on a dual-stage lithography machine provided in this embodiment can execute the method provided in the above-described method embodiment. Its implementation principle and technical effect are similar, and will not be described in detail here.
[0144] Figure 9 A schematic diagram of the structure of the electronic device provided in this application. Figure 9 As shown, the electronic device 50 provided in this embodiment includes at least one processor 501 and a memory 502. Optionally, the device 50 further includes a communication component 503. The processor 501, memory 502, and communication component 503 are connected via a bus 504.
[0145] In a specific implementation, at least one processor 501 executes computer execution instructions stored in memory 502, causing at least one processor 501 to perform the above-described method.
[0146] The specific implementation process of processor 501 can be found in the above method embodiments, and its implementation principle and technical effect are similar. It will not be repeated here.
[0147] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.
[0148] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.
[0149] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.
[0150] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.
[0151] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.
[0152] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.
[0153] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.
[0154] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.
[0155] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0156] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0157] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0158] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.
[0159] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.
Claims
1. A wafer bonding method based on a dual-stage lithography machine, characterized in that, The dual-stage lithography machine includes an exposure stage and a control device for controlling the operation of the lithography machine. The exposure stage includes two worktables. The method is applied to the control device, including: Acquire historical operation data, which includes information about the workstation corresponding to each historical wafer, wherein the historical wafer is a wafer that has been exposed by the exposure machine. The cutoff historical wafer is determined based on the historical operation data; The workstation corresponding to the cutoff history wafer is designated as the first workstation. Obtain the arrangement order of each target wafer to be processed, and determine the first target wafer to be processed based on the arrangement order; The second workbench is defined as the workbench corresponding to the first target wafer to be processed, wherein the second workbench is another workbench other than the first workbench; The worktable corresponding to each target wafer after the first target wafer is determined by alternating the first worktable and the second worktable. Each target wafer to be processed is bound to its corresponding worktable.
2. The method according to claim 1, characterized in that, The historical operation data also includes the exposure time for each historical wafer; Accordingly, determining the cutoff historical wafer based on the historical operation data includes: Extract the exposure time corresponding to each historical wafer from the historical operation data; The cutoff historical wafer is determined based on the exposure time of the historical wafer.
3. The method according to claim 1, characterized in that, Before determining the cutoff historical wafer based on the historical operation data, the method further includes: Based on the historical operation data, determine whether each wafer to be processed is a historical wafer; If the wafer to be processed is not a historical wafer, then the wafer to be processed is identified as the target wafer to be processed.
4. The method according to claim 3, characterized in that, Also includes: If the wafer to be processed is a historical wafer, then the wafer to be processed is bound to the corresponding workbench recorded in the historical operation data.
5. The method according to claim 1, characterized in that, The step of determining the worktable corresponding to each target wafer after the first target wafer to be processed, according to the alternating correspondence between the first worktable and the second worktable, includes: The second workbench is used as the workbench corresponding to each target wafer located in an odd-numbered position; The first workbench is used as the workbench corresponding to each target wafer located at an even-numbered position.
6. The method according to any one of claims 1-5, characterized in that, The method further includes: Record the stage and exposure time for each wafer to be processed to obtain historical operation data for each wafer to be processed; The historical operation data corresponding to each wafer to be processed is stored locally.
7. A wafer bonding device based on a dual-stage lithography machine, characterized in that, The dual-stage lithography machine includes an exposure stage and a control device for controlling the operation of the lithography machine. The exposure stage includes two worktables, and the control device is integrated with the control device and includes: The acquisition module is used to acquire historical operation data, which includes information about the workbench corresponding to each historical wafer, wherein the historical wafer is a wafer that has been exposed by the exposure machine. The determination module is used to determine the cutoff historical wafer based on the historical operation data; The determining module is also used to determine the worktable corresponding to the cutoff history wafer as the first worktable; The acquisition module is also used to acquire the arrangement order of each target wafer to be processed, and to determine the first target wafer to be processed based on the arrangement order; The determining module is further configured to determine the second workbench as the workbench corresponding to the first target wafer to be processed, wherein the second workbench is another workbench other than the first workbench; The processing module is used to determine the worktable corresponding to each target wafer to be processed after the first target wafer to be processed, in a manner in which the first worktable and the second worktable are alternately matched; The processing module is also used to bind each target wafer to its corresponding worktable.
8. An electronic device, characterized in that, include: Memory, processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory, causing the processor to perform the method as described in any one of claims 1-6.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1-6.
10. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, is used to implement the method as described in any one of claims 1-6.