Data storage method, electronic device, and computer-readable storage medium

Abstract

This invention provides a data storage method, an electronic device, and a computer-readable storage medium. The method includes: obtaining the error occurrence probability of the internal bit positions of raw data and flash memory pages; constructing a shortened code based on the data length of the raw data and the code length of a preset standard error correction code; splitting the shortened code and writing it into corresponding areas of a preset standard codeword based on the error occurrence probability of the internal bit positions of the flash memory page to obtain page data; and writing the page data into the flash memory page. According to the solution of this invention, the shortened code can be stored in the corresponding area based on the error occurrence probability of the internal bit positions of the flash memory page, significantly improving the reliability of data storage.

Description

Technical Field

[0001] This invention relates to the field of memory data processing technology, and in particular to a data storage method, electronic device, and computer-readable storage medium. Background Technology

[0002] Flash memory is a non-volatile memory that retains data without continuous power. Its core component is the floating-gate transistor, and it can be divided into planar and 3D stacked structures. Due to inherent limitations of flash memory, error correction coding is essential in flash memory applications. Shortening codes are a practical technique for "pruning" existing linear block codes. When the length of the information bits to be stored (effective original information) is less than the original information length of a certain standard code, a new encoder can be avoided. Instead, the existing standard code can be used, and the excess data bits can be filled with fixed data. This filling data can be written to or not written to the flash memory space depending on the available space. Existing shortening codes, during construction, typically centrally arrange the filling data at specific positions within the codeword and write it into the flash memory page in the same arrangement, without considering the probability of errors occurring at different positions within the flash memory page, thus reducing the reliability of data storage. Summary of the Invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art.

[0004] To address this, the present invention proposes a data storage method that can store shortened codes in the corresponding areas based on the error probability of the internal bit positions of flash memory pages, thereby significantly improving the reliability of data storage.

[0005] The present invention also proposes an electronic device that applies the above-described data storage method.

[0006] The present invention also proposes a computer-readable storage medium that applies the above-described data storage method.

[0007] According to a first aspect of the present invention, a data storage method includes:

[0008] The probability of errors occurring when obtaining raw data and the internal bit positions of flash pages; Based on the data length of the original data and the code length of the preset standard error correction code, a shortened code is constructed; Based on the shortened code and the error probability of the internal bit position of the flash memory page, the shortened code is split and written into the corresponding area of ​​the preset standard codeword to obtain page data; The page data is written into the flash memory page.

[0009] According to some embodiments of the present invention, the probability of error occurrence at the internal bit position of the flash memory page is obtained in the following manner: Select any data block from the preset flash memory; The data block is repeatedly erased, written, and read until the end of the erase / write life of the flash memory is reached; and the read operation data of the data block is statistically analyzed. Based on the read operation data, the probability of error occurrence of internal bit positions of flash memory pages in the data block is statistically processed to obtain the probability of error occurrence of internal bit positions of flash memory pages.

[0010] According to some embodiments of the present invention, constructing a shortened code based on the data length of the original data and the code length of a preset standard error correction code includes: Determine the error correction codeword data and check data from the standard error correction code; Redundant data is determined based on the data length of the error correction codeword data and the data length of the original data; The original data, the redundant data, and the verification data are combined and processed to obtain the shortened code.

[0011] According to some embodiments of the present invention, the step of splitting the shortened code and writing it into the corresponding area of ​​a preset standard codeword based on the error occurrence probability of the shortened code and the internal bit position of the flash memory page to obtain page data includes: Based on the data length of the shortened code and the error probability of the internal bit position of the flash page, the original data and the check data are written into the low error probability region of the standard codeword, and the redundant data is written into the high error probability region of the standard codeword to obtain multiple initial codewords. The page data is constructed from multiple initial codewords.

[0012] According to some embodiments of the present invention, after writing the page data into the flash memory page, the method further includes: Read the page data from the flash memory page; Restore the page data to multiple initial codewords; The initial codewords are decoded based on a preset error correction code decoder to obtain the original data.

[0013] According to some embodiments of the present invention, writing the page data into the flash memory page includes: The data block corresponding to the flash memory page is erased. The page data is written to the corresponding flash memory page.

[0014] According to some embodiments of the present invention, the low error probability region is obtained in the following manner: If the probability of an error occurring at an internal bit location of the flash memory page is less than a preset probability threshold, the corresponding internal bit location region of the flash memory page is designated as the low error probability region.

[0015] According to some embodiments of the present invention, the high error probability region is obtained in the following manner: If the probability of an error occurring at an internal bit location of the flash memory page is greater than or equal to a preset probability threshold, the corresponding internal bit location region of the flash memory page is designated as the high error probability region.

[0016] An electronic device according to a second aspect of the present invention includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the data storage method described above.

[0017] According to a third aspect of the present invention, a computer-readable storage medium stores computer-executable instructions that, when executed by a control processor, implement the data storage method described above.

[0018] The data storage method according to embodiments of the present invention has at least the following beneficial effects: During data storage, firstly, the error occurrence probability of the original data and the internal bit positions of the flash memory page is obtained; then, a shortened code is constructed based on the data length of the original data and the code length of a preset standard error correction code; next, based on the shortened code and the error occurrence probability of the internal bit positions of the flash memory page, the shortened code is split and written into the corresponding areas of a preset standard codeword, thereby obtaining page data; finally, the page data can be written into the flash memory page. Through the above technical solution, the shortened code can be stored in the corresponding area according to the error occurrence probability of the internal bit positions of the flash memory page, significantly improving the reliability of data storage. Attached Figure Description

[0019] The accompanying drawings are provided to further understand the technical solutions of the present invention and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the technical solutions of the present invention, and do not constitute a limitation on the technical solutions of the present invention.

[0020] Figure 1 This is a flowchart of a data storage method provided in one embodiment of the present invention; Figure 2 This is a flowchart of a method for determining the probability of error occurrence at internal bit positions of a flash memory page according to an embodiment of the present invention; Figure 3 yes Figure 1 Step S200 method sub-flowchart; Figure 4This is a schematic diagram of a standard error correction code provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of a shortened code provided in one embodiment of the present invention; Figure 6 yes Figure 1 Step S300 method sub-flowchart; Figure 7 This is a schematic diagram of constructing an initial codeword according to an embodiment of the present invention; Figure 8 This is a schematic diagram of the construction page data provided in one embodiment of the present invention; Figure 9 Is it completed? Figure 1 The method sub-flowchart following step S400; Figure 10 yes Figure 1 Step S400 method sub-flowchart; Figure 11 This is a sub-flowchart of a method for determining a low error probability region provided in one embodiment of the present invention; Figure 12 This is a flowchart of a method for determining high error probability regions provided in one embodiment of the present invention; Figure 13 This is a schematic diagram illustrating the error probability provided in one embodiment of the present invention; Figure 14 This is a schematic diagram of the structure of an electronic device provided in one embodiment of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0022] In the description of this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0023] In the description of this invention, unless otherwise explicitly defined, terms such as "setting," "installing," and "connecting" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0024] This invention provides a data storage method, an electronic device, and a computer-readable storage medium. The method includes: firstly, obtaining the error occurrence probability of the original data and the internal bit positions of the flash memory page during data storage; then, constructing a shortened code based on the data length of the original data and the code length of a preset standard error correction code; next, splitting the shortened code and writing it into the corresponding area of ​​a pre-defined standard codeword based on the error occurrence probability of the shortened code and the internal bit positions of the flash memory page, thereby obtaining page data; finally, writing the page data into the flash memory page. Through the above technical solution, the shortened code can be stored in the corresponding area according to the error occurrence probability of the internal bit positions of the flash memory page, significantly improving the reliability of data storage.

[0025] The embodiments of the present invention will be further described below with reference to the accompanying drawings.

[0026] like Figure 1 As shown, Figure 1 This is a flowchart of a data storage method. The method includes, but is not limited to, steps S100, S200, S300, and S400. Step S100: Obtain the probability of error occurrence of the original data and the internal bit positions of the flash memory page; Step S200: Construct a shortened code based on the data length of the original data and the code length of the preset standard error correction code; Step S300: Based on the error probability of the shortened code and the internal bit position of the flash memory page, the shortened code is split and written into the corresponding area of ​​the preset standard codeword to obtain page data; Step S400: Write the page data into the flash memory page.

[0027] It should be noted that during data storage, the error probability of the original data and the internal bit positions of the flash memory page is first obtained. Then, based on the data length of the original data and the code length of the preset standard error correction code, a shortened code is constructed. Next, based on the shortened code and the error probability of the internal bit positions of the flash memory page, the shortened code is split and written into the corresponding areas of the pre-defined standard codeword, thus obtaining the page data. Finally, the page data can be written into the flash memory page. Through this technical solution, the shortened code can be stored in the corresponding area according to the error probability of the internal bit positions of the flash memory page, significantly improving the reliability of data storage.

[0028] It is worth noting that the original data is the data to be stored; the error probability of the internal bit positions of the flash page is the probability that errors will occur at the internal bit positions of the flash page during data storage. In this embodiment of the invention, after obtaining the original data and the error probability of the internal bit positions of the flash page, a shortened code can be constructed based on the data length of the original data and the code length of the pre-set standard error correction code. Then, based on the shortened code and the error probability of the internal bit positions of the flash page, the various parts of the shortened code are split. The split parts are then written into the corresponding areas of the standard codeword according to the error probability of the internal bit positions of the flash page to obtain page data. Subsequently, the page data can be written into the flash page to achieve more reliable data storage operations.

[0029] It is worth noting that the shortened code includes original data, redundant data, and check data. In subsequent data storage, the original data and check data can be stored in the internal bit positions of the flash page with low error probability, while the redundant data can be stored in the internal bit positions of the flash page with high error probability. Through the above technical solution, the reliability of data storage can be greatly improved.

[0030] like Figure 2 As shown, the probability of error occurrence at internal bit positions of a flash memory page can be obtained, but is not limited to, in the following ways: Step S110: Randomly select a data block from the preset flash memory; Step S120: Repeatedly erase, write, and read operations are performed on the data block until the end of the flash memory's erase / write lifespan is reached; and the read operation data of the data block is statistically analyzed. Step S130: Based on the read operation data, perform statistical processing on the error probability of the internal bit position of the flash memory page in the data block to obtain the error probability of the internal bit position of the flash memory page.

[0031] It should be noted that, firstly, a data block is randomly selected from the pre-defined flash memory. Then, the data block is repeatedly erased, written, and read until the end of the flash memory's erase / write lifespan is reached. The read operation data of the data block is statistically processed. Finally, based on the read operation data, the probability of error occurrence of internal bit positions in the flash memory page of the data block is statistically processed, thereby obtaining the probability of error occurrence of internal bit positions in the flash memory page, which provides a basis for the subsequent data partitioning and storage of shortened codes.

[0032] It is worth noting that the data block is repeatedly erased, written, and read until the end of the flash memory's erase / write lifespan is reached. During this process, the read operation data of the data block is statistically processed to statistically process the error probability of the internal bit positions of the flash page in the data block. This allows us to obtain the error probability of the internal bit positions of the flash page, which is in preparation for subsequent shortened code partitioning storage.

[0033] Additionally, in one embodiment, such as Figure 3 As shown, based on the data length of the original data and the preset code length of the standard error correction code, a shortened code is constructed, which may include, but is not limited to, steps S210, S220, and S230: Step S210: Determine the error correction codeword data and check data from the standard error correction code; Step S220: Determine redundant data based on the data length of the error correction codeword data and the data length of the original data; Step S230: Combine the original data, redundant data, and check data to obtain the shortened code.

[0034] It should be noted that in the process of constructing the shortened code based on the data length of the original data and the code length of the preset standard error correction code, the error correction codeword data and the check data are first determined from the standard error correction code; then, the redundant data can be determined based on the data length of the error correction codeword data and the data length of the original data; finally, the original data, redundant data, and check data can be combined to obtain the shortened code; the shortened code includes the original data, redundant data, and check data, providing a foundation for the subsequent secure and reliable storage of data.

[0035] It is worth noting that the length of the error correction codeword data minus the length of the original data gives the length of the redundant data. Combining the original data, redundant data, and check data yields the corresponding shortened code. During the subsequent storage of the shortened code, the original data and check data can be stored in the internal bit positions of the flash memory page with low error probability, while the redundant data can be stored in the internal bit positions of the flash memory page with high error probability, thereby significantly improving the reliability of data storage.

[0036] like Figure 4 As shown, Figure 4 A schematic diagram of a standard error correction code is disclosed. A standard error correction code includes an error correction codeword data area and an error correction codeword check area. The error correction codeword data area is used to store the original data, and the error correction codeword check area is used to store the check data. Figure 5A schematic diagram of the shortened code is disclosed. The error correction codeword data area of ​​the shortened codeword includes valid data and redundant data; the error correction codeword check area of ​​the shortened codeword also includes check data; the data length of the error correction codeword data area is obtained by adding the data length of the valid data and the data length of the redundant data, while the data length of the check data remains unchanged. It is worth noting that... Figure 5 The valid data in the above embodiments is the original data. Figure 4 The original data in this example only represents the data stored in the error correction codeword data area and is not the same as the original data in the above embodiment.

[0037] Additionally, in one embodiment, such as Figure 6 As shown, based on the shortened code and the error probability of the internal bit positions of the flash memory page, the shortened code is split and written into the corresponding area of ​​a preset standard codeword to obtain page data, which may include, but is not limited to, steps S310 and S320: Step S310: Based on the data length of the shortened code and the error occurrence probability of the internal bit position of the flash memory page, write the original data and check data into the low error probability region of the standard codeword, and write the redundant data into the high error probability region of the standard codeword to obtain multiple initial codewords. Step S320: Construct page data from multiple initial codewords.

[0038] It should be noted that, in the process of splitting the shortened code and writing it into the corresponding area of ​​the preset standard codeword to obtain page data based on the error probability of the shortened code and the internal bit position of the flash memory page, firstly, according to the data length of the shortened code and the error probability of the internal bit position of the flash memory page, the original data and check data are written into the low error probability area of ​​the standard codeword, and the redundant data is written into the high error probability area of ​​the standard codeword, thus obtaining multiple initial codewords; finally, the multiple initial codewords can be used to construct the corresponding page data, preparing for subsequent data storage.

[0039] It is worth noting that writing the original data and check data into the low-error-probability region of the standard codeword, and writing the redundant data into the high-error-probability region of the standard codeword, effectively prevents errors from occurring during data storage. Specifically, writing the original data and check data into the low-error-probability region of the standard codeword effectively prevents errors in the original data and check data. Writing the redundant data into the high-error-probability region of the standard codeword ensures that even if the redundant data is corrupted, it will not affect the storage of the original data. Therefore, this method can significantly improve the reliability of data storage.

[0040] For example, such as Figure 7 and Figure 8As shown, combining the error location information within the page and shortening the data length of each part of the codeword, the useful data of the codeword (including valid original data and check data) is written into the low error probability area of ​​the standard codeword, and the redundant data is written into the high error probability area of ​​the standard codeword; for example... Figure 7 As shown, the gray area represents fixed redundant data, corresponding to high-error-probability bits or bytes within a flash memory page; for example... Figure 8 As shown, multiple codewords constitute a whole page of data (containing n+1 codewords), where the black area is fixed redundant data, corresponding to the high error probability position inside the flash memory page.

[0041] Additionally, in one embodiment, such as Figure 9 As shown, after writing the page data into the flash memory page, the process may include, but is not limited to, steps S510, S520, and S530: Step S510: Read page data from the flash memory page; Step S520: Restore the page data to multiple initial codewords; Step S530: Decode multiple initial codewords based on a preset error correction code decoder to obtain the original data.

[0042] It should be noted that after the page data is written to the flash memory page, the page data is read from the flash memory page during subsequent data reading. Then, the page data is restored to multiple initial codewords. Next, these initial codewords are decoded based on a pre-set error correction code decoder, thereby obtaining the corresponding original data. This technical solution effectively processes the original data, ensuring the accuracy of data reading.

[0043] It is worth noting that the page data is restored to multiple initial codewords. The initial codewords are constructed by writing the original data and check data into the low error probability region of the standard codeword and writing the redundant data into the high error probability region of the standard codeword, based on the data length of the shortened code and the error occurrence probability of the internal bit position of the flash page. Subsequently, the error correction code decoder can be used to decode the multiple initial codewords to obtain the corresponding original data.

[0044] Additionally, in one embodiment, such as Figure 10 As shown, writing page data into a flash memory page may include, but is not limited to, steps S410 and S420: Step S410: Perform data erasure processing on the data block corresponding to the flash memory page; Step S420: Write the page data to the corresponding flash memory page.

[0045] It should be noted that during the process of writing page data to a flash page, the data block corresponding to the flash page is first erased, and then the page data is written to the corresponding flash page to make the storage of page data more stable and reliable.

[0046] It is worth noting that during the process of writing page data, the data block corresponding to the flash page must first be erased to prepare for subsequent data writing.

[0047] Additionally, in one embodiment, such as Figure 11 As shown, the low error probability region can be obtained through, but is not limited to, the following methods: Step S330: If the probability of an error occurring at an internal bit location of a flash memory page is less than a preset probability threshold, the corresponding internal bit location region of the flash memory page is designated as a low error probability region.

[0048] It should be noted that when the probability of an error occurring at an internal bit location of a flash memory page is less than a preset probability threshold, the corresponding internal bit location area of ​​the flash memory page can be designated as a low-error-probability area. Subsequently, the original data and check data can be stored in the internal bit location area of ​​the flash memory page as a low-error-probability area to ensure the accuracy of these two useful data types and improve the reliability of data storage.

[0049] It is worth noting that the probability threshold can be set according to actual needs, and no limitation is made here.

[0050] Additionally, in one embodiment, such as Figure 12 As shown, the high error probability region can be obtained through, but is not limited to, the following methods: Step S340: If the probability of an error occurring at an internal bit location of a flash memory page is greater than or equal to a preset probability threshold, the corresponding internal bit location region of the flash memory page is designated as a high error probability region.

[0051] It should be noted that when the probability of an error occurring at an internal bit position of a flash memory page is greater than or equal to a preset probability threshold, the corresponding internal bit position region of the flash memory page is designated as a high-error-probability region. Subsequently, redundant data in the shortened code can be stored in the internal bit position region of the flash memory page as a high-error-probability region. Since the error of the redundant data does not affect the reading of the original data, it will not affect the accuracy of data storage.

[0052] like Figure 13As shown, the probability of errors occurring is calculated based on the bit position within a page. When outputting the statistical results, they can be sorted in descending order of the probability of errors occurring at different bit positions; alternatively, they can be sorted in descending order of the probability of errors occurring within a byte, taking into account the transmission characteristics of flash memory interface data and the writing position of standard codewords.

[0053] In some embodiments of the present invention, such as Figure 14 As shown, an embodiment of the present invention also provides an electronic device 700, including: a memory 720, a processor 710, and a computer program stored in the memory 720 and executable on the processor 710. When the processor 710 executes the computer program, it implements the data storage method in the above embodiment.

[0054] In some embodiments of the present invention, one embodiment of the present invention also provides a computer-readable storage medium storing computer-executable instructions that are executed by a processor or controller, for example, by a processor in the above-described device embodiments, such that the processor performs the data storage method in the above-described embodiments.

[0055] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0056] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present invention.

Claims

1. A data storage method, characterized by, The method comprises: acquiring error occurrence probability of internal bit positions of a flash memory page and original data; constructing a shortened code according to data length of the original data and code length of a preset standard error correction code; splitting and writing the shortened code into a corresponding area of a preset standard code word according to the shortened code and the error occurrence probability of the internal bit positions of the flash memory page to obtain page data; writing the page data into the flash memory page.

2. The data storage method of claim 1, wherein, The error occurrence probability of the internal bit positions of the flash memory page is obtained by: randomly selecting a data block from a preset flash memory; repeatedly performing erase, write and read operations on the data block until the end of the erase-write life of the flash memory; and statistically processing read operation data obtained by performing a read operation on the data block; statistically processing the error occurrence probability of the internal bit positions of a flash memory page in the data block based on the read operation data to obtain the error occurrence probability of the internal bit positions of the flash memory page.

3. The data storage method of claim 1, wherein, The construction of the shortened code according to the data length of the original data and the code length of the preset standard error correction code comprises: determining error correction code word data and check data from the standard error correction code; determining redundant data according to the data length of the error correction code word data and the data length of the original data; combining the original data, the redundant data and the check data to obtain the shortened code.

4. The data storage method of claim 3, wherein, The splitting and writing of the shortened code into a corresponding area of a preset standard code word to obtain page data according to the shortened code and the error occurrence probability of the internal bit positions of the flash memory page comprises: writing the original data and the check data into a low error probability area of the standard code word and writing the redundant data into a high error probability area of the standard code word according to the data length of the shortened code and the error occurrence probability of the internal bit positions of the flash memory page to obtain a plurality of initial code words; constructing a plurality of the initial code words into the page data.

5. The data storage method of claim 3, wherein, After the writing of the page data into the flash memory page, the method further comprises: reading the page data from the flash memory page; restoring the page data into a plurality of initial code words; decoding a plurality of the initial code words based on a preset error correction code decoder to obtain the original data.

6. The data storage method of claim 1, wherein, The writing of the page data into the flash memory page comprises: performing data erasing processing on a data block corresponding to the flash memory page; writing the page data into the corresponding flash memory page.

7. The data storage method of claim 4, wherein, The low error probability area is obtained by: in a case where the error occurrence probability of the internal bit positions of the flash memory page is less than a preset probability threshold, regarding a corresponding internal bit position area of the flash memory page as the low error probability area.

8. The data storage method of claim 4, wherein, The high error probability area is obtained by: in a case where the error occurrence probability of the internal bit positions of the flash memory page is greater than or equal to a preset probability threshold, regarding a corresponding internal bit position area of the flash memory page as the high error probability area.

9. An electronic device, comprising: comprises: A memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the data storage method according to any one of claims 1 to 8 when executing the computer program.

10. A computer-readable storage medium, the computer-readable storage medium storing computer-executable instructions, wherein, The computer executable instructions implement the data storage method according to any one of claims 1 to 8 when executed by the control processor.

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