Evaporation apparatus and electronic device

Abstract

The present application relates to a kind of evaporation device and electronic device.It can be, evaporation device includes: first electrostatic chuck, opening portion is defined with, and include multiple first electrode;Second electrostatic chuck, be configured on the first electrostatic chuck and include the lower surface of adsorbing substrate;And shadow mask, be configured between the first electrostatic chuck and the second electrostatic chuck, and include the mask of adsorbing on the upper surface of the first electrostatic chuck and multiple conductive patterns configured on the mask, when observing in plane, the conductive pattern overlaps with the first electrode.

Description

Technical Field

[0001] The present invention relates to a vapor deposition apparatus and an electronic device comprising a display panel manufactured by a shadow mask of the vapor deposition apparatus. Background Technology

[0002] Typically, electronic devices that provide images to users, such as smartphones, digital cameras, laptops, navigation devices, and smart TVs, include display devices for displaying images. The display device generates the image and provides it to the user through a display screen.

[0003] The display device includes a display panel containing a plurality of pixels that generate images. Each pixel includes a light-emitting element and a plurality of transistors connected to the light-emitting element. The light-emitting element generates light by being driven by the transistors.

[0004] The light-emitting element includes an anode, a cathode, and a light-emitting layer disposed between the anode and the cathode. Holes and electrons are injected from the anode and cathode, respectively, into the light-emitting layer to form excitons. The light-emitting element emits light as the excitons transition to the ground state. In manufacturing the light-emitting element of a pixel, a shadow mask is disposed on a substrate, and the organic material used to form the light-emitting layer is provided onto the substrate through openings in the shadow mask.

[0005] After the shadow mask is aligned with the substrate, a vapor deposition process is performed to deposit organic materials onto the substrate. The substrate and shadow mask are then held in place by an electrostatic chuck. When the electrostatic chuck's adhesion to the shadow mask is weak, the shadow mask may not be properly held in place. In this case, the shadow mask may not align correctly with the substrate. Therefore, there is a need to develop a technology that can more firmly hold the shadow mask in place by the electrostatic chuck. Summary of the Invention

[0006] The object of the present invention is to provide a vapor deposition apparatus capable of more securely fixing a shadow mask to an electrostatic chuck, and an electronic device comprising a display panel manufactured by the shadow mask through the vapor deposition apparatus.

[0007] The vapor deposition apparatus according to an embodiment of the present invention may include: a first electrostatic chuck defining an opening and including a plurality of first electrodes; a second electrostatic chuck disposed on the first electrostatic chuck and including the underside of an adsorption substrate; and a shadow mask disposed between the first electrostatic chuck and the second electrostatic chuck, including a mask adsorbed on the top of the first electrostatic chuck and a plurality of conductive patterns disposed on the mask, wherein the conductive patterns overlap with the first electrodes when viewed in a plane.

[0008] The vapor deposition apparatus according to an embodiment of the present invention may include: a first electrostatic chuck defining an opening and including a plurality of first electrodes; a second electrostatic chuck disposed on the first electrostatic chuck and including the underside of an adsorbed substrate; and a shadow mask disposed between the first electrostatic chuck and the second electrostatic chuck, the shadow mask including: a mask adsorbed on the top of the first electrostatic chuck; a plurality of conductive patterns disposed on the mask; and a plurality of mask alignment keys disposed on the mask, wherein, when viewed in a plane, the mask alignment keys are disposed inside the conductive patterns.

[0009] An electronic device according to an embodiment of the present invention may include: a display device; an electro-optical module disposed below the display device and receiving light signals through a first transmissive region of the display device; and a housing housing the display device and the electro-optical module. The display device includes: a display panel manufactured by a shadow mask comprising a mask defining a plurality of mask openings, a plurality of conductive patterns disposed on the mask, and a plurality of mask alignment keys disposed on the mask at an inner position than the conductive patterns, and defining the first transmissive region; and a window disposed on the display panel.

[0010] According to an embodiment of the present invention, the shadow mask may include a mask and a conductive pattern disposed on the mask, the conductive pattern overlapping the electrodes of an electrostatic chuck disposed beneath the mask. The Coulomb force formed on the electrodes of the electrostatic chuck and the conductive pattern is stronger, thus the shadow mask can be more firmly fixed to the electrostatic chuck when an electrostatic force is generated through the electrodes of the electrostatic chuck. Attached Figure Description

[0011] Figure 1 This is an exploded perspective view of a vapor deposition apparatus according to an embodiment of the present invention.

[0012] Figure 2 It is shown Figure 1 An enlarged view of the mother substrate as shown, depicting the planar structure of the mother substrate.

[0013] Figure 3 It is shown Figure 2 An enlarged view of the shadow mask formed by the planes of the shadow mask shown.

[0014] Figure 4 This includes through Figure 1 An exploded perspective view of the electronic device of the display panel manufactured by the shadow mask of the vapor deposition apparatus shown.

[0015] Figure 5 yes Figure 4 Block diagram of the electronic device shown.

[0016] Figure 6 yes Figure 4 The diagram shows a plan view of the display device.

[0017] Figure 7 This is an example shown Figure 6 A cross-section of any pixel shown.

[0018] Figure 8 yes Figure 3 The cross-sectional view of line I-I' shown.

[0019] Figure 9 yes Figure 3 The cross-sectional view of line II-II' shown.

[0020] Figures 10a to 10c This is a diagram used to provide a summary of the vapor deposition process in the vapor deposition apparatus.

[0021] Figure 11 It is shown Figure 10c The vapor-deposited material provides a diagram of its state on the mother substrate.

[0022] Figure 12 This is a diagram illustrating the configuration of a comparative shadow mask according to a comparative embodiment.

[0023] Figure 13a as well as Figure 13b This is a graph showing the movement of the mask alignment key when using a comparative shadow mask in a vapor deposition process.

[0024] Figure 14a as well as Figure 14b This is a graph showing the movement state of the mask alignment key when using a shadow mask according to an embodiment of the present invention in a vapor deposition process.

[0025] (Explanation of reference numerals in the attached diagram)

[0026] DPA: Vapor Deposition Unit; ESC1, ESC2: First and Second Electrostatic Chucks

[0027] HS1, HS2: First and second housings; ET1, ET2: First and second electrodes

[0028] SMK: Shadow Mask MK: Mask

[0029] CDP: Conductive Pattern; MAK: Mask Alignment Key

[0030] CA: Unit Region; M-OP: Mask Opening

[0031] MS: Mother substrate; US: Unit substrate

[0032] DD: Display device; DP: Display panel

[0033] PX: Pixel; EML: Emissive Layer Detailed Implementation

[0034] In this specification, when a constituent element (or region, layer, part, etc.) is referred to as being "on", "connected to", or "integrated with" another constituent element, it means that the constituent element can be directly configured / connected / integrated on the other constituent element, or a third constituent element can be configured between them.

[0035] The same reference numerals refer to the same constituent elements. Furthermore, in the drawings, the thickness, scale, and dimensions of the constituent elements are enlarged for the purpose of effectively illustrating the technical content.

[0036] "And / or" includes all combinations that can be defined by the relevant composition.

[0037] The terms "first," "second," etc., can be used to describe multiple constituent elements, but the constituent elements described above are not limited by these terms. These terms are used only to distinguish one constituent element from others. For example, without departing from the scope of this invention, a first constituent element may be named a second constituent element, and similarly, a second constituent element may be named a first constituent element. Singular expressions include plural expressions unless explicitly stated otherwise in the context.

[0038] In addition, terms such as "below," "lower side," "above," and "upper side" are used to describe the relational relationships of the components shown in the accompanying drawings. These terms are relative concepts and are explained based on the directions indicated in the accompanying drawings.

[0039] Unless otherwise defined, all terms used in this specification (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Furthermore, terms such as those defined in commonly used dictionaries shall be interpreted as having the same meaning in the context of the relevant art, and shall not be construed as having an idealized or overly formal meaning unless explicitly defined herein.

[0040] Terms such as “including” or “having” should be understood as indicating the presence of features, figures, steps, operations, constituent elements, components, or combinations thereof as described in the specification, and do not preclude the presence or additional possibilities of one or more other features or figures, steps, operations, constituent elements, components, or combinations thereof.

[0041] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0042] Figure 1 This is an exploded perspective view of a vapor deposition apparatus according to an embodiment of the present invention. Figure 2 It is shown Figure 1An enlarged view of the mother substrate as shown, depicting the planar structure of the mother substrate. Figure 3 It is shown Figure 2 An enlarged view of the shadow mask formed by the planes of the shadow mask shown.

[0043] For example, in Figure 1 The process object, namely the mother substrate MS, is shown together with the vapor deposition apparatus DPA. Additionally, in Figure 2 The central opening OP is shown together with the mother substrate MS. Figure 3 The mid-shading mask SMK is shown together with the first electrostatic chuck ESC1.

[0044] Reference Figure 1 The vapor deposition apparatus (DPA) may include a first electrostatic chuck (ESC1), a second electrostatic chuck (ESC2), and a shadow mask (SMK). In this specification, a plane is defined by a first direction (DR1) and a second direction (DR2) that intersect each other perpendicularly, and a third direction (DR3) that intersects the plane perpendicularly. The first electrostatic chuck (ESC1), the second electrostatic chuck (ESC2), and the shadow mask (SMK) are arranged on the third direction (DR3).

[0045] In this specification, "when viewed on a plane" is defined as the state observed in a third-direction DR3. "Overlap" refers to a state where, when viewed on a plane, the objects overlap.

[0046] The second electrostatic chuck ESC2 can be disposed on the first electrostatic chuck ESC1. The shadow mask SMK can be disposed between the first electrostatic chuck ESC1 and the second electrostatic chuck ESC2. The process object, i.e., the mother substrate MS, can be disposed between the shadow mask SMK and the second electrostatic chuck ESC2.

[0047] The first electrostatic chuck ESC1 may have a frame shape (or a ring shape). In order to have a frame shape, an opening OP that extends through the first electrostatic chuck ESC1 in a third direction DR3 may be defined in the first electrostatic chuck ESC1.

[0048] For example, when viewed in a plane, the opening OP may have a circular shape, but the shape of the opening OP is not limited to this. For example, the frame of the first electrostatic chuck ESC1 may have an octagonal shape, but the shape of the frame of the first electrostatic chuck ESC1 is not limited to this.

[0049] The first electrostatic chuck ESC1 may include a first housing HS1 and a plurality of first electrodes ET1 disposed within the first housing HS1. Exemplarily, in Figure 1 The first electrode ET1, which is disposed within the first housing HS1, is shown in dashed lines and gray.

[0050] In essence, the first housing HS1 can define the shape of the first electrostatic chuck ESC1. Therefore, in order to give the first housing HS1 a frame shape, a circular opening OP can be defined in the first housing HS1.

[0051] The first electrode ET1 can be configured along the edge of the first housing HS1. Therefore, the first electrode ET1 can be configured to surround the opening OP.

[0052] For example, the first electrode ET1 may extend in a curved form corresponding to the circular border of the opening OP, but the shape of the first electrode ET1 is not limited to this. Alternatively, the first electrode ET1 may include a positive electrode and a negative electrode, with a positive voltage applied to the positive electrode and a negative voltage applied to the negative electrode.

[0053] Although not shown, the first electrode ET1 can be connected to a power source via wiring. The power source can apply both positive and negative voltages to the first electrode ET1. When positive and negative voltages are applied to the first electrode ET1, an electrostatic force is generated. Through this electrostatic force, the shadow mask SMK can be adsorbed and fixed to the first electrostatic chuck ESC1. The structure of fixing an object based on the electrostatic force formed by the electrostatic chuck is obvious to those skilled in the art, therefore a detailed description is omitted.

[0054] The second electrostatic chuck ESC2 may have a flat plate shape defined by the first and second directions DR1 and DR2. When viewed in a plane, the second electrostatic chuck ESC2 may have a rectangular shape, but its shape is not limited to this. When viewed in a plane, the second electrostatic chuck ESC2 may overlap with the first electrostatic chuck ESC1.

[0055] The second electrostatic chuck ESC2 may include a second housing HS2 and a plurality of second electrodes ET2 disposed within the second housing HS2. Exemplarily, in Figure 1 The second electrode ET2, which is disposed within the second housing HS2, is shown in dashed lines and gray.

[0056] In essence, the second housing HS2 can define the shape of the second electrostatic chuck ESC2. Therefore, the second housing HS2 can have a flat plate shape defined by the first and second directions DR1, DR2, and have a rectangular shape when viewed in a plane.

[0057] The second electrode ET2 can extend in the form of a combination of curves and straight lines, and is not limited to... Figure 1 The shape shown can be various. When viewed on a plane, the second electrode ET2 can be configured to overlap with the mother substrate MS.

[0058] Alternatively, the second electrode ET2 may include a positive electrode and a negative electrode, with a positive voltage applied to the positive electrode and a negative voltage applied to the negative electrode. Although not shown, the second electrode ET2 can be connected to a power supply via wiring. The power supply can apply both positive and negative voltages to the second electrode ET2.

[0059] When positive and negative voltages are applied to the second electrode ET2, electrostatic force is generated. Through this electrostatic force, the mother substrate MS can be adsorbed and fixed to the second electrostatic chuck ESC2.

[0060] Reference Figure 1 as well as Figure 2 When viewed on a plane, the mother substrate (MS) can have a circular shape, but its shape is not limited to this. The mother substrate (MS) can be defined as a wafer. The mother substrate (MS) can be formed from various materials such as silicon substrates or glass substrates.

[0061] The mother substrate MS may include multiple unit substrates US. When viewed in a plane, the unit substrates US may overlap with the opening OP. That is, the unit substrates US may be disposed within the opening OP.

[0062] Unit substrates US can be arranged on a first direction DR1 and a second direction DR2. Unit substrates US can extend longer than the first direction DR1 in the second direction DR2. Pixels can be formed on the unit substrates US. After forming pixels on the unit substrates US, the unit substrates US can be cut and separated from the parent substrate MS. A display panel can be manufactured by forming pixels on each of the unit substrates US.

[0063] In embodiments of the present invention, the light-emitting layer of each pixel can be formed using a vapor deposition apparatus (DPA). This manufacturing process will be described in detail below.

[0064] Multiple substrate alignment keys (SAKs) can be defined on the mother substrate (MS). Substrate alignment key SAKs can be formed using various metal layers on the mother substrate (MS). The metal layers that can form the substrate alignment key SAKs will be shown below. Figure 7 The structure of the pixels shown is explained below.

[0065] When viewed in a plane, the substrate alignment key (SAK) may not overlap with the opening (OP). The substrate alignment key (SAK) can have various shapes. For example, as... Figure 2 As shown, the substrate alignment key (SAK) can have a cross shape, but the shape of the substrate alignment key (SAK) is not limited to this.

[0066] The substrate alignment key (SAK) can be adjacent to the edge of the mother substrate (MS). For example, four substrate alignment key (SAK) can be configured at four locations. For instance, the substrate alignment key (SAK) can be configured at 90 degrees, 180 degrees, 270 degrees, and 360 degrees, based on a rotation angle relative to the center point of the mother substrate (MS).

[0067] Two substrate alignment keys SAK can be separated from the center of the mother substrate MS in the first direction DR1 and adjacent to the edge of the mother substrate MS. The other two substrate alignment keys SAK can be separated from the center of the mother substrate MS in the second direction DR2 and adjacent to the edge of the mother substrate MS.

[0068] For example, refer to Figure 2 The document describes the four substrate alignment keys (SAKs) and their placement, but the number and placement of the substrate alignment keys (SAKs) are not limited to these specifications. Figure 2 The structure shown.

[0069] Reference Figure 1 as well as Figure 3 The shadow mask SMK can be circular, but its shape is not limited to this. The shadow mask SMK can also be a flat plate shape defined by the first and second directions DR1 and DR2.

[0070] The shadow mask SMK may include a mask MK, multiple mask alignment keys MAK, and multiple conductive patterns CDP.

[0071] The mask MK can substantially define the shape of the shadow mask SMK. Therefore, the mask MK can have a circular shape. In addition, the mask MK can have a flat plate shape defined by the first and second directions DR1, DR2. Multiple mask openings M-OP can be defined in the mask MK.

[0072] When viewed in a plane, the planar region of the mask MK can include multiple unit regions CA. Unit regions CA can overlap with openings OP. Unit regions CA can each overlap with a unit substrate US. A mask opening M-OP can be defined within each unit region CA.

[0073] A mask alignment key (MAK) can be configured on the mask (MK). When viewed in a plane, the mask alignment key (MAK) can overlap with the substrate alignment key (SAK). The mother substrate (MS) and the mask (MK) can be aligned using the substrate alignment key (SAK) and the mask alignment key (MAK).

[0074] When viewed on a plane, the mask alignment keys (MAK) may not overlap with the opening (OP). The shape, number, and position of the mask alignment keys (MAK) may correspond to the shape, number, and position of the substrate alignment keys (SAK).

[0075] The mask alignment key (MAK) can have the same shape as the substrate alignment key (SAK). For example, as shown below. Figure 3 As shown, the mask alignment key (MAK) can have a cross shape, but is not limited to this, and can have various shapes depending on the shape of the substrate alignment key (SAK).

[0076] The mask alignment key (MAK) can be adjacent to the edge of the mask MK. Like the substrate alignment key (SAK), four mask alignment keys (MAK) can be configured at four locations. The mask alignment keys (MAK) can be configured at 90°, 180°, 270°, and 360° locations, based on a rotation angle relative to the center point of the mask MK.

[0077] Two mask alignment keys (MAK) can be separated from the center of the mask MK in the first direction DR1 and adjacent to the edge of the mask MK. The other two mask alignment keys (MAK) can be separated from the center of the mask MK in the second direction DR2 and adjacent to the edge of the mask MK.

[0078] The conductive pattern CDP can be disposed on the mask MK. When viewed in a plane, the conductive pattern CDP can overlap with the first electrode ET1. When viewed in a plane, the conductive pattern CDP can not overlap with the opening OP. The conductive pattern CDP can extend in a curved form to correspond to the shape of the first electrode ET1. The conductive pattern CDP can be adjacent to the border of the mask MK.

[0079] Conductive patterned CDPs can include paramagnetic materials. For example, conductive patterned CDPs can include tungsten, aluminum, or magnesium.

[0080] The mask alignment key (MAK) can be positioned inside the conductive pattern (CDP). For example, when viewed in a plane, the mask alignment key (MAK) can be adjacent to the opening (OP) beyond the conductive pattern (CDP). Additionally, when viewed in a plane, the conductive pattern (CDP) can be adjacent to the edge of the mask (MK) beyond the mask alignment key (MAK).

[0081] Figure 4 This includes through Figure 1 An exploded perspective view of the electronic device of the display panel manufactured by the shadow mask of the vapor deposition apparatus shown.

[0082] Reference Figure 4 Electronic devices (EDs) may include display devices (DDs), cameras (CAAs), sensors (SNs), electronic modules (EMs), power supply modules (PSMs), and housings (CASs).

[0083] The display device DD may include a window WIN and a display panel DP. Each of the window WIN and the display panel DP may have a rectangular shape, the rectangular shape having a short side extending in a first direction DR1 and a long side extending in a second direction DR2.

[0084] A window (WIN) can be configured on a display panel (DP) to protect the DP. The window (WIN) can also project images generated from the DP onto the user.

[0085] The display panel DP may include a display area DA for displaying images and a non-display area NDA disposed around the display area DA. The display panel DP may include multiple pixels disposed within the display area DA for displaying images. The composition of the pixels will be described in detail below.

[0086] A first transmissive region TA1 and a second transmissive region TA2 can be defined in the display panel DP. The first transmissive region TA1 and the second transmissive region TA2 can be defined in the display area DA. In the display area DA, the first transmissive region TA1 and the second transmissive region TA2 can have a higher transmittance than the surrounding area.

[0087] Alternatively, the camera CAA can be positioned below the first transmission region TA1, and the sensor SN can be positioned below the second transmission region TA2. The light transmitted through the first and second transmission regions TA1 and TA2 can be provided to both the camera CAA and the sensor SN.

[0088] The display device DD may include a data driver unit DDV disposed on the non-display area NDA of the display panel DP. The data driver unit DDV may be fabricated as an integrated circuit chip and mounted on the non-display area NDA. However, it is not limited to this; the data driver unit DDV may also be mounted on a flexible circuit board connected to the display panel DP.

[0089] The electronic module (EM) and the power supply module (PSM) can be configured below the display panel (DP). Although not shown, the electronic module (EM) and the power supply module (PSM) can be connected to each other via separate flexible circuit boards. The electronic module (EM) can control the operation of the display device (DD). The power supply module (PSM) can supply power to the electronic module (EM).

[0090] The housing CAS can accommodate the display device DD, the electronic module EM, and the power supply module PSM. The housing CAS can protect the display device DD, the electronic module EM, and the power supply module PSM.

[0091] Figure 5 yes Figure 4 Block diagram of the electronic device shown.

[0092] Reference Figure 5The electronic device ED may include an electronic module EM, a power supply module PSM, a display device DD, and an electro-optical module ELM. The electronic module EM may include a control module 10, a wireless communication module 20, an image input module 30, an audio input module 40, an audio output module 50, a memory 60, and an external interface module 70, etc. The module may be mounted on a circuit board or electrically connected via a flexible circuit board. The electronic module EM may be electrically connected to the power supply module PSM.

[0093] The control module 10 can control the overall operation of the electronic device ED. For example, the control module 10 can activate or disable the display device DD to accommodate user input. The control module 10 can control the image input module 30, the audio input module 40, and the audio output module 50, etc., to accommodate user input. The control module 10 may include at least one microprocessor.

[0094] The wireless communication module 20 can send / receive wireless signals to other terminals via Bluetooth or Wi-Fi. The wireless communication module 20 can also send / receive voice signals via conventional communication lines. The wireless communication module 20 may include a transmitting circuit 22 that modulates the signal to be transmitted for transmission and a receiving circuit 24 that demodulates the received signal.

[0095] Image input module 30 can process image signals and convert them into image data that can be displayed on display device DD. Audio input module 40 can receive external audio signals through a microphone and convert them into electronic voice data in recording mode or voice recognition mode. Audio output module 50 can convert audio data received from wireless communication module 20 or audio data stored in memory 60 and output it to the outside.

[0096] The external interface module 70 can serve as an interface for connecting to external chargers, wired / wireless data ports, card slots (e.g., memory cards, SIM / UIM cards), etc.

[0097] A power supply module (PSM) provides the power required for the overall operation of an electronic device (ED). A PSM may include a typical battery device.

[0098] An electro-optical module (ELM) can be an electronic component that outputs or receives optical signals. An ELM can transmit or receive optical signals through a portion of a display device (DD).

[0099] In embodiments of the present invention, the electro-optical module (ELM) may include a camera module (CAM) and a sensor module (SNM). The camera module (CAM) may include... Figure 4 The camera CAA shown. The sensor module SNM may include... Figure 4The sensor SN is shown. Therefore, the electro-optical module (ELM) can include a camera CAA and a sensor SN to be configured in... Figure 4 The display device shown is located below DD.

[0100] The electron optical module (ELM) can pass through the first transmission region TA1 (refer to...). Figure 4 The electro-optical module (ELM) receives optical signals (e.g., external images) through a second transmission region TA2 (see reference). Figure 4 The electronic optical module (ELM) transmits and receives optical signals (e.g., transceiver signals for proximity sensing). The ELM can be configured within the electronic module (EM) or manufactured as a separate module and housed in the aforementioned housing (CAS). Figure 4 )middle.

[0101] Figure 6 yes Figure 4 The diagram shows a plan view of the display device.

[0102] Reference Figure 6 The display device DD may include a display panel DP, a scan driver SDV, a data driver DDV, a light emission driver EDV, and multiple pads PD.

[0103] The display panel DP may include a display area DA and a non-display area NDA surrounding the display area DA. The display panel DP may include multiple pixels PX, multiple scan lines SL1 to SLm, multiple data lines DL1 to DLn, multiple light-emitting lines EL1 to ELm, first and second control lines CSL1 and CSL2, first and second power lines PL1 and PL2, and connecting lines CNL. m and n are natural numbers greater than 1.

[0104] Pixel PX can be configured in display area DA. Scan driving unit SDV and light-emitting driving unit EDV can be configured in non-display area NDA adjacent to the long side of display panel DP, respectively. Data driving unit DDV can be configured in non-display area NDA adjacent to any one of the short sides of display panel DP. When viewed on a plane, data driving unit DDV can be adjacent to the bottom edge of display panel DP.

[0105] Scan lines SL1 to SLm can extend along the first direction DR1 and connect to pixel PX and scan drive unit SDV. Data lines DL1 to DLn can extend along the second direction DR2 and connect to pixel PX and data drive unit DDV. Light emission lines EL1 to ELm can extend along the first direction DR1 and connect to pixel PX and light emission drive unit EDV.

[0106] The first power line PL1 can extend along the second direction DR2 and be configured in the non-display area NDA. The first power line PL1 can be configured between the display area DA and the light-emitting driver unit EDV.

[0107] The connecting line CNL can extend along the first direction DR1 and be arranged along the second direction DR2 to connect to the first power line PL1 and the pixel PX. A first voltage can be applied to the pixel PX through the interconnected first power line PL1 and connecting line CNL.

[0108] The second power line PL2 can be configured in the non-display area NDA, extending along the long side of the display panel DP and the other short side of the display panel DP where the data driver unit DDV is not configured. The second power line PL2 can be configured at a location peripheral to the scan driver unit SDV and the light-emitting driver unit EDV.

[0109] Although not shown, a second power line PL2 can extend toward the display area DA and connect to pixel PX. A second voltage having a level lower than the first voltage can be applied to pixel PX through the second power line PL2.

[0110] The first control line CSL1 can be connected to the scan driver unit SDV and extends towards the lower end of the display panel DP. The second control line CSL2 can be connected to the light emission driver unit EDV and extends towards the lower end of the display panel DP. The data driver unit DDV can be configured between the first control line CSL1 and the second control line CSL2.

[0111] The pad PD can be configured in the non-display area NDA adjacent to the lower end of the display panel DP, and is even more adjacent to the lower end of the display panel DP than the data driver unit DDV. The data driver unit DDV, the first and second power lines PL1, PL2, and the first and second control lines CSL1, CSL2 can be connected to the pad PD. Alternatively, data lines DL1 to DLn can be connected to the data driver unit DDV, and the data driver unit DDV can be connected to the pad PD corresponding to the data lines DL1 to DLn.

[0112] Although not shown, the display device DD may also include a timing controller for controlling the operation of the scan drive unit SDV, the data drive unit DDV, and the light emission drive unit EDV, as well as a voltage generation unit for generating the first and second voltages. The timing controller and the voltage generation unit may be mounted on a printed circuit board and connected to the pad PD via the printed circuit board.

[0113] Alternatively, the scan drive unit (SDV) can generate multiple scan signals, which are applied to pixel PX through scan lines SL1 to SLm. Or, the data drive unit (DDV) can generate multiple data voltages, which are applied to pixel PX through data lines DL1 to DLn. Or, the light emission drive unit (EDV) can generate multiple light emission signals, which are applied to pixel PX through light emission lines EL1 to ELm.

[0114] A pixel (PX) can receive data voltage in response to a scan signal. A pixel (PX) can also emit light of a brightness corresponding to the data voltage in response to a light emission signal to display an image.

[0115] Figure 7 This is an example shown Figure 6 A cross-section of any pixel shown.

[0116] Reference Figure 7 A pixel PX may include a transistor TR and a light-emitting element OLED connected to the transistor TR. An example of a pixel PX is shown, but in practice, multiple pixel PXs may be configured on a substrate SUB.

[0117] An OLED (Optical Display Cell) may include a first electrode AE, a second electrode CE, a hole control layer HCL, an electron control layer ECL, and an emissive layer EML. The first electrode AE ​​may be an anode electrode, and the second electrode CE may be a cathode electrode.

[0118] The transistor (TR) and the light-emitting element (OLED) can be disposed on the substrate (SUB). The planar area of ​​the substrate (SUB) can be divided into a light-emitting portion (PA) and a non-light-emitting portion (NPA) surrounding the light-emitting portion (PA). The light-emitting element (OLED) can be disposed on the light-emitting portion (PA).

[0119] The substrate SUB can be manufactured via the aforementioned mother substrate MS (refer to...). Figure 1 The unit substrate US (refer to) Figure 1 Formation. This can be achieved by depositing a buffer layer BFL on the substrate SUB, where the buffer layer BFL is an inorganic layer.

[0120] Semiconductor patterns S, A, and D can be configured on the buffer layer BFL. Semiconductor patterns S, A, and D may include polycrystalline silicon. However, they are not limited to this; semiconductor patterns S, A, and D may also include amorphous silicon or metal oxide.

[0121] Semiconductor patterns S, A, and D can be doped with N-type or P-type dopants. The semiconductor pattern can include highly doped and lightly doped regions. The highly doped region may have higher conductivity than the lightly doped region, essentially functioning as both the source and drain electrodes of the transistor TR. The lightly doped region can essentially be equivalent to the active region (or channel region) of the transistor TR.

[0122] The source S, active region A, and drain D of transistor TR can be formed from semiconductor patterns S, A, and D. A first insulating layer INS1 can be disposed on semiconductor patterns S, A, and D. The gate electrode G of transistor TR can be disposed on the first insulating layer INS1. A second insulating layer INS2 can be disposed on the gate electrode G. A third insulating layer INS3 can be disposed on the second insulating layer INS2.

[0123] The connecting electrode CNE can be configured between the transistor TR and the light-emitting element OLED to connect the transistor TR and the light-emitting element OLED. The connecting electrode CNE may include a first connecting electrode CNE1 and a second connecting electrode CNE2.

[0124] The first connecting electrode CNE1 can be disposed on the third insulating layer INS3 and connected to the drain electrode D through the first contact hole CH1 defined in the first to third insulating layers INS1 to INS3. The fourth insulating layer INS4 can be disposed on the first connecting electrode CNE1. The fifth insulating layer INS5 can be disposed on the fourth insulating layer INS4.

[0125] The second connecting electrode CNE2 can be disposed on the fifth insulating layer INS5. The second connecting electrode CNE2 can be connected to the first connecting electrode CNE1 through the second contact hole CH2 defined in the fifth insulating layer INS5 and the fourth insulating layer INS4. A sixth insulating layer INS6 can be disposed on the second connecting electrode CNE2. The first insulating layer INS1 to the sixth insulating layer INS6 can be inorganic layers or organic layers.

[0126] A first electrode AE ​​can be disposed on the sixth insulating layer INS6. The first electrode AE ​​can be connected to the second connecting electrode CNE2 through a third contact hole CH3 defined in the sixth insulating layer INS6. A pixel defining film PDL exposing a predetermined portion of the first electrode AE ​​can be disposed on the first electrode AE ​​and the sixth insulating layer INS6. An opening PX_OP for exposing the predetermined portion of the first electrode AE ​​can be defined in the pixel defining film PDL.

[0127] The hole control layer (HCL) can be disposed on the first electrode (AE) and the pixel defining film (PDL). The HCL can also be disposed together on the light-emitting portion (PA) and the non-light-emitting portion (NPA). The HCL may include a hole transport layer and a hole injection layer.

[0128] The emissive layer EML can be configured on the hole control layer HCL. The emissive layer EML can be configured in the region corresponding to the opening PX_OP. The emissive layer EML can include organic and / or inorganic materials. The emissive layer EML can generate any of the following light: red, green, and blue.

[0129] EML of the light-emitting layer can be used Figure 1 The vapor deposition apparatus shown is manufactured by DPA. The vapor-deposited material can be deposited using a shadow mask SMK (see reference). Figure 1 The mask opening M-OP (refer to) Figure 1 An EML (Emitting Layer) is formed on a substrate SUB.

[0130] An electronic control layer (ECL) can be disposed on both the light-emitting layer (EML) and the hole control layer (HCL). The ECL can also be disposed together on the light-emitting portion (PA) and the non-light-emitting portion (NPA). The ECL may include an electron transport layer and an electron injection layer.

[0131] The second electrode CE can be configured on the electronic control layer ECL. The second electrode CE can also be configured on the pixel PX.

[0132] A thin-film encapsulation layer (TFE) can be disposed on the light-emitting element (OLED). The TFE can be disposed on the second electrode (CE) and cover the pixel (PX). The TFE can include at least two inorganic layers and an organic layer between the inorganic layers. The inorganic layers protect the pixel (PX) from moisture and oxygen. The organic layers protect the pixel (PX) from foreign matter such as dust particles.

[0133] Alternatively, a first voltage can be applied to the first electrode AE ​​via a transistor TR, and a second voltage with a lower level than the first voltage can be applied to the second electrode CE. Holes and electrons injected into the light-emitting layer EML can recombine to form excitons, and the light-emitting element OLED emits light as the excitons transition to the ground state.

[0134] The aforementioned substrate alignment key SAK (refer to) Figure 1 The substrate alignment bond (SAK) can be formed by patterning the same material as any one of the gate electrode G, the first connection electrode CNE1, and the second connection electrode CNE2. The substrate alignment bond (SAK) can be disposed on the same layer as any one of the gate electrode G, the first connection electrode CNE1, and the second connection electrode CNE2.

[0135] Figure 8 yes Figure 3 The cross-sectional view of line I-I' shown.

[0136] Reference Figure 3 as well as Figure 8The mask MK may include a substrate layer BS, a first inorganic layer IS1, a second inorganic layer IS2, and a third inorganic layer IS3. The first inorganic layer IS1 may be disposed below the substrate layer BS. Alternatively, the second inorganic layer IS2 may be disposed on the substrate layer BS, and the third inorganic layer IS3 may be disposed on the second inorganic layer IS2. The substrate layer BS serves as a supporting substrate for disposing the first inorganic layer IS1, the second inorganic layer IS2, and the third inorganic layer IS3.

[0137] The mask opening M-OP can be defined in the second and third inorganic layers IS2, IS3 that overlap with each cell region CA. The substrate layer BS and the first inorganic layer IS1 can be configured not to overlap with each cell region CA. For example, a substrate opening B-OP overlapping with each cell region CA can be defined in each of the substrate layer BS and the first inorganic layer IS1. Therefore, the substrate layer BS and the first inorganic layer IS1 can be configured around the periphery of each cell region CA so as not to overlap with each cell region CA.

[0138] The substrate layer BS may include silicon (Si). The first and third inorganic layers IS1 and IS3 may include silicon nitride (SiN). x The second inorganic layer IS2 may include silicon oxide (SiO2). x ).

[0139] Figure 9 yes Figure 3 The cross-sectional view of line II-II' shown.

[0140] Reference Figure 3 , Figure 8 as well as Figure 9 A mask MK can be configured on the first electrostatic chuck ESC1. Alternatively, a first inorganic layer IS1 can be configured on the first electrostatic chuck ESC1, a substrate layer BS can be configured on the first inorganic layer IS1, and a second inorganic layer IS2 and a third inorganic layer IS3 can be configured on the substrate layer BS.

[0141] The mask alignment key (MAK) and the conductive pattern (CDP) can be disposed on the third inorganic layer IS3. Therefore, the mask alignment key (MAK) and the conductive pattern (CDP) can be disposed on the same layer.

[0142] The mask alignment key (MAK) and the conductive pattern (CDP) can be made of the same material. Therefore, the mask alignment key (MAK), being a paramagnetic material, can include tungsten, aluminum, or magnesium. The mask alignment key (MAK) and the conductive pattern (CDP) can be formed by simultaneously patterning the same material.

[0143] The mask MK may also include a dummy inorganic layer DIS disposed on the mask alignment key MAK and the conductive pattern CDP. The dummy inorganic layer DIS may be disposed on a third inorganic layer IS3 to cover the mask alignment key MAK and the conductive pattern CDP. When viewed in a plane, the dummy inorganic layer DIS may not overlap with the opening OP and may be configured to be adjacent to the border of the mask MK. Therefore, the dummy inorganic layer DIS may not overlap with the cell region CA.

[0144] Figures 10a to 10c This is a diagram used to provide a summary of the vapor deposition process in the vapor deposition apparatus.

[0145] For example, Figures 10a to 10c With Figure 3 The cross-sectional diagram corresponding to the section of line Ⅲ-Ⅲ' shown is illustrated. Additionally, for ease of explanation, in... Figures 10a to 10c The conductive pattern CDP, substrate alignment key SAK, and mask alignment key MAK are omitted. The omitted conductive pattern CDP, substrate alignment key SAK, and mask alignment key MAK are referenced in the original text. Figures 1 to 3 .

[0146] Reference Figures 1 to 3 as well as Figure 10a Alternatively, a voltage can be applied to the first electrode ET1 of the first electrostatic chuck ESC1, and the mask MK can be adsorbed and fixed on top of the first electrostatic chuck ESC1 by electrostatic force. Or, a voltage can be applied to the second electrode ET2 of the second electrostatic chuck ESC2, and the mother substrate MS can be adsorbed and fixed on the bottom of the second electrostatic chuck ESC2 by electrostatic force.

[0147] When viewed in a planar surface, the substrate alignment key SAK can be configured to overlap with the mask alignment key MAK, thereby aligning the mother substrate MS and the mask MK in a designated position. During the evaporation process, the substrate SUB can be flipped to allow it to be positioned... Figure 7 The transistor TR on the substrate SUB shown is in Figure 1 And in 10a, it faces downwards. Therefore, during the vapor deposition process, the substrate alignment key SAK can actually be positioned below the mother substrate MS, facing the mask alignment key MAK.

[0148] Reference Figures 1 to 3 as well as Figure 10b After the mother substrate MS and the mask MK are aligned, the second electrostatic chuck ESC2 and the mother substrate MS move downwards, so that the mother substrate MS and the mask MK come into contact.

[0149] Reference Figures 1 to 3 as well as Figure 10cThe vapor deposition apparatus DPA may include a crucible CR disposed under the second electrostatic chuck ESC2. One crucible CR is shown as an example, but in practice, multiple crucible CRs may be disposed under the second electrostatic chuck ESC2.

[0150] A nozzle NZ can be positioned above the crucible CR. The vapor-deposited material DPM can be contained within the crucible CR. Although not shown, a heat source for heating the crucible CR can be positioned within the crucible CR. Although not shown, the vapor deposition apparatus DPA can be positioned within a vacuum chamber used in the manufacturing process of the display device.

[0151] Alternatively, the crucible (CR) can be heated, and the vaporized material (DPM) can be vaporized and sprayed upwards through the nozzle (NZ). The vaporized DPM can be provided to the mother substrate (MS) through the opening (OP) and the mask opening (M-OP). The vaporized DPM may include materials for forming the light-emitting layer (EML) (see reference). Figure 7 Organic materials. The vapor-deposited material DPM can be used to form the light-emitting layer EML on the mother substrate MS.

[0152] Figure 11 It is shown Figure 10c The vapor-deposited material provides a diagram of its state on the mother substrate.

[0153] Reference Figure 11 A mask MK can be configured on the substrate SUB. The substrate SUB can be... Figure 10c The mother substrate MS is shown. For ease of illustration, the light-emitting layer EML is shown facing upwards, and a mask MK is disposed on the light-emitting layer EML. However, in reality... Figure 11 The structure shown can be obtained from the vapor deposition process. Figures 10a to 10c The flipped state. For example, it could be that the emissive layer EML faces downwards, and the mask MK is configured below the emissive layer EML.

[0154] Alternatively, a hole control layer HCL can be disposed on the first electrode AE, and a mask MK can be used to form a light-emitting layer EML on the hole control layer HCL. A vapor-deposited material DPM can be provided on the hole control layer HCL through a mask opening M-OP defined in the mask MK. The light-emitting layer EML can be formed by vapor-depositing the material DPM. Exemplarily, one light-emitting layer EML is formed on the substrate SUB, but in practice, multiple light-emitting layers EML can be formed on the substrate SUB.

[0155] Figure 12 This is a diagram illustrating the configuration of a comparative shadow mask according to a comparative embodiment.

[0156] For example, Figure 12 With Figure 9 The corresponding cross-sectional diagram is shown.

[0157] Reference Figure 12 The comparison shadow mask SMK' may not include the conductive pattern CDP (see reference). Figure 9 The other components of a shadow mask SMK can be substantially compared to those of a shadow mask SMK (see [reference]). Figure 9 )same.

[0158] Figure 13a as well as Figure 13b This is a graph showing the movement of the mask alignment key when using a comparative shadow mask in a vapor deposition process.

[0159] Figure 13a as well as Figure 13b The mask alignment key MAK shown can be... Figure 3 The left and right mask alignment keys MAK are separated by a first direction DR1.

[0160] Reference Figure 12 , Figure 13a as well as Figure 13b Black cross and Figure 10a The process states shown are correspondingly represented in the comparison of the shadow mask SMK' and the mother substrate MS (refer to...). Figure 10a In the aligned state, the position of the mask alignment key (MAK). The crosshair shown in white is... Figure 10b The process states shown correspond to the position of the mask alignment key MAK when the shadow mask SMK' and the mother substrate MS are in contact.

[0161] Reference Figure 10a , Figure 10b , Figure 12 , Figure 13a as well as Figure 13b The cross shown in white may be moved to the left or right compared to the black cross. That is, the position of the mask alignment key MAK may be different from the state where the comparison shadow mask SMK' and the mother substrate MS are aligned, and may be moved to the left or right when the comparison shadow mask SMK' and the mother substrate MS are in contact.

[0162] Compare the shadow mask SMK' excluding the conductive pattern CDP (refer to) Figure 9 Therefore, when an electrostatic force is generated in the first electrostatic chuck ESC1, the Coulomb force on the first electrostatic chuck ESC1 and the comparison shadow mask SMK' may be weak. Consequently, the attraction (or fixing force) of the first electrostatic chuck ESC1 on the comparison shadow mask SMK' may be weak.

[0163] exist Figure 10bIn such processes, when the mother substrate MS comes into contact with the comparison shadow mask SMK', a predetermined pressure can be applied to the comparison shadow mask SMK'. Due to the pressure, the position of the comparison shadow mask SMK' may deviate from the designated position. The first electrostatic chuck ESC1 has a weak adhesion force to the comparison shadow mask SMK', so the comparison shadow mask SMK' may deviate further from the designated position.

[0164] Therefore, when using the comparative shadow mask SMK', the displacement of the mask alignment key MAK may increase. In the comparative shadow mask SMK', the displacement of the mask alignment key MAK in the first direction DR1 was measured to be 7.39 micrometers (μm).

[0165] The shadow mask SMK' is significantly offset from the specified position, therefore the pixel PX (refer to...) Figure 7 EML (referencing) light-emitting layer Figure 7 It may deviate further from the designated position. As a result, a defective display panel may be formed, therefore the display device DD (refer to...) Figure 4 The yield decreased.

[0166] Figure 14a as well as Figure 14b This is a graph showing the movement state of the mask alignment key when using a shadow mask according to an embodiment of the present invention in a vapor deposition process.

[0167] Figure 14a as well as Figure 14b The mask alignment key MAK shown can be... Figure 3 The left and right mask alignment keys MAK are separated by a first direction DR1.

[0168] Reference Figure 9 , Figure 10a , Figure 14a as well as Figure 14b The black cross indicates the position of the mask alignment key MAK when the shadow mask SMK and the mother substrate MS are aligned.

[0169] Reference Figure 9 , Figure 10b , Figure 14a as well as Figure 14b The cross shown in white indicates the position of the mask alignment key MAK when the shadow mask SMK and the mother substrate MS are in contact.

[0170] Reference Figure 9 , Figure 10a , Figure 10b , Figure 14a as well as Figure 14bAccording to an embodiment of the invention, the shadow mask SMK includes a conductive pattern CDP. Therefore, when an electrostatic force is generated in the first electrostatic chuck ESC1, the Coulomb force on the first electrode ET1 of the first electrostatic chuck ESC1 and the shadow mask SMK can be strengthened. Consequently, the adsorption force (or fixing force) of the first electrostatic chuck ESC1 on the shadow mask SMK can be strengthened. As a result, the shadow mask SMK can be more firmly fixed to the first electrostatic chuck ESC1.

[0171] exist Figure 10b In this process, when the mother substrate MS comes into contact with the shadow mask SMK, a predetermined pressure can be applied to the shadow mask SMK. The first electrostatic chuck ESC1 has a strong adsorption force on the shadow mask SMK, so the shadow mask SMK will not deviate significantly from the designated position. That is, the shadow mask SMK can be further held in the designated position.

[0172] Therefore, the displacement of the mask alignment key MAK can be reduced. In the shadow mask SMK, the displacement of the mask alignment key MAK in the first direction DR1 was measured to be 0.10 micrometers (μm).

[0173] In embodiments of the present invention, even if a predetermined pressure is applied to the shadow mask SMK, the position of the shadow mask SMK may not change significantly, maintaining the specified position. Therefore, pixel PX (refer to...) Figure 7 EML (referencing) light-emitting layer Figure 7 This can be further formed in a specified location. As a result, a display panel DP (refer to...) can be formed normally. Figure 4 Therefore, the display device DD (reference) is improved. Figure 4 The yield of ).

[0174] The above description refers to embodiments; however, those skilled in the art will understand that various modifications and alterations can be made to the present invention without departing from the scope and concept of the invention as set forth in the appended claims. Furthermore, the embodiments disclosed in this invention are not intended to limit the technical concept of the invention, but should be interpreted as including all technical concepts within the scope of the appended claims and their equivalents within the scope of the present invention.

Claims

1. A vapor deposition apparatus, wherein, include: A first electrostatic chuck is defined by an opening and includes a plurality of first electrodes; The second electrostatic chuck is disposed on the first electrostatic chuck and includes the underside of the adsorption substrate; as well as A shadow mask, disposed between the first electrostatic chuck and the second electrostatic chuck, includes a mask adsorbed on the first electrostatic chuck and a plurality of conductive patterns disposed on the mask. When viewed on a plane, the conductive pattern overlaps with the first electrode.

2. The vapor deposition apparatus according to claim 1, wherein, The conductive pattern includes a paramagnetic material.

3. The vapor deposition apparatus according to claim 1, wherein, The conductive pattern includes tungsten, aluminum, or magnesium.

4. The vapor deposition apparatus according to claim 1, wherein, The shadow mask also includes a plurality of mask alignment keys configured on the mask.

5. The vapor deposition apparatus according to claim 4, wherein, The conductive pattern and the mask alignment key are configured in the same layer and comprise the same material.

6. The vapor deposition apparatus according to claim 4, wherein, The conductive pattern and the mask alignment key are formed by simultaneously patterning the same material.

7. The vapor deposition apparatus according to claim 4, wherein, The mask alignment key is positioned inside the conductive pattern.

8. The vapor deposition apparatus according to claim 4, wherein, When viewed on the plane, the conductive pattern and the mask alignment key do not overlap with the opening.

9. The vapor deposition apparatus according to claim 1, wherein, The conductive pattern is adjacent to the border of the mask.

10. The vapor deposition apparatus according to claim 1, wherein, The mask includes: basal layer; A first inorganic layer is disposed beneath the substrate layer; A second inorganic layer is disposed on the substrate layer; and The third inorganic layer is disposed on the second inorganic layer. The conductive pattern is disposed on the third inorganic layer.

11. The vapor deposition apparatus according to claim 10, wherein, The mask also includes a dummy inorganic layer disposed on the conductive pattern.

12. The vapor deposition apparatus according to claim 11, wherein, When viewed on the plane, the planar region of the mask includes multiple unit regions that overlap with the opening. Multiple mask openings are defined in each of the second inorganic layer and the third inorganic layer that overlap with the unit region.

13. The vapor deposition apparatus according to claim 12, wherein, A base opening overlapping each of the unit regions is defined in each of the base layer and each of the first inorganic layer.

14. The vapor deposition apparatus according to claim 10, wherein, The substrate layer comprises silicon, the first inorganic layer and the third inorganic layer comprise silicon nitride, and the second inorganic layer comprises silicon oxide.

15. The vapor deposition apparatus according to claim 1, wherein, The second electrostatic chuck includes a plurality of second electrodes.

16. A vapor deposition apparatus, wherein, include: A first electrostatic chuck is defined by an opening and includes a plurality of first electrodes; The second electrostatic chuck is disposed on the first electrostatic chuck and includes the underside of the adsorption substrate; as well as A shadow mask is disposed between the first electrostatic chuck and the second electrostatic chuck. The shadow mask includes: The mask is attached to the top of the first electrostatic chuck; Multiple conductive patterns are disposed on the mask; and Multiple mask alignment keys are configured on the mask. When viewed on a plane, the mask alignment key is positioned inside the conductive pattern.

17. The vapor deposition apparatus according to claim 16, wherein, When viewed on the plane, the conductive pattern overlaps with the first electrode.

18. The vapor deposition apparatus according to claim 16, wherein, The conductive pattern includes a paramagnetic material.

19. The vapor deposition apparatus according to claim 16, wherein, The conductive pattern and the mask alignment key are formed by simultaneously patterning the same material.

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