Multi-expert module cooperative intelligent agent system for pcell layout automatic generation

Abstract

The application discloses a multi-expert module cooperative intelligent agent system for automatic generation of a Pcell layout, relates to design verification or optimization of an integrated circuit layout, and comprises three expert modules, a decision module, and the like, wherein the three expert modules are trained based on a constructed sequential decision problem to obtain an expert calling sequence; the decision module is used for problem decomposition on an input problem to obtain problem analysis; a target calling sequence matched with the problem analysis is searched as a target calling sequence, and then the problem analysis is input into an expert module at a first sequence position in the target calling sequence to obtain an output result of the expert module at the first sequence position; the problem analysis and the output result of the expert module at a previous sequence position in the calling sequence are taken as inputs of an expert module at a next sequence position, and finally process information corresponding to the input problem is obtained. The application improves the development efficiency of the Pcell layout, realizes fast migration of an existing process layout to a new process, and significantly shortens the research and development cycle.

Description

Technical Field

[0001] This invention relates to the design verification or optimization of integrated circuit layouts, and more specifically, to a multi-expert module collaborative intelligent agent system for the automatic generation of Pcell layouts. Background Technology

[0002] In the current Pcell layout design process, key information such as the required process layer, DRC (Design Rule Check), and LVS (Layout and Schematic Consistency Check) constraints must be extracted based on the design rules in the PDK (Process Design Kit) file provided by the foundry. This information collectively constitutes the core constraints of the Pcell layout design, directly determining the compliance and reliability of the layout. However, both the information extraction from the design rule file and the entire "layout code design-verification-iterative modification" process are time-consuming, labor-intensive, and prone to errors. More importantly, when the process technology iterates, the completed layout needs to be updated by extracting the new process information, and in some scenarios, a complete code refactoring is even necessary, severely impacting development efficiency. Summary of the Invention

[0003] The technical problem to be solved by this invention is to address the shortcomings of existing technologies by providing a multi-expert module collaborative intelligent agent system for automatic generation of Pcell layouts. This system aims to improve the development efficiency of Pcell layouts and enable rapid migration of existing process layouts to new processes, thereby significantly shortening the R&D cycle.

[0004] The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation described in this invention includes:

[0005] Three expert modules are defined: a semiconductor expert module, a layout expert module, and a Cadence SKILL expert module. A sequential decision problem is constructed, and the three expert modules are trained based on the sequential decision problem to obtain the expert invocation order corresponding to the sequential decision problem. The decision module is used to decompose the user-inputted problem to obtain a problem parsing that matches the data type of the sequential decision problem; based on the problem parsing, it finds the matching expert calling order as the target calling order, and then inputs the problem parsing into the expert module in the first position of the target calling order to obtain the output result of the expert module in the first position; then, it uses the problem parsing and the output result of the expert module in the previous position of the calling order as the input of the expert module in the next position, and finally obtains the process information corresponding to the input problem.

[0006] By sequentially calling three expert models, the system is able to accurately extract corresponding process information from design rule files of different processes. At the same time, based on the extracted new information, it can complete the cross-process migration of the original process Pcell layout code or directly generate a brand new Pcell layout code.

[0007] Preferably, when the decision module decomposes the input question input by the user, it also determines whether to enable the RAG retrieval of the expert module based on the input question.

[0008] Preferably, when the decision module decomposes the input question input by the user, it generates a special token corresponding to each expert module one by one based on the input question; when the special token is input into the corresponding expert module, the feature token is compared with the preset target token, and if the comparison result is consistent, the RAG retrieval of the current expert module is started.

[0009] Preferably, when the RAG retrieval is enabled, content matching the problem analysis is retrieved from the knowledge base, and the retrieved content is integrated with the problem analysis as input for the next expert module.

[0010] Preferably, the training method for training the three expert modules based on the sequential decision problem is as follows: Knowledge data is sampled from the dataset of the expert module, and a lightweight model is trained based on the large language model. The sequential decision problem is input into the teacher model, and the teacher model is used as a guiding model to perform data distillation on the lightweight model to guide the lightweight model to map to the teacher model, so that the knowledge data in the lightweight model is aligned with the sequential decision problem in the teacher model, and the expert calling order is obtained.

[0011] Preferably, the expert module is constructed as follows: Collect knowledge content that is consistent with the data type required by the expert module to be constructed as a pre-training database for the base big language model. Input the knowledge content in the pre-training database into the base big language model for pre-training, and fine-tune the parameters of the pre-trained base big language model based on the LoRA method. An instruction database containing instruction-output instruction data is constructed. The instruction-output instruction data in the instruction database is used to perform instruction-supervised fine-tuning on the base large language model that has completed parameter fine-tuning, so as to obtain the instruction code large language model.

[0012] Preferably, if the expert module to be constructed contains downstream EDA vertical domain tasks, the knowledge content is input into the base large language model for continuous pre-training.

[0013] Preferably, a preference database containing human preference data is constructed, and the human preference data in the preference database is used to optimize the instruction-supervised fine-tuned base language model through a reinforcement learning-based human preference alignment mechanism. The optimized base language model is then used as the instruction code language model.

[0014] Beneficial effects The advantages of this invention are: (1) By leveraging a large language model, the Cadence SKILL code can be automatically generated, significantly reducing the time cost and manpower investment in Pcell layout design and breaking through the efficiency bottleneck of traditional manual coding.

[0015] (2) By subdividing the Pcell problem, different agents can complete a phase of work, which is more in line with human thinking about layout design. Through the agent system, each model is responsible for its own professional part.

[0016] (3) The Pcell design task is broken down into smaller parts, with different agents undertaking different phases of work. This model is highly consistent with the hierarchical thinking logic of human landscape design, allowing each agent to focus on its own area of ​​expertise, achieving division of labor, collaboration, and efficient execution.

[0017] (4) Compared with traditional template-based design methods, the intelligent agent system has greater flexibility. By optimizing the prompt word engineering, it can accurately generate various customized layouts, breaking through the inherent design limitations of templates. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the multi-expert module collaborative intelligent agent system structure of the present invention; Figure 2 This is a schematic diagram of the LoRA fine-tuning process of the present invention; Figure 3 This is a schematic diagram of the expert module construction process of the present invention. Detailed Implementation

[0019] The present invention will be further described below with reference to embodiments, but this does not constitute any limitation on the present invention. Any limited modifications made by any person within the scope of the claims of the present invention are still within the scope of the claims of the present invention.

[0020] In Pcell layout design, the generated code must not only conform to the specifications of each metal layer defined in the design rules of the PDK file, but also strictly adhere to the constraints of DRC (Design Rule Check) and LVS (Layout and Circuit Consistency Check) under different processes. To address this scenario where constraints are complex and dynamically change with process documents, this invention proposes a multi-expert module collaborative intelligent agent system for automatic Pcell layout generation.

[0021] This system is divided into four core modules based on professional technical directions: a decision-making module, a semiconductor expert module, an integrated circuit-based layout expert module, and a Cadence SKILL expert module. The decision-making module is responsible for parsing user requirements and breaking down tasks, dynamically determining the subsequent call sequence of each expert module based on the judgment result of the input question. To address the problem of efficient parsing of different process documents, the system introduces the RAG (Retrieval Enhanced Generation) method; simultaneously, addressing the limitations of existing RAG in process document processing (such as redundant overhead caused by unlimited search), a "self-thinking" mechanism is adopted to dynamically determine whether to enable RAG search. This design reduces unnecessary overhead, meaning the model does not perform a search for every query, while maintaining the system's flexibility and adaptability.

[0022] This system enables efficient migration of Pcell layout code between different process nodes. For its core process, please refer to [link / reference needed]. Figure 1 First, the input question is passed to the decision module for problem decomposition. The decision module considers whether the question requires enabling RAG retrieval in subsequent expert modules and generates a special token for this purpose. This token determines whether subsequent expert modules enable RAG retrieval, and this column contains the tokens for each subsequent model; these tokens are distinct. Specifically, when the special token is input into the corresponding expert module, the feature token is compared with a preset target token. If the comparison matches, the RAG retrieval for the current expert module is initiated. Simultaneously, the matching expert module call order is determined based on the question's parsing.

[0023] Specifically, for example, if the question is "Please use Cadence SKILL to generate code for the selection sort algorithm," RAG will not be enabled because it doesn't require retrieving any knowledge. However, if the question is "What is the purpose of the list function in Cadence SKILL?", since this is a Cadence SKILL knowledge query question, RAG will be enabled only for the Cadence SKILL expert, not for the other two experts. Similarly, if the question is "Generating via code based on XXX process," the layout expert will enable RAG to search for the corresponding process's design rules and find the design rules for the corresponding layer. In summary, this system determines whether RAG is enabled based on the type and content of the question.

[0024] Furthermore, the expert call order is derived from training based on given sequential decision problems. To clarify the call order of the three modules, we additionally sampled data from the existing expert module database in the semiconductor, layout, and CadenceSKILL domains. Based on a large language model, we trained a smaller, lightweight model as the "decision center." Simultaneously, we constructed some sequential decision problems to input into the teacher model, which served as a guide model for data distillation of the lightweight model. This guided the lightweight model to map to the teacher model, aligning the knowledge data in the lightweight model with the sequential decision problems in the teacher model, thereby improving its decision-making ability. In actual system operation, it is only necessary to match the corresponding scheduling order according to the relevant problems.

[0025] For example, when a user inputs: "Generate a diode Pcell Cadence SKILL code based on SMIC.18 ​​process," the decision model will break the problem down into: 1. Supplementing semiconductor knowledge of diodes and their construction; 2. Searching the design files for the given process to find the DRC rules between the layers required for the diode; 3. Generating layout code based on the integrated supplementary information. The generated special token is:<Semiconductor_RAG_OFF> ,<Layout_RAG_ON> ,<Cadence_SKILL_RAG_OFF> Assume the scheduling order matched based on the above questions is: Semiconductor Expert Module - Layout Expert Module - Cadence SKILL Expert Module. In this case, the special token and question will first be given to the Semiconductor Expert Module, which will decide whether to enable RAG retrieval based on its special token. For example, the input to the Semiconductor Expert Module might be: "You are a semiconductor expert, and the current user requirement is 'Generate a diode Pcell Cadence SKILL code based on SMIC.18 ​​process. Please supplement the question with relevant semiconductor knowledge if it mentions semiconductor devices; otherwise, please answer 'none'." Since the question does not require retrieving relevant knowledge, RAG is not enabled, and the Semiconductor Expert can then answer the relevant information. After receiving the answer from the Semiconductor Expert Module, the decision module will wake up the Layout Expert Module and send the integrated input to the Layout Expert: "You are a layout expert, and the current user requirement is: Generate a diode Pcell Cadence SKILL code based on SMIC.18 ​​process," with supplementary information as: "(Semiconductor expert's reply): Please search the design files of the given process based on the requirements and supplementary information to generate the required layer's DRC constraints." Because the question requires retrieving relevant knowledge—specifically, the token indicates a need for RAG to retrieve the corresponding process—the layout expert module retrieves the DRC constraint rules for the required layer, answers based on the retrieved information, and returns it to the decision model. The decision model then activates the Cadence SKILL expert module, inputting the integrated answers from the first two modules: "You are a Cadence SKILL expert. Your current user requirement is: Based on the SMIC.18 ​​process, generate a diode Pcell Cadence SKILL code. Supplementary information includes: (Semiconductor expert's response) (DRC rules supplemented by the layout expert)." The Cadence SKILL expert module provides a final answer based on its specific token and the question, then returns the final result: the process information.

[0026] In the traditional Pcell layout code development process, developers need to manually extract key information from design rule files in the early stages; and when the process changes, the original code still needs to be manually modified—this not only increases the complexity of code maintenance, but also may lead to the risk of code refactoring when personnel change. To address these pain points, using Large Language Models (LLMs) for code generation and maintenance has significant advantages: their powerful text generation capabilities have been validated in multiple tasks. However, it should be noted that existing open-source large language models are mostly trained on massive amounts of collected text, essentially multi-task mapping functions adapted to multi-source biased data inputs. This makes them perform well in general tasks, but still insufficient in specialized vertical domains. This necessitates targeted fine-tuning of open-source pre-trained large models to give them the core capabilities to adapt to specialized vertical domain tasks. Specifically, in the Pcell layout design scenario, the fine-tuning process needs to incorporate knowledge from vertical domains such as semiconductor process rules, integrated circuit layout design specifications, and Cadence SKILL language features. This allows the model to accurately capture the core logic of professional tasks such as PDK file parsing, DRC / LVS constraint adaptation, and cross-process code migration, thereby truly meeting the technical needs in actual development.

[0027] To build a system that meets our requirements, we conducted large-scale data collection in three areas: semiconductor physics, integrated circuit layout, and Cadence SKILL. Data sources included professional books, forum discussions, technical manuals, and script code. Considering the potential model degradation issues that might result from fine-tuning across multiple vertical domains, and the computational limitations of edge deployments, we did not use ultra-large parameter models. Instead, we selected three medium-sized open-source pre-trained models as the base large language models (or the same base large language model could be fine-tuned in three directions), specializing in semiconductor physics, integrated circuit layout, and Cadence SKILL code, respectively.

[0028] In the practice of fine-tuning large models to fit vertical domains, common methods include full-parameter fine-tuning (updating all parameters, fitting the task but requiring high resources), frozen fine-tuning (fixing the bottom-level parameters and only adjusting the top-level parameters, with low resource consumption but limited adaptability), prefix fine-tuning (adding learnable prefix vectors, suitable for generation tasks but dependent on prefix design), cue fine-tuning (guiding output through cue words, with high parameter efficiency but weaker performance on complex tasks), and low-rank adaptation (LoRA). Among these, LoRA, as the mainstream solution for efficient parameter fine-tuning, has significant advantages: its parameter efficiency is extremely high, learning weight increments only through low-rank matrix factorization, with the added parameters typically being 0.1%-1% of the original model, significantly reducing resource requirements; it has strong training stability, freezing the original model weights can avoid "catastrophic forgetting," reducing the risk of overfitting, and adapting to small-sample vertical domains; it is flexible in deployment, after training, the low-rank matrix increments can be merged with the original weights, the inference efficiency is consistent with the original model, and it supports dynamic switching between multiple tasks; at the same time, it has wide adaptability, with significant effects on fine-tuning the Transformer attention layer, and can also be combined with other methods to improve performance. The core of LoRA is to restrict the updates of weights in a high-dimensional space to a low-rank subspace, thus affecting the weight matrix in the pre-trained model. Assuming its update volume It can be decomposed into a low-rank matrix. and product During training, only the weights are updated, and the forward propagation is... ; after training, merge into This approach reduces parameter size while retaining task adaptability, making it suitable for efficient fine-tuning on small datasets in vertical domains. In practice, we conduct low-code LoRA fine-tuning based on the mature Llama Factory framework. This choice not only significantly reduces development difficulty but also effectively lowers the barriers to technology use, making the fine-tuning process easier to implement in specific scenarios. A diagram illustrating LoRA fine-tuning is shown below. Figure 2 As shown.

[0029] Taking the Cadence SKILL expert module as an example, its construction method is as follows: like Figure 3 As shown, Figure 3Phases ① and ② belong to the pre-training phase. Phase ① primarily involves pre-training the base large language model based on a pre-training database, injecting Cadence SKILL language knowledge, and enabling the model to initially understand the language. The continuous pre-training in Phase ② is simply a different name for the pre-training in Phase ①. Because the large language model may not possess the basic knowledge required for downstream EDA vertical domain tasks, injecting domain knowledge through self-supervised training of the large language model on unlabeled text is called continuous pre-training. After continuous pre-training, the large language model understands the basic knowledge of downstream tasks, but it doesn't apply it immediately; therefore, SFT fine-tuning is required next.

[0030] More specifically, for downstream EDA vertical domain tasks, continuous pre-training is a crucial prerequisite: the large-scale language model used in this invention is not a fully-fledged large-scale parameter model (such as DeepSeek671B, approximately 671 billion parameters), but rather a small-parameter open-source model (only 32B, approximately 32 billion parameters) distilled from such large models. While the distillation process can reduce model deployment costs, it causes the open-source small model to lose some world knowledge, especially lacking vertical domain expertise such as Cadence SKILL language and EDA process design. Therefore, it is necessary to conduct continuous pre-training using "vertical domain unlabeled text (such as the SKILL language open-source code library and EDA technical documentation)" to bring the distilled small model close to the level of a fully-fledged large-scale parameter model in terms of Cadence SKILL language understanding and EDA domain knowledge reserves. This requires us to organize professional manuals, books, web pages, and other knowledge related to Cadence SKILL to form a pre-training database. Next, the organized knowledge is input into the base large language model for continuous pre-training. Then, based on the Hugging Face Transformer ecosystem or mature frameworks (such as Llama Factory), the LoRA method is used to fine-tune the parameters of the base large language model.

[0031] For example, in the hugging face Transformer ecosystem, you only need to load the official package and configure the parameters to complete the training. A simple example code is shown below: from transformers import LoraConfig, get_linear_schedule_with_warmup from peft import prepare_model_for_int8_training, LoraModel # Configure LoRA parameters lora_config = LoraConfig( r=16, lora_alpha=32, target_modules=["query_key_value"], lora_dropout=0.1, bias="none", task_type="SEQ_2_SEQ_LM" ) # Initialize the model and inject LoRA model = AutoModelForSeq2SeqLM.from_pretrained("facebook / opt-350m") model = prepare_model_for_int8_training(model) model = LoraModel(model, lora_config) # Trainer configuration (requires a custom DataCollator) trainer = Trainer( model=model, # ...Other parameters are the same as before With the mature Llama Factory training framework, you only need to configure the dataset and various training parameters in the corresponding configuration file, and then you can start training by running the specified file without writing any code.

[0032] Phase ③ is the post-training phase. In this phase, the pre-trained base language model undergoes supervised instruction fine-tuning (SFT). This mainly involves combining Cadence SKILL-related instruction data from the instruction database to teach the model how to generate Cadence SKILL code logic that meets the requirements based on specific instructions.

[0033] If continuing pre-training is about injecting world knowledge into the model, then SFT is the key to aligning the model with human question-and-answer patterns. In the SFT stage, we need to create an instruction database containing instruction-output data. Common instruction data formats are Alpaca and OpenAI; here we use Alpaca, i.e., {instruction:'', input:'', output:''}. In this format, the instruction defines the core task type, clearly defining the specific operation the model needs to perform, focusing on the engineering goal of "what to do," such as "Please generate Cadence SKILL code to check if the parameter list of the SMIC.18 ​​process diode Pcell contains the minimum width parameter (0.2μm) that meets the DRC requirements." The input supplements some descriptions needed for the task, such as "The diode Pcell parameter list is [W=0.15, L=0.3, spacing=0.3, layer=12], and SMIC.18 ​​DRC requires the diode's minimum width to be ≥0.2μm." The output serves as the "standard answer" for model learning, i.e., the Cadence SKILL code needed based on the instruction and input. Therefore, in this stage, a dataset is constructed based on the collected Cadence SKILL code. The dataset of this invention is based on compliant Cadence SKILL code collected from scenarios such as Pcell generation, process constraint verification, and layout rule adaptation. "Instruction-input-output" alignment is completed through manual annotation, thereby constructing an instruction database containing instruction-output instruction data. Then, the base language model output from the previous stage is fine-tuned using SFT. The SFT-tuned base language model is the instruction code language model.

[0034] Phase ④ is also a post-training phase, and it is optional. It primarily utilizes reinforcement learning-based human preference alignment mechanisms (such as RLHF) to further optimize the model's generated results by leveraging human preference data from a preference database regarding Cadence SKILL code quality, style, and other aspects. This makes the model more aligned with engineers' actual needs in terms of functional correctness and readability.

[0035] RLHF (Reinforcement Learning Highlighting) is a method that combines reinforcement learning and human feedback, enabling AI-generated results to not only be accurate but also align with human expectations and values. Built upon reinforcement learning, RLHF allows machine learning agents to learn optimal behavior through interaction with their environment. In this process, the agent receives rewards or penalties based on its actions. In many cases, directly defining a clear and comprehensive reward function for complex tasks is difficult. RLHF addresses this by introducing human feedback to assist in defining the reward function or as a direct reward signal. This feedback can be labeled examples, behavior scores, or direct corrections to the agent's output.

[0036] In this invention, the human preference data for RLHF adopts a structured format of "input-candidate output-preference annotation": {instruction:'',input:'',candidate_outputs:[],preferred_index:''}, where: instruction and input follow the task definition and constraint supplementation of the SFT stage (such as "generate SMIC.18 ​​diode PcellSKILL code" and corresponding process parameters); candidate_outputs contains 2-3 different versions of SKILL code generated by the model (such as "version 1: only satisfies syntax correctness", "version 2: satisfies syntax + DRC constraint", "version 3: satisfies syntax + DRC constraint + clear comments"); preferred_index is the optimal output index annotated by human engineers (such as 2 or 3), based on the core criteria of code functional correctness, process compliance, readability, and engineering reusability.

[0037] After the training phase described above, the instruction code large language model can receive inference task descriptions (such as "generate a SKILL script for automatic map annotation in Cadence Virtuoso"), generate corresponding source code, and evaluate its performance and accuracy through benchmark testing, ultimately achieving efficient assistance for Cadence SKILL development tasks. It should be noted that in this invention, the fine-tuning of the base large language model using LoRA and SFT techniques are commonly used fine-tuning techniques in large language models; therefore, this paper does not delve further into the specific fine-tuning process.

[0038] The fine-tuning process for the remaining two expert modules is the same as described above, except that the datasets corresponding to the different models are different.

[0039] Previous research in this field on Cadence SKILL's generation of Pcell layouts is extremely limited. According to publicly available information, Sobhana Tayenjam et al. [1]A method for designing helical inductors using Cadence SKILL scripts is proposed to automate the layout generation of helical inductors. This method supports the design of various helical inductor structures, including square, hexagonal, and octagonal shapes, and can reduce manual layout creation time through parametric configuration. (Abhishek K et al.) [2] To address the design challenge of achieving high quality factor and small area for spiral inductors at high frequencies, SKILL coding was employed to automatically generate the on-chip spiral inductor layout. Two types of spiral inductors were designed: one with equal width and spacing, and the other with unequal width and spacing. Electromagnetic simulation was performed using ANSYS HFSS. However, existing technologies can only achieve this under the same manufacturing process.

[0040] Compared to the studies mentioned above, the method proposed in this invention is more flexible, capable of designing P-cell layout code conforming to different process requirements under appropriate prompts. Furthermore, the system of this invention has been successfully verified to achieve automatic migration from the standard cell library layout of 180nm process to that of 55nm process. During the algorithm design process, key placement and routing parameters such as design rules are fully considered. For transistor networks adapting to different process nodes, the algorithm allows device characteristics (such as channel length and transistor width) and design rules (including linewidth, gate pitch, overlap distance, etc.) to be set as adjustable parameters. Thus, when facing process node changes, only appropriate adjustments to these parameters are needed to achieve cross-process migration and adaptation.

[0041] References: [1] Tayenjam S, Vanukuru VNR, Kumaravel S. A PCell DesignMethodology for Automatic Layout Generation of Spiral Inductor using SKILLScript[C]. International Conference on Microelectronic Devices, Circuits andSystems (ICMDCS), 2017: 1-4. [2] Abhishek K, Harini K, Rachana B, Sobhana T, Dhanabal R. Design and Analysis of On-Chip Spiral Inductors Using Automatic Generated Layoutsthrough SKILL Code[C]. IEEE ICECCOT, 2018, DOI: 10.1109 / ICECCOT43722.2018.9001536. The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of the present invention, and these will not affect the effectiveness of the implementation of the present invention or the practicality of the patent.

Claims

1. A multi-expert module collaborative intelligent agent system for automatic generation of Pcell layouts, characterized in that, include: There are three expert modules: Semiconductor Expert Module, Layout Expert Module, and Cadence SKILL Expert Module. Construct a sequential decision problem, and train the three expert modules based on the sequential decision problem to obtain the expert invocation order corresponding to the sequential decision problem; The decision module is used to decompose the user-inputted problem to obtain a problem parsing that matches the data type of the sequential decision problem; based on the problem parsing, it finds the matching expert calling order as the target calling order, and then inputs the problem parsing into the expert module in the first position of the target calling order to obtain the output result of the expert module in the first position; then, it uses the problem parsing and the output result of the expert module in the previous position of the calling order as the input of the expert module in the next position, and finally obtains the process information corresponding to the input problem.

2. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 1, characterized in that, When the decision module breaks down the input question from the user, it also determines whether to enable the RAG retrieval of the expert module based on the input question.

3. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 2, characterized in that, When the decision-making module decomposes the input question from the user, it generates a special token that corresponds one-to-one with each expert module based on the input question. When the special token is input into the corresponding expert module, the feature token is compared with the preset target token. If the comparison result is consistent, the RAG search of the current expert module is started.

4. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 3, characterized in that, Once the RAG retrieval is enabled, content matching the problem analysis is retrieved from the knowledge base, and the retrieved content is integrated with the problem analysis as input for the next expert module.

5. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 1, characterized in that, The specific training method for training the three expert modules based on the sequential decision problem is as follows: Knowledge data is sampled from the dataset of the expert module, and a lightweight model is trained based on the large language model. The sequential decision problem is input into the teacher model, and the teacher model is used as a guiding model to perform data distillation on the lightweight model to guide the lightweight model to map to the teacher model, so that the knowledge data in the lightweight model is aligned with the sequential decision problem in the teacher model, and the expert calling order is obtained.

6. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 1, characterized in that, The expert module is constructed as follows: Collect knowledge content that is consistent with the data type required by the expert module to be constructed as a pre-training database for the base big language model. Input the knowledge content in the pre-training database into the base big language model for pre-training, and fine-tune the parameters of the pre-trained base big language model based on the LoRA method. An instruction database containing instruction-output instruction data is constructed. The instruction-output instruction data in the instruction database is used to perform instruction-supervised fine-tuning on the base large language model that has completed parameter fine-tuning, so as to obtain the instruction code large language model.

7. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 6, characterized in that, If the expert module to be constructed contains downstream EDA vertical domain tasks, then the knowledge content is input into the base large language model for continuous pre-training.

8. The multi-expert module collaborative intelligent agent system for automatic Pcell layout generation according to claim 6, characterized in that, A preference database containing human preference data is constructed. Through a reinforcement learning-based human preference alignment mechanism, the human preference data in the preference database is used to optimize the instruction-supervised fine-tuned base language model. The optimized base language model is then used as the instruction code language model.

Images