Electronic device

Abstract

An electronic device is disclosed. The electronic device includes a first conductive plate, a plurality of first electronic components, and a plurality of second electronic components. The plurality of first electronic components are disposed on the first conductive plate and electrically connected in parallel. The plurality of second electronic components are disposed on the first conductive plate and electrically connected in parallel. The first electronic components and the second electronic components are electrically connected in series.

Description

Technical Field

[0001] This disclosure relates to an electronic device, and more particularly, to an electronic device comprising a power transistor. Background Technology

[0002] As the power output from the power module increases to meet higher charging rates, heat dissipation becomes increasingly challenging. Summary of the Invention

[0003] In some embodiments, an electronic device includes a first conductive plate, a plurality of first electronic components, and a plurality of second electronic components. The plurality of first electronic components are disposed on the first conductive plate and electrically connected in parallel. The plurality of second electronic components are disposed on the first conductive plate and electrically connected in parallel. The first electronic components and the second electronic components are electrically connected in series.

[0004] In some embodiments, an electronic device includes a first conductive plate, a first electronic component, a second electronic component, and a connection structure. The first electronic component is disposed on the first conductive plate. The second electronic component is disposed on the first conductive plate. The connection structure is configured to buffer stress applied to the second electronic component and to connect the first electronic component in series with the second electronic component.

[0005] In some embodiments, an electronic device includes a bottom conductive plate, a top conductive plate, and a protective layer. The bottom conductive plate supports a plurality of electronic components. The top conductive plate is disposed above the bottom conductive plate. The top conductive plate, the bottom conductive plate, and the electronic components together form a power inverter. The protective layer encapsulates the bottom conductive plate and the top conductive plate. The upper surface of the protective layer and the upper surface of the top conductive plate are substantially coplanar. Attached Figure Description

[0006] Various aspects of some embodiments of this disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various structures may not be drawn to scale, and the dimensions of the various structures may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1 This is a three-dimensional (3D) view of an exemplary electronic device according to some embodiments of the present disclosure.

[0008] Figure 2 This is an exploded view of an exemplary electronic device according to some embodiments of the present disclosure.

[0009] Figure 3 This is a 3D perspective view of a portion of an exemplary electronic device according to some embodiments of the present disclosure.

[0010] Figure 4 It is along Figure 1 A cross-sectional view of line A-A'.

[0011] Figure 5 It is along Figure 1 A cross-sectional view of line B-B' in the diagram.

[0012] Figure 6 This is a top view of an exemplary conductive plate of an electronic device according to some embodiments of the present disclosure.

[0013] Figure 7 This is a top view of an exemplary conductive plate of an electronic device according to some embodiments of the present disclosure.

[0014] Figure 8 This is a top view of an exemplary conductive plate of an electronic device according to some embodiments of the present disclosure.

[0015] Figure 9 This is a top perspective view of an exemplary electronic device according to some embodiments of the present disclosure.

[0016] Figure 10 This is a circuit diagram of an exemplary electronic device according to some embodiments of the present disclosure.

[0017] Figure 11A , 11B 11C and 11D illustrate one or more stages of an exemplary method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0018] Figure 12 This is a 3D view of an exemplary electronic device according to some embodiments of the present disclosure.

[0019] Figure 13 This is an exploded view of an exemplary electronic device according to some embodiments of the present disclosure.

[0020] Figure 14 This is a circuit diagram of an exemplary electronic device according to some embodiments of the present disclosure. Detailed Implementation

[0021] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar components. Embodiments of this disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

[0022] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of this disclosure. Of course, these components and arrangements are merely examples and are not intended to be limiting. For example, in the following description, embodiments in which a first feature is formed on or over a second feature may include instances where the first and second features are formed or disposed in direct contact, and embodiments in which additional features may be formed or disposed between the first and second features such that the first and second features do not directly contact each other. Additionally, reference numerals and / or letters may be repeated in various instances in this disclosure. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0023] This disclosure provides an electronic device (or power module) capable of maintaining high voltage (e.g., above 800V). The electronic device includes a bottom conductive plate, a top conductive plate, and multiple electronic components (e.g., power dies) disposed on the bottom conductive plate. A protective layer may be formed to encapsulate the electronic components, the bottom conductive plate, and the top conductive plate. During the formation of the protective layer, stress may be applied to the electronic components via the top conductive plate, potentially degrading the characteristics of the electronic components. A connection structure is provided between the electronic components (or the bottom conductive plate) and the top conductive plate. The connection structure may include multiple stress buffers having clips or serrated profiles. The connection structure is configured to deform, for example, during a process of forming a molding material, to mitigate stress from the top conductive plate to the electronic components. The connection structure buffers stress and thus protects the characteristics of the electronic components from the effects of stress, thereby improving yield.

[0024] Furthermore, the connection structure can be configured to connect a first group of electronic components in series to a second group of electronic components. The first group of electronic components is connected in parallel; and the second group of electronic components is also connected in parallel. The first and second groups are positioned on separate sections of the bottom conductive plate. These groups are self-connected in parallel and are respectively arranged on separate sections of the bottom conductive plate. Therefore, the risk of electronic device malfunction can be reduced.

[0025] Furthermore, compared to another electronic device that dissipates power primarily horizontally through bonding lines, the power dissipation path (or power transmission path) established in the electronic device is relatively short. This reduces power loss. It also reduces the effective resistance between the conductive plate and the electronic component compared to spacers that require more soldering process steps.

[0026] Furthermore, compared to another electronic device with multiple upright spacers, the electronic device of this disclosure with its connecting structure requires fewer manufacturing steps. Specifically, the number of welding process steps can be minimized. Due to the relatively fewer process steps, deviations during the manufacture of the electronic device can be reduced. Moreover, the stress buffers of the connecting structure can be flexible, thereby allowing them to deform. Deviations accumulated during manufacturing (e.g., in the Z direction) and / or thickness differences of electronic components can be compensated for by deformation of the connecting structure.

[0027] Because of the reduced tolerances (e.g., less than 100 μm), electronic devices become compatible with standard molding processes, leading to lower costs. The protective layer formed through the molding process protects electronic components from any contaminants, thus improving device reliability. Furthermore, the protective layer limits solder reflow during high-temperature operation, reducing the risk of short circuits.

[0028] Furthermore, the bottom and top conductive plates are connected to the bottom and top heat dissipation structures, respectively. Heat generated in the electronic device can be dissipated bidirectionally and vertically. The connection structure is attached to the top conductive plate, rather than being formed by stamping the top conductive plate. The bottom and top conductive plates can have relatively large areas to rapidly dissipate heat generated from the electronic components to the top and bottom heat dissipation structures. Due to the improved heat dissipation, the electronic device does not require sintering silver (Ag).

[0029] In some cases, the top conductive plate may have multiple openings formed by a stamping process, and molding material can overflow through the openings and then cover the top surface of the top conductive plate. In this disclosure, the top conductive plate has a substantially rectangular shape (or no openings) in a top view, and the overflow of molding material can be blocked by the top conductive plate. There is no molding material on the top conductive plate, thus improving heat dissipation.

[0030] Figure 1 This is a 3D view of an exemplary electronic device (or power module) 100 according to some embodiments of the present disclosure. The electronic device 100 may include conductive plates (or layers) 11, 12 and 13, a protective layer (or encapsulation layer, encapsulant) 2, a plurality of electronic components (or units) 4, a thermistor 5, a first heat dissipation structure 7 and a second heat dissipation structure 8.

[0031] like Figure 1As shown, conductive plate (or middle conductive plate) 12 may be disposed above conductive plate (or bottom conductive plate) 11. Conductive plate (or top conductive plate) 13 may be disposed above conductive plate 12 and / or conductive plate 11. Conductive plates 11, 12, and 13 may be stacked. Conductive plates 11, 12, and 13 may be at different heights. In the XZ plane, the area of ​​conductive plate 11 may be larger than the area of ​​conductive plate 13. In the XZ plane, the area of ​​conductive plate 13 may be larger than the area of ​​conductive plate 12.

[0032] like Figure 1 The protective layer 2 of the electronic device 100 described herein can be shown with dashed lines. The protective layer 2 may be transparent or opaque. For illustrative purposes, it may be shown with dashed lines. Figure 1 The component encapsulated by protective layer 2 is observed. Protective layer 2 may cover or encapsulate conductive plates 11, 12, and / or 13. Protective layer 2 may cover at least one edge of conductive plate 11. Protective layer 2 may cover at least one edge of conductive plate 12. Protective layer 2 may cover at least one edge of conductive plate 13. From a top view, protective layer 2 may protrude from the edges of the first heat dissipation structure 7 and / or the second heat dissipation structure 8.

[0033] In some embodiments, the protective layer 2 may be formed by a molding process to cover or encapsulate the conductive plates 11, 12 and / or 13. In the molding process, a mold (or the head of a tool) may contact the conductive plates 11 and 13, and molding material may flow into the space between the conductive plates 11 and 13.

[0034] In some embodiments, conductive plate 11, conductive plate 12 and conductive plate 13 may each contain a conductive material, such as copper (Cu), tin (Sn), aluminum (Al), gold (Au), silver (Ag), tungsten (W), nickel (Ni), iron (Fe) or other suitable materials.

[0035] In some embodiments, the protective layer 2 may be cuboid, cylindrical, or the like. The protective layer 2 may be electrically isolated. The protective layer 2 may contain encapsulants, such as epoxy resin, molding materials (e.g., epoxy molding materials or other molding materials), polyimide, phenolic compounds or materials, materials containing silicone resin dispersed therein, or combinations thereof.

[0036] The conductive plate 11 may have terminals 11t1, 11t2, 11t3, and 11t4 exposed by the protective layer 2. Terminals 11t1, 11t2, 11t3, and 11t4 may protrude from the same edge of the protective layer 2. Terminals 11t2, 11t3, and 11t4 may protrude from the main body portion of the conductive plate 11. Terminal 11t1 may be spaced apart from the main body portion of the conductive plate 11. Terminals 11t2, 11t3, and 11t4 may have pinholes configured to secure the conductive plate 11 to an external carrier. The extending directions of terminals 11t1, 11t2, 11t3, and 11t4 may be orthogonal to the extending directions of the heat dissipation fins of the first heat dissipation structure 7.

[0037] The conductive plate 11 may include portions (or traces) 11g1 and 11g2 spaced apart from the main body of the conductive plate 11. Portions 11g1 and 11g2 may extend along opposite edges of the conductive plate 11. Portions 11g1 and 11g2 may be partially exposed by the protective layer 2. Portions 11g1 and 11g2 may each include two opposite ends exposed by (or extending beyond) the protective layer 2. In other words, portions 11g1 and 11g2 may be partially enclosed or covered by the protective layer 2. The extending direction of portions 11g1 and 11g2 may be orthogonal to the extending direction of the heat dissipation fins of the first heat dissipation structure 7.

[0038] The conductive plate 11 may include terminals 11e1, 11e2, 11n1, 11n2, 11r1, and 11r2 exposed by the protective layer 2. Terminals 11e1, 11e2, 11n1, 11n2, 11r1, and 11r2 may protrude from the same edge of the protective layer 2. Terminals 11r1 and 11r2 may protrude from the main body portion of the conductive plate 11. Terminals 11e1, 11e2, 11n1, and 11n2 may be spaced apart from the main body portion of the conductive plate 11. The extending directions of terminals 11e1, 11e2, 11n1, 11n2, 11r1, and 11r2 may be orthogonal to the extending direction of the heat dissipation fins of the first heat dissipation structure 7.

[0039] A first heat dissipation structure 7 may be disposed below the conductive plate 11. The first heat dissipation structure 7 may be in contact with the conductive plate 11. The first heat dissipation structure 7 may include a heat sink, such as heat dissipation fins, cooling channels, or a heat dissipation plate. In some embodiments, the first heat dissipation structure 7 may be connected to an external liquid cooling system (e.g., a liquid cooling line in a vehicle) to dissipate heat from the electronic device 100. The first heat dissipation structure 7 may be configured to dissipate heat from the electronic device 100 to the external environment. The first heat dissipation structure 7 may be configured to dissipate heat from the conductive plate 11 to the external environment. In some embodiments, the conductive plate 11 may be configured to dissipate heat from the electronic component 4 (and / or such as...) Figure 2The electronic component 6 shown transfers heat to the first heat dissipation structure 7. The first heat dissipation structure 7 may be configured to dissipate heat from one or more of the electronic components 4 (and / or 6).

[0040] The second heat dissipation structure 8 may be disposed above the conductive plate 13. The second heat dissipation structure 8 may be in contact with the conductive plate 13. The second heat dissipation structure 8 may include a heat sink, such as heat dissipation fins, cooling channels, or a heat dissipation plate. In some embodiments, the second heat dissipation structure 8 may be connected to an external liquid cooling system (e.g., a vehicle's liquid cooling lines) to dissipate heat from the electronic device 100. The second heat dissipation structure 8 may be configured to dissipate heat from the electronic device 100 to the external environment. The second heat dissipation structure 8 may be configured to dissipate heat from the conductive plate 13 to the external environment. In some embodiments, the conductive plate 13 may be configured to dissipate heat from the electronic component 4 (and / or such as...) Figure 2 The electronic component 6 shown transfers heat to the second heat dissipation structure 8. The second heat dissipation structure 8 may be configured to dissipate heat from one or more of the electronic components 4 (and / or 6).

[0041] The heat generated in the electronic device 100 can be dissipated bidirectionally and vertically through the first heat dissipation structure 7 and the second heat dissipation structure 8. The power dissipation path (or power transmission path) can be shorter, thereby reducing power loss. The conductive plate 11 is configured as the collector terminal of the electronic component 4. Therefore, the total power density of the electronic device 100 can be increased while minimizing the form factor, thereby providing high power for the automotive motor.

[0042] Figure 2 This is an exploded view of an exemplary electronic device (e.g., electronic device 100) according to some embodiments of the present disclosure.

[0043] like Figure 2 As shown, the adhesive layer 7t can be disposed between the conductive plate 11 and the first heat dissipation structure 7. The adhesive layer 7t connects the conductive plate 11 to the first heat dissipation structure 7. The adhesive layer 7t may contain heat dissipation gel or thermal interface material. The adhesive layer 8t can be disposed between the conductive plate 13 and the second heat dissipation structure 8. The adhesive layer 8t connects the conductive plate 13 to the second heat dissipation structure 8. The adhesive layer 8t may contain heat dissipation gel or thermal interface material. Adhesive layers 7t and 8t can improve heat dissipation efficiency.

[0044] A thermistor 5 may be disposed above the conductive plate 11. Thermistor 5 may be in contact with the conductive plate 11. Thermistor 5 may comprise a negative temperature coefficient (NTC) thermistor having lower resistance at higher temperatures. Thermistor 5 may also comprise a positive temperature coefficient (PTC) thermistor having higher resistance at higher temperatures. Thermistor 5 may be configured to detect the temperature of the conductive plate 11, which may represent the temperature of the electronic device 100.

[0045] The conductive plate 11 may include a portion 111 and a portion 112 disconnected from the portion 111. The portions 111 and 112 may be separate. The portion 111 may be separate from the portion 112. The portions 111 and 112 may be formed by dividing conductive material. The portions 111 and 112 may be at the same height. The portions 111 and 112 may have different potentials.

[0046] Multiple electronic components 4 may be disposed between conductive plates 11 and 12. Multiple electronic components 4 may be disposed between conductive plates 11 and 13. Multiple electronic components 4 may be disposed above or on conductive plate 11. Multiple electronic components 4 may be supported by conductive plate 11. Multiple electronic components 4 may be disposed adjacent to the edge of conductive plate 11. Multiple electronic components 4 may be electrically connected to conductive plate 11 and / or conductive plate 12. Protective layer 2 may cover or encapsulate electronic components 4.

[0047] Multiple electronic components 4 may include electronic component 41 and electronic component 42. The number of multiple electronic components 4 may be two (2), such as Figure 1 As shown in the figure. Alternatively, the number can vary, for example, 4, 8, 16 or more.

[0048] Multiple electronic components 6 may be disposed between conductive plate 11 and conductive plate 13. Multiple electronic components 6 may be disposed above or on conductive plate 11. Multiple electronic components 6 may be supported by conductive plate 11. Multiple electronic components 6 may be disposed adjacent to the edge of conductive plate 11. Multiple electronic components 6 may be electrically connected to conductive plate 11 and / or conductive plate 13. Protective layer 2 may cover or encapsulate electronic components 6.

[0049] Multiple electronic components 6 may include electronic component 61 and electronic component 62. The number of multiple electronic components 6 may be two (2), such as Figure 2 As shown in the figure. Alternatively, the number can vary, for example, 6, 8, 16 or more.

[0050] Electronic components 61 and 62 may be mounted on portion 112, while electronic components 41 and 42 may be mounted on portion 111. Electronic components 61 and 62, as well as electronic components 41 and 42, may be at the same height. Electronic component 6 may not be electrically connected in parallel with electronic component 4.

[0051] Electronic components 41, 42, 61, and 62 may include insulated-gate bipolar transistors (IGBTs), SiC MOSFETs, high-voltage transistors, or power transistors. In some embodiments, electronic components 41, 42, 61, and 62 may be units derived from or obtained from a wafer or panel via a single-cut process. Each of electronic components 41, 42, 61, and 62 may include a semiconductor chip or a bare die.

[0052] The conductive plate 12 may have a substantially rectangular shape. The long side 121 of the conductive plate 12 may extend in the X direction. The short side 122 of the conductive plate 12 may extend in the Z direction. The conductive plate 12 may include a plurality of notches 12r1 and 12r2, each notch substantially aligned with electronic components 41 and 42, respectively. The conductive plate 12 can be viewed from different angles. For illustrative purposes, the conductive plate 12 may be inverted, as shown... Figure 2 As shown in the dashed box on the left, the conductive plate 12 may include a plurality of protrusions 12p1 and 12p2 on a surface opposite to the other surface where the notches 12r1 and 12r2 are disposed. The notches 12r1 and 12r2 may be disposed directly above the protrusions 12p1 and 12p2. The notches 12r1 and 12r2 and the protrusions 12p1 and 12p2 may be formed by stamping the conductive plate 12.

[0053] The conductive plate 12 may further include terminals 12t1 substantially aligned with the terminals of the conductive plate 11. Terminals 12t1 may have a stepped profile. Terminals 12t1 may have a clip profile or a serrated profile.

[0054] The conductive plate 13 may have a substantially rectangular shape. Each of the four sides 131 of the conductive plate 13 has a linear profile (or a straight line). Increasing the contact area between the conductive plate 13 and the adhesive layer 8t can improve heat dissipation efficiency. The conductive plate 13 can be viewed from different angles. For illustrative purposes, the conductive plate 13 may be inverted, as... Figure 2 As shown in the dashed box on the right.

[0055] Electronic device 100 may include a connection structure 9. The connection structure 9 may be disposed on conductive plate 13. The connection structure 9 may be mounted on or attached to conductive plate 13 via an adhesive layer (not shown). In some embodiments, the connection structure 9 may be wedged into conductive plate 13. Figure 2 As shown, the connection structure 9 can be completely covered by the conductive plate 13 (e.g., in the Y direction). The connection structure 9 can be disposed between the conductive plate 11 and the conductive plate 13.

[0056] The connection structure 9 may include multiple connection portions (or conductive elements) 91, 92, 93, and 94. Connection portions 91, 92, 93, and 94 may have a stepped profile, a clip profile, or a serrated profile. The connection structure 9 (e.g., connection portions 93 and 94) may be flexible to reduce stress applied to the electronic component 6. Connection portions 91, 92, 93, and 94 may be referred to as stress buffers and configured to deform to reduce stress. The number of multiple connection portions may be four (4), such as... Figure 2 As shown in the diagram. Alternatively, the number can vary, for example, 2, 8, 16 or more. The number of connecting parts can be greater than the number of electronic components.

[0057] In some embodiments, the connecting portions 91, 92, 93 and 94 may each contain a conductive material, such as copper (Cu), tin (Sn), aluminum (Al), gold (Au), silver (Ag), tungsten (W), nickel (Ni), iron (Fe) or other suitable materials.

[0058] Figure 3 This is a 3D perspective view of a portion of an exemplary electronic device (e.g., electronic device 100) according to some embodiments of the present disclosure. Figure 3 The structure, connection and / or relationship between conductive plates 11, 12, and 13, electronic components 41, 42, 61 and 62 and connection portions 91, 92, 93 and 94 of connection structure 9 are shown.

[0059] Parts 111 and 112 may be spaced apart from each other by a distance S1. The distance S1 may be wound on the ZX plane. Part 111 of the conductive plate 11 may be connected to terminals 11t2 and 11t3. Part 112 may be connected to terminal 11t4. Part 111 may be spaced apart from terminal 11t1. Part 111 may support electronic components 41 (and / or 42) and is configured to provide output power signals (e.g., such as...) to external devices (e.g., motors, automotive electric motors). Figure 9 and 10 The U shown out and U' out Part 112 may support electronic components 61 (and / or 62) and is configured to receive input power signals (e.g., such as...). Figure 9 and 10 Power+ as shown.

[0060] Connection portions 91 and 93 may be disposed above portion 111 of conductive plate 11. Connection portions 92 and 94 may be disposed above portion 112 of conductive plate 11. Connection portions 92 and 94 may be spaced apart from conductive plate 11. Connection portion 92 may be disposed above electronic component 61, and connection portion 94 may be disposed above electronic component 62. Conductive plate 11 may support conductive plate 13 via connection portions 92 and / or 94. Electronic components 61 and / or 62 may support conductive plate 13 via connection portions 92 and / or 94. In some embodiments, connection portions 92 and 94 may be configured to buffer stress applied to electronic components 61 and 62. Connection structure 9 may be configured to deform, for example, during the process of forming protective layer 2 to alleviate stress from conductive plate 13 to electronic components 61 and 62. Connection structure 9 buffers stress and thus protects the characteristics of electronic components 61 and 62 from stress, thereby improving yield.

[0061] Furthermore, the connecting structure 9 is attached to the conductive plate 13, rather than being formed by stamping the conductive plate 13. The conductive plates 11 and 13 may have relatively large areas to facilitate rapid dissipation of heat generated from the electronic components 4 and 6 to the first heat dissipation structure 7 and the second heat dissipation structure 8. Due to this improved heat dissipation, the electronic device 100 may not require sintering silver (Ag).

[0062] Conductive plates 11 and 13 may be spaced apart from each other by a connecting structure 9. The connecting structure 9 maintains space between conductive plates 11 and 13 to accommodate conductive plate 12. Conductive plate 12 may be adjacent to the edge of conductive plate 11. Conductive plate 12 may not overlap with the connecting structure 9 (vertically) in a direction perpendicular to the upper surface 11s1 (or the Y direction) of conductive plate 11. Conductive plate 12 may be configured to electrically connect electronic components 41 and 42 (e.g., their emitter terminals) to terminals 11t1 of conductive plate 11. Terminals 11t1 may be power terminals of electronic device 100. Conductive plate 12 may overlap with electronic components 41 and 42 (vertically) but not with electronic components 61 and 62 (vertically). Due to the intermediate conductive plate 2, the dimension along the Y direction can be reduced.

[0063] In some embodiments, conductive plates 13 and 11 and electronic components 41, 42, 61 and 62 may together form a power inverter (e.g., Figure 10 (as shown in the image).

[0064] Electronic device 100 may include a plurality of wirings 4w1 and 4w2, each wiring connecting electronic component 41 and electronic component 42 to a portion 11g1 of conductive plate 11. The portion 11g1 of conductive plate 11 may include a common electrode electrically connected to the gate terminal of each of electronic components 41 and 42. Wirings 4w1 and 4w2 may include bonding wires or be formed by wire bonding devices. Each of electronic components 41 and 42 may have a collector terminal connected to conductive plate 11. Each of electronic components 41 and 42 may have an emitter terminal connected to conductive plate 12. The collector terminals of electronic components 41 and 42 are electrically connected, and the emitter terminals of electronic components 41 and 42 are electrically connected. That is, electronic components 41 and 42 may be electrically connected in parallel.

[0065] Electronic device 100 may include a plurality of wirings 6w1 and 6w2, each wiring connecting electronic component 61 and electronic component 62 to a portion 11g2 of conductive plate 11. The portion 11g2 of conductive plate 11 may include a common electrode electrically connected to the gate terminals of each of electronic components 61 and 62. Wirings 6w1 and 6w2 may include bonding wires or be formed by wire bonding devices. Each of electronic components 61 and 62 may have a collector terminal connected to a portion 112 of conductive plate 11. Each of electronic components 61 and 62 may have an emitter terminal electrically connected to conductive plate 13 via connection portions (or conductive elements) 92 and 94. Connection portions 92 and 94 may be connected to electronic components 61 and 62 (e.g., their emitter terminals) respectively via solder materials 61b and 62b. The collector terminals of electronic components 61 and 62 are electrically connected, and the emitter terminals of electronic components 61 and 62 are electrically connected. That is, electronic components 61 and 62 may be electrically connected in parallel.

[0066] The conductive plate 13 can be electrically connected to the conductive plate 11 via the connecting portion (or conductive element) 91 and / or connecting portion (or conductive element) 93 of the connecting structure 9. The connecting portions 91 and 93 can be connected to the conductive plate 11 via soldering materials 11b1 and 11b2, respectively. The collector terminals of electronic components 41 and 42 can be electrically connected to the emitter terminals of electronic components 61 and 62 via the conductive plate 13, the connecting portions 91, 92, 93 and 94 of the connecting structure 9, and / or the conductive plate 11. At least one of electronic components 41 and 42 can be electrically connected in series with at least one of electronic components 61 and 62 via the conductive plate 13.

[0067] Therefore, the connection structure 9 can be configured to buffer stress applied to at least one of the electronic components 61 and 62, and to connect at least one of the electronic components 41 and 42 in series to at least one of the electronic components 61 and 62. The connection structure 9, configured as a stress buffer, can reduce, alleviate, or eliminate stress applied to the electronic components 61 and 62. The connection portions 91, 92, 93, and 94 of the connection structure 9 can, for example, deform during the process of forming the protective layer 2 to alleviate stress applied to the electronic components 61 and 62. The connection portions 91, 92, 93, and 94 can buffer said stress and thus protect the characteristics of the electronic components 61 and 62 from the effects of stress, thereby improving yield.

[0068] The first group (e.g., electronic components 41 and 42) and the second group (e.g., electronic components 61 and 62) are disposed on separate portions 111 and 112 of the conductive plate 11. These groups are connected in parallel and arranged on separate sections of the conductive plate 11. Therefore, the risk of failure of the electronic device 100 can be reduced.

[0069] Compared to another electronic device that dissipates power primarily through horizontal bonding lines, the power dissipation path (or power transmission path) established in electronic device 100 is relatively short. This reduces power loss. The effective resistance between conductive plates 11 and 13 and electronic components 41, 42, 61, and 62 is reduced compared to spacers requiring more soldering process steps.

[0070] Thermistor 5 can be connected to terminals 11n1 and 11n2 of conductive plate 11. Terminal 11r1 can protrude from portion 111 of conductive plate 11. Terminal 11r2 can protrude from portion 112 of conductive plate 11. Terminals 11r1 and 11r2 can be referred to as reserved pins for electronic device 100. Terminal 11e1 can be connected to the emitter terminal of electronic component 42 via a wire. Terminal 11e2 can be connected to the emitter terminal of electronic component 62 via a wire.

[0071] Figure 4 It is along Figure 1 A cross-sectional view of line A-A'.

[0072] The protective layer 2 can be formed by a molding process to cover the conductive plates 11, 12, and / or 13. In the molding process, a mold (or the head of a tool) can contact the conductive plates 11 and 13, and molding material can flow into the space between the conductive plates 11 and 13. The conductive plate 13 has a substantially rectangular shape (or no opening), and overflow of molding material can be blocked by the conductive plate 13. There is no molding material on the conductive plate 13, thus improving heat dissipation. The upper surface 2s1 of the protective layer 2 and the upper surface 13s1 of the conductive plate 13 can be substantially coplanar. The upper surface 2s1 can be continuous with the upper surface 13s1.

[0073] The protective layer 2, formed by the molding process, protects electronic components 41, 42, 61, and 62 from any contaminants, thus improving the reliability of the electronic device 100. Furthermore, the protective layer 2 limits the reflow of solder materials 41b, 11b1, and 61b during high-temperature operation, thereby eliminating the risk of short circuits.

[0074] Electronic component 41 and electronic component 61 can be respectively disposed on portions 111 and 112 of conductive plate 11. Portions 111 and 112 can be separated by a protective layer 2, which can fill the gap S1.

[0075] The protrusion 12p1 of the conductive plate 12 can be connected to the electronic component 41 via soldering material 41b. A connecting portion 91 can be connected to the conductive plate 11, while a connecting portion 92 can be connected to the electronic component 61. In the Y direction (or perpendicular to the upper surface 11s1), the height (or thickness) 91h of the connecting portion 91 may differ from the height (or thickness) 92h of the connecting portion 92. Because there is an additional component (i.e., the electronic component 61) below the connecting portion 92, the height 92h may be less than the height 91h. In some embodiments, the top surfaces of the connecting portions 91 and 92 may be at the same height, while the bottom surfaces of the connecting portions 91 and 92 may not be at the same height relative to the upper surface 11s1 of the conductive plate 11. In the Y direction (or perpendicular to the upper surface 11s1), the height 12h (or thickness) of the conductive plate 12 may be less than the height 91h of the connecting portion 91 of the connecting structure 9.

[0076] In some embodiments, the connecting portion 91 may have a first segment 91a in contact with the conductive plate 11, a second segment 91b disposed above the first segment and in contact with the conductive plate 13, and a third segment 91c connecting the first segment 91a to the second segment 91b. The third segment 91c may not be perpendicular to the first segment 91a and the second segment 91b. The sidewalls of the third segment 91c may be parallel to each other. The two sidewalls of the third segment 91c may be substantially curved. The first segment 91a, the second segment 91b, and the third segment 91c may collectively form a clip, a stepped shape, or a serrated shape. Connecting portions 92, 93, and 94 may have a structure similar to that of connecting portion 91, and therefore a detailed description of connecting portions 92, 93, and 94 may refer to a detailed description of connecting portion 91.

[0077] Compared to another electronic device with multiple upright spacers, the electronic device 100 with the connection structure 9 requires fewer manufacturing steps. Specifically, the number of welding process steps can be minimized. Due to the relatively fewer manufacturing steps, deviations during the manufacturing of the electronic device 100 can be reduced. Furthermore, the stress buffers of the connection structure can be flexible, thereby allowing them to deform. Deviations accumulated during manufacturing (e.g., in the Y direction) and / or thickness differences of electronic components can be compensated for by the deformation of the connection structure 9.

[0078] Because the deviation is reduced (e.g., less than 100 μm), the electronic device 100 is compatible with standard molding processes, thereby reducing the cost of the electronic device 100.

[0079] Figure 5 It is along Figure 1 A cross-sectional view of line B-B' in the diagram.

[0080] The notches 12r1 and 12r2 can be positioned directly above the protrusions 12p1 and 12p2. In the Z direction (perpendicular to the long side 121 of the conductive plate 12 and parallel to the upper surface 11s1 of the conductive plate 11), the notches 12r1 and 12r2 can overlap with the connecting portions 91 and 93, respectively.

[0081] Terminal 12t1 of conductive plate 12 can be connected to terminal 11t1 via soldering material 11b3. The outer side of terminal 12t1 of conductive plate 12 can be covered by protective layer 2. The thermistor 5 can be encapsulated or covered by protective layer 2.

[0082] The first heat dissipation structure 7 may have a finned structure to increase its surface area. The second heat dissipation structure 8 may have a finned structure to increase its surface area. The adhesive layer 7t may protrude from the protective layer 2. The adhesive layer 8t may protrude from the protective layer 2.

[0083] Figure 6 This is a top view of an exemplary conductive plate (e.g., conductive plate 11) of an electronic device (e.g., electronic device 100) according to some embodiments of the present disclosure.

[0084] The electronic device may include a thermistor 51 disposed on portion 111 and a thermistor 52 disposed on portion 112 of the conductive plate 11. Thermistor 51 may be in contact with portion 111. Thermistor 52 may be in contact with portion 112. Thermistors 51 and 52 may each be negative temperature coefficient (NTC) thermistors having lower resistance at higher temperatures. Thermistors 51 and 52 may each be positive temperature coefficient (PTC) thermistors having higher resistance at higher temperatures. Thermistors 51 and 52 may be configured to detect the temperature of the conductive plate 11, which may represent the temperature of the electronic device 100.

[0085] A portion 111 of conductive plate 11 may include a region 11d1 for arranging or mounting a diode. The diode may be electrically connected in parallel with electronic components 41 and 42. The diode may be configured to provide a path for reverse current transmission. A portion 112 of conductive plate 11 may include a region 11d2 for arranging or mounting a diode. The diode may be electrically connected in parallel with electronic components 61 and 62. The diode may be configured to provide a path for reverse current transmission.

[0086] In some embodiments, the electronic device 100 may not include a diode because the conductive plate 11 is large enough to carry reverse current.

[0087] Figure 7 This is a top view of an exemplary conductive plate (e.g., conductive plate 12) of an electronic device (e.g., electronic device 100) according to some embodiments of the present disclosure.

[0088] The notches 12r1 and 12r2 may be positioned closer to the side 123 than to the side (or long side) 121. The notch 12r1 may be positioned closer to the terminal 12t1 than to the notch 12r2.

[0089] Figure 8 This is a top view of an exemplary conductive plate (e.g., conductive plate 13) of an electronic device (e.g., electronic device 100) according to some embodiments of the present disclosure.

[0090] Connection portions 91 and 93 may be symmetrical to connection portions 92 and 94. In the top view, each of the four sides 131 of the conductive plate 13 has a linear profile (or a straight line).

[0091] Figure 9 This is a top perspective view of an exemplary electronic device (e.g., electronic device 100) according to some embodiments of this disclosure.

[0092] like Figure 9 As shown, conductive plates 11, 12, and 13 are stacked. In the Y direction (or the direction perpendicular to the upper surface 11s1 of conductive plate 11), conductive plate 12 may overlap with electronic components 41 and 42 but not with electronic components 61 and 62.

[0093] Arrow U out 、U' out G1, E1, G2 and E2 indicate as follows Figure 10 The pins are described in the diagram. The arrows Power+ and Power- indicate as follows: Figure 10 The power supply described in [the document]. Figure 10 This is a circuit diagram of an exemplary electronic device (e.g., electronic device 100) according to some embodiments of this disclosure. Electronic device 100 may include a power inverter.

[0094] Transistor Q1 may represent electronic components 61 and 62. Pin C1 can be connected to the collector terminal of transistor Q1 and is configured to receive a power signal from power supply Power+. Pin G1 can be connected to the gate terminal of transistor Q1 and is configured to receive a control signal. Pin E1 can be connected to the emitter terminal of transistor Q1.

[0095] Transistor Q2 may represent electronic components 41 and 42. Pin C2 may be connected to pin E1. The emitter of transistor Q1 may be connected to the collector terminal of transistor Q2. Pin G2 may be connected to the gate terminal of transistor Q2 and configured to receive a control signal. Pin E1 may be connected to the emitter terminal of transistor Q2 and configured to receive a power signal from the power supply.

[0096] When transistors Q1 and Q2 are turned on, the electronic device 200 can be configured to output a power signal to pin U. out and pin U' out Pin U out and pin U' out It can be electrically connected to external devices, such as motors or automotive electric motors. The power signal can include three-phase power signals.

[0097] In some embodiments, transistor Q1 may be electrically connected to diode D1. Diode D1 may be configured to protect transistor Q1 from damage caused by reverse current. Transistor Q2 may be electrically connected to diode D2. Diode D2 may be configured to protect transistor Q2 from damage caused by reverse current. In some embodiments, electronic device 100 may not include diodes D1 and D2 because conductive plates 11 and 13 are large enough to sustain reverse current.

[0098] Figure 11A , 11B 11C and 11D illustrate one or more stages of an exemplary method for manufacturing an electronic device according to some embodiments of the present disclosure.

[0099] like Figure 11A As shown, a conductive plate 11 may be provided. The conductive plate 11 may include terminals 11t1, 11t2, 11t3 and 11t4 on the same side. Terminals 11t1, 11t2, 11t3 and 11t4 may be connected to the engagement portion 11j1.

[0100] The conductive plate 11 may include terminals 11e1, 11e2, 11n1, 11n2, 11r1, and 11r2 on the same side. Terminals 11e1, 11e2, 11n1, 11n2, 11r1, and 11r2 may be connected to the mating portion 11j2.

[0101] The conductive plate 11 may include portions (or traces) 11g1 and 11g2 on opposite sides. Portion 11g1 may be connected to a mating portion 11j2. Portion 11g1 may be connected to mating portions 11j1 and 11j2. Portion 11g1 may be connected to a mating portion 11j3, which is also connected to a terminal 11t1. Portion 11g2 may be connected to a mating portion 11j4, which is also connected to a terminal 11t4.

[0102] Multiple electronic components 41 and 42 may be mounted above the conductive plate 11. Electronic components 41 and 42 may be connected to portion 11g1 via wirings 4w1 and 4w2, respectively.

[0103] Conductive plate 12 can be mounted onto conductive plate 11 and electronic components 41 and 42. Conductive plate 13 can be connected via connection structure 9 (see reference). Figure 2 ) is mounted to conductive plate 11 and multiple electronic components 61 and 62 (not shown). Conductive plates 11, 12 and 13 are stackable.

[0104] like Figure 11B As shown, the protective layer 2 can be formed by a molding process to encapsulate or cover the stacked structure of conductive plates 11, 12, and 13. Terminals 11e1, 11e2, 11n1, 11n2, 11r1, and 11r2 may be exposed by the protective layer 2. Terminals 11t1, 11t2, 11t3, and 11t4 may be exposed by the protective layer 2. Portions 11g1 and 11g2 may be partially exposed by the protective layer 2, each having two ends extending beyond the protective layer 2. During the formation of the protective layer 2, a mold (or the head of a tool) applies force to the conductive plate 13, and the connection structure 9 (not shown) may experience stress from the conductive plate 13 and subsequently deform to buffer the stress from the conductive plate 13 to the electronic components 41, 42, 61, and 62. The upper surface 13s1 of the conductive plate 13 may be exposed by the protective layer 2. The lower surface (not shown) of the conductive plate may be exposed by the protective layer 2.

[0105] like Figure 11C As shown, adhesion layer 7t can be formed on conductive plate 11 and adhesion layer 8t can be formed on conductive plate 13. Adhesion layer 8t can contain heat dissipation gel or thermal interface material. Adhesion layers 7t and 8t can improve heat dissipation efficiency.

[0106] like Figure 11D As shown, a first heat dissipation structure 7 may be formed on an adhesion layer 7t, and a second heat dissipation structure 8 may be formed on an adhesion layer 8t. The first heat dissipation structures 7 and 8 may include heat sinks, such as heat dissipation fins, cooling channels, or heat dissipation plates.

[0107] Then, the joining portions 11j1, 11j2, 11j3, and 11j4 can be removed by cutting or stamping processes to form a shape as shown. Figure 1The electronic device 100 shown.

[0108] Compared to another electronic device with multiple upright spacers, the electronic device 100 with the connection structure 9 requires fewer manufacturing steps. Specifically, the number of welding process steps can be minimized. Due to the relatively fewer manufacturing steps, deviations during the manufacturing of the electronic device 100 can be reduced. Furthermore, the stress buffers of the connection structure can be flexible, thereby allowing them to deform. Deviations accumulated during manufacturing (e.g., in the Y direction) and / or thickness differences of electronic components can be compensated for by the deformation of the connection structure 9.

[0109] Because the deviation is reduced (e.g., less than 100 μm), the electronic device 100 can be comparable to standard molding processes, thereby reducing the cost of the electronic device 100.

[0110] Figure 12 This is a 3D view of an exemplary electronic device (or power module) 200 according to some embodiments of this disclosure. Figure 13 This is an exploded view of an electronic device according to some embodiments of the present disclosure. The electronic device 200 may include a plurality of electronic devices 100a, 100b and 100c. Figure 12 and 13 Each of the electronic devices 100a, 100b and 100c may be similar to Figure 1 , 2 Electronic devices 100 of types 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. Therefore, some detailed descriptions correspond to the preceding paragraphs and will not be repeated below for the sake of brevity; the differences are as follows.

[0111] The conductive plates of electronic devices 100a, 100b, and 100c may be encapsulated or covered by the same protective layer (e.g., protective layer 2). The number of multiple electronic devices 100a, 100b, and 100c may be three (3), such as... Figure 12 As shown in the diagram. Alternatively, their number may vary, for example, 2, 4, 5 or more. Electronic devices 100a, 100b and 100c may be arranged in a 3x1 array. Alternatively, electronic device 200 may comprise a 2x2 array, a 2x3 array or more.

[0112] Electronic device 100a may include electronic components 4 and 6 disposed on a bottom conductive plate. Electronic device 100b may include multiple electronic components 14 and multiple electronic components 16 disposed on a bottom conductive plate. Electronic device 100c may include multiple electronic components 24 and multiple electronic components 26 disposed on a bottom conductive plate. Electronic components 14 and 24 may be similar to electronic component 4. Electronic components 16 and 26 may be similar to electronic component 6.

[0113] Figure 14This is a circuit diagram of an exemplary electronic device (e.g., electronic device 200) according to some embodiments of this disclosure.

[0114] Electronic device 200 may include transistors Q1, Q2, Q3, Q4, Q5, and Q6. Transistor Q1 may represent electronic component 6. Transistor Q2 may represent electronic component 4. Transistor Q3 may represent electronic component 16. Transistor Q4 may represent electronic component 14. Transistor Q5 may represent electronic component 26. Transistor Q6 may represent electronic component 24.

[0115] Transistors Q1, Q3, and Q5 may each have a collector terminal connected to the power supply Power+. Transistors Q1, Q3, and Q5 may each have a gate terminal configured to receive the control signal CTRL. Transistors Q1, Q3, and Q5 may each have an emitter terminal connected to the output terminal OUT.

[0116] Transistors Q2, Q4, and Q6 may each have a collector terminal connected to the emitter terminal of transistors Q1, Q3, and Q5. Transistors Q2, Q4, and Q6 may each have a gate terminal configured to receive a control signal CTRL. Transistors Q2, Q4, and Q6 may each have an emitter terminal connected to a power supply Power-.

[0117] When transistors Q1, Q2, Q3, Q4, Q5, and Q6 are turned on, electronic device 200 can be configured to output a power signal to output terminal OUT. Output terminal OUT can be electrically connected to a motor. The power signal can include a three-phase power signal.

[0118] Transistors Q2, Q4, and Q6 can be connected in parallel to provide a relatively high current. Transistors Q2, Q4, and Q6 can form a low-side power switch. Transistors Q1, Q3, and Q5 can be connected in parallel to provide a relatively high current. Transistors Q1, Q3, and Q5 can form a low-side power switch. The more transistors, the higher the voltage that the electronic device 200 can handle or maintain. In some embodiments, the voltage can be higher than 800V, 1200V, or greater.

[0119] Unless otherwise specified, spatial descriptions such as “above,” “below,” “up,” “left,” “right,” “lower,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “above,” “below,” “upper,” “above,” and “below” are relative to the orientation shown in the figures. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and embodiments of the structures described herein can be arranged in space in any orientation or manner, provided that the advantages of the embodiments of this disclosure are not compromised by such arrangement.

[0120] As used herein, the terms “approximately,” “generally,” “roughly,” “about,” and “approximately” are used to describe and explain small variations. When used in conjunction with an event or situation, these terms may refer to examples where the event or situation occurred precisely or very approximately. For example, when used in conjunction with numerical values, these terms may refer to a range of variation less than or equal to ±10% of the value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, if the difference between two values ​​is less than or equal to the average of ±10%, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the values ​​may be considered “generally” the same or equal.

[0121] If the displacement between two surfaces is no greater than 5 µm, no greater than 2 µm, no greater than 1 µm, or no greater than 0.5 µm, then the two surfaces can be considered to be coplanar or substantially coplanar.

[0122] As used herein, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” may contain a plural or multiple indicators.

[0123] As used herein, the terms “conductive,” “electrically conductive,” and “conductivity” refer to the ability to conduct electric current. Conductive materials are those that offer little or no resistance to the flow of electric current. A unit of measurement for conductivity is Siemens per meter (S / m). Typically, conductive materials have a conductivity greater than approximately 10. 4 S / m, for example, at least 10 5 S / m or at least 10 6 A material with conductivity of S / m. The conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the conductivity of a material is measured at room temperature.

[0124] In addition, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It should be understood that such range format is used for convenience and brevity, and should be flexibly interpreted as including not only the numerical values ​​explicitly specified as the limits of the range, but also all individual numerical values ​​or subranges covered within the range, as if each numerical value and subrange were explicitly specified.

[0125] While this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting. Those skilled in the art will understand that various changes and alternative equivalents may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. Illustrations may not be drawn to scale. Due to manufacturing processes and tolerances, the process reproduction in this disclosure may differ from actual equipment. Other embodiments may exist that are not specifically described in this disclosure. The description and drawings should be considered illustrative rather than limiting. Modifications may be made to suit particular circumstances, materials, compositions, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are considered to be included within the scope of the appended claims. Although the disclosed methods have been described herein with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not limitations of this disclosure.

Claims

1. An electronic device comprising: First conductive plate; Multiple first electronic components are disposed on the first conductive plate and electrically connected in parallel. as well as Multiple second electronic components are disposed on the first conductive plate and electrically connected in parallel. The first electronic component and the second electronic component are connected in series.

2. The electronic device of claim 1, further comprising a second conductive plate configured to connect the first electronic component in series with the second electronic component.

3. The electronic device of claim 2, further comprising a first conductive element for connecting the first conductive plate to the second conductive plate.

4. The electronic device of claim 3, wherein the second conductive plate is electrically connected to a collector terminal of one of the first electronic components via the first conductive element.

5. The electronic device of claim 4, further comprising a second conductive element for connecting the second conductive plate to one of the second electronic components.

6. The electronic device of claim 5, wherein the second conductive element is connected to a transmitting terminal of one of the second electronic components.

7. The electronic device according to claim 1, wherein the first electronic component and the second electronic component are respectively disposed on a first portion and a second portion of the first conductive plate, wherein the first portion and the second portion are spaced apart by a first interval.

8. The electronic device of claim 6, wherein the second conductive element is spaced apart from the first conductive plate.

9. The electronic device of claim 2, further comprising a third conductive plate disposed between the first conductive plate and the second conductive plate, wherein the third conductive plate connects the first electronic component to a power supply terminal.

10. The electronic device of claim 9, further comprising an encapsulation material encapsulating the first electronic component, the second electronic component, the first conductive plate, the second conductive plate, and the third conductive plate.

11. An electronic device comprising: First conductive plate; A first electronic component is disposed on the first conductive plate; A second electronic component is disposed on the first conductive plate; as well as A connection structure configured to buffer stress applied to the second electronic component and to connect the first electronic component in series to the second electronic component.

12. The electronic device of claim 11, wherein the first electronic component and the second electronic component are disposed adjacent to the edge of the first conductive plate, the first electronic component is disposed on a first portion of the first conductive plate, and the second electronic component is disposed on a second portion of the first conductive plate, and wherein the first portion and the second portion are separate.

13. The electronic device of claim 11, further comprising a second conductive plate disposed above the first conductive plate, wherein the height of the second conductive plate is less than the height of the connection structure.

14. The electronic device of claim 11, wherein the first conductive plate comprises a first portion and a second portion separate from the first portion, wherein the first portion supports the first electronic component and is configured to provide an output power signal to an external device, and the second portion supports the second electronic component and is configured to receive an input power signal.

15. The electronic device of claim 14, further comprising a third conductive plate disposed above the first conductive plate and connected to the first portion.

16. The electronic device of claim 14, wherein the connection structure includes a first segment in contact with the first conductive plate, a second segment disposed above the first segment, and a third segment connecting the first segment to the second segment, and wherein the third segment is not perpendicular to the first segment and the second segment.

17. An electronic device comprising: The bottom conductive plate supports multiple electronic components; A top conductive plate is disposed above the bottom conductive plate, wherein the top conductive plate, the bottom conductive plate, and the electronic components together form a power inverter; as well as A protective layer that encapsulates the bottom conductive plate and the top conductive plate. The upper surface of the protective layer and the upper surface of the top conductive plate are substantially coplanar.

18. The electronic device of claim 17, further comprising a first heat dissipation structure disposed below the bottom conductive plate and a second heat dissipation structure disposed above the top conductive plate.

19. The electronic device of claim 18, wherein, viewed from a top view, the protective layer protrudes from the edge of the second heat dissipation structure.

20. The electronic device of claim 17, wherein the bottom conductive plate comprises a first portion and a second portion spaced apart from each other by the protective layer.

Images