Display substrate and display device

Abstract

A display substrate and a display device. The display substrate comprises a substrate, a display structure layer arranged on the substrate, and a color filter layer arranged on a side of the display structure layer away from the substrate; the display structure layer comprises a pixel definition layer and a plurality of light emitting elements of different colors, the pixel definition layer comprises a plurality of pixel openings, and light of the light emitting elements is emitted through the pixel openings; the color filter layer comprises a plurality of filter units of different colors, a normal projection of the filter units on the substrate at least partially overlaps with a normal projection of the light emitting elements emitting light of the same color on the substrate; wherein the color filter layer further comprises a plurality of first lenses, the first lenses are arranged on a side of the filter units of at least one color close to the substrate, a normal projection of the first lenses on the substrate at least partially overlaps with a normal projection of the pixel definition layer on the substrate; a refractive index of the first lenses is smaller than a refractive index of the filter units, and light of the light emitting elements is deflected towards a center of the light emitting elements after irradiating a surface of the first lenses.

Description

Technical Field

[0001] This article relates to, but is not limited to, display technology, and in particular to a display substrate and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are active-matrix display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, and extremely fast response speed. With the continuous development of display technology, display devices using OLEDs as light-emitting elements and controlled by thin-film transistors (TFTs) have become the mainstream products in the display field. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] On one hand, this disclosure provides a display substrate, including: a substrate, a display structure layer disposed on the substrate, and a color filter layer disposed on the side of the display structure layer away from the substrate; the display structure layer includes a pixel definition layer and a plurality of light-emitting elements of different colors, the pixel definition layer includes a plurality of pixel openings, and light from the light-emitting elements is emitted through the pixel openings; the color filter layer includes a plurality of filter units of different colors, and the orthographic projection of the filter units on the substrate at least partially overlaps with the orthographic projection of the light-emitting elements emitting the same color light on the substrate; wherein, the color filter layer further includes a plurality of first lenses, the first lenses being located on the side of at least one color filter unit closer to the substrate, and the orthographic projection of the first lenses on the substrate at least partially overlaps with the orthographic projection of the pixel definition layer on the substrate; the refractive index of the first lenses is less than the refractive index of the filter units, and the light from the light-emitting elements is deflected toward the center of the light-emitting elements after irradiating the surface of the first lenses.

[0005] In one exemplary embodiment, the system further includes a first wiring layer and a second wiring layer sequentially disposed along a direction away from the substrate. The first wiring layer and the second wiring layer are configured to implement a touch function. The first wiring layer includes a plurality of first electrodes, and the second wiring layer includes a plurality of second electrodes. The first electrodes and the second electrodes are disposed in pairs and are interconnected. The orthographic projections of the first electrodes and the second electrodes on the substrate are located within the range of the orthographic projection of the first lens on the substrate. The first wiring layer is located on the side of the first lens closer to the substrate, and the second wiring layer is located on the side of the first lens away from the substrate. Alternatively, the second wiring layer is located on the side of the first lens closer to the substrate.

[0006] In one exemplary embodiment, the orthographic projection of the filter unit on the substrate covers the orthographic projection of the corresponding pixel opening on the substrate; the filter unit of at least one color is located on the side of the second wiring layer away from the substrate.

[0007] In one exemplary embodiment, the plurality of filter units include a first type of filter unit and a second type of filter unit. The first type of filter unit includes filter units of one color, and the second type of filter unit includes filter units of the remaining colors. The color filter layer further includes a plurality of isolation portions. The isolation portions are disposed in the same layer as the first type of filter units, and the orthographic projection of the isolation portions on the substrate is located within the range of the orthographic projection of the first lens on the substrate. In a direction perpendicular to the substrate, the isolation portions cover the second electrode.

[0008] In one exemplary embodiment, in a direction perpendicular to the substrate, the isolation portion surrounding the pixel opening and the first type of filter unit covering the pixel opening are integrally structured.

[0009] In one exemplary embodiment, the second type of filter unit overlaps the first type of filter unit on the side away from the substrate, and exposes the pixel opening covered by the first type of filter unit.

[0010] In one exemplary embodiment, the minimum overlap between the second type of filter unit and the first type of filter unit in the plane of the substrate is greater than 4 micrometers.

[0011] In one exemplary embodiment, the first wiring layer is located on the side of the first lens closer to the substrate, and the second wiring layer is located on the side of the first lens away from the substrate; the isolation portion and the first type of filter unit are located on the side of the first wiring layer closer to the substrate.

[0012] In one exemplary embodiment, the second wiring layer is located on the side of the first lens closer to the substrate; the isolation portion and the first type of filter unit are located on the side of the first wiring layer away from the substrate, and the isolation portion and the first type of filter unit are located on the side of the second wiring layer closer to the substrate.

[0013] In one exemplary embodiment, the orthographic projection of the first lens onto the substrate covers the orthographic projection of the isolation portion and the first type of filter unit onto the substrate.

[0014] In one exemplary embodiment, the first type of filter unit includes a top surface, a bottom surface, and a ramp surface connecting the top surface and the bottom surface. In a direction away from the substrate, the ramp surface of the first type of filter unit is inclined toward the center of the overlapping pixel openings.

[0015] In one exemplary embodiment, the angle between the sloped surface of the first type of filter unit and the substrate is greater than or equal to 95 degrees and less than or equal to 130 degrees.

[0016] In one exemplary embodiment, the color filter layer further includes a black matrix located on the side of the filter unit away from the substrate; the orthographic projection of the black matrix onto the substrate is within the range of the orthographic projection of the first lens onto the substrate.

[0017] In one exemplary embodiment, within the plane of the substrate, the distance between the first lens and the adjacent edges of the pixel definition layer is a first distance, and the distance between the black matrix and the adjacent edges of the pixel definition layer is a second distance, wherein the first distance is less than the second distance.

[0018] In one exemplary embodiment, the orthographic projection of the edge of the first lens onto the substrate is within the range of the orthographic projection of the pixel definition layer onto the substrate, the first distance is less than or equal to 4 micrometers, and the second distance is greater than or equal to 3 micrometers and less than or equal to 7 micrometers.

[0019] In one exemplary embodiment, the orthographic projection of the edge of the pixel definition layer onto the substrate is within the range of the orthographic projection of the first lens onto the substrate, the first distance is less than or equal to 2 micrometers, and the second distance is greater than or equal to 3 micrometers and less than or equal to 7 micrometers.

[0020] In one exemplary embodiment, the refractive index of the filter unit is greater than or equal to 1.7 and less than or equal to 2.0, and the refractive index of the first lens is greater than or equal to 1.4 and less than or equal to 1.6.

[0021] In one exemplary embodiment, the first lens includes a top surface, a bottom surface, and a ramp surface connecting the top surface and the bottom surface. In a direction away from the substrate, the ramp surface of the first lens is inclined in a direction away from the center of the pixel opening.

[0022] In one exemplary embodiment, the angle between the sloped surface of the first lens and the substrate is greater than or equal to 40 degrees and less than or equal to 80 degrees.

[0023] In one exemplary embodiment, in a direction perpendicular to the substrate, the thickness of the filter unit is greater than or equal to 2 micrometers and less than or equal to 6 micrometers, and the thickness of the first lens is greater than or equal to 1.5 micrometers and less than or equal to 4 micrometers.

[0024] On the other hand, embodiments of this disclosure provide a display device including a display substrate as described above.

[0025] The display substrate provided in this embodiment of the present disclosure has multiple first lenses disposed in the color filter layer. The first lenses are located on the side of the filter unit of at least one color close to the substrate. The orthographic projection of the first lens on the substrate at least partially overlaps with the orthographic projection of the pixel definition layer on the substrate. The refractive index of the first lens is less than the refractive index of the filter unit. The light emitted by the light-emitting element can undergo total internal reflection after shining from the filter unit onto the surface of the first lens, and deflect towards the center of the light-emitting element, which can increase the light extraction efficiency of the display substrate with COE structure.

[0026] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the application. Other advantages of this application can be realized and obtained by means of the solutions described in the description and the accompanying drawings.

[0027] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description

[0028] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0029] Figure 1 This is a schematic diagram of the structure of a display device;

[0030] Figure 2 This is a schematic diagram of a planar structure of a display substrate;

[0031] Figure 3 This is a schematic diagram of an equivalent circuit for a pixel driving circuit.

[0032] Figure 4This is a schematic cross-sectional view of a display substrate in an exemplary embodiment.

[0033] Figure 5 This is a schematic cross-sectional view of a display substrate in an exemplary embodiment;

[0034] Figure 6 This is a top view of the black matrix, the first lens, and the pixel definition layer in an exemplary embodiment.

[0035] Figure 7 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment;

[0036] Figure 8 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment;

[0037] Figure 9 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment;

[0038] Figure 10 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment;

[0039] Figure 11 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment. Detailed Implementation

[0040] This disclosure describes several embodiments, but these descriptions are exemplary and not limiting, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0041] This disclosure includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this disclosure may also be combined with any conventional features or elements to form a unique inventive scheme as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive schemes to form another unique inventive scheme as defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this disclosure may be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.

[0042] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that the method or process does not depend on the specific order of steps described herein. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims relating to the method and / or process should not be limited to the steps performed in the order written, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments disclosed herein.

[0043] In the accompanying drawings, the size of one or more constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Therefore, this disclosure is not necessarily limited to these dimensions, and the shape and size of one or more parts in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0044] The ordinal numbers such as "first," "second," and "third" used in this specification are used to avoid confusion among the constituent elements, not to limit the quantity. The term "multiple" in this disclosure refers to two or more quantities.

[0045] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of the constituent elements being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0046] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the meaning of these terms in this disclosure as appropriate.

[0047] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0048] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0049] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0050] In this disclosure, “about” means a value that is not strictly limited and allows for process and measurement errors.

[0051] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0052] Figure 1 This is a schematic diagram of the structure of a display device. Figure 1As shown, the display device may include a timing controller, a data driver, a scan driver, a light-emitting driver, and a pixel array. The timing controller is connected to the data driver, the scan driver, and the light-emitting driver. The data driver is connected to multiple data signal lines (D1 to Dn), the scan driver is connected to multiple scan signal lines (S1 to Sm), and the light-emitting driver is connected to multiple light-emitting signal lines (E1 to Eo). The pixel array may include multiple sub-pixels Pxij, where i and j can be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting element connected to the circuit unit. The circuit unit may include at least a pixel driving circuit, which is connected to the scan signal lines, the data signal lines, and the light-emitting signal lines. In an exemplary embodiment, the timing controller may provide grayscale values ​​and control signals of specifications suitable for the data driver to the data driver, provide clock signals, scan start signals, etc. of specifications suitable for the scan driver to the scan driver, and provide clock signals, transmit stop signals, etc. of specifications suitable for the light-emitting driver to the light-emitting driver. The data driver can use grayscale values ​​and control signals received from the timing controller to generate data voltages to be provided to data signal lines D1, D2, D3, ..., Dn. For example, the data driver can sample grayscale values ​​using a clock signal and apply data voltages corresponding to the grayscale values ​​to data signal lines D1 to Dn in pixel rows, where n can be a natural number. The scan driver can generate scan signals to be provided to scan signal lines S1, S2, S3, ..., Sm by receiving clock signals, scan start signals, etc., from the timing controller. For example, the scan driver can sequentially provide scan signals with on-level pulses to scan signal lines S1 to Sm. For example, the scan driver can be configured as a shift register and can generate scan signals by sequentially transmitting scan start signals in the form of on-level pulses to the next stage circuit under the control of a clock signal, where m can be a natural number. The light-emitting driver can generate transmit signals to be provided to light-emitting signal lines E1, E2, E3, ..., Eo by receiving clock signals, transmit stop signals, etc., from the timing controller. For example, an LED driver can sequentially provide transmit signals with cutoff level pulses to LED signal lines E1 to Eo. For example, the LED driver can be configured as a shift register and can generate transmit signals by sequentially transmitting transmit stop signals in the form of cutoff level pulses to the next stage circuit under the control of a clock signal, where o can be a natural number.

[0053] Figure 2 This is a schematic diagram of a planar structure of a display substrate. Figure 2As shown, the display substrate may include multiple pixel units P arranged in a matrix. At least one pixel unit P may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. Each sub-pixel may include a circuit unit and a light-emitting element. The circuit unit may include at least a pixel driving circuit, which is connected to a scan signal line, a data signal line, and a light-emitting signal line, respectively. The pixel driving circuit is configured to receive the data voltage transmitted by the data signal line and output a corresponding current to the light-emitting element under the control of the scan signal line and the light-emitting signal line. The light-emitting element in each sub-pixel is connected to the pixel driving circuit of its respective sub-pixel, and the light-emitting element is configured to emit light of a corresponding brightness in response to the current output by the connected pixel driving circuit.

[0054] In an exemplary embodiment, the first sub-pixel P1 can be a red sub-pixel (R) that emits red light, the second sub-pixel P2 can be a blue sub-pixel (B) that emits blue light, and the third sub-pixel P3 can be a green sub-pixel (G) that emits green light. In an exemplary embodiment, the shape of the sub-pixels can be rectangular, rhomboid, pentagonal, or hexagonal, and the three sub-pixels can be arranged in a horizontal, vertical, or triangular manner, etc., which is not limited herein.

[0055] In an exemplary embodiment, a pixel unit may include four sub-pixels. For example, the four sub-pixels may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel that emits white (W) light. Alternatively, the four sub-pixels may include a red sub-pixel, a blue sub-pixel, and two green sub-pixels. In an exemplary embodiment, the four sub-pixels may be arranged in a horizontally parallel, vertically parallel, square, or diamond shape, etc., and this disclosure does not limit the arrangement.

[0056] Figure 3 This is a schematic diagram of an equivalent circuit for a pixel driving circuit. In an exemplary embodiment, the pixel driving circuit can be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C, or 8T1C structure. Figure 3 As shown, the pixel driving circuit may include 7 transistors (first transistor T1 to seventh transistor T7) and 1 capacitor C. The pixel driving circuit is connected to 6 signal lines (data signal line D, first scan signal line S1, second scan signal line S2, light emission signal line E, initial signal line INIT and first power supply line VDD).

[0057] In an exemplary embodiment, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The first node N1 is connected to the first terminal of the third transistor T3, the second terminal of the fourth transistor T4, and the second terminal of the fifth transistor T5, respectively. The second node N2 is connected to the second terminal of the first transistor, the first terminal of the second transistor T2, the gate electrode of the third transistor T3, and the second terminal of the capacitor C, respectively. The third node N3 is connected to the second terminal of the second transistor T2, the second terminal of the third transistor T3, and the first terminal of the sixth transistor T6, respectively.

[0058] In an exemplary embodiment, the first end of capacitor C is connected to the first power line VDD, and the second end of capacitor C is connected to the second node N2, that is, the second end of capacitor C is connected to the gate electrode of the third transistor T3.

[0059] The gate electrode of the first transistor T1 is connected to the second scan signal line S2, the first terminal of the first transistor T1 is connected to the initial signal line INIT, and the second terminal of the first transistor is connected to the second node N2. When the on-level scan signal is applied to the second scan signal line S2, the first transistor T1 transmits the initial voltage to the gate electrode of the third transistor T3 to initialize the charge on the gate electrode of the third transistor T3.

[0060] The gate electrode of the second transistor T2 is connected to the first scan signal line S1, the first terminal of the second transistor T2 is connected to the second node N2, and the second terminal of the second transistor T2 is connected to the third node N3. When a conduction-level scan signal is applied to the first scan signal line S1, the second transistor T2 connects the gate electrode of the third transistor T3 to its second terminal.

[0061] The gate electrode of the third transistor T3 is connected to the second node N2, meaning the gate electrode of the third transistor T3 is connected to the second terminal of the capacitor C. The first terminal of the third transistor T3 is connected to the first node N1, and the second terminal of the third transistor T3 is connected to the third node N3. The third transistor T3 can be called the driving transistor. The amount of driving current flowing between the first power line VDD and the second power line VSS is determined by the potential difference between its gate electrode and its first terminal.

[0062] The gate electrode of the fourth transistor T4 is connected to the first scan signal line S1, the first electrode of the fourth transistor T4 is connected to the data signal line D, and the second electrode of the fourth transistor T4 is connected to the first node N1. The fourth transistor T4 can be called a switching transistor, scanning transistor, etc. When a conduction level scan signal is applied to the first scan signal line S1, the fourth transistor T4 causes the data voltage of the data signal line D to be input to the pixel driving circuit.

[0063] The gate electrode of the fifth transistor T5 is connected to the light-emitting signal line E, the first electrode of the fifth transistor T5 is connected to the first power supply line VDD, and the second electrode of the fifth transistor T5 is connected to the first node N1. The gate electrode of the sixth transistor T6 is connected to the light-emitting signal line E, the first electrode of the sixth transistor T6 is connected to the third node N3, and the second electrode of the sixth transistor T6 is connected to the first electrode of the light-emitting element EL. The fifth transistor T5 and the sixth transistor T6 can be referred to as light-emitting transistors. When a conduction-level light-emitting signal is applied to the light-emitting signal line E, the fifth transistor T5 and the sixth transistor T6 form a driving current path between the first power supply line VDD and the second power supply line VSS, causing the light-emitting element EL to emit light.

[0064] The gate electrode of the seventh transistor T7 is connected to the second scan signal line S2, the first electrode of the seventh transistor T7 is connected to the initial signal line INIT, and the second electrode of the seventh transistor T7 is connected to the first electrode of the light-emitting element EL. When the on-level scan signal is applied to the second scan signal line S2, the seventh transistor T7 transmits the initial voltage to the first electrode of the light-emitting element EL to initialize or release the accumulated charge in the first electrode of the light-emitting element EL.

[0065] In an exemplary embodiment, the light-emitting element EL can be an OLED, including a stacked first electrode, an organic light-emitting layer and a second electrode, or it can be a QLED, including a stacked first electrode, a quantum dot light-emitting layer and a second electrode. In this embodiment, the first electrode can be an anode and the second electrode can be a cathode. This disclosure does not limit this.

[0066] In an exemplary embodiment, the second electrode of the light-emitting element EL is connected to the second power line VSS, the signal of the second power line VSS is a continuously provided low-level signal, and the signal of the first power line VDD is a continuously provided high-level signal.

[0067] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 can be either P-type transistors or N-type transistors. Using the same type of transistor in the pixel driving circuit can simplify the process flow, reduce the processing difficulty of the display substrate, and improve the product yield. In some possible implementations, the first transistor T1 to the seventh transistor T7 may include both P-type and N-type transistors.

[0068] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 can be a low-temperature polycrystalline silicon (LTPS) thin-film transistor, or an oxide thin-film transistor, or a combination of both. The active layer of the LTPS is made of low-temperature polycrystalline silicon, while the active layer of the oxide thin-film transistor is made of oxide. LTPS transistors have advantages such as high mobility and fast charging, while oxide thin-film transistors have advantages such as low leakage current. Integrating LTPS and oxide thin-film transistors onto a single display substrate to form a low-temperature polycrystalline oxide (LTPO) display substrate leverages the advantages of both, enabling low-frequency driving, reducing power consumption, and improving display quality.

[0069] The following example illustrates the operation of a pixel driving circuit, where all seven transistors are P-type transistors:

[0070] In the first stage, A1, also known as the reset stage, the signal on the second scan signal line S2 is low, while the signals on the first scan signal line S1 and the light-emitting signal line E are high. The low signal on the second scan signal line S2 turns on the first transistor T1 and the seventh transistor T7. The turn on of the first transistor T1 provides the initial voltage of the initial signal line INIT to the second node N2, initializing capacitor C and clearing the existing data voltage within it. The turn on of the seventh transistor T7 provides the initial voltage of the initial signal line INIT to the first electrode of the OLED, initializing (resetting) the first electrode of the OLED, clearing its internal pre-stored voltage, and completing the initialization. The high signals on the first scan signal line S1 and the light-emitting signal line E turn off the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6; during this stage, the OLED does not emit light.

[0071] The second stage, A2, is called the data writing stage or threshold compensation stage. During this stage, the signal on the first scan signal line S1 is low, while the signals on the second scan signal line S2 and the light emission signal line E are high. The data signal line D outputs a data voltage. Because the second terminal of capacitor C is low, the third transistor T3 is turned on. The low signal on the first scan signal line S1 turns on the second transistor T2 and the fourth transistor T4. The turn-on of transistors T2 and T4 allows the data voltage output from data signal line D to be supplied to the second node N2 via the first node N1, the turned-on third transistor T3, the third node N3, and the turned-on second transistor T2. The difference between the data voltage output from data signal line D and the threshold voltage of the third transistor T3 is charged into capacitor C. The voltage at the second terminal of capacitor C (second node N2) is Vd - |Vth|, where Vd is the data voltage output from data signal line D and Vth is the threshold voltage of the third transistor T3. The high signal on the second scan signal line S2 turns off the first transistor T1 and the seventh transistor T7. The signal on the light-emitting signal line E is a high-level signal, which disconnects the fifth transistor T5 and the sixth transistor T6.

[0072] The third stage, A3, is called the light-emitting stage. During this stage, the light-emitting signal line E is at a low level, while the first scan signal line S1 and the second scan signal line S2 are at a high level. The low level of the light-emitting signal line E turns on the fifth transistor T5 and the sixth transistor T6. Because a voltage Vd-|Vth| was written to the second terminal of capacitor C in the previous stage, the third transistor T3 remains on in this stage. The power supply voltage output from the first power line VDD provides a driving voltage to the first electrode of the OLED through the on-state fifth transistor T5, third transistor T3, and sixth transistor T6, driving the OLED to emit light.

[0073] During the pixel driving circuit operation, the driving current flowing through the third transistor T3 (driving transistor) is determined by the voltage difference between its gate electrode and its first electrode. Since the voltage at the second node N2 is Vdata - |Vth|, the driving current of the third transistor T3 is:

[0074] I = K * (Vgs - Vth) 2 =K*[(Vdd-Vd+|Vth|)-Vth] 2 =K*(Vdd-Vd) 2

[0075] Where I is the driving current flowing through the third transistor T3, which is the driving current driving the OLED, K is a constant, Vgs is the voltage difference between the gate electrode and the first electrode of the third transistor T3, Vth is the threshold voltage of the third transistor T3, Vd is the data voltage output by the data signal line D, and Vdd is the power supply voltage output by the first power supply line VDD.

[0076] Figure 4 This is a cross-sectional structural diagram of a display substrate in an exemplary embodiment, illustrating the structure of three sub-pixels of the display substrate. For example... Figure 4 As shown, on a plane perpendicular to the display substrate, the display substrate may include a driving circuit layer 102 disposed on the substrate 101, a display structure layer 103 disposed on the side of the driving circuit layer 102 away from the substrate 101, an encapsulation layer 104 disposed on the side of the display structure layer 103 away from the substrate 101, a touch layer 105 disposed on the side of the encapsulation layer 104 away from the substrate 101, and a color filter layer 106 disposed on the side of the touch layer 105 away from the substrate 101. In some possible implementations, the display substrate may include other film layers, such as spacers, etc., which are not limited herein.

[0077] In some exemplary embodiments, the substrate 101 may be a flexible substrate or a rigid substrate. The flexible substrate may include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked together. The materials of the first and second flexible material layers may be polyimide (PI), polyethylene terephthalate (PET), or surface-treated polymer soft film, etc. The materials of the first and second inorganic material layers may be silicon nitride (SiNx) or silicon oxide (SiOx), etc., to improve the substrate's resistance to water and oxygen. The material of the semiconductor layer may be amorphous silicon (a-Si).

[0078] In some exemplary embodiments, the driving circuit layer 102 for each sub-pixel may include a plurality of transistors and storage capacitors constituting a pixel driving circuit. Figure 4The illustration uses an example where each sub-pixel includes a driving transistor and a storage capacitor. In some possible implementations, the driving circuit layer 102 of each sub-pixel may include: a first insulating layer 201 disposed on a substrate; an active layer disposed on the first insulating layer; a second insulating layer 202 covering the active layer; a gate electrode and a first capacitor electrode disposed on the second insulating layer 202; a third insulating layer 203 covering the gate electrode and the first capacitor electrode; a second capacitor electrode disposed on the third insulating layer 203; a fourth insulating layer 204 covering the second capacitor electrode, with vias formed in the second insulating layer 202, the third insulating layer 203, and the fourth insulating layer 204, exposing the active layer; a source electrode and a drain electrode disposed on the fourth insulating layer 204, the source electrode and the drain electrode being connected to the active layer through vias; and a planarization layer 205 covering the aforementioned structure, with vias formed in the planarization layer 205, exposing the drain electrode. The active layer, the gate electrode, the source electrode, and the drain electrode constitute the driving transistor 210, and the first capacitor electrode and the second capacitor electrode constitute the storage capacitor 211.

[0079] In some exemplary embodiments, the display structure layer 103 may include an anode 301, a pixel definition layer 302, a light-emitting functional layer 303, and a cathode 304. The anode 301 is disposed on the planarization layer 205 and connected to the drain electrode of the driving transistor 210 through a via formed in the planarization layer 205. The pixel definition layer 302 is disposed on the anode 301 and the planarization layer 205, and has a pixel opening that exposes the anode 301. The light-emitting functional layer 303 is at least partially disposed within the pixel opening and is connected to the anode 301. The cathode 304 is disposed on the light-emitting functional layer 303 and is connected to the light-emitting functional layer 303. The light-emitting element may include the anode 301, the light-emitting functional layer 303, and the cathode 304. The light-emitting functional layer 303 emits light of a corresponding color under the drive of the anode 301 and the cathode 304. The light-emitting area of ​​the light-emitting element may include at least the pixel opening where the light-emitting functional layer 303 is located.

[0080] In some exemplary embodiments, the light-emitting functional layer may include an emitting layer (EML) and one or more films selected from the following: a hole injection layer (HIL), a hole transport layer (HTL), a hole block layer (HBL), an electron block layer (EBL), an electron injection layer (EIL), and an electron transport layer (ETL). Driven by the voltages of the anode and cathode, the light-emitting layer material emits light at the required grayscale level.

[0081] In some exemplary embodiments, the light-emitting layers of light-emitting elements of different colors are different. For example, a red light-emitting element includes a red light-emitting layer, a green light-emitting element includes a green light-emitting layer, and a blue light-emitting element includes a blue light-emitting layer. To reduce process complexity and improve yield, the hole injection layer and hole transport layer on one side of the light-emitting layer can be common layers, and the electron injection layer and electron transport layer on the other side of the light-emitting layer can also be common layers. In some exemplary embodiments, any one or more of the hole injection layer, hole transport layer, electron injection layer, and electron transport layer can be fabricated in a single process (single vapor deposition process or single inkjet printing process), but isolation is achieved through surface steps of the formed film layers or through surface treatment. For example, any one or more of the hole injection layer, hole transport layer, electron injection layer, and electron transport layer corresponding to adjacent sub-pixels can be isolated. In some exemplary embodiments, the light-emitting functional layer can be formed by vapor deposition using a fine metal mask (FMM) or an open mask, or by blade coating, spin coating, and inkjet processes.

[0082] In some exemplary embodiments, the encapsulation layer 104 may include a first encapsulation layer 401, a second encapsulation layer 402, and a third encapsulation layer 403 stacked together. The first encapsulation layer 401 and the third encapsulation layer 403 may be made of inorganic materials, while the second encapsulation layer 402 may be made of organic materials. The second encapsulation layer 402 is disposed between the first encapsulation layer 401 and the third encapsulation layer 403 to ensure that external moisture cannot enter the light-emitting element.

[0083] In some exemplary embodiments, the touch layer 105 can be disposed on the encapsulation layer 104 of the display substrate, forming a Touch on Thin Film Encapsulation (TFE) structure. By integrating the touch layer onto the display substrate, an external touch module (TSP) is unnecessary, meeting product requirements such as thinness and narrow bezels. In an exemplary embodiment, along the direction away from the substrate 101, the touch layer 105 may sequentially include a first wiring layer (TMA), a touch interlayer insulating layer (TLD) 52, a second wiring layer (TMB), and a touch protection layer (TOC) 54. Forming this type of touch layer 105 generally requires four masks. The first wiring layer may include multiple first electrodes 51, and the second wiring layer may include multiple second electrodes 53. One of the first electrodes 51 and the second electrode 53 may be a touch electrode, and the other may be a sensing electrode. The first wiring layer or the second wiring layer may also include multiple touch signal connection lines to facilitate signal transmission with external touch chips and other structures. This disclosure does not limit this.

[0084] In some exemplary embodiments, a color filter layer 106 may be disposed on the touch layer 105. The color filter layer 106 may include: a plurality of filter units 62 of different colors, a black matrix 61 located between the different filter units 62, and a color filter protection layer (COC) 63 located on the side of the black matrix 61 and the plurality of filter units 62 away from the substrate 10. Forming this structure of the color filter layer 106 generally requires five masks. In some examples, the plurality of filter units 62 of the color filter layer 106 may include: a plurality of red filter units, a plurality of green filter units, and a plurality of blue filter units. The filter units of different colors may be correspondingly disposed to light-emitting elements emitting different colors. For example, a blue filter unit may be correspondingly disposed to a blue light-emitting element, and the orthographic projection of the blue filter unit onto the substrate and the orthographic projection of the light-emitting area of ​​the blue light-emitting element onto the substrate may at least partially overlap; for example, the orthographic projection of the blue filter unit onto the substrate may cover the orthographic projection of the light-emitting area of ​​the blue light-emitting element onto the substrate. In this example, the filter unit allows single-color light to pass through and absorbs other colors of light. By employing the technology of integrating color filters into the encapsulation layer (COE) to form a color filter layer 106, a polarizer can be replaced, which helps to improve the light output efficiency of the display substrate, reduce the power consumption of the display substrate, and improve the battery life of the display device.

[0085] However, the light extraction efficiency of the COE structure display substrate is not high, and its reflectivity is high in the dark, resulting in poor dark-state display performance. Furthermore, the fabrication of the touch layer 105 and the color filter layer 106 requires the use of nine photomasks, making the fabrication process complex and costly.

[0086] This disclosure provides a display substrate, including: a substrate, a display structure layer disposed on the substrate, and a color filter layer disposed on the side of the display structure layer away from the substrate;

[0087] The display structure layer includes a pixel definition layer and multiple light-emitting elements of different colors. The pixel definition layer includes multiple pixel openings, and the light from the light-emitting elements is emitted through the pixel openings.

[0088] The color filter layer includes multiple filter units of different colors, and the orthographic projection of the filter unit on the substrate at least partially overlaps with the orthographic projection of the light-emitting element emitting light of the same color on the substrate;

[0089] The color filter layer further includes a plurality of first lenses, the first lenses being located on the side of the filter unit of at least one color close to the substrate, the orthographic projection of the first lens on the substrate at least partially overlapping the orthographic projection of the pixel definition layer on the substrate; the refractive index of the first lens is less than the refractive index of the filter unit, and the light from the light-emitting element is deflected toward the center of the light-emitting element after illuminating the surface of the first lens.

[0090] The display substrate provided in this embodiment of the present disclosure has multiple first lenses disposed in the color filter layer. The first lenses are located on the side of the filter unit of at least one color close to the substrate. The orthographic projection of the first lens on the substrate at least partially overlaps with the orthographic projection of the pixel definition layer on the substrate. The refractive index of the first lens is less than the refractive index of the filter unit. The light emitted by the light-emitting element can undergo total internal reflection after shining from the filter unit onto the surface of the first lens, and deflect towards the center of the light-emitting element, which can increase the light extraction efficiency of the display substrate with COE structure.

[0091] Figure 5 This is a schematic cross-sectional view of a display substrate in an exemplary embodiment. Figure 5 and Figure 4 The difference lies in the touch layer 105 and the color filter layer 106; the rest of the structure can be referred to the aforementioned description. Figure 4 The description will not be repeated here. Figure 5 The other membrane layers are briefly illustrated in the diagram.

[0092] In an exemplary implementation, such as Figure 5As shown, the display structure layer 103 may include a first light-emitting element, a second light-emitting element, and a third light-emitting element. The first light-emitting element has a first light-emitting functional layer 303-1, the second light-emitting element has a second light-emitting functional layer 303-2, and the third light-emitting element has a third light-emitting functional layer 303-3. The first light-emitting functional layer 303-1 may be located at a first pixel opening, the second light-emitting functional layer 303-2 may be located at a second pixel opening, and the third light-emitting functional layer 303-3 may be located at a third pixel opening, and can emit light of different colors. For example, the first light-emitting element may be a red light-emitting element, the second light-emitting element may be a green light-emitting element, and the third light-emitting element may be a blue light-emitting element; this disclosure does not limit this. On the side of the encapsulation layer 104 away from the substrate 101, a first wiring layer, a plurality of first lenses 55, a second wiring layer, a plurality of filter units 62, a black matrix 61, and a color filter protective layer 63 may be sequentially disposed. The orthographic projections of the plurality of first electrodes 51 of the first wiring layer on the substrate 101 can be located within the range of the orthographic projection of the pixel definition layer 302 on the substrate 101. The orthographic projection of the first lens 55 on the substrate 101 can be located within the range of the orthographic projection of the pixel definition layer 302 on the substrate 101. The first lens 55 and the first electrode 51 can be arranged in a one-to-one correspondence. The first lens 55 can cover the first electrode 51. The orthographic projections of the plurality of second electrodes 53 of the second wiring layer on the substrate 101 can be located within the range of the orthographic projection of the first lens 55 on the substrate 101. The second electrode 53 can be connected to the corresponding first electrode 51 through the vias provided on the first lens 55. The first lens 55 can play an insulating role between the first wiring layer and the second wiring layer, which can save the setting of the interlayer insulation layer of the touch layer and reduce the number of film layers of the display substrate.

[0093] In an exemplary embodiment, the plurality of filter units 62 may include a first filter unit 62-1, a second filter unit 62-2, and a third filter unit 62-3. The orthographic projection of the plurality of filter units 62 on the substrate 101 may at least partially overlap with the orthographic projection of the light-emitting element emitting light of the same color on the substrate 101. The orthographic projection of the plurality of filter units 62 on the substrate 101 may cover the orthographic projection of the second electrode 53 on the substrate 101. A second electrode 53 may be covered by a filter unit 62 of one color. Adjacent filter units 62 may contact each other on the side of the first lens 55 away from the substrate 101. For example, the first filter unit 62-1 can be a red filter unit, and its orthographic projection on the substrate 101 can cover the first pixel opening. The second filter unit 62-2 can be a green filter unit, and its orthographic projection on the substrate 101 can cover the second pixel opening. The third filter unit 62-3 can be a blue filter unit, and its orthographic projection on the substrate 101 can cover the third pixel opening. Along the same direction within the substrate 101, the first filter unit 62-1, the second filter unit 62-2, and the third filter unit 62-3 can all cover the second electrode 53 located on the same side. By providing filter units 62 to cover the second electrode 53, the second electrode 53 can be protected, saving the need for a touch protection layer and reducing the number of film layers on the display substrate.

[0094] In an exemplary embodiment, the refractive index of the filter unit 62 can be greater than that of the first lens 55, and a total internal reflection surface can be formed between the filter unit 62 and the first lens 55. After the light ray A from the light-emitting element is incident on the surface of the first lens 55 from the filter unit 62, total internal reflection occurs, which helps to improve the light extraction efficiency of the display substrate. For example, in a plane perpendicular to the substrate 101, the cross-section of the first lens 55 can be trapezoidal. After the light ray A is incident on the sloping surface of the first lens 55 from the filter unit 62, total internal reflection occurs, and the light ray deflects towards the center of the light-emitting element. The center of the light-emitting element can be the geometric center of the light-emitting element, thereby improving the light extraction efficiency of the display substrate. In other embodiments, the cross-section of the first lens 55 in a plane perpendicular to the substrate 101 can be other shapes, such as triangles, inverted trapezoids, and polygons, etc., and this disclosure does not limit this.

[0095] In an exemplary embodiment, the refractive index of the filter unit 62 may be greater than or equal to 1.7 and less than or equal to 2.0, and the refractive index of the first lens 55 may be greater than or equal to 1.4 and less than or equal to 1.6. This disclosure does not impose any limitations on these aspects.

[0096] In an exemplary embodiment, the material of the first lens 55 may be optical adhesive, and this disclosure does not limit this.

[0097] In an exemplary embodiment, the first lens 55 may include a top surface, a bottom surface, and a ramp surface connecting the top and bottom surfaces, wherein the bottom surface is the surface closer to the substrate 101, and the top surface is the surface farther from the substrate 101. Figure 5 As shown, in the direction away from the substrate 101, the sloped surface of the first lens 55 is inclined away from the center of the pixel opening. The sloped surface of the first lens 55 and the substrate 101 have a first included angle r1, which can be greater than or equal to 40 degrees and less than or equal to 80 degrees, so that the light from the light-emitting element can undergo total internal reflection after shining on the sloped surface. The size of the first included angle r1 can be set as needed, and this disclosure does not limit it.

[0098] In an exemplary embodiment, the thickness of the plurality of filter units 62 may be the same, and the thickness of the filter unit 62 may be the maximum dimension of the filter unit 62 in the direction perpendicular to the substrate 101. For example, the thickness H of the filter unit 62 may be greater than or equal to 2 micrometers and less than or equal to 6 micrometers, and this disclosure does not limit it.

[0099] In an exemplary embodiment, the thickness of the first lens 55 (not shown) can be uniform, and the thickness of the first lens 55 can be the maximum dimension of the first lens 55 in the direction perpendicular to the substrate 101. For example, the thickness of the first lens 55 can be greater than or equal to 1.5 micrometers and less than or equal to 4 micrometers. By controlling the thickness of the first lens 55 and the tilt angle of the slope surface, the light from the light-emitting element can be projected onto the slope surface as much as possible. The thickness of the first lens 55 can be set as needed. Figure 5 In this process, the thickness of the first lens 55 is less than the thickness of the filter unit 62, but this disclosure does not impose any limitation on this.

[0100] In an exemplary embodiment, the orthographic projection of the black matrix 61 on the substrate 101 can be located between different filter units 62, and the orthographic projection of the black matrix 61 on the substrate 101 can be located within the range of the orthographic projection of the first lens 55 on the substrate 101. The color filter protective layer 63 can cover the black matrix 61 and the filter units 62.

[0101] In an exemplary embodiment, the orthogonal projection of the black matrix 61 onto the substrate 101 can cover the orthogonal projections of the first electrode 51 and the second electrode 53 onto the substrate 101, which helps to block the reflections of the first electrode 51 and the second electrode 53 and improve the display effect.

[0102] Figure 6 This is a top view of the black matrix, the first lens, and the pixel definition layer in an exemplary embodiment; other structures are omitted. Figure 6As shown, in the plane of the substrate 101, the distance between the adjacent edges of the first lens 55 and the pixel definition layer 302 is the first distance S1, and the distance between the adjacent edges of the black matrix 61 and the pixel definition layer 302 is the second distance S2. The first distance S1 can be less than the second distance S2. Figure 6 The black matrix 61, the first lens 55, and the pixel definition layer 302 are illustrated in the diagram with rectangular orthographic projections onto the substrate 101. In the exemplary embodiment, the shapes of the black matrix 61, the first lens 55, and the pixel definition layer 302 can be set according to the actual pixel topography or process requirements. Two of the three shapes can be the same, or the three shapes can be completely different. For example, on a plane parallel to the display substrate, these shapes can be any one or more of the following: triangle, circle, ellipse, rectangle, other quadrilateral and polygonal shapes, irregular shapes, etc. On a plane perpendicular to the substrate, the cross-sectional shapes of the black matrix 61 and the pixel definition layer 302 can include trapezoids, inverted trapezoids, or mushroom shapes (T-shapes), etc. This disclosure does not limit these features.

[0103] In an exemplary embodiment, the first distance S1 may be less than or equal to 4 micrometers, and the first distance S1 between different adjacent edges of the first lens 55 and the pixel definition layer 302 may be different, which is not limited in this disclosure.

[0104] like Figure 6 As shown, the orthographic projection of the edge of the first lens 55 onto the substrate 101 lies within the range of the orthographic projection of the pixel definition layer 302 onto the substrate 101. In this case, the first distance S1 can be less than or equal to 4 micrometers. In other embodiments, the orthographic projection of the edge of the pixel definition layer 302 onto the substrate 101 can lie within the range of the orthographic projection of the first lens 55 onto the substrate 101. In this case, the first distance S1 can be less than or equal to 2 micrometers. The relationship between the orthographic projections of adjacent edges of the first lens 55 and the pixel definition layer 302 onto the substrate 101 can be set as needed. For example, the first distance S1 around light-emitting elements of the same color can be the same, and the first distance S1 around light-emitting elements of different colors can be the same or different. This disclosure does not limit this.

[0105] In an exemplary embodiment, the second distance S2 can be greater than or equal to 3 micrometers and less than or equal to 7 micrometers. The second distance S2 between different adjacent edges of the black matrix 61 and the pixel definition layer 302 can be different, and this disclosure does not limit it.

[0106] In this embodiment, by organically combining the touch layer 105 and the color filter layer 106, the number of film layers can be reduced, the number of masks used in the fabrication process can be decreased, the fabrication efficiency can be improved, and the cost can be saved. By setting the position, thickness, and refractive index relationship between the filter unit 62 and the first lens 55, a total internal reflection surface can be formed between them, improving the light extraction efficiency of the display substrate and enhancing the display effect.

[0107] Figure 7 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment. Figure 7 and Figure 5 The difference lies in the filter unit 62, and the inclusion of an isolation section 64; the remaining details can be found in the aforementioned description. Figure 5 The description will not be repeated here.

[0108] like Figure 7 As shown, the display substrate also includes an isolation portion 64 disposed on the same layer as the filter unit 62 of one of the colors. The filter unit 62 disposed on the same layer as the isolation portion 64 can be referred to as a first type of filter unit, and the filter units 62 of the other colors can be referred to as second type of filter units. The isolation portion 64 can cover the second electrode 53, and the orthogonal projection of the isolation portion 64 on the substrate 101 can be located within the range of the orthogonal projection of the first lens 55 on the substrate 101, so the isolation portion 64 can protect the second electrode 53. The "A and B disposed on the same layer" mentioned in this disclosure means that A and B are formed simultaneously in the same patterning process during the fabrication of the display substrate.

[0109] In an exemplary embodiment, the isolation section 64 may be disposed on the same layer as the filter unit 62 of one of the colors. Figure 7 The diagram illustrates the configuration of the isolation unit 64 and the second filter unit 62-2 on the same layer. Figure 7As shown, the second filter unit 62-2 can be integrated with the isolation portion 64 distributed around the second pixel opening. Around the second pixel opening, the first filter unit 62-1 and the third filter unit 62-3 can overlap with the second filter unit 62-2, and can both be located on the side of the second filter unit 62-2 away from the substrate 101. On the side of the second pixel opening closest to the first pixel opening, the black matrix 61 can be disposed on the surface of the first filter unit 62-1. On the side of the second pixel opening closest to the third pixel opening, the black matrix 61 can be disposed on the surface of the third filter unit 62-3. On the side where the first pixel opening is far from the second pixel opening and on the side where the third pixel opening is far from the second pixel opening, the first filter unit 62-1 and the third filter unit 62-3 can be in contact with each other and are located on the side where the isolation part 64 is far from the substrate 101. The orthographic projection of the isolation part 64 on the substrate 101 can be located within the range of the orthographic projections of the first filter unit 62-1 and the third filter unit 62-3 on the substrate 101. The black matrix 61 can be disposed between the first filter unit 62-1 and the third filter unit 62-3.

[0110] In an exemplary embodiment, in a direction perpendicular to the substrate 101, the isolation portion 64 and the second filter unit 62-2 may have a first height H1, and the first filter unit 62-1 and the third filter unit 62-3 may have a second height H2, wherein the second height H2 is greater than the first height H1. In an exemplary embodiment, both the first height H1 and the second height H2 may be greater than or equal to 2 micrometers and less than or equal to 6 micrometers, and this disclosure does not impose any limitations thereon.

[0111] In an exemplary embodiment, on the side of the second pixel opening close to the first pixel opening, the overlap size between the first filter unit 62-1 and the second filter unit 62-2 is the first overlap size L1. The first overlap size L1 can be the minimum size at which the first filter unit 62-1 and the second filter unit 62-2 overlap each other within the substrate 101. The first overlap size L1 can be greater than 4 micrometers.

[0112] In an exemplary embodiment, on the side of the second pixel opening close to the third pixel opening, the overlap size between the third filter unit 62-3 and the second filter unit 62-2 is the second overlap size L2. The second overlap size L2 can be the minimum size at which the third filter unit 62-3 and the second filter unit 62-2 overlap each other within the substrate 101. The second overlap size L2 can be greater than 4 micrometers.

[0113] In other embodiments, the isolation portion 64 may be disposed on the same layer as the first filter unit 62-1, or the isolation portion 64 may be disposed on the same layer as the third filter unit 62-3. These two cases can be referred to in the following description. Figure 7The description of the subject is omitted here, and this disclosure does not impose any limitations on it.

[0114] In this embodiment, by providing an isolation portion 64 on the same layer as the filter unit 62, and using the isolation portion 64 to cover the second electrode 53, the second electrode 53 can be protected immediately after the filter unit 62 of the first color is formed, resulting in better protection and without adding any manufacturing steps.

[0115] Figure 8 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment. Figure 8 and Figure 7 The difference lies in the position of the filter unit 62 and the isolation part 64. Figure 8 The illustration still uses the isolation unit 64 and the second filter unit 62-2 as an example of being arranged on the same layer. The rest can be referred to the above. Figure 7 The description will not be repeated here.

[0116] like Figure 8 As shown, a second filter unit 62-2 and an isolation portion 64 can be disposed on the side of the encapsulation layer 104 away from the substrate 101. On the side of the second filter unit 62-2 and the isolation portion 64 away from the substrate 101, a first wiring layer, a first lens 55, a second wiring layer, a first filter unit 62-1, and a third filter unit 62-3 can be disposed sequentially. On the side of the first filter unit 62-1 and the third filter unit 62-3 away from the substrate 101, a black matrix 61 and a color filter protective layer 63 can be disposed sequentially. The isolation portion 64 not only isolates the first electrode 51 from the encapsulation layer 104 but also reduces the via depth between the first electrode 51 and the second electrode 53. The first lens 55 can protect the first electrode 51, and the first filter unit 62-1 and the third filter unit 62-3 can protect the second electrode 53. The orthographic projections of the first electrode 51 and the second electrode 53 onto the substrate 101 can be located within the range of the orthographic projection of the isolation portion 64 onto the substrate 101, and the orthographic projection of the isolation portion 64 onto the substrate 101 can be located within the range of the orthographic projection of the first lens 55 onto the substrate 101. The second filter unit 62-2 can be integrated with the isolation portion 64 distributed around the second pixel opening.

[0117] In an exemplary embodiment, a second electrode 53 may be covered by a color filter unit 62, and adjacent filter units 62 may be in contact with each other on the side of the first lens 55 away from the substrate 101. Figure 8 As shown, the first filter unit 62-1 can cover the second electrode 53 located between the first pixel opening and the second pixel opening, and the third filter unit 62-3 can cover the second electrode 53 located around the third pixel opening. This disclosure does not limit this.

[0118] In an exemplary embodiment, the height of the first lens 55 may be greater than the first height H1 and less than the second height H2, and this disclosure does not limit this.

[0119] In the exemplary embodiment, the descriptions of dimensions and angles such as the first height H1, the second height H2, the first overlap dimension L1, and the second overlap dimension L2, as well as the refractive index relationship between the first lens 55 and the filter unit 62, can be found in the foregoing descriptions. Figure 7 The description will not be repeated here.

[0120] In this embodiment, by placing the isolation portion 64 and the filter unit 62 disposed on the same layer as the isolation portion 64 on the side of the first wiring layer close to the encapsulation layer, the isolation portion 64 can form an isolation between the first electrode 51 and the encapsulation layer 104, and also reduces the via depth between the first electrode 51 and the second electrode 53. The first electrode 51 is protected by the first lens 55, and the second electrode 53 is protected by the first filter unit 62-1 and the third filter unit 62-3, resulting in better protection and without increasing the manufacturing process.

[0121] Figure 9 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment. Figure 9 and Figure 8 The difference lies in the fact that the filter unit 62 and the isolation part 64 are set separately from each other, and the first lens 55 covers the filter unit 62, which is set in the same layer as the isolation part 64. Figure 9 The illustration still uses the isolation unit 64 and the second filter unit 62-2 as an example of being arranged on the same layer. The rest can be referred to the above. Figure 8 The description will not be repeated here.

[0122] like Figure 9 As shown, the second filter unit 62-2 can be separated from the isolation portion 64 distributed around the second pixel opening. The first lens 55 located around the second pixel opening can be configured as an integral structure, covering the second filter unit 62-2 and the isolation portion 64. In the direction perpendicular to the substrate 101, the second filter unit 62-2 and the first filter unit 62-1 do not overlap, and the second filter unit 62-2 and the third filter unit 62-3 do not overlap. The light A emitted by the first light-emitting element undergoes total internal reflection after illuminating the slope surface of the first lens 55 from the first filter unit 62-1. The reflected light is deflected towards the center of the first light-emitting element, which can increase the light extraction efficiency of the first sub-pixel. The light B emitted by the second light-emitting element is refracted after exiting the slope of the second filter unit 62-2 and entering the first lens 55. The refracted light is deflected towards the center of the second light-emitting element, which can increase the light extraction efficiency of the second sub-pixel. The emitted light of the third light-emitting element is similar to that of the first light-emitting element and will not be described again here.

[0123] In an exemplary embodiment, the second filter unit 62-2 includes a top surface, a bottom surface, and a sloping surface connecting the top and bottom surfaces. The bottom surface is the surface closer to the substrate 101, and the top surface is the surface farther from the substrate 101. Figure 9 As shown, in the direction away from the substrate 101, the sloped surface of the second filter unit 62-2 is inclined towards the center of the corresponding pixel opening. The sloped surface of the second filter unit 62-2 has a second included angle r2 with the substrate 101. The second included angle r2 can be greater than or equal to 95 degrees and less than or equal to 130 degrees, so that the light B from the second light-emitting element can be refracted after illuminating the first lens 55 from the sloped surface of the second filter unit 62-2. The size of the second included angle r2 can be set as needed, and this disclosure does not limit it.

[0124] In this embodiment, by isolating the isolation portion 64 and the filter unit 62 arranged in the same layer from each other, and by using the first lens 55 to cover the isolation portion 64 and the filter unit 62 arranged in the same layer, the light is refracted after passing through the filter unit 62 arranged in the same layer as the isolation portion 64, which can increase the light extraction efficiency without increasing the manufacturing process.

[0125] Figure 10 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment. Figure 10 and Figure 8 The difference lies in the placement of the first and second wiring layers. Figure 10 The illustration still uses the isolation unit 64 and the second filter unit 62-2 as an example of being arranged on the same layer. The rest can be referred to the above. Figure 8 The description will not be repeated here.

[0126] like Figure 10 As shown, a first wiring layer can be disposed on the side of the encapsulation layer 104 away from the substrate 101. A second filter unit 62-2 and an isolation portion 64 can be disposed on the side of the first wiring layer away from the substrate 101. On the side of the second filter unit 62-2 and the isolation portion 64 away from the substrate 101, a second wiring layer, a first lens 55, a first filter unit 62-1, and a third filter unit 62-3 can be sequentially disposed. On the side of the first filter unit 62-1 and the third filter unit 62-3 away from the substrate 101, a black matrix 61 and a color filter protective layer 63 can be sequentially disposed. The isolation portion 64 protects the first wiring layer, and the first lens 55 protects the second wiring layer. The parameters and effects of the related structures can be referred to the foregoing description of other embodiments, and will not be repeated here.

[0127] Figure 11 This is a schematic cross-sectional view of the display substrate in yet another exemplary embodiment. Figure 11 and Figure 10The difference lies in the fact that the filter unit 62 and the isolation part 64 are set separately from each other, and the first lens 55 covers the filter unit 62, which is set in the same layer as the isolation part 64. Figure 11 The illustration still uses the isolation unit 64 and the second filter unit 62-2 as an example of being arranged on the same layer. The rest can be referred to the above. Figure 10 The description will not be repeated here.

[0128] like Figure 11 As shown, the second filter unit 62-2 can be separated from the isolation portion 64 distributed around the second pixel opening. The first lens 55 located around the second pixel opening can be configured as an integral structure, covering the second filter unit 62-2 and the isolation portion 64. In the direction perpendicular to the substrate 101, the second filter unit 62-2 and the first filter unit 62-1 do not overlap, and the second filter unit 62-2 and the third filter unit 62-3 do not overlap. The light A emitted by the first light-emitting element undergoes total internal reflection after illuminating the slope surface of the first lens 55 from the first filter unit 62-1. The reflected light is deflected towards the center of the first light-emitting element, which can increase the light extraction efficiency of the first sub-pixel. The light B emitted by the second light-emitting element is refracted after exiting the slope surface of the second filter unit 62-2 and entering the first lens 55. The refracted light is deflected towards the center of the second light-emitting element, which can increase the light extraction efficiency of the second sub-pixel. The emitted light of the third light-emitting element is similar to that of the first light-emitting element and will not be described again here.

[0129] In this embodiment, by isolating the isolation portion 64 and the filter unit 62 arranged in the same layer from each other, and by using the first lens 55 to cover the isolation portion 64 and the filter unit 62 arranged in the same layer, the light is refracted after passing through the filter unit 62 arranged in the same layer as the isolation portion 64, which can increase the light extraction efficiency without increasing the manufacturing process.

[0130] In an exemplary embodiment Figures 5 to 11 The structures in the document can be combined arbitrarily, and this disclosure does not impose any restrictions on this.

[0131] The display substrate provided in this embodiment can improve the light extraction efficiency of the display substrate and reduce the number of masks required in the fabrication process. It requires minimal modification to the original fabrication process and is suitable for widespread application.

[0132] This disclosure also provides a display device, including the display substrate described in any of the above embodiments. The display device can be any product or component with display function, such as an OLED display, a QLED display, an LED display, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator. This disclosure is not limited to this.

[0133] Although embodiments of the present disclosure have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present disclosure.

Claims

1. A display substrate, comprising: A substrate, a display structure layer disposed on the substrate, and a color filter layer disposed on the side of the display structure layer away from the substrate; The display structure layer includes a pixel definition layer and multiple light-emitting elements of different colors. The pixel definition layer includes multiple pixel openings, and the light from the light-emitting elements is emitted through the pixel openings. The color filter layer includes multiple filter units of different colors, and the orthographic projection of the filter unit on the substrate at least partially overlaps with the orthographic projection of the light-emitting element emitting light of the same color on the substrate; The color filter layer further includes a plurality of first lenses, the first lenses being located on the side of the filter unit of at least one color close to the substrate, the orthographic projection of the first lens on the substrate at least partially overlapping the orthographic projection of the pixel definition layer on the substrate; the refractive index of the first lens is less than the refractive index of the filter unit, and the light from the light-emitting element is deflected toward the center of the light-emitting element after illuminating the surface of the first lens.

2. The display substrate according to claim 1, wherein, It also includes a first wiring layer and a second wiring layer sequentially disposed along a direction away from the substrate, the first wiring layer and the second wiring layer being configured to implement touch functionality; the first wiring layer includes a plurality of first electrodes, the second wiring layer includes a plurality of second electrodes, the first electrodes and the second electrodes are disposed in pairs, and the paired first electrodes and second electrodes are interconnected; the orthographic projections of the first electrodes and the second electrodes on the substrate are located within the range of the orthographic projection of the first lens on the substrate; wherein... The first wiring layer is located on the side of the first lens closer to the substrate, and the second wiring layer is located on the side of the first lens away from the substrate; or, the second wiring layer is located on the side of the first lens closer to the substrate.

3. The display substrate according to claim 2, wherein, The orthographic projection of the filter unit on the substrate covers the orthographic projection of the corresponding pixel opening on the substrate; the filter unit of at least one color is located on the side of the second wiring layer away from the substrate.

4. The display substrate according to claim 3, wherein, The plurality of filter units include a first type of filter unit and a second type of filter unit, wherein the first type of filter unit includes filter units of one color, and the second type of filter unit includes filter units of the remaining colors; The color filter layer also includes multiple isolation sections, which are disposed on the same layer as the first type of filter unit, and the orthographic projection of the isolation section on the substrate is located within the range of the orthographic projection of the first lens on the substrate; The insulating portion covers the second electrode in a direction perpendicular to the substrate.

5. The display substrate according to claim 4, wherein, In a direction perpendicular to the substrate, the isolation portion surrounding the pixel opening and the first type of filter unit covering the pixel opening are integrally structured.

6. The display substrate according to claim 5, wherein, The second type of filter unit overlaps the first type of filter unit on the side away from the substrate, and exposes the pixel opening covered by the first type of filter unit.

7. The display substrate according to claim 6, wherein, Within the plane of the substrate, the minimum overlap between the second type of filter unit and the first type of filter unit is greater than 4 micrometers.

8. The display substrate according to claim 4, wherein, The first wiring layer is located on the side of the first lens closer to the substrate, and the second wiring layer is located on the side of the first lens away from the substrate; the isolation portion and the first type of filter unit are located on the side of the first wiring layer closer to the substrate.

9. The display substrate according to claim 4, wherein, The second wiring layer is located on the side of the first lens closer to the substrate; the isolation portion and the first type of filter unit are located on the side of the first wiring layer away from the substrate, and the isolation portion and the first type of filter unit are located on the side of the second wiring layer closer to the substrate.

10. The display substrate according to claim 8 or 9, wherein, The orthogonal projection of the first lens onto the substrate covers the orthogonal projection of the isolation portion and the first type of filter unit onto the substrate.

11. The display substrate according to claim 10, wherein, The first type of filter unit includes a top surface, a bottom surface, and a ramp surface connecting the top surface and the bottom surface. In a direction away from the substrate, the ramp surface of the first type of filter unit is inclined toward the center of the overlapping pixel openings.

12. The display substrate according to claim 11, wherein, The angle between the sloped surface of the first type of filter unit and the substrate is greater than or equal to 95 degrees and less than or equal to 130 degrees.

13. The display substrate according to any one of claims 1-9, wherein, The color filter layer also includes a black matrix, which is located on the side of the filter unit away from the substrate; the orthogonal projection of the black matrix onto the substrate is within the range of the orthogonal projection of the first lens onto the substrate.

14. The display substrate according to claim 13, wherein, Within the plane of the substrate, the distance between the first lens and the adjacent edges of the pixel definition layer is a first distance, and the distance between the black matrix and the adjacent edges of the pixel definition layer is a second distance, wherein the first distance is less than the second distance.

15. The display substrate according to claim 14, wherein, The orthographic projection of the edge of the first lens onto the substrate is within the range of the orthographic projection of the pixel definition layer onto the substrate, the first distance is less than or equal to 4 micrometers, and the second distance is greater than or equal to 3 micrometers and less than or equal to 7 micrometers.

16. The display substrate according to claim 14, wherein, The orthographic projection of the edge of the pixel definition layer onto the substrate is within the range of the orthographic projection of the first lens onto the substrate, the first distance is less than or equal to 2 micrometers, and the second distance is greater than or equal to 3 micrometers and less than or equal to 7 micrometers.

17. The display substrate according to claim 1, wherein, The refractive index of the filter unit is greater than or equal to 1.7 and less than or equal to 2.0, and the refractive index of the first lens is greater than or equal to 1.4 and less than or equal to 1.

6.

18. The display substrate according to claim 1, wherein, The first lens includes a top surface, a bottom surface, and a ramp surface connecting the top surface and the bottom surface. In a direction away from the substrate, the ramp surface of the first lens is inclined away from the center of the pixel opening.

19. The display substrate according to claim 18, wherein, The angle between the sloped surface of the first lens and the substrate is greater than or equal to 40 degrees and less than or equal to 80 degrees.

20. The display substrate according to claim 1, wherein, In the direction perpendicular to the substrate, the thickness of the filter unit is greater than or equal to 2 micrometers and less than or equal to 6 micrometers, and the thickness of the first lens is greater than or equal to 1.5 micrometers and less than or equal to 4 micrometers.

21. A display device comprising a display substrate as claimed in any one of claims 1-20.

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