Single-sensor-based multitask execution method, device, equipment and storage medium

Abstract

The disclosure provides a single-sensor-based multitask execution method and device, electronic equipment and storage medium. The method comprises: generating a first type of hardware interrupt at intervals of an execution cycle of a task that does not need to meet safety standards; if it is detected that the first type of hardware interrupt is generated, executing a first preset program of a task that needs to meet safety standards, including reading an electrical signal collected by a single sensor, and writing the analyzed electrical signal into a shared storage area; and based on the analyzed data, continuing to execute the task that needs to meet safety standards under the condition that the execution cycle is met, and triggering the generation of a second type of hardware interrupt regardless of whether the execution is continued; if it is detected that the second type of hardware interrupt is generated, executing a second preset program of a task that does not need to meet safety standards, including accessing the shared storage area, obtaining the analyzed data, and continuing to execute the task that does not need to meet safety standards based on the analyzed data. Accordingly, both software isolation and functional safety are met, and the cost of the sensor is reduced.

Description

Technical Field

[0001] This disclosure relates to the field of automotive electronic control and functional safety technology, and in particular to a multi-task execution method, apparatus, electronic device and storage medium based on a single sensor. Background Technology

[0002] As a key safety component in new energy vehicles, the on-board electronic parking system (hereinafter referred to as the "system") typically needs to meet the requirements of ASIL B (Automotive Safety Integrity Level B) for its functional safety. To balance functional safety and routine control, the system usually operates two types of tasks simultaneously: one is a safety-critical task that must meet ASIL B requirements, used to monitor the parking lock status and drive the emergency actuator; the other is a routine control task developed according to QM (Quality Management) processes, used to drive the parking actuator. Based on the functional safety principle of "interference-free operation," these two types of tasks must be strictly isolated to prevent potential failures in the QM task from affecting the ASIL B task. Existing technologies generally achieve this by configuring two independent position sensors: one for the QM main actuator and one for the ASIL B emergency actuator, supplemented by a software partitioning mechanism to ensure environmental isolation.

[0003] However, the above solution has obvious drawbacks: First, the dual-sensor setup will increase hardware costs; second, in the space-constrained parking actuator, the arrangement of the two sets of sensors and their wiring harnesses is difficult, affecting the product integration and reliability; finally, due to differences in manufacturing tolerances, installation deviations, or aging characteristics of different sensors, the two sensors are prone to inconsistent position information, which may lead to control logic conflicts or misjudgments. Summary of the Invention

[0004] In view of this, this disclosure provides a multi-task execution method based on a single sensor, the method being applied to a microcontroller, the microcontroller's operating environment including a first partition and a second partition that are isolated from each other, and a shared memory area accessible to both partitions; the multi-task includes tasks that must comply with security standards and are executed in the first partition, and tasks that do not need to comply with security standards and are executed in the second partition, the method comprising: A type of hardware interrupt is generated at intervals based on the execution cycle of the tasks that do not require compliance with security standards. If the first type of hardware interrupt is detected, the first preset program of the task that needs to meet the safety standard is executed. The first preset program is used to read the electrical signal collected by a single sensor, parse the electrical signal and write it into the shared storage area; and, if it is determined that its own execution cycle is met, the task that needs to meet the safety standard is continued to be executed based on the parsed data. Regardless of whether it continues to be executed, the second type of hardware interrupt is triggered. If the two types of hardware interrupts are detected, the second preset program for the task that does not need to comply with security standards is executed. The second preset program is used to access the shared storage area, obtain the parsed data, and continue to execute the task that does not need to comply with security standards based on the parsed data.

[0005] Optionally, before triggering the generation of the second type of hardware interrupt, the method further includes: The microcontroller's capture channel is configured to generate two types of hardware interrupts when a software event is triggered. Regardless of whether execution continues, two types of hardware interrupts are triggered, including: Regardless of whether the task requiring compliance with safety standards continues to be executed, an activation value is written to the interrupt request register bit corresponding to the capture channel in the microcontroller to trigger the capture channel to generate the second type of hardware interrupt.

[0006] Optionally, the execution cycle of the task that needs to meet security standards is a preset multiple of the execution cycle of the task that does not need to meet security standards, and the method further includes: Each time a hardware interrupt of the aforementioned type is detected, an increment count is performed. The step of continuing to execute the task that needs to meet the security standards based on the parsed data, after determining that its own execution cycle is met, includes: If the accumulated count result reaches the preset multiple, the task that needs to meet the safety standard will continue to be executed based on the parsed data, and the accumulated count result will be reset to zero.

[0007] Optionally, the single sensor is a parking lock position sensor, the task that needs to meet safety standards is a parking lock monitoring task, and the step of reading the electrical signal collected by the single sensor, parsing the electrical signal, and writing it into the shared storage area includes: Read the electrical signal collected by the parking lock position sensor, parse the electrical signal, and write the parsed parking lock current position data into the shared storage area; The process of continuing to execute the security-compliant task based on the parsed data includes: Based on the current position data of the parking lock, determine whether the parking lock has a position disengagement fault.

[0008] Optionally, the method further includes: If it is determined that the parking lock has a position disengagement fault, a fault control command is generated and stored in the shared storage area; The step of obtaining the parsed data and continuing to execute the task that does not need to comply with security standards based on the parsed data includes: The system acquires the current position data of the parking lock and the fault control command, and controls the parking lock to enter the position locking state based on the current position data of the parking lock and the fault control command.

[0009] Optionally, the method further includes: If it is determined that the parking lock has a position disengagement fault, then record the duration of the position disengagement fault of the parking lock; If the duration reaches a preset fault tolerance time interval, the emergency actuator associated with the parking lock is activated, so that the emergency actuator outputs a mechanical locking torque to the parking lock, thereby controlling the parking lock to enter the position locking state.

[0010] Optionally, before executing the preset procedure for the task that needs to comply with the safety standards, the method further includes: Configure the shared storage area to allow only read-only access by tasks that do not need to meet security standards; The preset program that executes the task that does not require compliance with security standards, thereby accessing the shared storage area and obtaining the parsed data, includes: The preset program for the task that does not require compliance with security standards is executed, thereby accessing the shared storage area in read-only mode to obtain the parsed data.

[0011] This disclosure also provides a multi-task execution device based on a single sensor. The device is a microcontroller, and the microcontroller operates in an environment comprising a first partition and a second partition that are isolated from each other, as well as a shared storage area accessible to both partitions. The multi-task execution includes tasks that must comply with security standards and are executed in the first partition, and tasks that do not need to comply with security standards and are executed in the second partition. The device includes: An interrupt unit is used to generate a type of hardware interrupt at intervals based on the execution cycle of the task that does not need to comply with security standards. The first execution unit is configured to execute a first preset program for the task that needs to meet the safety standards if the first type of hardware interrupt is detected. The first preset program is configured to read the electrical signal collected by a single sensor, parse the electrical signal and write it into the shared storage area; and, if it is determined that its own execution cycle is met, continue to execute the task that needs to meet the safety standards based on the parsed data, and trigger the generation of a second type of hardware interrupt regardless of whether it continues to execute. The second execution unit is used to execute a second preset program for the task that does not need to comply with security standards if the two types of hardware interrupts are detected. The second preset program is used to access the shared memory area, obtain the parsed data, and continue to execute the task that does not need to comply with security standards based on the parsed data.

[0012] This disclosure also provides an electronic device, including a communication interface, a processor, a memory, and a bus, wherein the communication interface, the processor, and the memory are interconnected via the bus; The memory stores machine-readable instructions, and the processor executes the above method by invoking the machine-readable instructions.

[0013] This disclosure also provides a machine-readable storage medium storing machine-readable instructions that, when called and executed by a processor, implement the above-described method.

[0014] Therefore, in the technical solution disclosed herein, the microcontroller generates a type of hardware interrupt at intervals corresponding to the execution cycles of tasks that do not require compliance with safety standards. When this interrupt is detected, tasks that require compliance with safety standards are executed, including reading and parsing the electrical signals acquired by a single sensor, writing the parsed data into the shared memory area, and continuing to execute safety-related operations when it is determined that its own execution cycle is met. Regardless of whether the operation continues to be executed, a type of hardware interrupt is triggered. When a type of hardware interrupt is detected, tasks that do not require compliance with safety standards are executed, including accessing the shared memory area to obtain the parsed data, and continuing to execute its control operations based on the data.

[0015] Through the above methods, the technical solution disclosed herein, using only one sensor, allows the task that needs to comply with safety standards to exclusively process the original signal and synchronizes data unidirectionally to the task that does not need to comply with safety standards through a shared storage area. This satisfies the functional safety requirement of "interference-free" while effectively avoiding the problems of increased hardware costs, limited installation space, and inconsistent data between sensors caused by dual-sensor solutions, thereby improving the system's integration, reliability, and economy. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is an exemplary embodiment illustrating a functional architecture diagram of an automotive electronic parking system in a related art. Figure 2 This is an exemplary embodiment illustrating another related technology's functional architecture of an automotive electronic parking system; Figure 3 This is an exemplary embodiment illustrating a functional architecture diagram of an automotive electronic parking system in this disclosure; Figure 4 This is a schematic diagram illustrating a multi-task execution architecture based on a single sensor, as shown in an exemplary embodiment. Figure 5 This is a flowchart illustrating an exemplary embodiment of a multi-task execution method based on a single sensor; Figure 6 This is a schematic diagram illustrating another multi-task execution architecture based on a single sensor, as shown in an exemplary embodiment. Figure 7 This is a schematic diagram illustrating another multi-task execution architecture based on a single sensor, as shown in an exemplary embodiment. Figure 8 This is an exemplary embodiment illustrating the hardware structure of an electronic device; Figure 9 This is a block diagram illustrating a multi-tasking device based on a single sensor, as shown in an exemplary embodiment. Detailed Implementation

[0018] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0019] It should be noted that the steps of the corresponding methods are not necessarily performed in the order shown and described in this disclosure in other embodiments. In some other embodiments, the methods may include more or fewer steps than those described in this disclosure. Furthermore, a single step described in this disclosure may be broken down into multiple steps in other embodiments; and multiple steps described in this disclosure may be combined into a single step in other embodiments.

[0020] As a key safety component in new energy vehicles, the on-board electronic parking system (hereinafter referred to as the "system") typically needs to meet ASIL B requirements for functional safety. To balance functional safety and routine control, the system usually operates two types of tasks simultaneously: one is a safety-critical task that meets ASIL B requirements, used to monitor the parking lock status and drive the emergency actuator; the other is a routine control task developed according to QM (Quality Management) processes, used to drive the parking actuator. Based on the functional safety principle of "interference-free operation," these two types of tasks must be strictly isolated to prevent potential failures in the QM task from affecting the ASIL B task. Existing technologies generally achieve this by configuring two independent position sensors: one for the QM main actuator and one for the ASIL B emergency actuator, supplemented by a software partitioning mechanism to ensure environmental isolation.

[0021] Please see Figure 1 , Figure 1 This is a schematic diagram illustrating the functional architecture of an electronic parking brake system in a related art, as shown in an exemplary embodiment. Figure 1 As shown, the parking lock microcontroller internally includes an ASIL B task execution area and a QM task execution area. The QM task execution area is mainly responsible for processing and executing routine functions, including receiving signals from the Hall position sensor through the Hall signal processing module and driving the actuator (brushless DC motor) by the parking lock function control module. The ASIL B task execution area focuses on safety monitoring. The parking lock status monitoring module is responsible for monitoring the system status and controlling the actuator (emergency actuator) when necessary. At the same time, the position signal processing module receives signals collected by the linear position sensor to ensure timely response in abnormal situations.

[0022] Please see Figure 2 , Figure 2 This is an exemplary embodiment illustrating another related technology's functional architecture of an automotive electronic parking system. (See diagram below.) Figure 2As shown, the parking lock microcontroller internally is divided into two independent memory areas by a memory protection unit: the left side is the QM memory area, which executes QM tasks, such as parking lock function control; the right side is the ASIL B safety memory area, which executes ASIL B tasks, such as parking lock status monitoring. Within the QM memory area, there is a Hall position signal processing module and a parking lock function control module, both driven by a type of interrupt (100 µs period) to achieve real-time control of actuators (such as brushless DC motors). Within the ASIL B safety memory area, there is a linear position signal processing module and a parking lock status monitoring module, scheduled by periodic tasks (1 ms period) to monitor the parking lock's safety status and respond to emergency actuators. Both areas run on the same operating system (OS) and share underlying hardware peripheral resources, but address space isolation is achieved through the memory protection unit to ensure that ASIL B tasks are not interfered with by QM tasks.

[0023] However, the above solution has obvious drawbacks: First, the dual-sensor setup will increase hardware costs; second, in the space-constrained parking actuator, the arrangement of the two sets of sensors and their wiring harnesses is difficult, affecting the product integration and reliability; finally, due to differences in manufacturing tolerances, installation deviations, or aging characteristics of different sensors, the two sensors are prone to inconsistent position information, which may lead to control logic conflicts or misjudgments.

[0024] In view of this, the present disclosure aims to propose a technical solution that enables the collaborative execution of tasks that need to comply with safety standards and tasks that do not need to comply with safety standards based on a single sensor, while meeting the functional safety isolation requirements.

[0025] The technical solution first generates a type of hardware interrupt at intervals corresponding to the execution cycle of the task that does not require compliance with security standards. Further, if the first type of hardware interrupt is detected, a first preset program for the task that requires compliance with security standards is executed. This first preset program reads electrical signals collected by a single sensor, parses the electrical signals, and writes them into the shared storage area. Additionally, if the execution cycle is satisfied, the task requiring compliance with security standards continues to be executed based on the parsed data. Regardless of whether execution continues, a second type of hardware interrupt is triggered. Finally, if the second type of hardware interrupt is detected, a second preset program for the task that does not require compliance with security standards is executed. This second preset program accesses the shared storage area, obtains the parsed data, and continues to execute the task that does not require compliance with security standards based on the parsed data.

[0026] For example, see Figure 3 , Figure 3 This is an exemplary embodiment illustrating a functional architecture diagram of an automotive electronic parking system according to this disclosure. (As shown...) Figure 3As shown, the system uses a single position sensor (compliant with ASIL B requirements) mounted on the drive shaft of the parking lock actuator to detect the real-time position of the locking pin. The parking lock microcontroller is internally divided into a first partition (ASIL B task execution area) and a second partition (QM task execution area) via the MPU, and a section of RAM (Random Access Memory) is configured as a shared storage area (not shown in the figure).

[0027] In this embodiment, the parking lock microcontroller configures the timer output channel GTM_ATOM with a QM task control cycle (e.g., 100 µs) to generate a type of hardware interrupt every 100 µs. Whenever the parking lock microcontroller detects this type of hardware interrupt, it executes an ASIL B task in the first partition: reading the raw electrical signal from the position sensor, converting it to a digital position value via an analog-to-digital converter, and writing the converted digital position value into the shared memory area; simultaneously, this task performs a parking lock safety check every 10 interrupts (i.e., 1 ms) (e.g., determining if the lock pin has unexpectedly disengaged), and regardless of whether a safety check is performed during the current type of hardware interrupt, it writes a trigger signal to the event capture channel GTM_TIM, forcing it to generate a type of hardware interrupt. Whenever the parking lock microcontroller detects this type of hardware interrupt, it executes a parking lock control task in the second partition: reading the parsed position data from the shared memory area and generating a PWM signal based on the read position data, thereby driving the brushless DC motor to complete the locking or unlocking action.

[0028] Through the above methods, the technical solution disclosed herein, using only one sensor, allows the task that needs to comply with safety standards to exclusively process the original signal and synchronizes data unidirectionally to the task that does not need to comply with safety standards through a shared storage area. This satisfies the functional safety requirement of "interference-free" while effectively avoiding the problems of increased hardware costs, limited installation space, and inconsistent data between sensors caused by dual-sensor solutions, thereby improving the system's integration, reliability, and economy.

[0029] It should be noted that this disclosure is not limited to parking lock monitoring tasks (ASIL B) and parking lock control tasks (QM). There are other tasks that need to comply with safety standards and tasks that do not need to comply with safety standards, such as overvoltage protection tasks (ASIL B) and state of charge estimation tasks (QM) in the battery management system, or automatic wiper control tasks (ASIL A) and rain sensor signal preprocessing tasks (QM), etc. This disclosure does not impose any restrictions on these tasks.

[0030] The following describes this disclosure using the parking lock monitoring task (ASIL B) and parking lock control task (QM) as examples, through specific embodiments and in conjunction with specific application scenarios.

[0031] Please see Figure 4 , Figure 4 This is a schematic diagram illustrating a multi-task execution architecture based on a single sensor, as an exemplary embodiment. Figure 4 As shown, the microcontroller internally comprises two isolated software partitions: the left partition is the first partition, used to run tasks that require compliance with safety standards, including signal processing and task execution; the right partition is the second partition, used to run tasks that do not require compliance with safety standards, including data acquisition and task execution. The microcontroller also has a shared memory area for storing data parsed by tasks requiring compliance with safety standards. Tasks requiring compliance with safety standards are triggered by a type of hardware interrupt, while tasks that do not require compliance are triggered by a type of hardware interrupt. The type of hardware interrupt is actively triggered by the first partition through software events, used to notify tasks that do not require compliance to read the parsed data and execute control logic. The entire architecture runs on an operating system, relying on hardware peripherals at the underlying level to achieve multi-task collaborative execution under a single sensor.

[0032] Please see Figure 5 , Figure 5 This is a flowchart illustrating an exemplary embodiment of a multi-task execution method based on a single sensor. The method is applied to a microcontroller whose operating environment includes a first partition and a second partition that are isolated from each other, and a shared memory area accessible to both partitions. The multi-task execution includes tasks that must comply with security standards and are executed in the first partition, and tasks that do not need to comply with security standards and are executed in the second partition. The method can perform the following steps: Step 502: Generate a type of hardware interrupt at intervals based on the execution cycle of the task that does not need to meet security standards.

[0033] For example, the microcontroller configures the timer output channel GTM_ATOM with the control cycle of the QM task (e.g., 100 µs) to generate a hardware interrupt every 100 µs.

[0034] One type of hardware interrupt refers to a deterministically triggered hardware interrupt event generated periodically by a timer in the microcontroller according to the control cycle (e.g., 100µs) of the QM task. Its triggering source is independent of the second partition software logic and is unaffected by the QM task execution state, ensuring the reliability and timing controllability of the interrupt. This type of hardware interrupt serves as the unified start source for the entire multi-task collaborative process, generating on time at the beginning of the execution cycle of each task that does not require compliance with safety standards, providing a baseline clock for subsequent tasks that do require compliance with safety standards.

[0035] Step 504: If the first type of hardware interrupt is detected, execute the first preset program of the task that needs to meet the safety standard. The first preset program is used to read the electrical signal collected by the single sensor, parse the electrical signal and write it into the shared storage area; and, if it is determined that its own execution cycle is met, continue to execute the task that needs to meet the safety standard based on the parsed data, and regardless of whether it continues to execute, trigger the generation of the second type of hardware interrupt.

[0036] For example, after the system is powered on, the parking lock microcontroller first executes the initialization task in the ASIL B partition, completing the configuration of the memory protection unit, clearing the shared memory area, and performing a self-test of the position sensor. Subsequently, whenever the parking lock microcontroller detects a type of hardware interrupt, it will execute the ASIL B task in the first partition: read the original electrical signal of the position sensor, convert it into a digital position value after conversion by an analog-to-digital converter, and write the parsed digital position value into the shared memory area. At the same time, this task performs a parking lock safety check every 10 interrupts (i.e., 1 ms) (such as determining whether the lock pin has unexpectedly disengaged), and regardless of whether the safety check is performed during the current type of hardware interrupt, a trigger signal is written to the event capture channel GTM_TIM to force it to generate a type of hardware interrupt.

[0037] One type of hardware interrupt is used to synchronously initiate the ASIL B task for sampling and analysis of a single sensor. The position sensor, conforming to ASIL B requirements, is installed on the mechanical transmission path of the parking lock to sense the physical displacement of the locking pin. The design of "triggering a type 2 interrupt regardless of whether a safety check is performed" aims to decouple the safety check cycle (1ms) from the sensor sampling frequency (100us), ensuring that the QM task always uses the latest position information and avoiding control lag caused by the low-frequency execution of the ASIL B task. ASIL B is one of the functional safety levels defined in the ISO 26262 standard, applicable to automotive electronic systems where a failure could result in moderate personal injury, and the probability of exposure and controllability are at a moderate level.

[0038] Step 506: If the second type of hardware interrupt is detected, execute the second preset program of the task that does not need to comply with security standards. The second preset program is used to access the shared memory area, obtain the parsed data, and continue to execute the task that does not need to comply with security standards based on the parsed data.

[0039] For example, whenever the parking lock microcontroller detects the generation of one of these two types of hardware interrupts, it will execute the parking lock control task in the second partition: read the parsed position data from the shared memory area, and generate a PWM signal based on the read position data, thereby driving the brushless DC motor to complete the locking or unlocking action.

[0040] The second type of hardware interrupt is generated by software triggering the ASIL B task in response to the event capture channel. Essentially, it's a data readiness notification sent from the ASIL B task to the QM task, rather than a periodic clock signal. The PWM signal, or Pulse Width Modulation signal, has its duty cycle and polarity determined by the deviation between the current locking pin position and the target position. It controls the rotation direction and torque of the brushless DC motor. When the target is "locked," the motor rotates forward, pushing the locking pin into the gear slot to achieve mechanical locking; when the target is "unlocked," the motor rotates in reverse, releasing the locking pin and disengaging the parking state. The entire process relies on reliable position data provided by the ASIL B task in the shared memory area. The QM task only executes deterministic control algorithms and does not participate in safety judgments, thus balancing functional safety and high-performance control under a single-sensor premise.

[0041] In one embodiment shown, before triggering the generation of the second type of hardware interrupt, the method further includes: configuring the capture channel of the microcontroller to generate the second type of hardware interrupt when a software event is received; the step of triggering the generation of the second type of hardware interrupt regardless of whether execution continues includes: regardless of whether the task that needs to comply with the security standard continues to be executed, writing an activation value to the interrupt request register bit in the microcontroller corresponding to the capture channel to trigger the capture channel to generate the second type of hardware interrupt.

[0042] For example, see Figure 6 , Figure 6 This is a schematic diagram illustrating another multi-task execution architecture based on a single sensor, as shown in an exemplary embodiment. Figure 6 As shown, the parking lock microcontroller includes an ASIL B memory area and a QM memory area, which respectively run tasks that need to comply with safety standards (parking lock status monitoring tasks) and tasks that do not need to comply with safety standards (parking lock function control tasks). A type of hardware interrupt (with a period of 100 µs) is triggered by the timer output channel, entering the ASIL B interrupt service routine OS_ISR(BLDC_ATOM_ASIL_B). This routine first increments the millisecond counter Os_1ms_Cnt and calls the position signal processing function Position_Proc() to parse the electrical signal acquired by the single sensor. When the counter reaches 10 times (i.e., 1 ms), the ASIL B task execution cycle is reached, and the ASIL B task OS_1ms_Task_ASILB() is executed to monitor the parking lock status. Subsequently, regardless of whether the parking lock status monitoring task is executed, the QM_ISR_Activate() function is called to write an activation value to the interrupt request register associated with the capture channel, thereby triggering a type of hardware interrupt. The second type of interrupt is responded to by the capture channel, enters the interrupt service routine ISR (PLK_GTMTIM_QM) in the QM memory area, retrieves the parsed position data from it, and executes the parking lock function control.

[0043] The capture channel refers to a hardware module within the microcontroller, such as GTM_TIM, used to detect specific events and generate interrupts. It can trigger interrupts based on preset conditions (such as the rising or falling edge of an input signal) or manually via software events. These two types of hardware interrupts are actively triggered by software events, rather than relying on external hardware signals, ensuring complete control of data updates for ASIL B tasks. The interrupt request register records the status of interrupt requests. Each interrupt source typically corresponds to a specific register bit; when this bit is set to an active value (e.g., set to 1), it indicates that an interrupt request has occurred. Writing to the interrupt request register bit is an atomic operation, preventing interrupt loss or false triggering due to multi-task contention.

[0044] Please see Figure 7 , Figure 7 This is a schematic diagram illustrating another multi-task execution architecture based on a single sensor, as shown in an exemplary embodiment. Figure 7 As shown, the parking lock microcontroller generates a carrier cycle signal with a period of 100 µs through the output channel (GTM_ATOM) of the timer (GTM_ATOM). This signal serves as the trigger source for a type I hardware interrupt (BLDC_ATOM_ASIL_B), driving the timing reference of the entire control system. At the beginning of each carrier cycle, the system enters the ASIL B interrupt service routine (BLDC_ATOM_ASIL_B) to perform position signal acquisition and processing: reading the analog signal from a single position sensor, converting it to digital, parsing the current lock pin position, and writing the result to the shared memory area; every 10 carrier cycles (i.e., 1 ms), a complete parking lock safety monitoring task is also executed to determine if the parking lock has any faults such as position disengagement. Crucially, regardless of whether the 1 ms parking lock safety monitoring task is executed, the interrupt service routine writes an activation value to the interrupt request register corresponding to the capture channel (PLK_GTMTIM_QM) before ending, thus triggering the type II hardware interrupt in software. The interrupt then wakes up the control task PLK_GTMTIM_QM in the QM memory area, causing it to read the parsed position data from the shared memory area and generate a PWM signal to drive the BLDC (Brushless Direct Current Motor) to complete the locking or unlocking action.

[0045] The carrier period is the basic time unit for motor control and sensor sampling. The BLDC, as the main actuator of the parking lock, is controlled by the QM task, but the position data it relies on is provided unidirectionally by the ASIL B task, thus achieving synergy between functional safety and efficient control in a single-sensor architecture.

[0046] In one embodiment shown, the execution cycle of the task that needs to meet security standards is a preset multiple of the execution cycle of the task that does not need to meet security standards. The method further includes: performing an increment count each time the type of hardware interrupt is detected; and continuing to execute the task that needs to meet security standards based on the parsed data when it is determined that its own execution cycle is met includes: continuing to execute the task that needs to meet security standards based on the parsed data when it is determined that the increment count result has reached the preset multiple, and resetting the increment count result to zero.

[0047] For example, parking lock control tasks that do not require compliance with safety standards perform functional control every 100 µs, while parking lock status monitoring tasks that require compliance with safety standards (ASIL B) perform safety checks every 1 ms, a ratio of 10:1. The parking lock microcontroller is configured with a type of hardware interrupt triggered every 100 µs by the timer output channel. Whenever this type of hardware interrupt occurs, the ASIL B interrupt service routine first increments the global counter Os_1ms_Cnt by 1. When Os_1ms_Cnt reaches 10, it is determined that the 1 ms safety check execution cycle has been met. Then, the OS_1ms_Task_ASILB() function is called to perform safety logic such as lock pin position rationality verification and unexpected disengagement detection. After execution, Os_1ms_Cnt is cleared and the next round of counting begins.

[0048] The preset multiplier value refers to the integer ratio between task execution cycles that must meet safety standards and those that do not. This value is fixed during the initialization phase of the parking lock microcontroller and serves to establish a deterministic mathematical relationship between the two types of task cycles, making the cumulative count a time measurement benchmark. The cumulative counting mechanism achieves cycle alignment through a software counter, eliminating the need for additional hardware timers and saving system costs. Resetting the cumulative count result to zero means that after completing the condition judgment and triggering task execution, the current count variable is reset to its initial value (usually 0), thereby starting the next round of cycle counting and ensuring cycle stability over long-term operation.

[0049] In one embodiment shown, the single sensor is a parking lock position sensor, and the task requiring compliance with safety standards is a parking lock monitoring task. Reading the electrical signal collected by the single sensor and parsing it before writing it into the shared storage area includes: reading the electrical signal collected by the parking lock position sensor, parsing the electrical signal, and writing the generated parking lock current position data into the shared storage area. Continuing to execute the task requiring compliance with safety standards based on the parsed data includes: determining whether the parking lock has a position disengagement fault based on the parking lock current position data.

[0050] For example, the parking lock position sensor is an ASIL B-level linear position sensor installed near the parking lock pawl to detect in real time whether the locking pin is fully engaged or disengaged from the gear slot. This sensor outputs a continuous analog voltage signal, the amplitude of which varies linearly with the displacement of the locking pin. When a hardware interrupt is triggered, the parking lock microcontroller executes the parking lock monitoring task in the first partition, thereby activating the analog-to-digital converter to convert the analog voltage signal into a digital quantity, obtaining the digital sample value corresponding to the current voltage of the sensor. Subsequently, this digital sample value undergoes noise filtering, zero-point offset correction, and nonlinear compensation, ultimately mapping it to a digital position value that corresponds one-to-one with the mechanical travel of the parking lock. For example, when the locking pin is fully disengaged from the gear slot, the position value is close to the minimum effective value (e.g., 200); when the locking pin is fully engaged and reaches the reliable locking position, the position value is close to the full scale (e.g., 4000, corresponding to the output range of the 12-bit analog-to-digital converter). The microcontroller determines the validity of the locking state based on the position value: if the vehicle control command requires the parking lock to be in the "locked" state, but the parsed position value is consistently lower than the preset safety locking threshold, then a "position disengagement fault" is determined to have occurred, and the corresponding safety response mechanism is triggered.

[0051] The analog-to-digital converter (ADC) is a dedicated hardware module within the microcontroller used to quantize the analog voltage output from the sensor into a digital value. The safety locking threshold is a functional safety requirement parameter determined based on hazard analysis and risk assessment; its setting must comprehensively consider mechanical tolerances, sensor tolerances, temperature drift, and aging margin. The parking lock position sensor is an electromechanical sensing device used to detect the physical displacement state of the parking lock pawl or locking mechanism. Its output is an analog voltage signal or digital pulse sequence that has a monotonic mapping relationship with the mechanical position. In this embodiment, the sensor acts as a position sensing unit, and its raw electrical signal is sent to the first partition of the microcontroller. All parsing processing is completed within the ASIL B task context, ensuring that the signal processing path remains entirely within the ASIL B trust boundary. Position disengagement fault refers to a dangerous event where the parking lock unexpectedly disengages while it should be in a mechanically locked state. This is an ASIL B level hazard, and its diagnostic logic must be independent of the main control task state and able to detect and respond within a specified time.

[0052] In one embodiment shown, the method further includes: if it is determined that the parking lock has a position disengagement fault, generating a fault control command and storing the fault control command in the shared storage area; the step of obtaining the parsed data and continuing to execute the task that does not need to comply with safety standards based on the parsed data includes: obtaining the current position data of the parking lock and the fault control command, and controlling the parking lock to enter the position locking state based on the current position data of the parking lock and the fault control command.

[0053] For example, when the parking lock monitoring task detects that the lock pin position value is continuously lower than the safety locking threshold, it determines that a "position disengagement fault" has occurred, and then generates a fault control command (such as "force relock"), and writes the command and the current position data together to the shared memory area. Subsequently, when the parking lock function control task in the QM partition responds to a type II hardware interrupt, it reads the fault control command and position data from the shared memory area. If it is confirmed from the position data that the lock pin has not completely disengaged, it immediately adjusts the PWM duty cycle to drive the brushless DC motor to run, pushing the lock pin to re-engage in the gear slot until the position value returns to the safe range, thereby achieving active safety recovery under fault conditions.

[0054] The fault control instructions are structured data fields containing fault type identifiers and target actions (such as relocking, holding, and alarming). Essentially, they transform the decision intent output from the ASIL B safety memory area into executable motor drive timing and current instructions in the QM memory partition. These fault control instructions are generated by the ASIL B task and written to the shared memory area; the QM task only parses and executes them without modifying them. "Controlling the parking lock to enter the locked position state" is a differentiated strategy executed based on the current position and fault context to avoid mechanical shock or motor overload. This mechanism achieves decoupling and coordination between safety decision-making and execution control, balancing functional safety and control robustness within a single-sensor architecture.

[0055] In one embodiment shown, the method further includes: if it is determined that the parking lock has a position disengagement fault, then recording the duration of the position disengagement fault; if the duration reaches a preset fault tolerance time interval, activating an emergency actuator associated with the parking lock, so that the emergency actuator outputs a mechanical locking torque to the parking lock, thereby controlling the parking lock to enter a position locking state.

[0056] For example, in each 1 ms safety check cycle, if the parking lock monitoring task detects that the current position of the locking pin is lower than the preset safety locking threshold (which corresponds to 80% of the effective locking stroke), it is considered a potential disengagement state, and an internal fault timer is activated. If the internal fault timer records this fault state for 200 ms (i.e., the preset fault tolerance time interval), it is officially determined as a "position disengagement fault." At this time, the emergency execution enable flag is set, and the drive circuit activates the electromagnetic emergency actuator, which pushes the spare locking pin into the parking gear slot, applying a mechanical locking torque independent of the main motor to ensure that the vehicle remains parked and prevents the risk of rolling away.

[0057] The "position disengagement fault" refers to a dangerous event where the parking lock unexpectedly disengages while it should be locked, diagnosed by the ASIL B task based on linear position sensor signals. The "tolerance time interval" is a time threshold set to distinguish between genuine mechanical faults and transient electrical interference, determined based on the fault tolerance time obtained from functional safety analysis, to avoid false triggering of emergency actions. The "emergency actuator" is a backup actuator independent of the brushless DC motor, typically including an electromagnet, spring-loaded locking pin, or redundant motor. Its drive circuit and control signal path are physically or logically isolated from the QM memory area, ensuring reliable response even if the main control fails. The emergency actuator, based on drive commands, generates torque acting on the parking lock pawl mechanism through electromagnetic or electromechanical conversion mechanisms, forcibly pushing the pawl into the engaged position, ultimately achieving and maintaining the parking lock in the locked position, ensuring parking safety. The activation operation is directly controlled by the ASIL B task, independent of operating system scheduling, to meet the requirements of deterministic and timely fault response.

[0058] In one embodiment shown, before executing the preset program for the task that needs to comply with security standards, the method further includes: configuring the shared storage area to allow only read-only access by tasks that do not need to comply with security standards; executing the preset program for the task that does not need to comply with security standards to access the shared storage area and obtain parsed data includes: executing the preset program for the task that does not need to comply with security standards to access the shared storage area in read-only mode and obtain parsed data.

[0059] For example, during the initialization phase, the parking lock microcontroller defines a segment of on-chip RAM (e.g., address range 0x2000_1000~0x2000_10FF) as a shared memory area by configuring the area attribute register of the memory protection unit, and sets its access permissions: the ASIL B secure memory area has read and write permissions, while the QM memory area only has read permissions; subsequently, when the parking lock control task in the QM memory area responds to a type II hardware interrupt, it retrieves the parking lock's current position data and fault control instructions, which have been pre-parsed and written by the ASIL B task, from this RAM area through standard load instructions, and executes the parking lock control operation based on the parsed data; any attempt to write to this RAM area is intercepted by the memory protection unit hardware, triggering a memory access exception or system reset.

[0060] The shared memory area refers to a dedicated RAM region within the microcontroller used to transfer trusted data processed by ASIL B tasks between software partitions. "Read-only access only" is a hardware-level access control mechanism implemented through a memory protection unit. This unit can configure independent memory region permissions (e.g., read / write / execute) for different software partitions, preventing low-integrity tasks (e.g., QM tasks) from accidentally or maliciously modifying critical data generated by high-integrity tasks (e.g., ASIL B tasks). This configuration is typically completed by trusted code early in system startup and locks registers during runtime, prohibiting dynamic changes. This unidirectional data channel design ensures both timely access to the latest status data for QM tasks and meets the "interference-free" security requirements between ASIL-level tasks and QM tasks.

[0061] Corresponding to the above embodiments of the multi-task execution method based on a single sensor, this disclosure also provides an embodiment of a multi-task execution device based on a single sensor.

[0062] Please see Figure 8 , Figure 8 This is an exemplary embodiment illustrating the hardware structure of an electronic device. At the hardware level, the device includes a processor 802, an internal bus 804, a network interface 806, memory 808, and non-volatile memory 810, and may also include other necessary hardware. One or more embodiments of this disclosure can be implemented in software, for example, the processor 802 reads the corresponding computer program from the non-volatile memory 810 into memory 808 and then runs it. Of course, besides software implementation, one or more embodiments of this disclosure do not exclude other implementation methods, such as logic devices or a combination of hardware and software, etc. That is to say, the execution entity of the following processing flow is not limited to individual logic units, but can also be hardware or logic devices.

[0063] Please see Figure 9 , Figure 9 This is a block diagram illustrating an exemplary embodiment of a multi-task execution device based on a single sensor. This single-sensor-based multi-task execution device 900 can be applied to, for example... Figure 8 The illustrated electronic device implements the technical solution of this disclosure. The device is a microcontroller, the microcontroller operating environment including a first partition and a second partition that are isolated from each other, and a shared storage area accessible to both partitions; the multitasking includes tasks that must comply with security standards and are executed in the first partition, and tasks that do not need to comply with security standards and are executed in the second partition. The device includes: Interrupt unit 902 is used to generate a type of hardware interrupt at intervals based on the execution cycle of the task that does not need to comply with security standards. The first execution unit 904 is configured to execute a first preset program for the task that needs to meet the safety standards if the first type of hardware interrupt is detected. The first preset program is configured to read the electrical signal collected by a single sensor, parse the electrical signal and write it into the shared storage area; and, if it is determined that its own execution cycle is met, continue to execute the task that needs to meet the safety standards based on the parsed data, and trigger the generation of a second type of hardware interrupt regardless of whether it continues to execute. The second execution unit 906 is used to execute a second preset program for the task that does not need to comply with security standards if the two types of hardware interrupts are detected. The second preset program is used to access the shared storage area, obtain the parsed data, and continue to execute the task that does not need to comply with security standards based on the parsed data.

[0064] In some embodiments, prior to triggering the generation of a type II hardware interrupt, the apparatus further includes: The first configuration unit 908 is configured to generate two types of hardware interrupts when the capture channel of the microcontroller receives a software event trigger. Regardless of whether execution continues, two types of hardware interrupts are triggered, including: Regardless of whether the task requiring compliance with safety standards continues to be executed, an activation value is written to the interrupt request register bit corresponding to the capture channel in the microcontroller to trigger the capture channel to generate the second type of hardware interrupt.

[0065] In some embodiments, the execution cycle of the task that needs to comply with security standards is a preset multiple of the execution cycle of the task that does not need to comply with security standards, and the apparatus further includes: The counting unit 910 is used to perform an increment count each time the type of hardware interrupt is detected; The step of continuing to execute the task that needs to meet the security standards based on the parsed data, after determining that its own execution cycle is met, includes: If the accumulated count result reaches the preset multiple, the task that needs to meet the safety standard will continue to be executed based on the parsed data, and the accumulated count result will be reset to zero.

[0066] In some embodiments, the single sensor is a parking lock position sensor, the task requiring compliance with safety standards is a parking lock monitoring task, and the step of reading the electrical signal collected by the single sensor, parsing the electrical signal, and writing it into the shared storage area includes: Read the electrical signal collected by the parking lock position sensor, parse the electrical signal, and write the parsed parking lock current position data into the shared storage area; The process of continuing to execute the security-compliant task based on the parsed data includes: Based on the current position data of the parking lock, determine whether the parking lock has a position disengagement fault.

[0067] In some embodiments, the apparatus further includes: Storage unit 912 is used to generate a fault control command and store the fault control command in the shared storage area if it is determined that the parking lock has a position disengagement fault. The step of obtaining the parsed data and continuing to execute the task that does not need to comply with security standards based on the parsed data includes: The system acquires the current position data of the parking lock and the fault control command, and controls the parking lock to enter the position locking state based on the current position data of the parking lock and the fault control command.

[0068] In some embodiments, the apparatus further includes: Recording unit 914 is used to record the duration of the parking lock position disengagement fault if it is determined that the parking lock has a position disengagement fault. The control unit 916 is used to activate the emergency actuator associated with the parking lock if the duration reaches a preset fault tolerance time interval, so that the emergency actuator outputs a mechanical locking torque to the parking lock, thereby controlling the parking lock to enter the position locking state.

[0069] In some embodiments, prior to performing the preset procedure for the task requiring compliance with security standards, the apparatus further includes: The second configuration unit 918 is used to configure the shared storage area to allow only read-only access by tasks that do not need to comply with security standards. The preset program that executes the task that does not require compliance with security standards, thereby accessing the shared storage area and obtaining the parsed data, includes: The preset program for the task that does not require compliance with security standards is executed, thereby accessing the shared storage area in read-only mode to obtain the parsed data.

[0070] The specific implementation process of the functions and roles of each unit in the above device can be found in the implementation process of the corresponding steps in the above method, and will not be repeated here.

[0071] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to in the description of the method embodiments. The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this disclosure according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0072] The systems, devices, modules, or units described in the above embodiments can be implemented by a computer or entity, or by a product with a certain function. A typical implementation device is a computer, which can be a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email sending and receiving device, game console, tablet computer, wearable device, or any combination of these devices.

[0073] In a typical configuration, a computer includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0074] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0075] Computer-readable media, including both permanent and non-permanent, removable and non-removable media, can store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, disk storage, quantum memory, graphene-based storage media or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0076] The user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data shall comply with the relevant laws, regulations and standards of the relevant regions, and corresponding operation portals shall be provided for users to choose to authorize or refuse.

[0077] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0078] The foregoing has described specific embodiments of this disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired results. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0079] The terminology used in one or more embodiments of this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the one or more embodiments of this disclosure. The singular forms “a,” “the,” and “the” as used in one or more embodiments of this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0080] It should be understood that although the terms first, second, third, etc., may be used to describe various information in one or more embodiments of this disclosure, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first information may also be referred to as second information without departing from the scope of one or more embodiments of this disclosure, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to a determination."

[0081] The above description is merely a preferred embodiment of one or more embodiments of this disclosure and is not intended to limit the scope of one or more embodiments of this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments of this disclosure should be included within the scope of protection of one or more embodiments of this disclosure.

Claims

1. A multi-task execution method based on a single sensor, characterized in that, The method is applied to a microcontroller, the microcontroller's operating environment including a first partition and a second partition that are isolated from each other, and a shared storage area accessible to both partitions; the multitasking includes tasks that must comply with security standards and are executed in the first partition, and tasks that do not need to comply with security standards and are executed in the second partition, the method comprising: A type of hardware interrupt is generated at intervals based on the execution cycle of the tasks that do not require compliance with security standards. If the first type of hardware interrupt is detected, the first preset program of the task that needs to meet the safety standard is executed. The first preset program is used to read the electrical signal collected by a single sensor, parse the electrical signal and write it into the shared storage area; and, if it is determined that its own execution cycle is met, the task that needs to meet the safety standard is continued to be executed based on the parsed data. Regardless of whether it continues to be executed, the second type of hardware interrupt is triggered. If the two types of hardware interrupts are detected, the second preset program for the task that does not need to comply with security standards is executed. The second preset program is used to access the shared storage area, obtain the parsed data, and continue to execute the task that does not need to comply with security standards based on the parsed data.

2. The method according to claim 1, characterized in that, Before triggering the generation of the second type of hardware interrupt, the method further includes: The microcontroller's capture channel is configured to generate two types of hardware interrupts when a software event is triggered. Regardless of whether execution continues, two types of hardware interrupts are triggered, including: Regardless of whether the task requiring compliance with safety standards continues to be executed, an activation value is written to the interrupt request register bit corresponding to the capture channel in the microcontroller to trigger the capture channel to generate the second type of hardware interrupt.

3. The method according to claim 1, characterized in that, The execution cycle of the task that needs to meet security standards is a preset multiple of the execution cycle of the task that does not need to meet security standards, and the method further includes: Each time a hardware interrupt of the aforementioned type is detected, an increment count is performed. The step of continuing to execute the task that needs to meet the security standards based on the parsed data, after determining that its own execution cycle is met, includes: If the accumulated count result reaches the preset multiple, the task that needs to meet the safety standard will continue to be executed based on the parsed data, and the accumulated count result will be reset to zero.

4. The method according to claim 3, characterized in that, The single sensor is a parking lock position sensor, and the task that needs to meet safety standards is a parking lock monitoring task. The step of reading the electrical signal collected by the single sensor, parsing the electrical signal, and writing it into the shared storage area includes: Read the electrical signal collected by the parking lock position sensor, parse the electrical signal, and write the parsed parking lock current position data into the shared storage area; The process of continuing to execute the security-compliant task based on the parsed data includes: Based on the current position data of the parking lock, determine whether the parking lock has a position disengagement fault.

5. The method according to claim 4, characterized in that, The method further includes: If it is determined that the parking lock has a position disengagement fault, a fault control command is generated and stored in the shared storage area; The step of obtaining the parsed data and continuing to execute the task that does not need to comply with security standards based on the parsed data includes: The system acquires the current position data of the parking lock and the fault control command, and controls the parking lock to enter the position locking state based on the current position data of the parking lock and the fault control command.

6. The method according to claim 4, characterized in that, The method further includes: If it is determined that the parking lock has a position disengagement fault, then record the duration of the position disengagement fault of the parking lock; If the duration reaches a preset fault tolerance time interval, the emergency actuator associated with the parking lock is activated, so that the emergency actuator outputs a mechanical locking torque to the parking lock, thereby controlling the parking lock to enter the position locking state.

7. The method according to claim 1, characterized in that, Before executing the preset procedure for the task that needs to comply with the safety standards, the method further includes: Configure the shared storage area to allow only read-only access by tasks that do not need to meet security standards; The preset program that executes the task that does not require compliance with security standards, thereby accessing the shared storage area and obtaining the parsed data, includes: The preset program for the task that does not require compliance with security standards is executed, thereby accessing the shared storage area in read-only mode to obtain the parsed data.

8. A multi-task execution device based on a single sensor, characterized in that, The device is a microcontroller, which operates in an environment comprising a first partition and a second partition that are isolated from each other, and a shared storage area accessible to both partitions; the multitasking includes security-compliant tasks executed in the first partition and security-non-compliant tasks executed in the second partition; the device comprises: An interrupt unit is used to generate a type of hardware interrupt at intervals based on the execution cycle of the task that does not need to comply with security standards. The first execution unit is configured to execute a first preset program for the task that needs to meet the safety standards if the first type of hardware interrupt is detected. The first preset program is configured to read the electrical signal collected by a single sensor, parse the electrical signal and write it into the shared storage area; and, if it is determined that its own execution cycle is met, continue to execute the task that needs to meet the safety standards based on the parsed data, and trigger the generation of a second type of hardware interrupt regardless of whether it continues to execute. The second execution unit is used to execute a second preset program for the task that does not need to comply with security standards if the two types of hardware interrupts are detected. The second preset program is used to access the shared memory area, obtain the parsed data, and continue to execute the task that does not need to comply with security standards based on the parsed data.

9. An electronic device, characterized in that, It includes a communication interface, a processor, a memory, and a bus, wherein the communication interface, the processor, and the memory are interconnected via the bus; The memory stores machine-readable instructions, and the processor executes the method according to any one of claims 1 to 7 by invoking the machine-readable instructions.

10. A machine-readable storage medium, characterized in that, The machine-readable storage medium stores machine-readable instructions, which, when invoked and executed by a processor, implement the method described in any one of claims 1 to 7.

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