Cutting surface passivated half-silicon wafers, methods of making, and half-cell batteries

Abstract

The disclosure discloses a cut surface passivated half silicon wafer, a preparation method and a half cell. The cut surface passivated half silicon wafer comprises a half coated silicon wafer and a passivation film, and the passivation film comprises an aluminum oxide layer and a silicon nitride layer arranged in sequence at the cut surface. The disclosure constructs an aluminum oxide layer + silicon nitride layer structure at the cut surface. The aluminum oxide layer serves as the first passivation barrier. By virtue of its excellent interface state saturation capacity and negative fixed charge characteristics, the aluminum oxide layer can efficiently passivate the dangling bonds and defect states caused by laser cutting and inhibit carrier edge recombination. The silicon nitride layer covers the aluminum oxide layer and can provide dense chemical protection to block the intrusion of impurities and subsequent slurry pollution.

Description

Technical Field

[0001] This disclosure relates to the field of crystalline silicon solar cell technology, and more specifically, to a half-silicon wafer with passivated cut surfaces, a preparation method thereof, and a half-cell. Background Technology

[0002] Solar power generation technology, as an important development direction in the field of renewable energy, primarily utilizes two technical routes for its core component packaging processes: full-cell packaging and half-cell packaging. Compared to traditional full-cell packaging, half-cell modules significantly improve module output power and overall power generation efficiency by reducing the operating current to half its original value, doubling the operating voltage, and reducing internal power losses to one-quarter. Based on these technological advantages, half-cell packaging technology has become the mainstream choice in the current photovoltaic industry.

[0003] However, there are significant technical bottlenecks in the traditional half-cell battery manufacturing process: when using laser cutting to process the whole cell, the fracture surface caused by mechanical stress will form a large number of dangling bonds, and these defect states will become carrier recombination centers; at the same time, the cutting interface is prone to introducing impurities and contamination, which leads to a reduction in minority carrier lifetime, ultimately resulting in battery efficiency degradation and reliability decline.

[0004] Existing solutions mainly include two technical approaches: one is to perform passivation thin film deposition on the fracture surface after laser cutting to achieve edge passivation; the other is to directly use pre-cut half-wafers for cell fabrication before the texturing process. Although these methods can improve edge recombination and leakage problems to some extent, they still have significant limitations: after cutting, the cell's stacking gap increases due to the height difference between the front and back grid lines, and it is easily contaminated by metal paste particles, resulting in poor passivation; while directly using half-wafers requires production line equipment modification, which will seriously affect production efficiency.

[0005] To address the aforementioned technical challenges, there is an urgent need to develop a method that can simultaneously suppress carrier recombination at the cut surface and balance the photoelectric conversion efficiency and fabrication efficiency of the battery. Based on this research background, this disclosure was developed. Summary of the Invention

[0006] The purpose of this disclosure is to provide a passivated half-silicon wafer, a preparation method, and a half-cell battery, which is beneficial to balancing the photoelectric conversion efficiency and the preparation efficiency of the battery.

[0007] This disclosure is implemented as follows: In a first aspect, this disclosure provides a half-wafer with passivated cut surfaces, comprising a half-wafer coated silicon wafer and a passivation film, wherein the passivation film comprises an aluminum oxide layer and a silicon nitride layer sequentially disposed on the cut surfaces.

[0008] In an optional embodiment, the half-wafer coated silicon wafer includes a front film disposed on the front side of the silicon wafer and a back film disposed on the back side of the silicon wafer; And / or, the thickness of the silicon nitride layer is 80-180 nm; And / or, the thickness of the alumina layer is 3-10 nm.

[0009] Secondly, this disclosure provides a method for preparing a passivated half-wafer silicon wafer as described in the foregoing embodiments, comprising: The half-coated silicon wafer is vacuum preheated to obtain a preheated silicon wafer; The cut surfaces of the preheated silicon wafer are subjected to plasma passivation to form an aluminum oxide layer; The alumina layer is subjected to plasma activation pretreatment to obtain a pretreated silicon wafer; Silicon nitride is deposited on the alumina layer of the pretreated silicon wafer by plasma-enhanced chemical vapor deposition to form a silicon nitride layer; Annealing the silicon wafer with the silicon nitride layer to obtain the half-wafer with the passivated cut surface.

[0010] In an optional implementation, the temperature of the vacuum preheating step is 300-400°C, and the holding time is 5-10 minutes.

[0011] In an optional embodiment, the process gas for the plasma passivation step includes nitrous oxide and trimethylaluminum; And / or, the plasma passivation temperature is 300-400℃, the passivation time is 2-3 min, and the pressure is 1000-1400 mTorr; And / or, the process gas in the plasma activation pretreatment step includes nitrous oxide and ammonia; And / or, the temperature of the plasma activation pretreatment step is 400-450℃ and the pressure is 1000-1800 mTorr; And / or, the plasma activation pretreatment step takes 120s-300s; And / or, the process gases for the silicon nitride deposition step include silane and ammonia; And / or, the temperature for depositing silicon nitride is 400-500℃ and the pressure is 1500-2000 mTorr; And / or, the time for depositing silicon nitride is 5-10 min.

[0012] In an optional embodiment, the flow ratio of nitrous oxide and trimethylaluminum in the process gas of the plasma passivation step is 4:1 to 6:1. And / or, the flow rate of trimethylaluminum in the process gas of the plasma passivation step is 0.015-0.03 mol / min; And / or, the flow rate ratio of nitrous oxide and ammonia in the process gas of the plasma activation pretreatment step is 1:2 to 2:1; And / or, in the step of depositing silicon nitride, the process gas includes a flow ratio of silane and ammonia of 1:5 to 1:10.

[0013] In an optional embodiment, the annealing temperature is 300-400°C and the annealing time is 5-10 minutes.

[0014] In an optional embodiment, the preparation of the passivated half-wafer is carried out in the reaction tube of a tubular plasma-enhanced chemical vapor deposition apparatus. And / or, before the half silicon wafer is vacuum preheated, two or more half coated silicon wafers are first loaded into the fixture, and the cutting surfaces in the same fixture are flush. And / or, before the half silicon wafer is vacuum preheated, two or more half coated silicon wafers are first loaded into the fixture. The fixtures holding the half coated silicon wafers are set in pairs, and adjacent pairs of fixtures are set in sequence.

[0015] In an optional embodiment, the fixture includes two graphite sheets for holding the two or more half-wafer coated silicon wafers and fasteners for clamping the held half-wafer coated silicon wafers with the two graphite sheets. And / or, in the same pair of two fixtures, the cut surfaces of the half-coated silicon wafers are arranged opposite each other.

[0016] Thirdly, this disclosure provides a half-cell battery, which is prepared using a half-cell silicon wafer with passivated cut surfaces as described in the foregoing embodiments as a substrate.

[0017] This disclosure has the following beneficial effects: This disclosure describes the construction of an alumina layer and a silicon nitride layer on the cutting surface. The alumina layer, as the first passivation barrier, can efficiently passivate dangling bonds and defect states caused by laser cutting and suppress carrier edge recombination due to its excellent interface state saturation capability and negative fixed charge characteristics. The silicon nitride layer covers it and can provide dense chemical protection to prevent impurities from entering and subsequent slurry contamination. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this disclosure and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1This is a schematic diagram of the fixture holding a half-coated silicon wafer in this disclosure; Figure 2 This is a schematic diagram of the fixture arrangement in this disclosure.

[0020] Illustration: 1-Half-coated silicon wafer; 2-Fastener; 3-Graphite sheet; 4-Material box; 5-Graphite boat frame; 6-Graphite block support. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions in the embodiments of this disclosure will be clearly and completely described below. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased commercially.

[0022] This disclosure provides a half-wafer with passivated cut surfaces, comprising a half-wafer coated silicon wafer and a passivation film, wherein the passivation film comprises an aluminum oxide layer and a silicon nitride layer sequentially disposed on the cut surfaces.

[0023] This disclosure describes a structure consisting of an alumina layer and a silicon nitride layer on the cut surface. The alumina layer, acting as the first passivation barrier, leverages its excellent interface state saturation capability and negative fixed charge characteristics to efficiently passivate dangling bonds and defect states caused by laser cutting, suppressing carrier edge recombination. The silicon nitride layer, covering the alumina layer, provides dense chemical protection to prevent impurity intrusion and subsequent slurry contamination. A gradient band structure is formed between the alumina and silicon nitride layers, which helps reduce the interface carrier recombination rate. Simultaneously, the silicon nitride layer physically encapsulates the alumina layer, significantly improving long-term stability under high temperature and high humidity environments.

[0024] In an optional embodiment, the half-wafer coated silicon wafer includes a positive film disposed on the front side of the silicon wafer and a back film disposed on the back side of the silicon wafer. Before dicing, it already possesses complete optical and electrical functional layers, which helps to avoid dicing damage affecting the silicon wafer performance. It should be noted that the positive film can be silicon nitride or silicon oxynitride, and the back film can be silicon nitride or a composite structure of silicon nitride and aluminum oxide or silicon oxynitride.

[0025] In an optional embodiment, the thickness of the silicon nitride layer is 80-180 nm, such as 80 nm, 91 nm, 102 nm, 113 nm, 124 nm, 135 nm, 146 nm, 157 nm, 168 nm, and 180 nm. This is beneficial for balancing passivation integrity and stress controllability. If the silicon nitride layer is too thin, the protective ability will be insufficient, and if the silicon nitride layer is too thick, it will be prone to cracking.

[0026] In an optional embodiment, the thickness of the alumina layer is 3-10 nm, for example, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm; the alumina layer can ensure interface saturation capability while avoiding excessive thickness that could lead to crystallization defects or process redundancy.

[0027] This disclosure also provides a method for preparing a passivated half-wafer silicon wafer as described in the foregoing embodiments, comprising: The half-coated silicon wafer is vacuum preheated to obtain a preheated silicon wafer; The cut surfaces of the preheated silicon wafer are subjected to plasma passivation to form an aluminum oxide layer; The alumina layer is subjected to plasma activation pretreatment to obtain a pretreated silicon wafer; Silicon nitride is deposited on the alumina layer of the pretreated silicon wafer by plasma-enhanced chemical vapor deposition to form a silicon nitride layer; Annealing the silicon wafer with the silicon nitride layer to obtain the half-wafer with the passivated cut surface.

[0028] The method for preparing passivated half-wafers disclosed herein can insert a passivation process only after the PECVD coating process and before printing without changing the mainstream full-cell battery production line. It does not require new equipment or major modifications to the production line, and takes into account process compatibility, feasibility and mass production economy. It fundamentally alleviates the problems of severe edge recombination, poor passivation effect, high risk of plating around the edge and high cost of production line upgrades in half-cell batteries.

[0029] In an optional implementation, the temperature of the vacuum preheating step is 300-400℃, for example, 300℃, 311℃, 322℃, 333℃, 344℃, 355℃, 366℃, 377℃, 388℃, or 400℃; the isothermal time is 5-10 minutes, for example, 5 minutes, 6 minutes, 7 minutes, 8 minutes, 9 minutes, or 10 minutes. The vacuum preheating step helps to balance the thermal stability of the silicon wafer with the adhesion of the film layer, and provides a clean and uniform surface foundation for subsequent plasma reactions, improving the density and interface quality of the passivation layer.

[0030] In an optional implementation, the process gases for the plasma passivation step include nitrous oxide and trimethylaluminum; nitrous oxide provides a source of active oxygen, and trimethylaluminum enables a controlled supply of aluminum.

[0031] In optional embodiments, the plasma passivation temperature is 300-400℃, for example 300℃, 311℃, 322℃, 333℃, 344℃, 355℃, 366℃, 377℃, 388℃, or 400℃; the passivation time is 2-3 min, for example 2.0 min, 2.1 min, 2.2 min, 2.3 min, 2.4 min, 2.5 min, 2.6 min, 2.7 min, 2.8 min, 2.9 min, or 3.0 min; and the pressure is 1000-1400 mTorr, for example 1000 mTorr, 1044 mTorr, 1089 mTorr, 1133 mTorr, 1178 mTorr, 1222 mTorr, 1267 mTorr, 1311 mTorr, 1356 mTorr, or 1400 mTorr. mTorr; Under this temperature condition, TMA can be fully decomposed while suppressing side reactions. The synergy of pressure and time helps to ensure the uniformity of Al2O3 layer thickness and reduce defects.

[0032] In an optional embodiment, the process gas for the plasma activation pretreatment step includes nitrous oxide and ammonia. In an optional embodiment, the temperature of the plasma activation pretreatment step is 400-450°C, for example 400°C, 406°C, 411°C, 417°C, 422°C, 428°C, 433°C, 439°C, 444°C, or 450°C; and the pressure is 1000-1800 mTorr, for example 1000 mTorr, 1089 mTorr, 1178 mTorr, 1267 mTorr, 1356 mTorr, 1444 mTorr, 1533 mTorr, 1622 mTorr, 1711 mTorr, or 1800 mTorr.

[0033] In an optional embodiment, the plasma activation pretreatment step takes 120s-300s, for example, 120s, 140s, 160s, 180s, 200s, 220s, 240s, 260s, 280s, or 300s.

[0034] In the plasma activation pretreatment step, nitrous oxide can efficiently dissociate, and the provided active oxygen can selectively remove residual organic matter and weakly bonded impurities on the cut surface, and promote the optimization of the interface oxidation state. Ammonia can contribute highly active hydrogen atoms, which diffuse deeply to the Al2O3 / silicon interface under the synergistic effect of heat and plasma, saturating dangling bonds, reducing the interface state density, and completing the key hydrogen passivation. The plasma activation pretreatment can improve the integrity, uniformity, and long-term stability of the passivation system, and is fully compatible with existing PECVD equipment and whole-cell production line processes, without the need for additional steps or hardware modifications.

[0035] In an optional embodiment, the process gases for the silicon nitride deposition step include silane and ammonia; In an optional embodiment, the temperature for depositing silicon nitride is 400-500°C, for example 400°C, 406°C, 417°C, 428°C, 439°C, 450°C, 461°C, 472°C, 483°C, 494°C, or 500°C; and the pressure is 1500-2000 mTorr, for example 1500 mTorr, 1556 mTorr, 1611 mTorr, 1667 mTorr, 1722 mTorr, 1778 mTorr, 1833 mTorr, 1889 mTorr, 1944 mTorr, or 2000 mTorr.

[0036] In an optional implementation, the time for depositing silicon nitride is 5-10 min, for example, 5 min, 6 min, 7 min, 8 min, 9 min, or 10 min.

[0037] During the silicon nitride deposition step, SiH4 can fully decompose and release hydrogen atoms, which not only meets the hydrogen content required for passivation but also avoids dehydroxylation of the underlying Al2O3 or thermal damage to the silicon wafer caused by high temperatures. The synergistic effect of temperature, pressure, and time helps to ensure the conformal coverage of the film on the sidewalls of the cut surface and at microcracks, as well as the uniformity and density of the film. The resulting silicon nitride layer has the functions of chemical passivation, anti-reflection, physical barrier, and hydrogen donor. It not only encapsulates and protects the underlying Al2O3 but also performs long-term repair of the interface through continuous hydrogen diffusion, forming a stable and self-reinforcing double-layer passivation system. The entire process fully reuses existing PECVD equipment without the need for additional chambers or process modules, significantly reducing the barriers to entry and operating costs of production lines.

[0038] In an optional embodiment, the flow ratio (in molar ratio, the same below) of nitrous oxide and trimethylaluminum in the process gas of the plasma passivation step is 4:1 to 6:1, for example 4:1, 5:1, 6:1; the process gas is adjusted to optimize the nitrogen-oxygen ratio in the passivation layer, improve the interface state density reduction effect and thermal stability, wherein trimethylaluminum is carried into the furnace tube by an inert gas such as Ar.

[0039] In an optional embodiment, the flow rate of trimethylaluminum in the process gas of the plasma passivation step is 0.015-0.03 mol / min, for example, 0.015 mol / min, 0.020 mol / min, 0.025 mol / min, or 0.030 mol / min.

[0040] In an optional embodiment, the flow ratio of nitrous oxide and ammonia in the process gas of the plasma activation pretreatment step is 1:2 to 2:1, for example, 1:2, 1:1, or 2:1, which is more conducive to improving the integrity, uniformity, and long-term stability of the passivation system.

[0041] In an optional embodiment, during the silicon nitride deposition step, the process gas includes a flow ratio of silane and ammonia of 1:5 to 1:10, such as 1:5, 1:7, 1:9, or 1:10, which is beneficial for improving the density of the silicon nitride film and the wet etching selectivity.

[0042] In an optional implementation, the annealing temperature is 300-400℃, for example 300℃, 311℃, 322℃, 333℃, 344℃, 355℃, 366℃, 377℃, 388℃, or 400℃; the annealing time is 5-10 min, for example 5 min, 6 min, 7 min, 8 min, 9 min, or 10 min. Under these conditions, annealing can achieve hydrogen redistribution and interface bonding optimization in the passivation layer, enhancing the stability and adhesion of the bilayer structure; it also takes into account the thermal activation effect and the thermal sensitivity of the silicon wafer and the original film layer, avoiding damage, while ensuring uniform heating of the stacked half-wafer as a whole.

[0043] In an optional embodiment, the preparation of the passivated half-wafer is carried out in the reaction tube of a tubular plasma-enhanced chemical vapor deposition apparatus. In an optional embodiment, before the half-wafer is vacuum preheated, two or more half-wafer coated silicon wafers 1 are first loaded into a fixture, with the cutting surfaces in the same fixture being flush. The structure of the fixture is as follows: Figure 1 As shown.

[0044] In an optional embodiment, before the half-wafer is vacuum preheated, two or more half-wafer coated silicon wafers are first loaded into a fixture. The fixtures holding the half-wafer coated silicon wafers are arranged in pairs, with adjacent pairs of fixtures arranged sequentially, as shown in the following arrangement. Figure 2As shown, optionally, multiple pairs of clamps are arranged "pair by pair, with the cutting surfaces facing each other" on the graphite boat frame 5. The graphite boat frame 5 is placed on the graphite block support 6, forming a dense and symmetrical array of reaction surfaces. This maximizes the passivation area per unit volume within the limited furnace tube space, while also making it easier for the plasma field to couple and enhance between the relative cutting surfaces. It should be noted that the half-wafer coated silicon wafer 1 can be loaded into the material box 4, and the clamping fixtures hold it in the material box 4 to fix the half-wafer coated silicon wafer 1 inside the material box 4, thereby exposing the cutting surface and covering the front, back and other edges.

[0045] In an optional embodiment, the fixture includes two graphite sheets 3 for clamping the two or more half-wafer coated silicon wafers 1 and fasteners 2 for clamping the clamped half-wafer coated silicon wafers 1 with the two graphite sheets 3. The fasteners 2 can be graphite rods or ceramic rods that cooperate with the limiting structure. The use of graphite sheets 3 to clamp and ensure that the cutting surface is flush utilizes the high temperature resistance and low pollution properties of graphite to ensure the cleanliness of the process, and achieves precise alignment of the cutting surface through physical limiting, thereby improving the efficiency of uniform plasma irradiation. The fastening structure prevents the half-wafer from slipping or vibrating, avoiding the risk of uneven coating or fragmentation.

[0046] Using the passivated half-wafer of the disclosed method to produce half-cell cells, no new equipment type is required. The entire production line can be transformed into half-cell edge passivation simply by reconfiguring the tooling. This method has high compatibility, strong stability and low-cost mass production feasibility.

[0047] This disclosure also provides a half-cell battery, which is prepared using a half-cell silicon wafer with passivated cut surfaces as described in the foregoing embodiments as a substrate.

[0048] The features and performance of this disclosure will be further described in detail below with reference to embodiments.

[0049] Example 1 This embodiment provides a method for preparing a half-wafer with passivated cut surfaces, specifically including the following steps: 1) The silicon wafer with front and back films is diced and cut to obtain a half-coated silicon wafer 1 with a diced surface, a front film (alumina + silicon nitride) and a back film (alumina + silicon nitride); 2) The half-coated silicon wafer 1 is sucked into the fixed material box 4. Each container can hold 400 half-coated silicon wafers 1. When loading the wafers, gravity and air knife are used to make the cut surfaces of the half wafers in the material box 4 flat. A coated graphite sheet 3 is placed on the top and bottom, and there are only two support points to reduce contact contamination. 3) After the graphite sheets are filled, use multiple ceramic rods to clamp the upper and lower graphite sheets 3 to fix the product; 4) Place the neatly aligned and clamped half-piece of product into the graphite boat, with the cut surfaces of multiple boxes of products facing each other and corresponding to different electrodes; 5) The graphite boat is fed into the furnace tube of the tubular plasma-enhanced chemical vapor deposition equipment, and preheated to 330°C under vacuum and held at that temperature for 350 seconds. 6) Next, N2O and TMA with a flow ratio of 5:1 were introduced into the furnace tube, and the flow rate of trimethylaluminum was 0.0172 mol / min. After the reaction pressure stabilized at 1300 mTorr, the radio frequency was turned on and passivation was performed for 130 s. 7) Continue heating to 420℃, introduce N2O and NH3 with a flow ratio of 1:1 into the furnace tube, maintain the pressure at 1500mToor, turn on the radio frequency, and perform ionization pretreatment for 180s; 8) After vacuuming, introduce SiH4 and NH3 in a flow ratio of 1:8 into the furnace tube. After the reaction pressure stabilizes at 1700 mTorr, turn on the radio frequency and deposit the film for 360 seconds.

[0050] 9) Set the furnace tube temperature to 330℃ and anneal for 420 seconds, then remove from the boat.

[0051] 10) After the graphite boat is placed on the shelf and cooled by air, take out the material box 4. If the color of the cut surface is observed to be light blue to yellow, loosen the fastened ceramic rod to obtain a half silicon wafer with a passivated cut surface.

[0052] Example 2 This embodiment provides a method for preparing a half-wafer with passivated cut surfaces, specifically including the following steps: 1) The silicon wafer with front and back films is diced and cut to obtain a half-coated silicon wafer 1 with a diced surface, a front film and a back film; 2) The half-coated silicon wafer 1 is sucked into the fixed material box 4. Each container can hold 400 half-coated silicon wafers 1. When loading the wafers, gravity and air knife are used to make the cut surfaces of the half wafers in the material box 4 flat. A coated graphite sheet 3 is placed on the top and bottom, and there are only two support points to reduce contact contamination. 3) After the graphite sheets are filled, use multiple ceramic rods to clamp the upper and lower graphite sheets 3 to fix the product; 4) Place the neatly aligned and clamped half-piece of product into the graphite boat, with the cut surfaces of multiple boxes of products facing each other and corresponding to different electrodes; 5) The graphite boat is fed into the furnace tube of the tubular plasma-enhanced chemical vapor deposition equipment, and preheated to 300°C under vacuum and held at that temperature for 600 seconds. 6) Next, N2O and TMA with a flow ratio of 4:1 were introduced into the furnace tube, and the flow rate of trimethylaluminum was 0.0172 mol / min. After the reaction pressure stabilized at 1300 mTorr, the radio frequency was turned on and passivation was performed for 180 s. 7) Continue heating to 450℃, introduce N2O and NH3 with a flow ratio of 2:1 into the furnace tube, maintain the pressure at 1000mToor, turn on the radio frequency, and perform ionization pretreatment for 300s; 8) After vacuuming, introduce SiH4 and NH3 in a flow ratio of 1:8 into the furnace tube. After the reaction pressure stabilizes at 1700 mTorr, turn on the radio frequency and deposit the film for 300 seconds.

[0053] 9) Set the furnace tube temperature to 300℃ and anneal for 600 seconds, then remove from the boat.

[0054] 10) After the graphite boat is placed on the shelf and cooled by air, take out the material box 4. If the color of the cut surface is observed to be light blue to yellow, loosen the fastened ceramic rod to obtain a half silicon wafer with a passivated cut surface.

[0055] Example 3 This embodiment provides a method for preparing a half-wafer with passivated cut surfaces, specifically including the following steps: 1) The silicon wafer with front and back films is diced and cut to obtain a half-coated silicon wafer 1 with a diced surface, a front film and a back film; 2) The half-coated silicon wafer 1 is sucked into the fixed material box 4. Each container can hold 400 half-coated silicon wafers 1. When loading the wafers, gravity and air knife are used to make the cut surfaces of the half wafers in the material box 4 flat. A coated graphite sheet 3 is placed on the top and bottom, and there are only two support points to reduce contact contamination. 3) After the graphite sheets are filled, use multiple ceramic rods to clamp the upper and lower graphite sheets 3 to fix the product; 4) Place the neatly aligned and clamped half-piece of product into the graphite boat, with the cut surfaces of multiple boxes of products facing each other and corresponding to different electrodes; 5) The graphite boat is fed into the furnace tube of the tubular plasma-enhanced chemical vapor deposition equipment, and preheated to 400°C under vacuum and held at that temperature for 300 seconds. 6) Next, N2O and TMA with a flow ratio of 6:1 were introduced into the furnace tube, and the flow rate of trimethylaluminum was 0.0172 mol / min. After the reaction pressure stabilized at 1300 mTorr, the radio frequency was turned on and passivation was performed for 120 s. 7) Continue heating to 400℃, introduce N2O and NH3 with a flow ratio of 1:2 into the furnace tube, maintain the pressure at 1800mToor, turn on the radio frequency, and perform ionization pretreatment for 120s; 8) After vacuuming, introduce SiH4 and NH3 in a flow ratio of 1:8 into the furnace tube. After the reaction pressure stabilizes at 1700 mTorr, turn on the radio frequency and deposit the film for 600 seconds.

[0056] 9) Set the furnace tube temperature to 400℃ and anneal for 300 seconds, then remove from the boat.

[0057] 10) After the graphite boat is placed on the shelf and cooled by air, take out the material box 4. If the color of the cut surface is observed to be light blue to yellow, loosen the fastened ceramic rod to obtain a half silicon wafer with a passivated cut surface.

[0058] Comparative Example 1: This embodiment provides a method for preparing a half-wafer with passivated cut surfaces. The main difference from Embodiment 1 is that steps 6-7 are omitted. It is applicable to scenarios where some machines do not have a TMA piping system, or where Al2O3 and SixNy are deposited on one side and then the reverse side SixNy and SixOyNz (silicon oxynitride) are deposited on the other side. The specific steps include: 1) The silicon wafer with the front and back films coated is diced and cut to obtain a half silicon wafer with a cut surface, and a front film and a back film; 2) The coated sheet after being split into half is sucked into the fixed material box 4. Each container can hold 400 half products. The cut surface is kept neat and there are only two support points to reduce contact contamination. A coated graphite sheet 3 is placed on the top and bottom. 3) When loading the sheets, use gravity and air knife to flatten the cut surfaces of the half sheets in the material box 4. After the sheet box is full, use multiple ceramic rods to clamp the upper and lower graphite sheets 3 to fix the product. 4) Place the neatly aligned and clamped half-piece of product into a custom graphite boat, with the cut surfaces of multiple boxes of products facing each other and corresponding to different electrodes; 5) Send the customized graphite boat into the furnace tube, vacuum preheat to 420℃, and hold at that temperature for 350 seconds; 6) Introduce SiH4 and NH3 in a flow ratio of 1:8 into the furnace tube. After the reaction pressure stabilizes, turn on the radio frequency and deposit the film for 400 seconds.

[0059] 7) Set the furnace tube temperature to 330℃ and anneal for 420 seconds, then remove from the boat.

[0060] 8) After the graphite boat is placed on the shelf to cool, take out the material box 4. If the color of the cut surface is observed to be light blue to yellow, loosen the fastened ceramic rod and take out the material for printing.

[0061] Comparative Example 2: This embodiment provides a method for preparing a half-wafer with passivated cut surfaces. The main difference from Embodiment 1 is that step 7 is omitted, and the method specifically includes the following steps: 1) The silicon wafer with the front and back films coated is diced and cut to obtain a half silicon wafer with a cut surface, and a front film and a back film; 2) The coated sheet after being split into half is sucked into the fixed material box 4. Each container can hold 400 half products. The cut surface is kept neat and there are only two support points to reduce contact contamination. A coated graphite sheet 3 is placed on the top and bottom. 3) When loading the sheets, use gravity and air knife to flatten the cut surfaces of the half sheets in the material box 4. After the sheet box is full, use multiple ceramic rods to clamp the upper and lower graphite sheets 3 to fix the product. 4) Place the neatly aligned and clamped half-piece of product into a custom graphite boat, with the cut surfaces of multiple boxes of products facing each other and corresponding to different electrodes; 5) Send the customized graphite boat into the furnace tube, vacuum preheat to 330℃, and hold at that temperature for 350 seconds; 6) Introduce N2O and TMA into the furnace tube. After the reaction pressure stabilizes, turn on the radio frequency and passivate for 130 seconds. 7) Continue heating to 420℃, introduce SiH4 and NH3 into the furnace tube, and turn on the radio frequency after the reaction pressure stabilizes, and deposit the film for 360s.

[0062] 8) Set the furnace tube temperature to 330℃ and anneal for 420 seconds, then remove from the boat.

[0063] 9) After the graphite boat is placed on the shelf to cool, take out the material box 4. If the color of the cut surface is observed to be light blue to yellow, loosen the fastened ceramic rod and take out the material for printing.

[0064] Comparative Example 3 This embodiment provides a method for preparing a half-wafer with passivated cut surfaces. The main difference from Embodiment 1 is that the parameters in step 7 are unreasonable: only NH3 ionization pretreatment is used.

[0065] Comparative Example 4 This embodiment provides a method for preparing a half-wafer with passivated cut surfaces. The main difference from Embodiment 1 is that steps 7 and 8 are omitted.

[0066] Comparative Example 5 This embodiment provides a method for preparing a half-wafer with passivated cut surfaces. The main difference from Embodiment 1 is that in step 1, the uncoated silicon wafer is diced to obtain a half-wafer coated silicon wafer 1 without a front or back film. The specific steps include: 1) The silicon wafer before coating is diced and cut to obtain a half-wafer with a cut surface and no front or back coating; 2) Insert half of the uncoated silicon wafer into the graphite boat and send it into the furnace tube of the tubular plasma-enhanced chemical vapor deposition equipment. Preheat it to 330°C under vacuum and hold it at that temperature for 350 seconds. 3) Next, N2O and TMA with a flow ratio of 5:1 were introduced into the furnace tube, and the flow rate of trimethylaluminum was 0.0172 mol / min. After the reaction pressure stabilized at 1300 mTorr, the radio frequency was turned on and passivation was performed for 130 s. 4) Continue heating to 420℃, introduce N2O and NH3 with a flow ratio of 1:1 into the furnace tube, maintain the pressure at 10500mToor, turn on the radio frequency, and perform ionization pretreatment for 180s; 5) After evacuation, introduce SiH4 and NH3 in a flow ratio of 1:8 into the furnace tube. After the reaction pressure stabilizes at 1700 mTorr, start the radio frequency coating.

[0067] 6) Set the furnace tube temperature to 330℃ and cool it down for 300 seconds before removing it from the boat for further cooling.

[0068] 7) After removing the single-sided coated silicon wafer, insert it back into the graphite boat and repeat steps 3-6 to coat the wafer until the thickness of the front and back films in Example 1 is equivalent to that of the front film thickness of 80nm and the back film thickness of 140nm.

[0069] 8) Remove the double-sided coated half of the silicon wafer and send it to the next process.

[0070] Test Example 1: The passivated half-silicon wafers prepared in the above embodiments and comparative examples were processed by printing back electrodes → drying → printing back electric fields → drying → printing front main grid → drying → printing front sub-grid → drying and sintering to prepare half-cell solar cells. The performance of the prepared half-cell solar cells was tested, and the results are shown in Table 1.

[0071] Comparative Example 6: This comparative example provides a method for preparing a half-cell battery, specifically including the following steps: 1) Take silicon wafers with front and back films from the same batch as in Example 1, print and sinter them according to the method of Test Example 1 above to obtain battery cells, and cut the battery cells into diced pieces to obtain half-cell batteries with cut surfaces, positive electrodes and back electrodes. 2) The half cell is coated according to steps 2-10 of Example 1 to obtain a half cell with passivated edges.

[0072] Comparative Example 7: This comparative example provides a method for preparing a half-cell battery. The main difference between this method and Comparative Example 7 is that no ionization pretreatment is performed. The method specifically includes the following steps: 1) Take silicon wafers with front and back films from the same batch as in Example 1, print and sinter them according to the method of Test Example 1 above to obtain battery cells, and cut the battery cells into diced pieces to obtain half-cell batteries with cut surfaces, positive electrodes and back electrodes. 2) The half cell is coated sequentially according to steps 2-6 and 8-10 of Example 1 to obtain a half cell with passivated edges.

[0073] The performance of the half-cell solar cells prepared from the passivated half-silicon wafers of the above embodiments and comparative examples, or the half-cell solar cells prepared from the above comparative examples, was tested. The test results are shown in Table 1. Each test sample consisted of 4800 solar cells, and the test method is as follows: Open circuit voltage Uoc, short circuit current Isc, fill factor FF, conversion efficiency Eta, reverse current Irev, and batch quantity Lot are all tested and counted using a HALM tester. A full inspection of the front and back appearance of the coating is performed using a sorting machine.

[0074] Table 1

[0075] As can be seen from Table 1: The Uoc and Isc values ​​of Comparative Examples 1 and 2 were slightly lower than those of Example 1, and the efficiency Eta was 0.13% and 0.05% lower, respectively, indicating that Al2O3 passivation still has a certain passivation effect. NO2 and NH3 ionization treatment can improve the passivation effect, while the unionized group experienced a significant efficiency loss. The results of Comparative Example 3, using only NH3, were similar to those of Comparative Example 2.

[0076] Comparative Example 4 only had Al2O3 deposited without SiN film, and Comparative Example 5 had half a piece cut before film deposition. The Uoc decreased little compared to the examples, but the FF was lower.

[0077] Comparative Example 6 first prepared the battery cells, then diced and passivated them. The efficiency Eta was similar to that of Example 1, but the wire-wound plating ratio was significantly higher due to the influence of electrode height. Comparative Example 7 had a wire-wound plating ratio similar to Comparative Example 6, but its efficiency was slightly lower because it did not undergo ionization treatment.

[0078] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A half-wafer with passivated cut surfaces, characterized in that, It includes a half-coated silicon wafer and a passivation film, wherein the passivation film comprises an aluminum oxide layer and a silicon nitride layer sequentially disposed on the cut surface.

2. The passivated half-wafer according to claim 1, characterized in that, The half-wafer coated silicon wafer includes a front film disposed on the front side of the silicon wafer and a back film disposed on the back side of the silicon wafer; And / or, the thickness of the alumina layer is 3-10 nm; And / or, the thickness of the silicon nitride layer is 80-180 nm.

3. A method for preparing a passivated half-wafer silicon wafer according to claim 1 or 2, characterized in that, include: The half-coated silicon wafer is vacuum preheated to obtain a preheated silicon wafer; The cut surfaces of the preheated silicon wafer are subjected to plasma passivation to form an aluminum oxide layer; The alumina layer is subjected to plasma activation pretreatment to obtain a pretreated silicon wafer; Silicon nitride is deposited on the alumina layer of the pretreated silicon wafer by plasma-enhanced chemical vapor deposition to form a silicon nitride layer; Annealing the silicon wafer with the silicon nitride layer to obtain the half-wafer with the passivated cut surface.

4. The method for preparing a passivated half-wafer silicon wafer according to claim 3, characterized in that, The temperature for the vacuum preheating step is 300-400℃, and the holding time is 5-10 minutes.

5. The method for preparing a passivated half-wafer silicon wafer according to claim 3, characterized in that, The process gases used in the plasma passivation step include nitrous oxide and trimethylaluminum; And / or, the plasma passivation temperature is 300-400℃, the passivation time is 2-3 min, and the pressure is 1000-1400 mTorr; And / or, the process gas in the plasma activation pretreatment step includes nitrous oxide and ammonia; And / or, the temperature of the plasma activation pretreatment step is 400-450℃, the pressure is 1000-1800mTorr, and the time is 120s-300s; And / or, the process gases for the silicon nitride deposition step include silane and ammonia; And / or, the temperature for depositing silicon nitride is 400-500℃, the pressure is 1500-2000 mTorr, and the time is 5-10 min.

6. The method for preparing a passivated half-wafer silicon wafer according to claim 5, characterized in that, The flow ratio of nitrous oxide to trimethylaluminum in the process gas of the plasma passivation step is 4:1 to 6:

1. And / or, the flow rate of trimethylaluminum in the process gas of the plasma passivation step is 0.015-0.03 mol / min; And / or, the flow rate ratio of nitrous oxide and ammonia in the process gas of the plasma activation pretreatment step is 1:2 to 2:1; And / or, in the step of depositing silicon nitride, the process gas includes a flow ratio of silane and ammonia of 1:5 to 1:

10.

7. The method for preparing a passivated half-wafer silicon wafer according to claim 3, characterized in that, The annealing temperature is 300-400℃, and the annealing time is 5-10 minutes.

8. The method for preparing a passivated half-wafer silicon wafer according to claim 3, characterized in that, The preparation of the passivated half-silicon wafer is carried out in the reaction tube of a tubular plasma-enhanced chemical vapor deposition apparatus. And / or, before the half silicon wafer is vacuum preheated, two or more half coated silicon wafers are first loaded into the fixture, and the cutting surfaces in the same fixture are flush. And / or, before the half silicon wafer is vacuum preheated, two or more half coated silicon wafers are first loaded into the fixture. The fixtures holding the half coated silicon wafers are set in pairs, and adjacent pairs of fixtures are set in sequence.

9. The method for preparing a passivated half-wafer according to claim 8, characterized in that, The fixture includes two graphite sheets for holding the two or more half-coated silicon wafers and fasteners for clamping the half-coated silicon wafers held by the two graphite sheets. And / or, in the same pair of two fixtures, the cut surfaces of the half-coated silicon wafers are arranged opposite each other.

10. A half-cell battery, characterized in that, It is prepared using a half-silicon wafer with passivated cut surfaces as described in claim 1 or 2 as a substrate.

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