A signal processing system and method based on double chopping

Abstract

This invention discloses a signal processing system and method based on dual chopper modulation and demodulation. The invention employs a redundant design of the dual chopper modulation and demodulation network, and through a switching mechanism between the primary and backup networks, significantly improves the reliability and stability of the system in complex application environments such as aerospace, effectively solving the problem of single chopper network failure. The redundancy switching controller can automatically select the optimal signal path based on the real-time detection results of the status monitor, ensuring seamless switching between the primary and backup networks, improving the system's adaptability and response speed. The dual chopper modulation and demodulation network uses a periodic modulation strategy, which can effectively suppress low-frequency noise while maintaining high signal accuracy and stability, overcoming the limitations of traditional chopper technology in low-frequency noise processing. This invention has strong engineering practicality, can meet the application requirements of wide input dynamic range and high precision, and is suitable for various complex biological signal processing scenarios.

Description

Technical Field

[0001] This invention belongs to the field of analog integrated circuits and signal processing technology, specifically relating to a signal processing system and method based on dual chopping. Background Technology

[0002] With the development of technology, human biosignal sensing technology has been widely used in medical diagnosis, health monitoring, and intelligent treatment. However, biosignals have low frequencies and varying amplitudes, and are accompanied by extremely difficult-to-remove low-frequency noise. Furthermore, signal sensors need to be suitable for different application scenarios and overcome the inherent offset of the signal amplification circuit and various externally introduced noises. Therefore, a high-precision amplifier with low noise and low offset has become a key component of biosignal acquisition systems.

[0003] Traditional chopper amplification is an effective signal processing method that can reduce operational amplifier output voltage offset and low-frequency noise such as 1 / f to some extent. However, traditional chopper amplifiers are only suitable for specific signal amplitudes and are difficult to apply to scenarios with a wide input dynamic range. Furthermore, chopper technology faces challenges in improving input impedance because the introduced switching structure forms a switched-capacitor structure with the input capacitor, leading to a decrease in the input impedance of the biosignal amplifier. To address these issues, researchers have proposed various improved chopper amplifier designs. For example, some studies have employed low-noise chopper-stabilized capacitively coupled instrumentation amplifiers based on CMOS technology to improve amplifier performance. Other studies focus on increasing the amplifier's input impedance, such as reducing on-resistance through optimized circuit structure design. However, these methods often struggle to simultaneously achieve the requirements of low noise, low offset, and high input impedance, especially in complex application environments such as aerospace, where circuits are susceptible to radiation-induced failure.

[0004] Traditional chopper amplification technology is only suitable for specific signal amplitudes and is difficult to adapt to scenarios with wide input dynamic ranges, failing to meet the signal processing requirements of complex applications such as aerospace. It also faces challenges in increasing input impedance, as the introduced switching structure forms a switched-capacitor structure with the input capacitor, leading to a decrease in the input impedance of the biosignal amplifier. Furthermore, it is difficult to simultaneously achieve low noise, low offset, and high input impedance requirements, especially in complex environments such as aerospace, where the circuit is susceptible to radiation-induced failure. The lack of effective redundancy and fault-crossing mechanisms for the core modulation / demodulation switching network means that in environments with radiated single-event effects, such as aerospace, failure of the chopper switching network will interrupt the entire signal path, resulting in insufficient system reliability. Current chopper modulation and demodulation technologies have limited effectiveness in handling low-frequency noise and struggle to meet the requirements of high precision and stability, impacting the overall performance of the signal processing system. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides a signal processing system and method based on dual chopping. The technical problem to be solved by this invention is achieved through the following technical solution: In a first aspect, the present invention provides a signal processing system based on dual chopping, comprising: The system includes a core amplification path, a parallel dual-choke modulation and demodulation network, a status monitor, and a redundant switching controller; among these components... The core amplification path amplifies the modulated input signal step by step and outputs the amplified signal. The dual-choke modulation and demodulation network is located between the modulation node and the demodulation node of the core amplification path. Under the selection control of the redundant switching controller, it modulates the input signal to the chopping frequency and outputs the modulated input signal; it demodulates the amplified signal to the baseband frequency and outputs the demodulated amplified signal. The status monitor monitors the operating status parameters of the main chopper switch network and the backup chopper switch network in the dual chopper modulation and demodulation network in real time and generates corresponding status signals. The redundant switching controller, based on the status signal, controls the dual chopper modulation and demodulation network to switch networks when a fault occurs, so as to achieve automatic selection of signal paths.

[0006] In one embodiment of the present invention, the core amplification path includes: A cascaded first-stage amplifier circuit and a second-stage amplifier circuit; wherein, The first-stage amplifier circuit adopts a differential amplifier structure to initially amplify the modulated input signal and output the first-stage amplified signal. The second-stage amplifier circuit uses an operational amplifier structure to provide additional gain to the first-stage amplified signal and output the amplified signal.

[0007] In one embodiment of the present invention, the first-stage amplifier circuit includes: MOSFETs M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, and M11; among them, The gate voltage of the MOS transistor M1 is connected to Vpb1, the source voltage is connected to VDD, and the drain is connected to the source of the MOS transistor M2 and the source of the MOS transistor M3, respectively. The gates of MOS transistor M2 and M3 serve as the differential input terminals of the first-stage amplifier circuit, and their drains are connected to the source of MOS transistor M9. The drain of the MOS transistor M3 is connected to the source of the MOS transistor M8. The source of MOSFET M4 is connected to the power supply voltage VDD, the gate is connected to the gate of MOSFET M5 and connected to the voltage Vpb2, and the drain is connected to the source of MOSFET M6. The source of the MOSFET M5 is connected to the power supply voltage VDD, and the drain is connected to the source of the MOSFET M7. The gate of MOS transistor M6 is connected to the gate of MOS transistor M7 and is connected to voltage Vpb3. The drain of MOS transistor M6 and the drain of MOS transistor M7 serve as the differential output terminal of the first stage amplifier circuit. The source of MOSFET M8 is connected to the drain of MOSFET M10, the gate is connected to the gate of MOSFET M9 and connected to voltage Vpb4, and the drain is connected to the drain of MOSFET M6. The source of MOSFET M9 is connected to the drain of MOSFET M11, and the drain of MOSFET M7 is connected to the drain of MOSFET M7. The source of the MOS transistor M10 is connected to the ground voltage VSS, and its gate is connected to the gate of the MOS transistor M11 and connected to the voltage Vpb5. The source of the MOS transistor M11 is connected to the ground voltage VSS.

[0008] In one embodiment of the present invention, the dual-choke modulation and demodulation network includes: A main chopper modulation and demodulation network and a backup chopper modulation and demodulation network with identical structures connected in parallel; Both the main chopper modulation and demodulation network and the backup chopper modulation and demodulation network include: Modulation clock generator, demodulation clock generator, modulator, and demodulator; among which, The modulation clock generator is used to generate a modulation clock signal; The demodulation clock generator is used to generate a demodulation clock signal; The modulator, connected to the modulation node, is used to modulate the input signal to the chopping frequency and output the modulated input signal. The demodulator is connected to the demodulation point and is used to demodulate the amplified signal to the baseband frequency and output the demodulated amplified signal.

[0009] In one embodiment of the present invention, the state monitor includes: A state detection unit and a judgment unit; wherein, The status detection unit detects the operating status parameters of the main chopper switch network and the backup chopper switch network in real time and outputs the detection results. The judgment unit determines whether the main chopper switch network and the backup chopper switch network are working properly based on the detection results, and outputs the corresponding status signal.

[0010] In one embodiment of the present invention, the operating state parameters include: The critical point offset voltage or output signal-to-noise ratio of the chopper switch network.

[0011] In one embodiment of the present invention, the redundancy switching controller includes: Multiple state machines, control logic units, and multiplexer circuits; among them, The state machine is used to record the state signals of each chopper switch network; The control logic unit outputs a network gating signal based on the status signal and preset status conditions. The multiplexer circuit controls the dual chopper modulation and demodulation network to switch networks according to the network selection signal.

[0012] In one embodiment of the present invention, the step of controlling the dual-choke modulation and demodulation network to perform network switching when a fault occurs, based on a status signal, to achieve automatic selection of the signal path, includes: When the number of times the status signal continuously indicates that the main chopper switch network is faulty and the backup chopper switch network is normal exceeds the preset fault tolerance number and exceeds the preset fault tolerance time, the dual chopper modulation and demodulation network is controlled to switch to the state of working of the backup chopper switch network. When the number of consecutive times the status signal indicates that the backup chopper switch network is faulty and the main chopper switch network is normal exceeds the preset fault tolerance number, and the preset fault tolerance time is exceeded for consecutive times, the dual chopper modulation and demodulation network is controlled to switch to the main chopper switch network operation state.

[0013] Secondly, the present invention provides a signal processing method based on dual chopping, comprising: The main chopper switch network or the backup chopper switch network in the dual chopper modulation and demodulation network is controlled according to the network gating signal to modulate the input signal to the chopper frequency and output the modulated input signal. The modulated input signal is amplified step by step, and the amplified signal is output. The main chopper switch network or the backup chopper switch network in the dual chopper modulation and demodulation network is controlled according to the network gating signal to demodulate the amplified signal to the baseband frequency and output the demodulated amplified signal. Real-time monitoring of the operating status parameters of the main chopper switch network and the backup chopper switch network in the dual chopper modulation and demodulation network, generating corresponding status signals; Based on the status signal, when a fault occurs, the dual chopper modulation and demodulation network is controlled to switch networks to achieve automatic selection of signal paths.

[0014] The beneficial effects of this invention are: The solution provided by this invention employs a redundant design of a dual-chop modulation and demodulation network. Through a switching mechanism between the primary and backup networks, the reliability and stability of the system in complex application environments such as aerospace are significantly improved, effectively solving the problem of single-chop network failure. The redundant switching controller can automatically select the optimal signal path based on the real-time detection results of the status monitor, ensuring seamless switching between the primary and backup networks and improving the system's adaptability and response speed. The dual-chop modulation and demodulation network uses a periodic modulation strategy, which can effectively suppress low-frequency noise while maintaining high signal accuracy and stability, overcoming the limitations of traditional chopping technology in low-frequency noise processing. Furthermore, through optimized network design and control strategies, this invention effectively improves the system's input impedance while ensuring low noise and low offset, solving the problem of reduced input impedance caused by the switching structure of traditional chopper amplifiers. The system structure of this invention is simple, easy to implement, and has strong engineering practicality. It can meet the application requirements of wide input dynamic range and high precision, and is suitable for various complex biosignal processing scenarios. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a signal processing system based on dual chopper provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the core amplification path in a signal processing system based on dual chopper, provided in an embodiment of the present invention. Figure 3 This is a schematic diagram of the first-stage amplifier circuit in a signal processing system based on dual chopper, provided by an embodiment of the present invention. Figure 4 This is a schematic diagram illustrating the steps of a signal processing method based on dual chopping provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the logic flow of a signal processing method based on dual chopping provided in an embodiment of the present invention. Detailed Implementation

[0016] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0017] This invention provides a signal processing system and method based on dual chopping.

[0018] Below, we will first introduce a signal processing system based on dual chopper provided in the embodiments of the present invention.

[0019] The present invention provides a signal processing system based on dual chopping, such as... Figure 1 As shown, it may include: The system includes a core amplification path, a parallel dual-choke modulation and demodulation network, a status monitor, and a redundant switching controller; among these components... The core amplification path amplifies the modulated input signal step by step and outputs the amplified signal. A dual-choke modulation and demodulation network is set between the modulation node and the demodulation node of the core amplification path. Under the selection control of the redundant switching controller, it modulates the input signal to the chopping frequency and outputs the modulated input signal; it demodulates the amplified signal to the baseband frequency and outputs the demodulated amplified signal. The status monitor monitors the operating status parameters of the main chopper switch network and the backup chopper switch network in the dual chopper modulation and demodulation network in real time and generates corresponding status signals. The redundant switching controller controls the dual chopper modulation and demodulation network to switch networks when a fault occurs, based on the status signal, so as to achieve automatic selection of signal paths.

[0020] Core amplification pathways, such as Figure 2 As shown, it may include: A cascaded first-stage amplifier circuit and a second-stage amplifier circuit; wherein, The first-stage amplifier circuit uses a differential amplifier structure to initially amplify the modulated input signal and output the first-stage amplified signal. The second-stage amplifier circuit, employing an operational amplifier structure, provides additional gain to the first-stage amplified signal and outputs the amplified signal.

[0021] The first-stage amplifier circuit is preferably a differential amplifier structure with high input impedance and low noise. Its input terminal is connected to the biosensor to perform preliminary amplification of the modulated input signal corresponding to the weak differential bioelectric signal. The second-stage amplifier circuit is used to provide additional gain and drive the subsequent load.

[0022] First-stage amplifier circuit, such as Figure 3 As shown, it may include: MOSFETs M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, and M11; among them, The gate voltage of MOSFET M1 is connected to Vpb1, the source voltage is connected to VDD, and the drain is connected to the source of MOSFET M2 and the source of MOSFET M3, respectively. The gates of MOSFET M2 and MOSFET M3 serve as the differential input terminals of the first-stage amplifier circuit, and their drains are connected to the source of MOSFET M9. The drain of MOSFET M3 is connected to the source of MOSFET M8; The source of MOSFET M4 is connected to the power supply voltage VDD, the gate is connected to the gate of MOSFET M5 and connected to the voltage Vpb2, and the drain is connected to the source of MOSFET M6. The source of MOSFET M5 is connected to the power supply voltage VDD, and the drain is connected to the source of MOSFET M7. The gate of MOSFET M6 is connected to the gate of MOSFET M7 and is connected to a voltage Vpb3. The drain of MOSFET M6 and the drain of MOSFET M7 serve as the differential output terminals of the first-stage amplifier circuit. The source of MOSFET M8 is connected to the drain of MOSFET M10, the gate of MOSFET M9 is connected to the gate of MOSFET M9 and a voltage Vpb4 is applied, and the drain of MOSFET M6 is connected to the drain of MOSFET M6. The source of MOSFET M9 is connected to the drain of MOSFET M11, and the drain of MOSFET M9 is connected to the drain of MOSFET M7. The source of MOSFET M10 is connected to ground voltage VSS, and its gate is connected to the gate of MOSFET M11 and connected to voltage Vpb5. The source of MOSFET M11 is connected to ground voltage VSS.

[0023] The first-stage amplifier circuit can employ a high-input-impedance, low-noise instrumentation amplifier or differential operational amplifier structure. In a preferred embodiment, its gain can be 20 to 30 times, and its common-mode rejection ratio is not less than 80 dB (e.g., 80 dB to 90 dB).

[0024] The first-stage amplifier circuit amplifies the weak differential bioelectric signal by inputting it to the non-inverting inputs of two internal differential operational amplifiers. Simultaneously, it stabilizes the gain of the chopper amplifier by inputting the feedback signal from the negative feedback loop to the inverting inputs of the two internal differential operational amplifiers. For example, the first-stage amplifier circuit can use an operational amplifier with a gain of 20 and a common-mode rejection ratio (CMRR) of 80 dB. Alternatively, it can use an operational amplifier with a gain of 30 and a CMRR of 90 dB.

[0025] The second-stage amplifier circuit can employ a general-purpose or precision operational amplifier structure to provide additional gain and drive subsequent circuitry. In a preferred embodiment, its gain is 10 to 15 times, and its common-mode rejection ratio (CMRR) is not less than 70 dB (e.g., 70 dB to 75 dB). The input of the second-stage amplifier circuit is connected to the output of the first-stage amplifier circuit to further amplify the signal and stabilize the overall system gain. Exemplarily, the second-stage amplifier circuit can employ an operational amplifier with a gain of 10 times and a CMRR of 70 dB. Alternatively, the second-stage amplifier circuit can employ an operational amplifier with a gain of 15 times and a CMRR of 75 dB.

[0026] A dual-choke modulation and demodulation network may include: A main chopper modulation and demodulation network and a backup chopper modulation and demodulation network with identical structures connected in parallel; Both the main chopper modulation / demodulation network and the backup chopper modulation / demodulation network include: Modulation clock generator, demodulation clock generator, modulator, and demodulator; among which, A modulation clock generator is used to generate a modulation clock signal; A demodulation clock generator is used to generate a demodulation clock signal; A modulator, connected to a modulation node, is used to modulate the input signal to a chopping frequency and output a modulated input signal. A demodulator, connected to the demodulation point, is used to demodulate the amplified signal to the baseband frequency and output the demodulated amplified signal.

[0027] The modulation clock generator produces a frequency of A square wave clock is used as the modulation clock signal. Preferably, the frequency of the modulation clock signal can be from 1 kHz to 1.8 kHz.

[0028] The demodulation clock generator produces a frequency of A square wave clock is used as the demodulation clock signal. Preferably, the frequency of the demodulation clock signal can be from 100kHz to 180kHz.

[0029] Both modulators and demodulators can be constructed from MOSFET switch arrays.

[0030] The modulation node is located before the input of the first-stage amplifier circuit, and the demodulation node is located after the output of the second-stage amplifier circuit.

[0031] Independent crystal oscillators (8MHz or 10MHz) can also be used as clock sources in the main chopper modulation and demodulation network and the backup chopper modulation and demodulation network. The required chopper clock is generated by digital frequency division circuit to ensure the independence and stability of the clock in the main chopper modulation and demodulation network and the backup chopper modulation and demodulation network.

[0032] For example, the modulation frequency of both the main chopper modulation / demodulation network and the backup chopper modulation / demodulation network can be set to 1 kHz, and the demodulation frequency can be set to 100 kHz. The modulation frequency of the main chopper modulation / demodulation network can be set to 1.5 kHz, and the demodulation frequency can be set to 150 kHz. The modulation frequency of the backup chopper modulation / demodulation network can be set to 1.8 kHz, and the demodulation frequency can be set to 180 kHz.

[0033] A status monitor may include: A state detection unit and a judgment unit; wherein, The status detection unit detects the operating status parameters of the main chopper switch network and the backup chopper switch network in real time and outputs the detection results. The judgment unit determines whether the main chopper switch network and the backup chopper switch network are working properly based on the detection results, and outputs the corresponding status signals.

[0034] Operating status parameters may include: The critical point offset voltage or output signal-to-noise ratio of the chopper switch network.

[0035] The status detection unit can use an embedded microcontroller (such as a 16-bit or 32-bit MCU) ADC module to sample the offset voltage of key points of the chopper switch network in real time, or to perform digital analysis on the output signal to calculate its signal-to-noise ratio.

[0036] The judgment unit is implemented in the microcontroller through software algorithm. By setting a preset failure threshold (key point offset voltage exceeds the limit or signal-to-noise ratio is lower than the threshold), when the detection results exceed the threshold multiple times (e.g., 3 to 5 times), it is judged as a network failure and a fault status signal is generated.

[0037] The redundancy switching controller may include: Multiple state machines, control logic units, and multiplexer circuits; among them, A state machine is used to record the state signals of each chopper switch network. The control logic unit outputs a network gating signal based on the status signal and preset status conditions. The multi-channel switching circuit controls the dual chopper modulation and demodulation network to switch networks according to the network selection signal.

[0038] Based on the status signal, in the event of a fault, the dual-choke modulation and demodulation network is controlled to switch networks to achieve automatic selection of the signal path, which may include: When the number of times the status signal continuously indicates that the main chopper switch network is faulty and the backup chopper switch network is normal exceeds the preset fault tolerance number and exceeds the preset fault tolerance time, the dual chopper modulation and demodulation network is controlled to switch to the state of working of the backup chopper switch network. When the number of consecutive times the status signal indicates that the backup chopper switch network is faulty and the main chopper switch network is normal exceeds the preset fault tolerance number, and the preset fault tolerance time is exceeded for consecutive times, the dual chopper modulation and demodulation network is controlled to switch to the main chopper switch network operation state.

[0039] The specific logic of the redundancy switching controller is as follows: Control core: Implemented by a programmable logic device (such as a CPLD) or another microcontroller, containing a state machine and control logic.

[0040] Switching execution: A multi-channel switching circuit (such as 4-channel or 6-channel) is used to select the signal path.

[0041] Fault-tolerant control process: Normal state: The state machine defaults to controlling the analog switch so that the signal flows through the main chopper modulation and demodulation network.

[0042] Fault detection and confirmation: When a fault status signal corresponding to the main chopper modulation and demodulation network is received, a fault-tolerant timer is started (e.g., preset from 100 ms to 200 ms). During this time, continuous monitoring is performed. If the fault persists, the main chopper modulation and demodulation network is confirmed to have failed.

[0043] Seamless switching: Upon confirmation, the control logic immediately drives the analog switch to switch the signal path to the backup chopper modulation and demodulation network, while updating the state machine record.

[0044] In a redundant switching controller, a 4-channel analog switch chip can be used to switch the signal paths in the multiple switching circuit, and an 8-bit microcontroller can be used to record the working state of each network in the state machine.

[0045] The control logic unit automatically switches between operating states based on status signals and preset state conditions. When the main chopper modem network is operating normally, the control core amplification path modulates and demodulates the signal through the main chopper modem network. When the number of times the main chopper modem network fails due to radiation exceeds the preset fault tolerance number and continues for more than the preset fault tolerance time, the dual chopper modem network switches to the standby chopper switch network. When the number of times the standby chopper switch network fails due to radiation exceeds the preset fault tolerance number and continues for more than the preset fault tolerance time, the dual chopper modem network switches back to the main chopper switch network. Preferably, the preset fault tolerance number can be 3 or 5 times; the preset fault tolerance time can be 100ms or 200ms.

[0046] In the dual-chopper-based signal processing system provided in this invention, the various modules can interact via a 32-bit or 64-bit high-speed data bus. Advanced packaging technology is used to integrate the entire system into a BGA or CSP packaged chip to improve the system's integration and radiation resistance.

[0047] Secondly, corresponding to the above system embodiments, this invention also provides a signal processing method based on dual chopping, such as... Figure 4 As shown, it may include: S1 controls the main chopper switch network or the backup chopper switch network in the dual chopper modulation and demodulation network according to the network gating signal, modulates the input signal to the chopper frequency, and outputs the modulated input signal. S2 amplifies the modulated input signal step by step and outputs the amplified signal. S3 controls the main chopper switch network or the backup chopper switch network in the dual chopper modulation and demodulation network according to the network gating signal, demodulates the amplified signal to the baseband frequency, and outputs the demodulated amplified signal. S4, monitors the operating status parameters of the main chopper switch network and the backup chopper switch network in the dual chopper modulation and demodulation network in real time, and generates corresponding status signals; S5, based on the status signal, controls the dual chopper modulation and demodulation network to switch networks when a fault occurs, so as to achieve automatic selection of signal paths.

[0048] The logic flow diagram of this signal processing method is as follows: Figure 5 As shown, the weak differential bioelectrical signal collected by the biosensor reaches the modulation node, where the dual-chop modulation and demodulation network modulates and demodulates the input signal. During modulation and demodulation, a state monitor continuously monitors the corresponding operating state parameters of the dual-chop modulation and demodulation network, generating corresponding state signals. A redundancy switching controller judges these state signals, and in case of a fault, controls the dual-chop modulation and demodulation network to switch networks, thus achieving automatic signal path selection. The modulated input signal is amplified stage by stage by the core amplification path to obtain the amplified signal. After the amplified signal reaches the demodulation point, it is demodulated, and the demodulated amplified signal is output.

[0049] This invention employs a redundant design of a dual-chop modulation and demodulation network. Through a switching mechanism between the primary and backup networks, the reliability and stability of the system in complex application environments such as aerospace are significantly improved, effectively solving the problem of single-chop network failure. The redundant switching controller can automatically select the optimal signal path based on real-time detection results from the status monitor, ensuring seamless switching between the primary and backup networks and improving the system's adaptability and response speed. The dual-chop modulation and demodulation network uses a periodic modulation strategy, which effectively suppresses low-frequency noise while maintaining high signal accuracy and stability, overcoming the limitations of traditional chopping technology in low-frequency noise processing. Through optimized network design and control strategies, while ensuring low noise and low offset, the system's input impedance is effectively improved, solving the problem of reduced input impedance caused by the switching structure of traditional chopper amplifiers. This system has a simple structure, is easy to implement, and has strong engineering practicality. It can meet the application requirements of wide input dynamic range and high precision, and is suitable for various complex biosignal processing scenarios.

[0050] It should be noted that, in the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0051] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A signal processing system based on dual chopper, characterized in that, include: The system includes a core amplification path, a parallel dual-choke modulation and demodulation network, a status monitor, and a redundant switching controller; among these components... The core amplification path amplifies the modulated input signal step by step and outputs the amplified signal. The dual chopper modulation and demodulation network is set between the modulation node and the demodulation node of the core amplification path. It is used to modulate the input signal to the chopper frequency and output the modulated input signal under the selection control of the redundant switching controller. The amplified signal is demodulated to the baseband frequency, and the demodulated amplified signal is output. The status monitor monitors the operating status parameters of the main chopper switch network and the backup chopper switch network in the dual chopper modulation and demodulation network in real time and generates corresponding status signals. The redundant switching controller, based on the status signal, controls the dual chopper modulation and demodulation network to switch networks when a fault occurs, so as to achieve automatic selection of signal paths.

2. The signal processing system based on dual chopper according to claim 1, characterized in that, The core amplification path includes: A cascaded first-stage amplifier circuit and a second-stage amplifier circuit; wherein, The first-stage amplifier circuit adopts a differential amplifier structure to initially amplify the modulated input signal and output the first-stage amplified signal. The second-stage amplifier circuit uses an operational amplifier structure to provide additional gain to the first-stage amplified signal and output the amplified signal.

3. The signal processing system based on dual chopper according to claim 1, characterized in that, The first stage amplifier circuit includes: MOSFETs M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, and M11; among them, The gate voltage of the MOS transistor M1 is connected to Vpb1, the source voltage is connected to VDD, and the drain is connected to the source of the MOS transistor M2 and the source of the MOS transistor M3, respectively. The gates of MOS transistor M2 and M3 serve as the differential input terminals of the first-stage amplifier circuit, and their drains are connected to the source of MOS transistor M9. The drain of the MOS transistor M3 is connected to the source of the MOS transistor M8. The source of MOSFET M4 is connected to the power supply voltage VDD, the gate is connected to the gate of MOSFET M5 and connected to the voltage Vpb2, and the drain is connected to the source of MOSFET M6. The source of the MOSFET M5 is connected to the power supply voltage VDD, and the drain is connected to the source of the MOSFET M7. The gate of MOS transistor M6 is connected to the gate of MOS transistor M7 and is connected to voltage Vpb3. The drain of MOS transistor M6 and the drain of MOS transistor M7 serve as the differential output terminal of the first stage amplifier circuit. The source of MOSFET M8 is connected to the drain of MOSFET M10, the gate is connected to the gate of MOSFET M9 and connected to voltage Vpb4, and the drain is connected to the drain of MOSFET M6. The source of MOSFET M9 is connected to the drain of MOSFET M11, and the drain of MOSFET M7 is connected to the drain of MOSFET M7. The source of the MOS transistor M10 is connected to the ground voltage VSS, and its gate is connected to the gate of the MOS transistor M11 and connected to the voltage Vpb5. The source of the MOS transistor M11 is connected to the ground voltage VSS.

4. The signal processing system based on dual chopper according to claim 1, characterized in that, The dual-choke modulation and demodulation network includes: A main chopper modulation and demodulation network and a backup chopper modulation and demodulation network with identical structures connected in parallel; Both the main chopper modulation and demodulation network and the backup chopper modulation and demodulation network include: Modulation clock generator, demodulation clock generator, modulator, and demodulator; among which, The modulation clock generator is used to generate a modulation clock signal; The demodulation clock generator is used to generate a demodulation clock signal; The modulator, connected to the modulation node, is used to modulate the input signal to the chopping frequency and output the modulated input signal. The demodulator is connected to the demodulation point and is used to demodulate the amplified signal to the baseband frequency and output the demodulated amplified signal.

5. A signal processing system based on dual chopper according to claim 1, characterized in that, The status monitor includes: A state detection unit and a judgment unit; wherein, The status detection unit detects the operating status parameters of the main chopper switch network and the backup chopper switch network in real time and outputs the detection results. The judgment unit determines whether the main chopper switch network and the backup chopper switch network are working properly based on the detection results, and outputs the corresponding status signal.

6. A signal processing system based on dual chopper according to claim 5, characterized in that, The operating status parameters include: The critical point offset voltage or output signal-to-noise ratio of the chopper switch network.

7. A signal processing system based on dual chopper according to claim 1, characterized in that, The redundancy switching controller includes: Multiple state machines, control logic units, and multiplexer circuits; among them, The state machine is used to record the state signals of each chopper switch network; The control logic unit outputs a network gating signal based on the status signal and preset status conditions. The multiplexer circuit controls the dual chopper modulation and demodulation network to switch networks according to the network selection signal.

8. A signal processing system based on dual chopper according to claim 7, characterized in that, The step of controlling the dual-choke modulation and demodulation network to switch networks when a fault occurs, based on the status signal, to achieve automatic selection of the signal path, includes: When the number of times the status signal continuously indicates that the main chopper switch network is faulty and the backup chopper switch network is normal exceeds the preset fault tolerance number and exceeds the preset fault tolerance time, the dual chopper modulation and demodulation network is controlled to switch to the state of working of the backup chopper switch network. When the number of consecutive times the status signal indicates that the backup chopper switch network is faulty and the main chopper switch network is normal exceeds the preset fault tolerance number, and the preset fault tolerance time is exceeded for consecutive times, the dual chopper modulation and demodulation network is controlled to switch to the main chopper switch network operation state.

9. A signal processing method based on dual chopping, characterized in that, include: The main chopper switch network or the backup chopper switch network in the dual chopper modulation and demodulation network is controlled according to the network gating signal to modulate the input signal to the chopper frequency and output the modulated input signal. The modulated input signal is amplified step by step, and the amplified signal is output. The main chopper switch network or the backup chopper switch network in the dual chopper modulation and demodulation network is controlled according to the network gating signal to demodulate the amplified signal to the baseband frequency and output the demodulated amplified signal. Real-time monitoring of the operating status parameters of the main chopper switch network and the backup chopper switch network in the dual chopper modulation and demodulation network, generating corresponding status signals; Based on the status signal, when a fault occurs, the dual chopper modulation and demodulation network is controlled to switch networks to achieve automatic selection of signal paths.

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