A decoupled parallel simulation method, system, terminal and medium of a reactive generator

Abstract

This invention belongs to the field of reactive power generator simulation technology, specifically disclosing a decoupled parallel simulation method, system, terminal, and medium for reactive power generators. The method first uses a preset decoupling strategy to segment the original electrical system model into a network, generating multiple independent sub-module decoupled models and a system-level bridge arm equivalent circuit model; then, it performs task partitioning based on a CPU-GPU heterogeneous computing architecture; finally, it aggregates the solution results from both ends to advance the simulation step size. This invention effectively breaks through the computing power bottleneck of traditional pure CPU serial computing while ensuring high-precision electromagnetic transient simulation, significantly improving the simulation efficiency and numerical stability for large-scale cascaded reactive power generators.

Description

Technical Field

[0001] This invention belongs to the field of reactive power generator simulation, specifically involving a decoupled parallel simulation method, system, terminal, and medium for reactive power generators. Background Technology

[0002] With the large-scale construction and operation of high-voltage direct current transmission based on voltage source converters and flexible AC transmission systems in the power grid, coupled with the widespread integration of microgrids and renewable energy, the power system is increasingly exhibiting a structure dominated by power electronic converters. This trend significantly increases the reactive power consumption of the system, exacerbates voltage fluctuations, and places higher demands on the safe and stable operation of the power grid.

[0003] Static var generators (SVG) are widely used in power quality improvement and reactive power compensation due to their fast dynamic response and strong reactive power compensation capabilities. Among them, cascaded H-bridge SVGs are particularly suitable for high-voltage, high-capacity reactive power compensation scenarios because they require fewer switching devices, have a simple structure, and are highly modular. Before large-scale power electronic equipment is put into actual operation, electromagnetic transient (EMT) simulations must be performed to verify its safety and stability.

[0004] However, SVG contains a large number of power electronic devices and has high switching frequencies and complex control strategies. Current electromagnetic transient simulation technologies have the following significant drawbacks: Traditional EMT algorithms often employ nodal analysis (NAM), which solves for node voltages and branch currents by constructing a set of nodal voltage equations. Its computational complexity increases dramatically with system size, posing a severe challenge to computational speed in large-scale power system simulations. Furthermore, with the large-scale deployment of SVG, the size and computational burden of electromagnetic transient models are rapidly increasing. Traditional simulation frameworks, relying solely on CPUs for serial computation, struggle to handle massive amounts of data and the rapid solution of high-frequency switching states, resulting in low simulation efficiency. Summary of the Invention

[0005] This invention addresses the problems in the prior art by providing a decoupled parallel simulation method, system, terminal, and medium for reactive power generators. This solves the problem of low computational speed of NAM in large-scale power system fine simulation, as mentioned in the background. It also solves the problem that traditional simulation frameworks rely solely on CPU for serial computation, making it difficult to handle massive amounts of data and high-frequency switching states, resulting in low simulation efficiency.

[0006] The technical solution adopted in this invention is as follows: Firstly, this application provides a decoupled parallel simulation method for a reactive power generator, which includes the following steps: Step S1: Obtain the original electrical system model of the reactive power generator, and use the preset decoupling strategy to perform network segmentation on the original electrical system model to generate multiple independent sub-module decoupling models and system-level bridge arm equivalent circuit models. Step S2: Extract the simulation calculation requirements of the reactive power generator, divide the overall task into boundaries based on the CPU-GPU heterogeneous computing architecture, and determine the system-level solution task to be executed by the CPU and the sub-module parallel solution task to be executed by the GPU. Step S3: At each time step of entering the simulation cycle, retrieve the historical state data of the previous moment, and construct the corresponding node voltage equations and historical current source vectors according to the bridge arm equivalent circuit model and the sub-module decoupling model. Step S4: Use the CPU to process the system-level solution task, combine the preset control system logic to calculate the system-level state variables, and send cooperative control instructions and system-level interactive data to the GPU. Step S5: Drive the GPU to respond to the received cooperative control instructions, and use a multi-threading mechanism to perform fine-grained parallel solution on multiple independent sub-module decoupling models to calculate the internal state variables of each sub-module. Step S6: Summarize the solution results of the CPU and GPU at the current step to complete the overall data update, advance to the next simulation step, and repeat the process until the preset total simulation time is reached, and output the electromagnetic transient simulation results of the reactive power generator.

[0007] Furthermore, step S1 specifically includes the following steps: Step S1-1: Receive the original electrical system model of the reactive power generator, and evenly distribute the series resistance and filter inductance of each phase arm of the three-phase converter in the original electrical system model to all sub-modules contained in the corresponding phase arm to obtain the internal equivalent resistance and internal equivalent inductance of each sub-module. Step S1-2: For each sub-module after parameter allocation, a binary resistance model is used to model the power electronic switches in the sub-module. Under the assumption that the switch conduction resistance is zero and the turn-off resistance is infinite, the equivalent topology circuit of each sub-module is constructed to realize the network segmentation and physical state decoupling of the original electrical system model. Step S1-3: The semi-implicit integration method is used to discretize the differential equations corresponding to the equivalent topology circuit, and the time-domain recursive relationship between the capacitor voltage and inductor current of the sub-module is derived to generate multiple independent sub-module decoupling models. Step S1-4: Perform overall series equivalent simplification on the decoupled models of all sub-modules within the same bridge arm, derive and obtain the total equivalent resistance and total historical current source used to characterize the port characteristics of the bridge arm of that phase, and generate a system-level bridge arm equivalent circuit model.

[0008] Furthermore, in steps S1-3, the derived time-domain recursive formulas for the relationship between the capacitor voltage and inductor current of the submodule are as follows:

[0009]

[0010] in, , ; Indicates the inductor current of the submodule. The equivalent charging and discharging current acting on the capacitor branch at the half-step time; This represents the equivalent voltage of the submodule capacitor voltage referred to the submodule port side at time n; and These represent the capacitors of the submodules at... Time and Voltage at any given moment; and These represent the inductance of the submodules in... Time and Current at any given moment; This is for simulating step size; For the DC-side capacitor of the submodule; and These are the internal equivalent inductance and internal equivalent resistance of the submodule after uniform distribution, respectively. for The port voltage of the time submodule; A coefficient related to the conduction state of the power electronic switch, when the inductor current flows into the positive terminal of the capacitor. When flowing into the negative end .

[0011] Furthermore, in steps S1-4, the decoupled models of all sub-modules within the same bridge arm are simplified by overall series simplification to obtain the formulas for the total equivalent voltage and equivalent injected current source used to characterize the port characteristics of that phase bridge arm, as follows:

[0012]

[0013] in, This indicates the total equivalent voltage of the phase bridge arm; This indicates the total number of sub-modules contained in this phase arm; This indicates the first phase of the bridge arm. The capacitor voltage of each submodule; and These represent the on / off state coefficients of the corresponding submodules; This represents the equivalent current source injected into the network; This indicates the phase current of the bridge arm in which the phase is located.

[0014] Furthermore, step S4 specifically includes the following steps: Step S4-1: Employ voltage and current dual closed-loop PI control to separate and extract the positive and negative sequence components in the electrical quantities; generate the fundamental positive sequence active current command through the outer loop voltage control loop, and perform feedforward decoupling control through the inner loop current control loop. Step S4-2: Employ phase-to-phase voltage equalization control, inject zero-sequence voltage into the control loop, and adjust the amplitude parameters of the zero-sequence voltage. Step S4-3: Employ phase-to-phase voltage balancing control and adjust the control commands of the corresponding bridge arm to control the active power absorbed by each submodule to compensate for the self-loss of the corresponding submodule.

[0015] Furthermore, step S4-3 specifically includes: Obtain the deviation between the real-time detected value of the DC side voltage of each submodule and the given reference value; By adjusting the modulation signals of each submodule, a correction component for active power compensation is superimposed on the original modulation signal, so that the deviation tends to zero.

[0016] Furthermore, step S5 specifically includes the following steps: Step S5-1: Utilize the multi-threaded architecture of the GPU to map each independent sub-module decoupled model to the corresponding parallel computing thread; Step S5-2: In each parallel computing thread, the preset submodule solver is called to independently and synchronously calculate the state variables of each node within each submodule at the current step size.

[0017] Secondly, this application provides a decoupled parallel simulation system for a reactive power generator, used to implement the decoupled parallel simulation method for a reactive power generator as described in the first aspect. The system includes: Modeling and decoupling module: used to obtain the original electrical system model of the reactive power generator, and to perform network segmentation on the original electrical system model using a preset decoupling strategy to generate multiple independent sub-module decoupling models and system-level bridge arm equivalent circuit models; Task partitioning module: used to extract the simulation calculation requirements of the reactive power generator, divide the overall task into boundaries based on the CPU-GPU heterogeneous computing architecture, determine the system-level solution task to be executed by the CPU, and the sub-module parallel solution task to be executed by the GPU. Computing engine: includes the CPU and GPU sides that communicate with each other; The CPU is used to: retrieve historical state data from the previous moment at each time step of the simulation cycle, construct the corresponding node voltage equations and historical current source vectors; process system-level solution tasks, calculate system-level state variables in conjunction with the preset control system logic, and issue cooperative control instructions to the GPU. The GPU is used to: respond to received cooperative control commands, use a multi-threaded architecture to solve multiple independent sub-module decoupled models in parallel, and calculate the internal state variables of each sub-module. The CPU is also used to: summarize the solution results from the GPU to complete the data update for the current step size, and advance to the next simulation step size until the electromagnetic transient simulation results of the reactive power generator are output.

[0018] Thirdly, this application provides a terminal, including: The memory is used to store the decoupled parallel simulation program for the reactive power generator. A processor is used to implement the steps of the decoupled parallel simulation method for the reactive power generator as described in the first aspect when executing the decoupled parallel simulation program for the reactive power generator.

[0019] Fourthly, this application provides a computer-readable storage medium that stores computer instructions. When a computer reads the computer instructions in the storage medium, the computer executes the decoupled parallel simulation method for the reactive power generator as described in the first aspect.

[0020] As can be seen from the above technical solutions, the advantages of the present invention are: By combining a semi-implicit delay decoupling strategy with a CPU-GPU heterogeneous parallel architecture, efficient simulation of large-scale static var generators (SVG) is achieved, effectively solving the problem of low computational efficiency of traditional CPU-based simulation methods when dealing with high-penetration power electronic devices.

[0021] By evenly distributing series resistors and filter inductors to each submodule and decoupling the physical state of the switching network using a binary resistor model, the unification of the submodule structure and the independence of the computational tasks are achieved, laying the foundation for utilizing hardware parallelism in large-scale repetitive solution tasks.

[0022] The time-domain recursive relationship derived using the semi-implicit integration method has better numerical stability than the traditional forward Euler method. It can accurately reflect the dynamic changes of the capacitor voltage and inductor current of the submodule, and does not require complex matrix inversion operations, which significantly reduces the computing power overhead of a single computing unit.

[0023] By simplifying the decoupled submodule model into an overall series equivalent, the total equivalent resistance and total historical current source characterizing the bridge arm port characteristics are extracted, which significantly reduces the dimension of the system-level node voltage equations and alleviates the computational burden on the CPU when processing flow control and data management.

[0024] By implementing a three-layer control strategy, including dual closed-loop voltage and current control, phase-to-phase voltage balancing, and phase-to-phase voltage balancing, the system achieves multi-dimensional and precise regulation of the SVG DC link voltage. While maintaining the three-phase voltage balance, it also compensates for the sub-module's own losses, ensuring the closed-loop stability and reliability of the entire simulation model under complex operating conditions.

[0025] By superimposing a correction component for active power compensation onto the modulation signal of the submodule, fine adjustment of the DC-side voltage deviation of the submodule is achieved, ensuring that each submodule in the cascaded structure can accurately track the given reference value, and further improving the system's fine analysis capability in electromagnetic transient simulation.

[0026] By leveraging the multi-threaded architecture of GPUs, a large number of independent sub-module tasks are mapped to parallel computing threads, achieving fine-grained parallel solutions. As the number of sub-modules increases, the acceleration advantage becomes more and more obvious, greatly improving the throughput of accelerated simulation of ultra-large-scale power electronic devices. Attached Figure Description

[0027] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the description will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a flowchart of the decoupling parallel simulation method for the reactive power generator of the present invention; Figure 2 This is a topology diagram of the star-cascaded H-bridge static var generator (SVG) system of the present invention; Figure 3 This is an equivalent topology diagram of the SVG submodule of the present invention; Figure 4 This is the decoupling equivalent circuit diagram of the SVG bridge arm of the present invention; Figure 5This is a diagram showing the CPU and GPU module allocation after decoupling in the star-cascaded H-bridge (CHB) SVG system of the present invention; Figure 6 This is a simulation flowchart of the electrical system and control system of the present invention; Figure 7 The following is a comparison of the simulated waveforms of this invention, wherein: Figure 7 (a) is the waveform of the A-phase output voltage of the SVG; Figure 7 (b) is the waveform of the output current of phase A of the SVG; Figure 7 (c) is the waveform diagram of the output voltage of phase A on the grid side; Figure 7 (d) is the waveform diagram of the output current of phase A on the grid side; Figure 8 This is an architecture diagram of the decoupled parallel simulation system for the reactive power generator of this invention. Detailed Implementation

[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] Please see Figures 1-7 As shown, this application provides a decoupled parallel simulation method for a reactive power generator, including the following steps: Step S1: Obtain the original electrical system model of the reactive power generator, and use the preset decoupling strategy to perform network segmentation on the original electrical system model to generate multiple independent sub-module decoupling models and system-level bridge arm equivalent circuit models. Step S1-1: Receive the original electrical system model of the reactive power generator, and evenly distribute the series resistance and filter inductance of each phase arm of the three-phase converter in the original electrical system model to all sub-modules contained in the corresponding phase arm to obtain the internal equivalent resistance and internal equivalent inductance of each sub-module. Step S1-2: For each sub-module after parameter allocation, a binary resistance model is used to model the power electronic switches in the sub-module. Under the assumption that the switch conduction resistance is zero and the turn-off resistance is infinite, the equivalent topology circuit of each sub-module is constructed to realize the network segmentation and physical state decoupling of the original electrical system model. Step S1-3: The semi-implicit integration method is used to discretize the differential equations corresponding to the equivalent topology circuit, and the time-domain recursive relationship between the capacitor voltage and inductor current of the sub-module is derived to generate multiple independent sub-module decoupling models. Step S1-4: Perform overall series equivalent simplification on the decoupled models of all sub-modules within the same bridge arm, derive and obtain the total equivalent resistance and total historical current source used to characterize the port characteristics of the bridge arm of that phase, and generate a system-level bridge arm equivalent circuit model.

[0031] The decoupling and modeling process in step S1 is as follows: First, the main circuit and sub-module topology of the star-cascaded H-bridge SVG are obtained. To maintain the uniformity of the sub-module structure, the series resistors of the converter arms are... and AC side filter inductor Evenly distributed to the bridge arm of this phase In all submodules formed by cascading submodules, the internal equivalent resistance of each submodule is obtained. and internal equivalent inductance .

[0032] For the sub-modules with allocated parameters, a binary resistance model is used to model the power electronic switches: that is, each switch uses a resistance model in the on state. This indicates that in the off state, use This leads to the establishment of a set of differential equations for the equivalent topology of the submodule:

[0033] in, For the DC side capacitor of the submodule; This is the capacitor voltage; It is the inductor current; This refers to the submodule port voltage. Represents the equivalent resistance of the conduction path; Indicates that it is composed of capacitors The equivalent conductance contributed by the non-conducting paths at both ends; The coefficients related to capacitor voltage and inductor current are used when the switching network is turned on, causing inductor current to flow into the capacitor. When the positive end is, When flowing into the negative end, .

[0034] To achieve further decoupling, assume the resistance of each switching network in the off state is... If it can be approximated as infinity, then the corresponding terms can be ignored; at the same time, take the following in the conducting state: Then the equivalent resistance satisfies Under these assumptions, the semi-implicit leapfrog integration method is used to discretize the system's differential equations, resulting in:

[0035] in, This is for simulating step size; and They represent Time and The capacitor voltage at time 1; and They represent Time and The inductor current at any given moment.

[0036] From equation (2), the time-domain recursive formulas for capacitor voltage and inductor current can be derived, generating independent sub-module decoupling models:

[0037] in, , ; Indicates the inductor current of the submodule. The equivalent charging and discharging current acting on the capacitor branch at the half-step time; This represents the equivalent voltage of the submodule capacitor voltage referred to the submodule port side at time n; After obtaining the decoupling circuit for a single SVG submodule, all within the same bridge arm... Each sub-module is simplified by being connected as a whole. Taking a phase as an example, the total equivalent voltage used to characterize the port characteristics of that phase bridge arm is derived. With equivalent injected current source :

[0038] in, This indicates the first phase of the bridge arm. The capacitor voltage of each submodule; and These represent the corresponding switch state coefficients; This represents the phase current of the bridge arm in question. At this point, the generation of the system-level bridge arm equivalent circuit model is complete.

[0039] Step S2: Extract the simulation calculation requirements of the reactive power generator, divide the overall task into boundaries based on the CPU-GPU heterogeneous computing architecture, and determine the system-level solution task to be executed by the CPU and the sub-module parallel solution task to be executed by the GPU. Specifically, because cascaded SVG has fewer main circuit nodes but more complex control logic, and because the topologies of each submodule are consistent and decoupled, it naturally possesses fine-grained parallelism. Therefore, when performing boundary partitioning, the computationally intensive but complex logical judgment-based system-level main circuit solving task and control system execution task are assigned to the CPU; while the computationally intensive, highly repetitive, and independent submodule state update task is assigned to the GPU, thereby fully leveraging the CPU's logic control advantages and the GPU's massive concurrent computing advantages.

[0040] Step S3: At each time step of entering the simulation cycle, retrieve the historical state data of the previous moment, and construct the corresponding node voltage equations and historical current source vectors according to the bridge arm equivalent circuit model and the sub-module decoupling model. Specifically, at the beginning of each time step of the electromagnetic transient simulation, the previous moment is extracted ( Historical state data, such as capacitor voltage and inductor current, are collected at each time step. Combined with the system-level bridge arm equivalent circuit model generated in step S1, nodal voltage equations containing the system equivalent admittance matrix are constructed. Simultaneously, the historical current source vectors corresponding to each submodule are updated to provide initial boundary conditions for the numerical integration solution at the current step size. During the numerical calculation phase, the system employs a hybrid integration scheme combining midpoint integration and implicit trapezoidal integration to further meet and improve the numerical stability requirements during electromagnetic transient simulation.

[0041] Step S4: Use the CPU to process the system-level solution task, combine the preset control system logic to calculate the system-level state variables, and send cooperative control instructions and system-level interactive data to the GPU. Specifically, the CPU acts as the main control unit. After solving the voltage equations of the main circuit nodes, it enters the logic solution stage of the control system and executes a three-layer control strategy to maintain the stable operation of the reactive power generator system.

[0042] Step S4-1: Employ voltage and current dual closed-loop PI control to separate and extract the positive and negative sequence components in the electrical quantities; generate the fundamental positive sequence active current command through the outer loop voltage control loop, and perform feedforward decoupling control through the inner loop current control loop. Specifically, this control strategy is the first-level control strategy, mainly used to maintain the overall energy balance of the system. The outer loop voltage control is used to generate the fundamental positive sequence active current to maintain the average DC side voltage of the submodules in all three-phase converter arms constant; the inner loop current control adopts a feedforward decoupling strategy to separate and extract the positive sequence and negative sequence current components and perform independent tracking control to generate corresponding system-level control commands.

[0043] Step S4-2: Employ phase-to-phase voltage equalization control, inject zero-sequence voltage into the control loop, and adjust the amplitude parameters of the zero-sequence voltage. Specifically, this control strategy is a second-level control strategy, mainly used to solve the energy imbalance problem between the three phases. Based on the deviation of the DC link voltage between the three-phase bridge arms, zero-sequence voltage is dynamically injected into the command signal of the control loop and its amplitude is adjusted, thereby achieving voltage balance between the three-phase bridge arms of the reactive power generator (phases a, b, and c).

[0044] Step S4-3: Use phase voltage equalization control to adjust the control command of the corresponding bridge arm in order to control the active power absorbed by each submodule to compensate for the loss of the corresponding submodule itself. Step S4-3 specifically includes: Obtain the deviation between the real-time detected value of the DC side voltage of each submodule and the given reference value; By adjusting the modulation signals of each submodule, a correction component for active power compensation is superimposed on the original modulation signal to make the deviation approach zero. Specifically, this control strategy is a third-level control strategy, primarily addressing the voltage imbalance problem within the same phase arm. Due to differences in device manufacturing or uneven pulse distribution, the capacitor voltages of each submodule will deviate. The control system calculates this deviation through the regulator, converts it into a correction component, and directly adds it to the duty cycle or modulation wave command allocated to each submodule. By individually fine-tuning the power absorption of each submodule, its own switching and conduction losses are compensated, ensuring that the DC-side voltage of all submodules is accurately and stably stable at a given reference value.

[0045] Step S5: Drive the GPU to respond to the received cooperative control instructions, and use a multi-threading mechanism to perform fine-grained parallel solution on multiple independent sub-module decoupling models to calculate the internal state variables of each sub-module. Step S5-1: Utilize the multi-threaded architecture of the GPU to map each independent sub-module decoupled model to the corresponding parallel computing thread; Specifically, based on GPU platforms (such as the CUDA computing architecture), a corresponding number of parallel computing threads are configured according to the total number of sub-modules contained in the bridge arm. Each independent sub-module decoupled model and its physical parameters are mapped one-to-one to a specific thread in the GPU computing kernel, achieving fine-grained task allocation of "one thread per module".

[0046] Step S5-2: In each parallel computing thread, the preset submodule solver is called to independently and synchronously calculate the state variables of each node within each submodule at the current step size. Specifically, in each parallel computing thread of the GPU, a kernel function program containing a recursive formula is called simultaneously. Each thread, based on the cooperative control instructions issued by the CPU and the historical data of its own module, substitutes the previously derived time-domain recursive relationship into the formula and calculates the state variables such as capacitor voltage and inductor current of each submodule at the current step size synchronously without interference, which greatly improves the concurrent processing performance.

[0047] Step S6: Summarize the solution results of the CPU and GPU at the current step to complete the overall data update, advance to the next simulation step, and repeat the process until the preset total simulation time is reached, and output the electromagnetic transient simulation results of the reactive power generator.

[0048] Specifically, after the GPU completes the parallel solution of all sub-modules, it sends the calculated internal state variables back to the CPU. The CPU then aggregates the data and updates the system-level equivalent historical current sources, completing the full network data update for the current time step. Subsequently, the simulation time is advanced by one step. The system then proceeds to the next time step and repeats the data interaction and parallel solution process described above. This process continues in a loop until the user-preset simulation end time is reached. Finally, the system outputs simulation results, including voltage and current waveforms of key nodes in the reactive power generator and capacitor voltage waveforms of submodules, for engineers to perform subsequent analysis and performance verification.

[0049] To further verify the effectiveness and superiority of the decoupled parallel simulation method for the reactive power generator described in this invention, this embodiment also provides a set of specific simulation test verification processes and results based on the above method.

[0050] Specifically, a simulation test platform was built and system parameters were set: the main circuit model in the simulation example was built based on PSCAD's built-in components. C and C++ were used for programming within the PSCAD platform: C++ was used to implement the top-level main function to call the control system and submodule calculation programs, while C language was used to implement the control system part; the submodule calculation code was written in CUDA to implement GPU-based multi-threaded parallel simulation calculations. The test system adopted a star-cascaded H-bridge SVG, with the following specific system parameters: AC side phase voltage RMS value of 10kV, AC system frequency of 50Hz, AC system equivalent resistance of 0.01Ω, AC side filter inductance of 8mH; DC side voltage of 20kV, DC line resistance of 0.1Ω; each phase arm contains 2 submodules, the submodule DC side capacitance is 3μF, and the arm inductance is 5mH.

[0051] Table 1: Parameter Table of Star-Cascaded H-Bridge SVG System

[0052] Specifically, a comparative verification of simulation accuracy was conducted: the simulation results of the original, undecoupled serial model were used as reference waveforms and compared with the simulation waveforms obtained by the decoupled parallel simulation method proposed in this invention. The total simulation time was set to 0.6s, and the simulation step size was 5μs. The comparison results show that the simulation waveforms obtained using the algorithm of this invention (including the a-phase output voltage waveform, a-phase output current waveform, grid-side a-phase voltage waveform, and grid-side a-phase current waveform of the SVG) are highly consistent with the simulation results of the original, undecoupled model in terms of amplitude, phase, and dynamic response characteristics, and the overall simulation error is strictly controlled within 1%. The above results fully demonstrate that after physically segmenting the network and decoupling the tasks, the algorithm proposed in this invention not only does not lose the mathematical accuracy of the model, but also has good numerical stability and can accurately reflect the actual operating characteristics of the system.

[0053] Table 2: Comparison of CPU Time for Different Numbers of Submodules

[0054] Specifically, a comparison and verification of computational efficiency and speedup ratio were conducted: To verify the acceleration performance of this invention in large-scale cascaded systems, an Intel Core i5-14600KF processor (14 cores, 28 threads, 3.5GHz) was used as the CPU and an NVIDIA GeForce RTX 5060 as the GPU in the hardware test platform. For different numbers of SVG submodules, the actual simulation time of the traditional PSCAD serial model and the CPU-GPU heterogeneous model of this invention were recorded, and the corresponding speedup ratio was calculated. The test results show that under all test conditions, the simulation speedup ratio of the algorithm of this invention is no less than 4 times, demonstrating a significant acceleration effect. For example, when there are 5 sub-modules per phase bridge arm, the traditional PSCAD simulation takes 900.4 seconds, while the method of this invention only takes 190.4 seconds, achieving a speedup of 4.73 times. As the number of SVG sub-modules increases, the speedup advantage becomes even more pronounced. When the number of sub-modules increases dramatically to 72, the traditional PSCAD simulation takes a staggering 11607.954 seconds due to the explosive growth in the dimension of the node voltage equations, while the method of this invention takes only 916.9 seconds, achieving a speedup of 12.66 times. Furthermore, throughout the simulation process, the single-step execution time on the GPU remains extremely low (approximately 0.17 ns), and communication latency and overhead are also maintained at the microsecond level. This further verifies that the decoupled parallel simulation method of this invention can completely break through the computational bottleneck of traditional serial computing when dealing with large-scale cascaded power electronic devices, significantly improving overall simulation efficiency.

[0055] Please see Figure 8As shown, in some embodiments, this application provides a decoupled parallel simulation system for a reactive power generator, used to implement a decoupled parallel simulation method for a reactive power generator. The system includes: Modeling and decoupling module: used to obtain the original electrical system model of the reactive power generator, and to perform network segmentation on the original electrical system model using a preset decoupling strategy to generate multiple independent sub-module decoupling models and system-level bridge arm equivalent circuit models; Task partitioning module: used to extract the simulation calculation requirements of the reactive power generator, divide the overall task into boundaries based on the CPU-GPU heterogeneous computing architecture, determine the system-level solution task to be executed by the CPU, and the sub-module parallel solution task to be executed by the GPU. Computing engine: includes the CPU and GPU sides that communicate with each other; The CPU is used to: retrieve historical state data from the previous moment at each time step of the simulation cycle, construct the corresponding node voltage equations and historical current source vectors; process system-level solution tasks, calculate system-level state variables in conjunction with the preset control system logic, and issue cooperative control instructions to the GPU. The GPU is used to: respond to received cooperative control commands, use a multi-threaded architecture to solve multiple independent sub-module decoupled models in parallel, and calculate the internal state variables of each sub-module. The CPU is also used to: summarize the solution results from the GPU to complete the data update for the current step size, and advance to the next simulation step size until the electromagnetic transient simulation results of the reactive power generator are output.

[0056] In some embodiments, this application provides a terminal, including: The memory is used to store the decoupled parallel simulation program for the reactive power generator. A processor is used to implement the steps of the decoupling parallel simulation method for the reactive power generator when executing the decoupling parallel simulation program for the reactive power generator.

[0057] In some embodiments, this application provides a computer-readable storage medium that stores computer instructions. When a computer reads the computer instructions in the storage medium, the computer executes the decoupled parallel simulation method for the reactive power generator.

[0058] The above description is merely a preferred embodiment of one or more embodiments of this specification and is not intended to limit the scope of one or more embodiments of this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments of this specification should be included within the protection scope of one or more embodiments of this specification.

Claims

1. A decoupled parallel simulation method for a reactive power generator, characterized in that, Includes the following steps: Step S1: Obtain the original electrical system model of the reactive power generator, and use the preset decoupling strategy to perform network segmentation on the original electrical system model to generate multiple independent sub-module decoupling models and system-level bridge arm equivalent circuit models. Step S2: Extract the simulation calculation requirements of the reactive power generator, divide the overall task into boundaries based on the CPU-GPU heterogeneous computing architecture, and determine the system-level solution task to be executed by the CPU and the sub-module parallel solution task to be executed by the GPU. Step S3: At each time step of entering the simulation cycle, retrieve the historical state data of the previous moment, and construct the corresponding node voltage equations and historical current source vectors according to the bridge arm equivalent circuit model and the sub-module decoupling model. Step S4: Use the CPU to process the system-level solution task, combine the preset control system logic to calculate the system-level state variables, and send cooperative control instructions and system-level interactive data to the GPU. Step S5: Drive the GPU to respond to the received cooperative control instructions, and use a multi-threading mechanism to perform fine-grained parallel solution on multiple independent sub-module decoupling models to calculate the internal state variables of each sub-module. Step S6: Summarize the solution results of the CPU and GPU at the current step to complete the overall data update, advance to the next simulation step, and repeat the process until the preset total simulation time is reached, and output the electromagnetic transient simulation results of the reactive power generator.

2. The decoupled parallel simulation method for a reactive power generator according to claim 1, characterized in that, Step S1 specifically includes the following steps: Step S1-1: Receive the original electrical system model of the reactive power generator, and evenly distribute the series resistance and filter inductance of each phase arm of the three-phase converter in the original electrical system model to all sub-modules contained in the corresponding phase arm to obtain the internal equivalent resistance and internal equivalent inductance of each sub-module. Step S1-2: For each sub-module after parameter allocation, a binary resistance model is used to model the power electronic switches in the sub-module. Under the assumption that the switch conduction resistance is zero and the turn-off resistance is infinite, the equivalent topology circuit of each sub-module is constructed to realize the network segmentation and physical state decoupling of the original electrical system model. Step S1-3: The semi-implicit integration method is used to discretize the differential equations corresponding to the equivalent topology circuit, and the time-domain recursive relationship between the capacitor voltage and inductor current of the sub-module is derived to generate multiple independent sub-module decoupling models. Step S1-4: Perform overall series equivalent simplification on the decoupled models of all sub-modules within the same bridge arm, derive and obtain the total equivalent resistance and total historical current source used to characterize the port characteristics of the bridge arm of that phase, and generate a system-level bridge arm equivalent circuit model.

3. The decoupled parallel simulation method for a reactive power generator according to claim 2, characterized in that, In steps S1-3, the derived time-domain recursive formulas for the relationship between the capacitor voltage and inductor current of the submodule are as follows: in, , ; Indicates the inductor current of the submodule. The equivalent charging and discharging current acting on the capacitor branch at the half-step time; This represents the equivalent voltage of the submodule capacitor voltage referred to the submodule port side at time n; and These represent the capacitors of the submodules at... Time and Voltage at any given moment; and These represent the inductance of the submodules in... Time and Current at any given moment; This is for simulating step size; For the DC-side capacitor of the submodule; and These are the internal equivalent inductance and internal equivalent resistance of the submodule after uniform distribution, respectively. for The port voltage of the time submodule; A coefficient related to the conduction state of the power electronic switch, when the inductor current flows into the positive terminal of the capacitor. When flowing into the negative end .

4. The decoupled parallel simulation method for a reactive power generator according to claim 2 or 3, characterized in that, In steps S1-4, the decoupled models of all sub-modules within the same bridge arm are simplified by overall series equivalent modeling to obtain the formulas for the total equivalent voltage and equivalent injected current source used to characterize the port characteristics of that phase bridge arm, as follows: in, This indicates the total equivalent voltage of the phase bridge arm; This indicates the total number of sub-modules contained in this phase arm; This indicates the first phase of the bridge arm. The capacitor voltage of each submodule; and These represent the on / off state coefficients of the corresponding submodules; This represents the equivalent current source injected into the network; This indicates the phase current of the bridge arm in which the phase is located.

5. The decoupled parallel simulation method for a reactive power generator according to claim 1, characterized in that, Step S4 specifically includes the following steps: Step S4-1: Employ voltage and current dual closed-loop PI control to separate and extract the positive and negative sequence components in the electrical quantities; generate the fundamental positive sequence active current command through the outer loop voltage control loop, and perform feedforward decoupling control through the inner loop current control loop. Step S4-2: Employ phase-to-phase voltage equalization control, inject zero-sequence voltage into the control loop, and adjust the amplitude parameters of the zero-sequence voltage. Step S4-3: Employ phase-to-phase voltage balancing control and adjust the control commands of the corresponding bridge arm to control the active power absorbed by each submodule to compensate for the self-loss of the corresponding submodule.

6. The decoupled parallel simulation method for a reactive power generator according to claim 5, characterized in that, Step S4-3 specifically includes: Obtain the deviation between the real-time detected value of the DC side voltage of each submodule and the given reference value; By adjusting the modulation signals of each submodule, a correction component for active power compensation is superimposed on the original modulation signal, so that the deviation tends to zero.

7. The decoupled parallel simulation method for a reactive power generator according to claim 6, characterized in that, Step S5 specifically includes the following steps: Step S5-1: Utilize the multi-threaded architecture of the GPU to map each independent sub-module decoupled model to the corresponding parallel computing thread; Step S5-2: In each parallel computing thread, the preset submodule solver is called to independently and synchronously calculate the state variables of each node within each submodule at the current step size.

8. A decoupled parallel simulation system for a reactive power generator, used to implement the decoupled parallel simulation method for a reactive power generator as described in claim 1, characterized in that, The system includes: Modeling and decoupling module: used to obtain the original electrical system model of the reactive power generator, and to perform network segmentation on the original electrical system model using a preset decoupling strategy to generate multiple independent sub-module decoupling models and system-level bridge arm equivalent circuit models; Task partitioning module: used to extract the simulation calculation requirements of the reactive power generator, divide the overall task into boundaries based on the CPU-GPU heterogeneous computing architecture, determine the system-level solution task to be executed by the CPU, and the sub-module parallel solution task to be executed by the GPU. Computing engine: includes the CPU and GPU sides that communicate with each other; The CPU is used to: retrieve historical state data from the previous moment at each time step of the simulation cycle, construct the corresponding node voltage equations and historical current source vectors; process system-level solution tasks, calculate system-level state variables in conjunction with the preset control system logic, and issue cooperative control instructions to the GPU. The GPU is used to: respond to received cooperative control commands, use a multi-threaded architecture to solve multiple independent sub-module decoupled models in parallel, and calculate the internal state variables of each sub-module. The CPU is also used to: summarize the solution results from the GPU to complete the data update for the current step size, and advance to the next simulation step size until the electromagnetic transient simulation results of the reactive power generator are output.

9. A terminal, characterized in that, include: The memory is used to store the decoupled parallel simulation program for the reactive power generator. A processor is used to implement the steps of the decoupled parallel simulation method for the reactive power generator as described in claim 1 when executing the decoupled parallel simulation program for the reactive power generator.

10. A computer-readable storage medium, characterized in that, The storage medium stores computer instructions. When the computer reads the computer instructions from the storage medium, the computer executes the decoupled parallel simulation method for the reactive power generator as described in claim 1.

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