Energy storage converter and control method thereof

By designing a parallel structure of multiple power units in the energy storage converter and adopting a three-level NPC topology and control method, the problems of charging and discharging management and individual cluster management of large-cell energy storage batteries were solved, thereby realizing the increase of converter capacity and independent management of battery clusters, and improving the stability and efficiency of the system.

CN122247232APending Publication Date: 2026-06-19XIAN MEGMEET ELECTRICAL CO LTD +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
XIAN MEGMEET ELECTRICAL CO LTD
Filing Date
2026-05-25
Publication Date
2026-06-19

Smart Images

  • Figure CN122247232A_ABST
    Figure CN122247232A_ABST
Patent Text Reader

Abstract

This application provides an energy storage converter and its control method. The energy storage converter includes at least two power units, with the DC connection terminals of the at least two power units connected in parallel with a bus capacitor, and the AC connection terminals of the at least two power units also connected in parallel. The control method includes: generating a modulation signal corresponding to each power unit based on the three-phase current and DC voltage of the at least two power units; generating a control signal corresponding to each power unit based on the modulation signal; and controlling each power unit using the modulation signal and the control signal. The scheme of this application designs multiple power units connected in parallel, and each power unit is controlled independently, which can multiply the converter capacity and realize the charge / discharge cycle management of large-cell energy storage batteries. Furthermore, since the at least two parallel power units are connected between the DC and AC sides, only one independent battery cluster connected to the DC side needs to be managed, achieving one-cluster-one-management requirements.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of energy storage converter technology, and in particular to an energy storage converter and its control method. Background Technology

[0002] With the rapid development of battery cell technology, the release and application of large-cell energy storage batteries are becoming more and more widespread. In the field of large-capacity energy storage, the use of high-power energy storage converters has also become an industry requirement.

[0003] While existing large-capacity energy storage systems can meet the capacity requirements of converters, they cannot meet the requirements for charge / discharge cycle management and cluster-by-cluster management of large-cell energy storage batteries. Summary of the Invention

[0004] This application mainly provides an energy storage converter and its control method. The energy storage converter of this application can realize the charge / discharge cycle management of large-cell energy storage batteries, and can also meet the needs of cluster-by-cluster management.

[0005] To solve the above-mentioned technical problems, the first technical solution adopted in this application is: to provide a control method for an energy storage converter, the energy storage converter comprising: at least two power units, the DC connection terminals of the at least two power units being connected in parallel with a bus capacitor, and the AC connection terminals of the at least two power units being connected in parallel; the method comprising: The modulation signal for each power unit is generated based on the three-phase current and DC voltage of at least two power units; The control signal for each power unit is generated based on the modulation signal; Each power unit is controlled using modulation and control signals.

[0006] In one embodiment, at least two power units include: a first power unit and a second power unit; Generate a modulation signal for each power unit based on the three-phase current and DC voltage of at least two power units, including: The first direct-axis current, the first quadrature-axis current, and the first zero-sequence current are calculated based on the three-phase current of the first power unit, and the second direct-axis current, the second quadrature-axis current, and the second zero-sequence current are calculated based on the three-phase current of the second power unit. The direct-axis control parameters are determined based on the first direct-axis current and the second direct-axis current; the quadrature-axis control parameters are determined based on the first quadrature-axis current and the second quadrature-axis current; and the zero-sequence control parameters are determined based on the first zero-sequence current and the second zero-sequence current. The first modulation signal of the first power unit and the second modulation signal of the second power unit are generated based on the direct-axis control parameters, quadrature-axis control parameters, zero-sequence control parameters and DC voltage.

[0007] In one embodiment, generating a first modulation signal for a first power unit and a second modulation signal for a second power unit based on direct-axis control parameters, quadrature-axis control parameters, zero-sequence control parameters, and DC voltage includes: The three-phase current sharing control parameters and the zero-sequence current sharing control parameters are obtained based on the direct-axis control parameters, quadrature-axis control parameters and zero-sequence control parameters; Based on the three-phase current sharing control parameters, the zero-sequence current sharing control parameters, and the three-phase modulation voltage, the first modulation voltage corresponding to the first power unit and the second modulation voltage corresponding to the second power unit are obtained respectively. A first modulated wave is obtained using zero-sequence injection modulation based on a first modulation voltage, DC voltage, and bus midpoint balance control parameters; a second modulated wave is obtained using zero-sequence injection modulation based on a second modulation voltage, DC voltage, and bus midpoint balance control parameters. A first modulated signal is obtained based on a first modulating wave and a first triangular carrier wave; and a second modulated signal is obtained based on a second modulating wave and a second triangular carrier wave.

[0008] In one embodiment, the phase difference between the first triangular carrier and the second triangular carrier is 180°; Both the first and second triangular carriers include three-phase triangular carriers; and the phase difference between the three-phase triangular carriers is 120°.

[0009] In one embodiment, generating a control signal corresponding to each power unit based on the modulation signal includes: A first control signal corresponding to the first power unit is generated based on the first modulation signal and the dead-time control signal; a second control signal corresponding to the second power unit is generated based on the second modulation signal and the dead-time control signal.

[0010] In one embodiment, each power unit is controlled using a modulation signal and a control signal, including: A first type of switch in a first power unit is controlled by a first modulation signal, and a second type of switch in a first power unit is controlled by a first control signal; and a first type of switch in a second power unit is controlled by a second modulation signal, and a second type of switch in a second power unit is controlled by a second control signal.

[0011] In one embodiment, each of the at least two power units transmits three-phase current; or, each of the at least two power units transmits one-phase current.

[0012] In one embodiment, the AC connection terminal of each power unit is connected in series with a filter unit and a contactor unit, and the output terminals of the contactor units corresponding to all power units are connected in parallel.

[0013] In one embodiment, the power unit includes any one of the following: INPC (I-type Neutral Point Clamped) topology, TNPC (T-type Neutral Point Clamped) topology, and ANPC (Active Neutral Point Clamped) topology.

[0014] To solve the above-mentioned technical problems, the second technical solution adopted in this application is: to provide an energy storage converter, which is used to implement any of the above-mentioned control methods, and the energy storage converter includes: At least two power units, the DC connection terminals of at least two power units are connected in parallel with the bus capacitor, and the AC connection terminals of at least two power units are connected in parallel; A drive unit is connected to at least two power units, generates a modulation signal for each power unit based on the three-phase current and DC voltage of the at least two power units, generates a control signal for each power unit based on the modulation signal, and controls each power unit using the modulation signal and the control signal.

[0015] In one embodiment, the driving unit includes: The first driving unit is used to generate a modulation signal corresponding to each power unit based on the three-phase current and DC voltage of at least two power units; The second driving unit, connected to the first driving unit, is used to generate a control signal corresponding to each power unit based on the modulation signal; and to control each power unit using the modulation signal and the control signal.

[0016] In one embodiment, it further includes: The sampling unit, connected to at least two power units and a first drive unit, is used to sample the three-phase current and DC voltage of at least two power units.

[0017] The beneficial effects of this application are as follows: Unlike existing technologies, the control method for the energy storage converter provided in this application includes at least two power units, with the DC connection terminals of the at least two power units connected in parallel with the bus capacitor, and the AC connection terminals of the at least two power units also connected in parallel. The control method includes: generating a modulation signal corresponding to each power unit based on the three-phase current and DC voltage of the at least two power units; generating a control signal corresponding to each power unit based on the modulation signal; and controlling each power unit using the modulation signal and the control signal. This application's scheme, with multiple power units connected in parallel and controlled separately, enables a significant increase in converter capacity, achieving charge / discharge cycle management of large-cell energy storage batteries. Furthermore, since the at least two parallel power units are connected between the DC and AC sides, only one independent battery cluster connected to the DC side needs to be managed, fulfilling the requirement of one cluster per management. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of the first embodiment of the energy storage converter of this application; Figure 2 This is a structural schematic diagram of the connection method of the power unit in this application; Figure 3 A schematic diagram of a structural embodiment of the INPC topology; Figure 4 A schematic diagram of a TNPC topology embodiment; Figure 5 A schematic diagram of a structural embodiment of the ANPC topology; Figure 6 This is a flowchart illustrating an embodiment of the control method for the energy storage converter of this application; Figure 7 for Figure 6 A flowchart illustrating an embodiment of step S11; Figure 8 for Figure 6 A flowchart illustrating another embodiment of step S11; Figure 9 This is a schematic diagram of the first and second triangular carriers of this application. Detailed Implementation

[0020] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0021] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0022] In this article, the term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, "more" in this article means two or more objects.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0024] Before providing a further detailed description of the embodiments of this application, the nouns and terms involved in the embodiments of this application will be explained, and the nouns and terms involved in the embodiments of this application shall be interpreted as follows.

[0025] To enable those skilled in the art to better understand the technical solutions of this application, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] See Figure 1 , Figure 1 This is a schematic diagram of the structure of an embodiment of the energy storage converter provided in this application. Specifically, in conjunction with... Figure 2 The energy storage converter includes at least two power units 11 (e.g., a first power unit 111 and a second power unit 112) and a drive unit 12. Specifically, the DC connection terminals of at least two power units 11 are connected in parallel with the bus capacitor, and the AC connection terminals of at least two power units 11 are connected in parallel.

[0027] For example, the bus capacitor includes bus capacitor C1 and bus capacitor C2, and bus capacitor C1 and bus capacitor C2 are connected in series, with the midpoint of the series connection serving as the midpoint m of the bus capacitor. Node n1 of each power unit 11 is connected to the first terminal of bus capacitor C1, node n2 of power unit 11 is connected to the midpoint m of the bus capacitor, and node n3 of power unit 11 is connected to the second node of bus capacitor C2. It can be understood that the DC connection terminals of power unit 11 include nodes n1, n2, and n3.

[0028] In one embodiment, bus capacitor C1 and bus capacitor C2 are connected to battery cell 16 via soft-start circuit 15.

[0029] In one embodiment, the AC connection terminal of each power unit 11 is connected in series with the filter unit 13 and the contactor unit 14, and the output terminals of the contactor units 14 corresponding to all power units 11 are connected in parallel.

[0030] like Figure 2 As shown, the AC connection terminal of the first power unit 111 is sequentially connected to the first filter unit 131, the first contactor 141, and the second contactor 142, and the output terminal of the second contactor 142 is connected in parallel to the power grid. The AC connection terminal of the second power unit 112 is sequentially connected to the second filter unit 132, the third contactor 143, and the fourth contactor 144, and the output terminal of the fourth contactor 144 is connected in parallel to the power grid.

[0031] The drive unit 12 is connected to at least two power units 11, such as a first power unit 111 and a second power unit 112. It generates a modulation signal corresponding to each power unit 11 based on the three-phase current and DC voltage of the at least two power units 11; it generates a control signal corresponding to each power unit 11 based on the modulation signal; and it controls each power unit 11 using the modulation signal and the control signal.

[0032] The scheme of this application designs multiple power units connected in parallel, and each power unit is controlled independently, which can multiply the inverter capacity and realize charge / discharge cycle management of large-cell energy storage batteries. In addition, at least two power units connected in parallel are connected between the DC side and the AC side, which can manage only one independent battery cluster connected to the DC side, eliminate mutual interference between battery clusters, realize the need for one cluster per management, and achieve fine and independent charge and discharge control.

[0033] It should be noted that three-level topologies have significant advantages in terms of conversion efficiency, output power quality, filter size and weight, switching device stress, EMC common-mode voltage, and electromagnetic interference. Therefore, the power unit adopts a three-level NPC topology. In one embodiment of this application, the power unit 11 includes any one of the following: INPC (I-type Neutral Point Clamped) topology, TNPC (T-type Neutral Point Clamped) topology, and ANPC (Active Neutral Point Clamped) topology. In this embodiment, to reduce energy storage system losses, the power unit adopts a single-stage three-level spectrum, which is beneficial for improving converter efficiency compared to two-stage conversion. Combination Figure 3 , Figure 3 This is a schematic diagram of an embodiment of the INPC topology. Specifically, the INPC topology includes 12 switching transistors, therefore the driver unit 12 needs to output 12 signals to control these 12 switching transistors. For example, the driver unit 12 outputs 6 modulation signals and 6 complementary control signals to control the 12 switching transistors.

[0034] In one specific embodiment, the driving unit 12 specifically includes a first driving unit 121 and a second driving unit 122. The first driving unit 121 is used to generate a modulation signal corresponding to each power unit 11 based on the three-phase current and DC voltage of at least two power units 11. The second driving unit 122 is connected to the first driving unit 121 and is used to generate a control signal corresponding to each power unit 11 based on the modulation signal; and to control each power unit 11 using the modulation signal and the control signal.

[0035] by Figure 3Taking the INPC topology shown as an example, and assuming that at least two power units include two power units, respectively denoted as the first power unit 111 and the second power unit 112. The first driving unit 121 is used to generate modulation signals corresponding to the first power unit 111 and the second power unit 112 based on the three-phase current and DC voltage of the first power unit 111 and the second power unit 112. For example, the first driving unit 121 outputs 6 modulation signals PWM1A~PWM6A as the modulation signal of the first power unit 111; and outputs 6 modulation signals PWM7A~PWM12A as the modulation signal of the second power unit 112. The second drive unit 122 generates control signals PWM1B to PWM6B, complementary to the modulation signals PWM1A to PWM6A, based on the modulation signals PWM1A to PWM6A and the dead-time control signal of the first power unit 111, as the control signals for the first power unit 111; and generates control signals PWM7B to PWM12B, complementary to the modulation signals PWM7A to PWM12A, based on the modulation signals PWM7A to PWM12A and the dead-time control signal of the second power unit 112, as the control signals for the second power unit 112. It should be noted that the modulation signals PWM1A to PWM6A and PWM7A to PWM12A are used to control the first type of switching transistors in the first power unit 111 and the second power unit 112, respectively, and the control signals PWM1B to PWM6B and PWM7B to PWM12B are used to control the second type of switching transistors in the first power unit 111 and the second power unit 112, respectively.

[0036] It should be noted that in this embodiment, the first type of switching transistor is an external transistor, for example... Figure 3 The switching transistors in the first type are T1a, T1b, T1c, T4a, T4b, and T4c. The second type of switching transistor is an internal transistor, for example... Figure 3 The switching transistors are T2a, T2b, T2c, T3a, T3b, and T3c.

[0037] Combination Figure 4 , Figure 4 This is a schematic diagram of an embodiment of the TNPC topology. Specifically, the TNPC topology also includes 12 switching transistors, so the drive unit 12 needs to output 12 signals to control these 12 switching transistors.

[0038] With the above Figure 3The INPC topology shown is the same. The first drive unit 121 outputs six modulation signals PWM1A~PWM6A as modulation signals for the first power unit 111; and outputs six modulation signals PWM7A~PWM12A as modulation signals for the second power unit 112. The second drive unit 122 generates control signals PWM1B~PWM6B complementary to the modulation signals PWM1A~PWM6A based on the modulation signals PWM1A~PWM6A and the dead-time control signal of the first power unit 111, as control signals for the first power unit 111; and generates control signals PWM7B~PWM12B complementary to the modulation signals PWM7A~PWM12A based on the modulation signals PWM7A~PWM12A and the dead-time control signal of the second power unit 112, as control signals for the second power unit 112. The modulation signals PWM1A~PWM6A and PWM7A~PWM12A are used to control the first type of switching transistors (i.e.,...) in the first power unit 111 and the second power unit 112, respectively. Figure 4 The switching transistors T1a, T1b, T1c, T4a, T4b, and T4c in the power unit 111 and the second power unit 112 are respectively used to control the second type of switching transistors (i.e., the switching transistors T1a, T1b, T1c, T4a, T4b, and T4c in the power unit 111). The control signals PWM1B~PWM6B and PWM7B~PWM12B are used to control the second type of switching transistors (i.e., the switching transistors T1a, T1b, T1c, T4a, T4b, and T4c in the power unit 111 and the second power unit 112). Figure 4 (Intermediate switching transistors T2a, T2b, T2c, T3a, T3b, T3c).

[0039] Combination Figure 5 , Figure 5 This is a schematic diagram of an embodiment of the ANPC topology. Specifically, the ANPC topology includes 18 switching transistors, therefore the driver unit 12 needs to output 18 signals to control these 18 switching transistors. For example, the driver unit 12 outputs 9 modulation signals and 9 control signals to control the 18 switching transistors.

[0040] In one specific embodiment, the first driving unit 121 outputs nine modulation signals PWM1A~PWM9A as modulation signals for the first power unit 111; and outputs nine modulation signals PWM10A~PWM18A as modulation signals for the second power unit 112. The second driving unit 122 generates control signals PWM1B~PWM9B complementary to the modulation signals PWM1A~PWM9A based on the modulation signals PWM1A~PWM9A and the dead-time control signal of the first power unit 111, as control signals for the first power unit 111; and generates control signals PWM10B~PWM18B complementary to the modulation signals PWM10A~PWM18A based on the modulation signals PWM10A~PWM18A and the dead-time control signal of the second power unit 112, as control signals for the second power unit 112.

[0041] The modulation signals PWM1A~PWM9A and PWM10A~PWM18A are used to control the first type of switching transistors in the first power unit 111 and the second power unit 112, respectively. The control signals PWM1B~PWM9B and PWM10B~PWM18B are used to control the second type of switching transistors in the first power unit 111 and the second power unit 112, respectively.

[0042] In this embodiment, the first type of switching transistor includes an outer transistor (i.e., Figure 5 The switching transistors T1a, T1b, T1c, T4a, T4b, and T4c, and some of the inner transistors (i.e., the switching transistors T1a, T1b, T1c, T4a, T4b, and T4c) ... are included. Figure 5 The second type of switching transistor includes clamping transistors (i.e., T2a, T2b, and T2c). Figure 5 The inner tubes are T5a, T5b, T5c, T6a, T6b, T6c and the remaining inner tubes (T3a, T3b, T3c).

[0043] In the above embodiments, a master-slave control architecture with two driving units, namely the first driving unit 121 (master controller) and the second driving unit 122 (slave controller), is adopted. In INPC and ANPC topologies, the slave controller, namely the second driving unit 122, can be responsible for the turn-on and turn-off delay logic of the inner and outer tubes, and is also responsible for hardware wave-by-wave current limiting / hardware overvoltage protection. The control scheme of the slave controller issuing complementary PWM can release the PWM channel resources of the master controller.

[0044] In one specific embodiment, the first driving unit 121 is a DSP (Digital Signal Processor) chip. From the ANPC topology, it is known that one three-phase ANPC requires 18 PWM signals, and two three-phase ANPCs require 36 PWM signals. When two ANPCs are controlled using PWM modulation signals, 36 independent drives are required. The main control DSP currently supports a maximum of 36 PWM channels. Therefore, the main control DSP can control a maximum of two three-phase ANPC circuits, utilizing all PWM channels to achieve 100% utilization. Simultaneously, by employing a control scheme that generates complementary PWM signals from slave controllers, the PWM channel resources of the main controller can be released, further improving the chip's channel utilization.

[0045] In another embodiment, the first driving unit 121 may also be an ARM (Advanced RISC Machine) chip. For example, the second driving unit 122 may be an FPGA (Field Programmable Gate Array) chip or a CPLD (Complex Programmable Logic Device) chip.

[0046] The energy storage converter of this application adopts three-level independent control of internal and external transistors. The master controller controls the first type of switching transistor, and the slave controller controls the second type of switching transistor, which maximizes the utilization of the DSP's PWM channel and reduces the demand for the drive unit (DSP+FPGA).

[0047] In one specific embodiment, when designing the product, three sets of power modules can be designed. The first set of power modules uses the INPC topology as the power unit and designs at least two INPC topologies (i.e., at least two power units). The second set of power modules uses the TNPC topology as the power unit and designs at least two TNPC topologies (i.e., at least two power units). The third set of power modules uses the ANPC topology as the power unit and designs at least two ANPC topologies (i.e., at least two power units).

[0048] In practical applications, one set of power modules can be selectively enabled depending on the specific application. For example, for frequency conversion applications, power modules composed of low-cost INPC topologies can be selected; for photovoltaic and energy storage scenarios, power modules composed of TNPC topologies that are suitable for medium- and high-frequency and high-efficiency applications can be selected; for photovoltaic-storage and wind power scenarios, power modules composed of ANPC topologies that are suitable for high voltage, high power, and long lifespan can be selected.

[0049] In this scenario, the first drive unit 121 can be selected from chips with more PWM ports, prioritizing those that can be compatible with the control of the three power modules mentioned above, without any specific limitations.

[0050] Furthermore, the energy storage converter also includes a sampling unit, which is connected to at least two power units and the first drive unit. Specifically, the sampling unit is connected to the three-phase output terminals A, B, and C of the power unit 11, and is used to sample the three-phase current and DC voltage of at least two power units 11, and transmit the sampled three-phase current and DC voltage to the drive unit 12.

[0051] See Figure 6 , Figure 6 This is a flowchart illustrating the first embodiment of the control method for the energy storage converter of this application, specifically including: Step S11: Generate a modulation signal corresponding to each power unit based on the three-phase current and DC voltage of at least two power units.

[0052] In one specific embodiment, at least two power units include a first power unit and a second power unit. The three-phase currents of the first power unit and the second power unit are sampled, and the three-phase currents of the first power unit are denoted as Ia1, Ib1, and Ic1; the three-phase currents of the second power unit are denoted as Ia2, Ib2, and Ic2.

[0053] The first direct-axis current Id1, the first quadrature-axis current Iq1, and the first zero-sequence current Iz1 are calculated based on the three-phase currents Ia1, Ib1, and Ic1 of the first power unit. Specifically, Clark-Park conversion is performed on the three-phase currents Ia1, Ib1, and Ic1 to convert AC quantities into DC quantities, thereby obtaining the first direct-axis current Id1 and the first quadrature-axis current Iq1. The first zero-sequence current Iz1 is calculated based on the formula (Ia1 + Ib1 + Ic1) / 3.

[0054] The second direct-axis current Id2, the second quadrature-axis current Iq2, and the second zero-sequence current Iz2 are calculated based on the three-phase currents Ia2, Ib2, and Ic2 of the second power unit. Then, Clark-Park conversion is performed on the three-phase currents Ia2, Ib2, and Ic2 to convert the AC quantities into DC quantities, thus obtaining the second direct-axis current Id2 and the second quadrature-axis current Iq2. The second zero-sequence current Iz2 is calculated based on the formula (Ia2 + Ib2 + Ic2) / 3.

[0055] Direct-axis control parameters are determined based on the first and second direct-axis currents; quadrature-axis control parameters are determined based on the first and second quadrature-axis currents; and zero-sequence control parameters are determined based on the first and second zero-sequence currents. Specifically, this is combined with... Figure 7 The difference between the first direct-axis current Id1 and the second direct-axis current Id2 is calculated to obtain the direct-axis current difference. The direct-axis control parameter UdPi is then calculated using a PI controller based on this difference. Similarly, the difference between the first quadrature-axis current Iq1 and the second quadrature-axis current Iq2 is calculated to obtain the quadrature-axis current difference. The quadrature-axis control parameter UqPi is then calculated using a PI controller based on this difference. Finally, the difference between the first zero-sequence current Iz1 and the second zero-sequence current Iz2 is calculated to obtain the zero-sequence current difference. The zero-sequence control parameter UzPi is then calculated using a PI controller based on this zero-sequence current difference.

[0056] The first modulation signal of the first power unit and the second modulation signal of the second power unit are generated based on the direct-axis control parameter UdPi, the quadrature-axis control parameter UqPi, the zero-sequence control parameter UzPi, and the DC voltage.

[0057] In one specific embodiment, three-phase current sharing control parameters Uaverage currenta, Uaverage currentb, Uaverage currentc, and zero-sequence current sharing control parameter Uaverage currentz are obtained based on the direct-axis control parameter UdPi, the quadrature-axis control parameter UqPi, and the zero-sequence control parameter UzPi. Specifically, an inverse Clark-Park conversion is performed on the direct-axis control parameter UdPi, the quadrature-axis control parameter UqPi, and the zero-sequence control parameter UzPi. It can be understood that during the inverse Clark-Park conversion, the phase angle θ of the grid voltage is referenced to convert the DC quantity into an AC quantity, thereby obtaining the three-phase current sharing control parameters Uaverage currenta, Uaverage currentb, Uaverage currentc, and the zero-sequence current sharing control parameter Uaverage currentz.

[0058] Based on the three-phase current sharing control parameters (Ucurrent sharing a, Ucurrent sharing b, Ucurrent sharing c), the zero-sequence current sharing control parameter (Ucurrent sharing z), and the three-phase modulation voltage, the first modulation voltage corresponding to the first power unit and the second modulation voltage corresponding to the second power unit are obtained respectively. Combined with... Figure 8 Three-phase current sharing control parameters Ucurrent sharing a, Ucurrent sharing b, Ucurrent sharing c Figure 8 In the above, let U be the current sharing x, x = a, b, c) and be related to the three-phase modulation voltages Uinva, Uinvb, Uinvc respectively. Figure 8 Subtracting the values ​​of Uinvx (x = a, b, c) from the values ​​of Uinvx and Uinvx1 (x = a, b, c), and then subtracting the values ​​of U_e_e_z from each of these subtractions, we obtain the first modulation voltage corresponding to the first power unit, denoted as Uinvx1, where x = a, b, c. The three-phase current sharing control parameters are U_e_e_a, U_e_e_b, and U_e_e_c (…). Figure 8 In the above, let U be the current sharing x, x = a, b, c) and be related to the three-phase modulation voltages Uinva, Uinvb, Uinvc respectively. Figure 8 The first modulation voltage, denoted as Uinvx (x = a, b, c), is summed, and then U_average_current_z is added to each of these sums to obtain the second modulation voltage corresponding to the second power unit, denoted as Uinvx2 (x = a, b, c). It should be noted that the three-phase modulation voltages Uinva, Uinvb, and Uinvc are calculated by the control loop.

[0059] A first modulated wave is obtained using zero-sequence injection modulation based on a first modulation voltage, DC voltage, and bus midpoint balance control parameters; a second modulated wave is obtained using zero-sequence injection modulation based on a second modulation voltage, DC voltage, and bus midpoint balance control parameters. Specifically, midpoint balance calculation is performed based on the positive control parameter UdcP and negative control parameter UdcN of the bus capacitor to obtain the bus midpoint balance control parameter UinvO; the first modulated wave is obtained using zero-sequence injection SPWM (Sinusoidal Pulse Width Modulation) based on a first modulation voltage (Uinvx1, x=a, b, c), DC voltage Udc, and bus midpoint balance control parameter UinvO; the second modulated wave is obtained using zero-sequence injection SPWM based on a second modulation voltage (Uinvx2, x=a, b, c), DC voltage Udc, and bus midpoint balance control parameter UinvO.

[0060] A first modulated signal is obtained based on a first modulating wave and a first triangular carrier wave; and a second modulated signal is obtained based on a second modulating wave and a second triangular carrier wave. Specifically, a first triangular carrier wave is generated using a carrier generation module. The first modulating wave and the first triangular carrier wave are compared. If the voltage corresponding to the first modulating wave is greater than the voltage of the first triangular carrier wave, a high-level signal is output; if the voltage corresponding to the first modulating wave is less than the voltage of the first triangular carrier wave, a low-level signal is output. This yields the first modulated signal. A second triangular carrier wave is generated using the same carrier generation module. The second modulating wave and the second triangular carrier wave are compared. If the voltage corresponding to the second modulating wave is greater than the voltage of the second triangular carrier wave, a high-level signal is output; if the voltage corresponding to the second modulating wave is less than the voltage of the second triangular carrier wave, a low-level signal is output. This yields the second modulated signal. It can be understood that the first and second modulated signals are square wave signals with alternating high and low levels. The first modulated signal is used to drive the first power unit, and the second modulated signal is used to drive the second power unit.

[0061] In one embodiment, combined with Figure 9 The phase difference between the first and second triangular carriers is 180°. Specifically, combining... Figure 2 The three-level NPC inverter bridge is connected to filter unit 13, and the midpoint P of each capacitor is connected to the midpoint m of the DC bus capacitor. The high-frequency current ripple of power unit 1 and power unit 2 is canceled out by reverse 180-degree coupling, which can significantly reduce the high-frequency ripple on the DC bus capacitor and reduce the total harmonic distortion rate of the AC current. In other embodiments, if more power units are provided, such as 3 power units, 3 triangular carriers will be generated, and the phase difference between the 3 triangular carriers is 120°. It can be understood that if there are 4 power units, 4 triangular carriers will be generated, and the phase difference between the 4 triangular carriers is 90°.

[0062] Step S12: Generate the control signal corresponding to each power unit based on the modulation signal.

[0063] Specifically, a first control signal corresponding to the first power unit is generated based on the first modulation signal and the dead-time control signal; a second control signal corresponding to the second power unit is generated based on the second modulation signal and the dead-time control signal.

[0064] In one embodiment, both the first triangular carrier and the second triangular carrier include a tri-phase triangular carrier (e.g., Figure 9The three phases are A, B, and C; and the phase difference between the three-phase triangular carriers is 120°. For example, taking INPC and TNPC as examples, the three-phase drives A / B / C are PWM1 / PWM2, PWM3 / PWM4, and PWM5 / PWM6, respectively, with a phase delay of 120 degrees. That is, PWM3 carrier lags PWM1 carrier by 120 degrees, PWM5 carrier lags PWM3 carrier by 120 degrees, and similarly, PWM4 carrier lags PWM2 carrier by 120 degrees, and PWM6 carrier lags PWM4 carrier by 120 degrees. Based on this, the three-phase drive PWM waveforms in the first control signal and the second control signal generated by the first modulation signal and the second modulation signal will also have a 120-degree phase delay. In this way, the common-mode circulating current of the three-phase AC current cancels each other out after being superimposed with a 120-degree phase difference, which is effective in suppressing the common-mode current and is beneficial to the stability of the system.

[0065] Step S13: Control each power unit using modulation and control signals.

[0066] Specifically, a first type of switch in the first power unit is controlled by a first modulation signal, and a second type of switch in the first power unit is controlled by a first control signal; and a first type of switch in the second power unit is controlled by a second modulation signal, and a second type of switch in the second power unit is controlled by a second control signal.

[0067] In one specific embodiment, with Figure 3 Taking the INPC topology shown as an example, the first modulation signals PWM1A~PWM6A are used to control the first type of switching transistor in the first power unit; the first control signals PWM1B~PWM6B are used to control the second type of switching transistor in the first power unit. The second modulation signals PWM7A~PWM12A are used to control the first type of switching transistor in the second power unit, and the second control signals PWM7B~PWM12B are used to control the second type of switching transistor in the second power unit.

[0068] Among them, the first type of switching transistor is an external transistor, for example... Figure 3 The switching transistors in the first type are T1a, T1b, T1c, T4a, T4b, and T4c. The second type of switching transistor is an internal transistor, for example... Figure 3 The switching transistors are T2a, T2b, T2c, T3a, T3b, and T3c.

[0069] Figure 4 The INPC topology control shown is the same as the one described above. Figure 3 The same applies as shown, so I will not repeat it here.

[0070] by Figure 5Taking the ANPC topology shown as an example, the first modulation signals PWM1A~PWM9A are used to control the first type of switching transistor in the first power unit, and the first control signals PWM1B~PWM9B are used to control the second type of switching transistor in the first power unit. The second modulation signals PWM10A~PWM18A are used to control the first type of switching transistor in the second power unit, and the second control signals PWM10B~PWM18B are used to control the second type of switching transistor in the second power unit. In this embodiment, the first type of switching transistor includes an outer transistor (i.e.,...) Figure 5 The switching transistors T1a, T1b, T1c, T4a, T4b, and T4c, and some of the inner transistors (i.e., the switching transistors T1a, T1b, T1c, T4a, T4b, and T4c) ... are included. Figure 5 The second type of switching transistor includes clamping transistors (i.e., T2a, T2b, and T2c). Figure 5 The inner tubes are T5a, T5b, T5c, T6a, T6b, T6c and the remaining inner tubes (T3a, T3b, T3c).

[0071] In the above embodiments, each of the at least two power units transmits three-phase current. In another embodiment, each of the at least two power units transmits one-phase current. For example, three power units are set up, with one power unit transmitting phase A current, one power unit transmitting phase B current, and one power unit transmitting phase C current.

[0072] The control method of the energy storage converter in this application adopts a dq current sharing loop and a zero-sequence current sharing loop to reduce the uneven current between two power units; multiple power units adopt PWM carrier interleaved parallel technology (i.e., the phase difference between triangular carriers is 180°) to reduce the three-phase output current ripple and DC bus voltage ripple; it reduces the heating and electrical stress of the bus support capacitor, resulting in a longer capacitor life, which is beneficial to extending battery life in battery charging and discharging applications; the converter output A / B / C three-phase carriers are interleaved by 120 degrees, reducing the three-phase AC common-mode circulating current.

[0073] Specifically, compared to converter systems with multiple control units, this application designs a 180° phase difference between the triangular carrier waves, which can stagger the conduction times of the two power units, avoid heat accumulation, make the heat distribution more balanced, reduce the heat dissipation pressure of the system, increase the power volume density and switching frequency of the converter, and have a wider control bandwidth. This is beneficial for extending the life of the switching transistors and energy storage batteries, while also increasing the power volume density of the converter, reducing the AC output circulating current of the two power units, realizing power expansion, and improving parallel operation stability.

[0074] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A control method of an energy storage converter, characterized by, The energy storage converter includes: at least two power units, wherein the DC connection terminals of the at least two power units are connected in parallel with the bus capacitor, and the AC connection terminals of the at least two power units are connected in parallel; the method includes: A modulation signal corresponding to each power unit is generated based on the three-phase current and DC voltage of the at least two power units; A control signal corresponding to each power unit is generated based on the modulation signal; Each of the power units is controlled using the modulation signal and the control signal.

2. The method of claim 1, wherein, The at least two power units include: a first power unit and a second power unit; Generating a modulation signal corresponding to each of the at least two power units based on the three-phase current and DC voltage of the power units includes: The first direct-axis current, the first quadrature-axis current, and the first zero-sequence current are calculated based on the three-phase current of the first power unit, and the second direct-axis current, the second quadrature-axis current, and the second zero-sequence current are calculated based on the three-phase current of the second power unit. The direct-axis control parameters are determined based on the first direct-axis current and the second direct-axis current; the quadrature-axis control parameters are determined based on the first quadrature-axis current and the second quadrature-axis current; and the zero-sequence control parameters are determined based on the first zero-sequence current and the second zero-sequence current. The first modulation signal of the first power unit and the second modulation signal of the second power unit are generated based on the direct axis control parameters, the quadrature axis control parameters, the zero sequence control parameters, and the DC voltage.

3. The method of claim 2, wherein, Based on the direct-axis control parameters, the quadrature-axis control parameters, the zero-sequence control parameters, and the DC voltage, a first modulation signal for the first power unit and a second modulation signal for the second power unit are generated, including: Based on the direct-axis control parameters, the quadrature-axis control parameters, and the zero-sequence control parameters, the three-phase current sharing control parameters and the zero-sequence current sharing control parameters are obtained; Based on the three-phase current sharing control parameters, the zero-sequence current sharing control parameters, and the three-phase modulation voltage, the first modulation voltage corresponding to the first power unit and the second modulation voltage corresponding to the second power unit are obtained respectively. A first modulation wave is obtained using zero-sequence injection modulation based on the first modulation voltage, the DC voltage, and the bus midpoint balance control parameters; a second modulation wave is obtained using zero-sequence injection modulation based on the second modulation voltage, the DC voltage, and the bus midpoint balance control parameters. The first modulated signal is obtained based on the first modulated wave and the first triangular carrier wave; and the second modulated signal is obtained based on the second modulated wave and the second triangular carrier wave.

4. The method of claim 3, wherein, The phase difference between the first triangular carrier and the second triangular carrier is 180°; Both the first triangular carrier and the second triangular carrier include three-phase triangular carriers; and the phase difference between the three-phase triangular carriers is 120°.

5. The method of claim 2, wherein, Based on the modulation signal, a control signal corresponding to each power unit is generated, including: A first control signal corresponding to the first power unit is generated based on the first modulation signal and the dead-time control signal; a second control signal corresponding to the second power unit is generated based on the second modulation signal and the dead-time control signal.

6. The method according to claim 5, characterized in that, Controlling each of the power units using the modulation signal and the control signal includes: The first type of switch in the first power unit is controlled by the first modulation signal, and the second type of switch in the first power unit is controlled by the first control signal; and the first type of switch in the second power unit is controlled by the second modulation signal, and the second type of switch in the second power unit is controlled by the second control signal.

7. The method according to claim 1, characterized in that, Each of the at least two power units transmits three-phase current; or, each of the at least two power units transmits one-phase current.

8. The method according to claim 1, characterized in that, Each power unit has an AC connection terminal connected in series with a filter unit and a contactor unit, and the output terminals of all the contactor units corresponding to the power units are connected in parallel.

9. The method according to claim 1, characterized in that, The power unit includes any one of the following: INPC topology, TNPC topology, and ANPC topology.

10. An energy storage converter, characterized in that, The energy storage converter is used to implement the control method according to any one of claims 1 to 9, and the energy storage converter comprises: At least two power units, wherein the DC connection terminals of the at least two power units are connected in parallel with the bus capacitor, and the AC connection terminals of the at least two power units are connected in parallel; A drive unit is connected to the at least two power units, generates a modulation signal corresponding to each power unit based on the three-phase current and DC voltage of the at least two power units, generates a control signal corresponding to each power unit based on the modulation signal, and controls each power unit using the modulation signal and the control signal.

11. The energy storage converter according to claim 10, characterized in that, The driving unit includes: The first driving unit is used to generate a modulation signal corresponding to each of the power units based on the three-phase current and DC voltage of the at least two power units; The second driving unit, connected to the first driving unit, is used to generate a control signal corresponding to each power unit based on the modulation signal; and to control each power unit using the modulation signal and the control signal.

12. The energy storage converter according to claim 11, characterized in that, Also includes: A sampling unit, connected to the at least two power units and the first drive unit, is used to sample the three-phase current and the DC voltage of the at least two power units.