Control device for semiconductor switches of an inverter output stage

Abstract

The present invention relates to a control device (1) for semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) of an inverter output stage (2), the control device having a processor (12) and having drive circuits (6a, 7a, 6b, 7b, 6c, 7c) respectively provided for each semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) of the inverter output stage (2), wherein the processor (12) is designed to communicate via a communication interface (1 4.15) The phase current parameters during the switching process of one of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) in the inverter output stage (2) are transmitted to the corresponding drive circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c). c) has a computing unit (23) designed to calculate, based on parameters transmitted by the processor (12), the current sinusoidal phase current curves of the phase currents for the switching process of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c), and wherein the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) have current curve storage devices (25) designed to calculate, based on parameters transmitted by the processor (12), the current curves of the phase currents for the switching process of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c ... The calculation unit (23) of the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) calculates the sinusoidal phase current curve and / or selects the current curve stored therein according to the voltage and / or according to the temperature, and provides it to the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) for performing the switching process in the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c).

Description

Technical Field

[0001] The present invention relates to a control device for a semiconductor switch in an inverter output stage and a method for switching the semiconductor switch in an inverter output stage. Background Technology

[0002] Electric and hybrid vehicles often have power electronic circuitry components in the drive system between the traction battery and the motor. These components are typically configured as a DC-DC intermediate circuit converter. Here, the DC-DC intermediate circuit acts as a coupling element between the traction battery and the inverter, which can be manipulated to transfer electrical power from the DC-DC intermediate circuit to the motor.

[0003] An inverter may have an inverter output stage, which can be configured as a full-bridge circuit with multiple arms, each arm having two semiconductor switches. Here, the semiconductor switches of the arm connected to the first output terminal of the DC voltage intermediate circuit are referred to as high-side (HS) switches, and the semiconductor switches of the arm connected to the second output terminal of the DC voltage intermediate circuit are referred to as low-side (LS) switches. Each semiconductor switch of the inverter output stage receives a drive signal from a drive circuit. The inverter output stage has at least one half-bridge, which includes series-connected semiconductor switches and corresponding drive circuits. Typically, the inverter output stage has three half-bridges, each with two series-connected semiconductor switches.

[0004] Traditional inverters can use voltage-controlled gate driver ASICs to manipulate the semiconductor switches in the inverter output stage, where a constant gate current is set by the gate resistance of the semiconductor switches. Alternatively, current source drivers with programmable current profiles are used, but the current profile selection is only achieved through hardware feedback (Vgs, Vds) on the high-voltage side. No communication with the μC or processor occurs during the manipulation of the semiconductor switches in the inverter output stage.

[0005] To control the inverter output stage (B6 bridge), a programmable current source can be used in the gate driver ASIC. Here, various current profiles for turning the power semiconductor switches of the inverter output stage on and off are stored in the gate driver. These current profiles can be selected by the processor via a communication interface before each switching process, based on the operating point. However, selecting the current profile based on the operating point (specifically, based on the phase current) via the communication interface is relatively slow. Furthermore, the switching timing is controlled via a separate digital input pin (PWM). Moreover, the control of the switching timing and the communication or data transmission via the communication interface are asynchronous, which introduces additional errors in the operation of the power semiconductor switches in the inverter output stage.

[0006] The changes in DC bus intermediate circuit voltage and temperature in the power modules are significantly slower than the transmission time grid of the communication interface used. Therefore, these two parameters can be transmitted by the processor in a timely manner within the transmission time grid of the communication interface. In contrast, phase current changes significantly faster, so the turn-on or turn-off current curves must be tracked rapidly at the desired switching moments. Summary of the Invention

[0007] The present invention provides a control device according to claim 1, a method for switching semiconductor switches for inverter output stage according to claim 11, and a drive system according to claim 12.

[0008] The preferred improvement is the subject of the dependent claims.

[0009] According to a first aspect, the present invention provides a control device for a semiconductor switch in an inverter output stage, the control device having a processor and a drive circuit respectively provided for each semiconductor switch in the inverter output stage, wherein the processor is designed to transmit parameters of the phase current during the switching process of one of the semiconductor switches in the inverter output stage to the corresponding drive circuit of that semiconductor switch via a communication interface, wherein the drive circuit of the semiconductor switch has a calculation unit designed to calculate a current sinusoidal phase current curve for the switching process of the semiconductor switch based on the parameters transmitted by the processor, and wherein the drive circuit of the semiconductor switch has a current curve storage device designed to select a current curve stored in the current curve storage device based on the sinusoidal phase current curve of the phase current calculated by the calculation unit of the drive circuit and / or based on voltage and / or based on temperature, and provide it to the drive circuit of the semiconductor switch for executing the switching process in the semiconductor switch.

[0010] According to another aspect, the present invention provides a method for switching semiconductor switches in an inverter output stage via a corresponding drive circuit, comprising the following steps: The processor provides the phase current parameters set during the switching process of the semiconductor switches in the inverter output stage to the corresponding drive circuit of the semiconductor switches. The computing unit of the semiconductor switch's drive circuit calculates the current sinusoidal phase current curve for the switching process of the semiconductor switch based on parameters provided by the processor; and Based on the sinusoidal phase current curve calculated by the calculation unit of the drive circuit and / or based on voltage and / or based on temperature, a current curve stored in the current curve storage device of the drive circuit of the semiconductor switch is selected for performing the switching process in the semiconductor switch.

[0011] According to another aspect, the present invention provides a drive system for an n-phase motor, wherein n ≥ 1, the drive system... The inverter output stage has at least one half-bridge, which includes series-connected semiconductor switches and corresponding drive circuits. The inverter output stage is powered by intermediate circuit capacitors of a high-voltage circuit and is designed to generate an n-phase supply voltage for the motor. A control device for semiconductor switches in an inverter output stage is provided. The control device has a processor and a drive circuit for each semiconductor switch in the inverter output stage. The processor is designed to transmit parameters of the phase current during the switching process of one of the semiconductor switches in the inverter output stage to the corresponding drive circuit of that semiconductor switch via a communication interface. The drive circuit of the semiconductor switch has a calculation unit designed to calculate a current sinusoidal phase current curve for the switching process of the semiconductor switch based on the parameters transmitted by the processor. The drive circuit of the semiconductor switch also has a current curve storage device designed to select a current curve stored in the current curve storage device based on the sinusoidal phase current curve calculated by the calculation unit of the drive circuit and / or based on voltage and / or temperature, and provide it to the drive circuit of the semiconductor switch for executing the switching process in the semiconductor switch.

[0012] Advantages of the present invention A fundamental idea of ​​this invention is to implement current profile selection via hardware within the drive circuit at the current switching moment. This current profile selection is performed in real-time at an extremely high speed.

[0013] The calculation of the phase current sinusoidal curve is performed reliably and flexibly by the calculation unit of the drive circuit based on the information transmitted from the processor to the drive circuit through the communication interface.

[0014] According to one embodiment of the control device, the phase current parameters transmitted from the processor to the drive circuit include the peak value of the phase current, the frequency of the phase current, and the phase angle of the phase current.

[0015] This allows for the precise calculation of the desired or requested phase current time curve.

[0016] According to one embodiment of the control device, the current curve storage device of the drive circuit has a first one-dimensional lookup table designed to provide a first index for phase current correlation for different amplitude ranges of the phase current curves calculated by the computing unit of the drive circuit.

[0017] According to one embodiment of the control device, the current curve storage device of the drive circuit has a second multidimensional lookup table, which is designed to select the address of the current curve storage device according to a first index for phase current correlation provided by a first lookup table and according to at least one other index, wherein the selected address stores the current curve for turning on the corresponding semiconductor switch and / or turning off the corresponding semiconductor switch by the drive circuit.

[0018] This allows for flexible consideration of other relevant influencing parameters when selecting the current curve.

[0019] According to one embodiment of the control device, other indices used to select the address of the current curve storage device include voltage indices and / or temperature indices.

[0020] According to one embodiment of the control device, additional indexes for selecting the address of the current curve storage device are transmitted by the processor to the drive circuit of the semiconductor switch via a communication interface.

[0021] Therefore, the control device can respond quickly and reliably to changes in relevant influencing parameters.

[0022] According to one embodiment of the control device, the voltage index indicates the voltage of the high-voltage circuit connected to the inverter output stage to supply voltage thereto.

[0023] The current voltage of a high-voltage circuit is an important parameter that influences the selection of the current profile.

[0024] According to one embodiment of the control device, the temperature index indicates the temperature of a semiconductor switch that is switched by a drive circuit.

[0025] Temperature is also an important parameter that influences the selection of current profiles for semiconductor switches.

[0026] According to one embodiment of the control device, other current curves for special cases are stored in the current curve storage device of the drive circuit.

[0027] Therefore, the control device can be configured for different types of applications and faults, and provides a higher level of safety in the event of special operating conditions and fault situations.

[0028] According to one embodiment of the control device, the current curves stored in the current curve storage device of the drive circuit for special situations include at least one current curve for a communication failure, at least one current curve for a short circuit, and / or at least one current curve for an overcurrent.

[0029] This ensures safety in the event of various types of failures that may occur frequently.

[0030] Other features and advantages of embodiments of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings. Attached Figure Description

[0031] The present invention will now be explained in detail with the aid of the embodiments shown in the accompanying drawings.

[0032] In the attached image: Figure 1 A possible implementation of the control device according to the present invention is illustrated in block diagram; Figure 2 A flowchart illustrating one possible implementation of the method according to the invention is shown; Figure 3 A block diagram is shown of one possible implementation of a drive circuit with a computing unit integrated therein; Figure 4 A block diagram is shown of one possible implementation of a current profile storage device within a drive circuit.

[0033] In the accompanying drawings, the same reference numerals denote the same or functionally identical elements. Detailed Implementation

[0034] like Figure 1As shown, according to a first aspect, the present invention provides a control device 1 for semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c of an inverter output stage 2. In one possible embodiment, the inverter output stage 2 has three half-bridges 3a, 3b, 3c, wherein each half-bridge of the inverter output stage 2 includes two semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c connected in series. Semiconductor switches 4a, 4b, 4c constitute high-side switches connected to the positive terminal (T+) of the intermediate circuit, and semiconductor switches 5a, 5b, 5c constitute low-side switches connected to the negative terminal (T-) of the intermediate circuit. The control device 1 has a processor 12 and drive circuits 6a, 7a, 6b, 7b, 6c, 7c respectively provided for each semiconductor switch 4a, 5a, 4b, 5b, 4c, 5c of the inverter output stage 2. The processor 12 of the control device 1 is designed to transmit various parameters of the phase current during the switching process of one of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c in the inverter output stage 2 to the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c via communication interfaces 14 and 15. In one possible implementation, the communication interfaces 14 and 15 are configured as serial UART interfaces. In one implementation, the processor 12 is located on the low-voltage side (LV) and is used to manipulate the low-voltage primary logic within the drive circuits 6a, 7a, 6b, 7b, 6c, 7c, which is isolated from the high-voltage secondary logic current on the high-voltage side (HV) within the drive circuits 6a, 7a, 6b, 7b, 6c, 7c by an isolation barrier.

[0035] The driving circuits 6a, 7a, 6b, 7b, 6c, and 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c respectively have integrated computing circuits 10a, 11a, 10b, 11c, 10c, and 11c with computing units 23. Figure 3 A possible implementation of computing circuits 10a, 11a, 10b, 11c, 10c, 11c with computing units 23 included therein is shown. The computing units 23 are designed to calculate, in real time, the current sinusoidal phase current curves of the phase currents for the switching processes of the associated semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c, based on parameters obtained by the processor 12 via communication interfaces 14, 15. The computing units 23 are respectively contained within the computing circuits 10a, 11a, 10b, 11c, 10c, 11c of the ASIC driver circuits 6a, 7a, 6b, 7b, 6c, 7c. These computing units are preferably constructed from dedicated hardware computing units that perform calculations at high computing speeds.

[0036] In one embodiment of the control device 1, the parameters of the phase current Iph transmitted by the processor 12 to the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c via communication interfaces 14 and 15 include the peak value of the phase current, the frequency of the phase current Iph, and the phase angle of the phase current Iph. These parameters can be transmitted within a data frame or data packet and are intermediately stored in the UART register 24 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c, such as... Figure 3 As shown. Each time a communication connection is successfully established through communication interfaces 14 and 15, the parameters stored in UART registers 24 of driver circuits 6a, 7a, 6b, 7b, 6c, and 7c can be updated or replaced. For example, as... Figure 3 As shown, the peak value of the phase current includes 7 bits, the phase angle of the phase current includes 10 bits, and the frequency of the phase current includes 10 bits. The parameter values ​​stored in register 24 are read out and used by calculation unit 23 to calculate the current sinusoidal phase current curve of the phase current Ipha for the switching process of the associated semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c. A PWM signal can be used as a calculation trigger signal, which is applied from processor 12 to calculation unit 23 of calculation circuits 10a, 11a, 10b, 11c, 10c, 11c of drive circuits 6a, 7a, 6b, 7b, 6c, 7c via control lines 16, 17. The calculated sinusoidal phase current curve of the phase current for the switching process of the associated semiconductor switches is... Figure 3 The upper left corner is schematically shown with a time signal.

[0037] like Figure 3 The computational circuits 10a, 11a, 10b, 11c, 10c, and 11c shown may have logic 27, which monitors the UART start frame and performs CRC checks. This logic 27 generates enable and reset signals for counters that provide count values ​​to multiplexer 28. The multiplexer, on its output side, provides the selected count value to computation unit 23 of computational circuits 10a, 11a, 10b, 11c, 10c, and 11c. Logic 27 also provides a selection signal applied to the control input of multiplexer 28 to select the time count value (t-UART) used in the current calculation through computation unit 23.

[0038] In one possible implementation, the following three pieces of information about the phase current Ipha can be transmitted by the processor 12 via communication interfaces 14, 15 (UART) to the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, 7c in a time grid of 100µs: frequency ω, peak current, and phase φ of the phase AC current.

[0039] Using this information, the calculation units 23 of the calculation circuits 10a, 11a, 10b, 11c, 10c, and 11c of the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, and 7c autonomously and preferably in real time calculate the sinusoidal phase current Ipha: Furthermore, the driving circuits 6a, 7a, 6b, 7b, 6c, and 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c respectively also have current curve storage devices 25, which are preferably composed of RAM memories. The current curve storage devices 25 of the driving circuits 6a, 7a, 6b, 7b, 6c, and 7c are designed to select the current curve stored in the current curve storage devices 25 based on the phase current Ipha calculated by the calculation unit 23 of the corresponding driving circuits 6a, 7a, 6b, 7b, 6c, and 7c, and provide it to the driving circuits 6a, 7a, 6b, 7b, 6c, and 7c of the corresponding semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c for executing switching processes in the corresponding semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c. In one possible embodiment, the current curve storage device 25 includes a RAM memory, such as... Figure 4 As shown schematically.

[0040] In one possible implementation, the current curve storage device 25 includes a stored first lookup table (LUT1) and a stored second lookup table (LUT2).

[0041] In one embodiment of the control device 1, the corresponding current curve storage device 25, which is respectively provided in one of the drive circuits 6a, 7a, 6b, 7b, 6c, 7c, has a first one-dimensional lookup table (LUT1) designed to provide a first index (IdxIpha) for the phase current correlation of different amplitude ranges of the phase current curve Ipha calculated by the calculation units 23 of the calculation circuits 10a, 11a, 10b, 11c, 10c, 11c of the drive circuits 6a, 7a, 6b, 7b, 6c, 7c.

[0042] In one embodiment of the control device 1, the current curve storage device 25, respectively disposed in the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c, has a second multidimensional lookup table (LUT2), which is designed to select the address of the current curve storage device 25 according to a first index (IdxIpha) for phase current correlation provided by the first lookup table (LUT1) and according to at least one other index. Here, the selected address stores the current curves for turning on and / or turning off the corresponding semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c through the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c.

[0043] exist Figure 4 In the exemplary implementation shown, the sinusoidal phase current Ipha calculated by the calculation unit 23 of the calculation circuits 10a, 11a, 10b, 11c, 10c, and 11c is categorized into multiple ranges, such as 16 ranges. For example, the calculated phase current Ipha includes 7 bits, corresponding to 128 amplitude levels.

[0044] In the first 1-D lookup table (LUT1), the range for the phase current Ipha is determined during initialization via UART communication interfaces 14 and 15.

[0045] As input to the first lookup table (LUT1) of the current curve storage device 25, the current phase current Ipha, calculated by the calculation unit 23 of the calculation circuits 10a, 11a, 10b, 11c, 10c, 11c, is used, which includes, for example, 7 bits. The output of the 1-D lookup table (LUT1) provides a 4-bit index idxIPha for phase current correlation, which, together with the intermediate circuit voltage Uzk and the power module temperature T, serves as input to the second 3-D lookup table (LUT2) of the current curve storage device 25.

[0046] In one possible implementation of the control device 1, other indices used to select the address of the current curve storage device 25 include a voltage index (IdxUTnet) and / or a temperature index (IdxTemp). In one implementation of the control device 1, these other indices are transmitted by the processor 12 via communication interfaces 14 and 15 to the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c.

[0047] In one embodiment of the control device 1, the voltage index (IdxUTnet) indicates the voltage of the high-voltage circuit connected to the inverter output stage 2 to supply voltage thereto. This high-voltage circuit is an intermediate circuit of the inverter.

[0048] In one embodiment of the control device 1, the temperature index (Idxtemp) indicates the temperature T of the corresponding semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c that are switched by the drive circuits 6a, 7a, 6b, 7b, 6c, 7c.

[0049] Information about the current intermediate circuit voltage (IdxUTnet) and information about the temperature T (IdxTemp) of the power switch are transmitted by processor 12 to the calculation unit 23 of drive circuits 6a, 7a, 6b, 7b, 6c, and 7c.

[0050] N current profiles are stored in a 3D lookup table (LUT2), allowing them to be autonomously selected at switching times by the ASIC or driver circuits 6a, 7a, 6b, 7b, 6c, 7c based on the phase current, intermediate circuit voltage Uzk, and power module temperature T, according to the operating point. The selection of current profiles is performed for both the turn-on and turn-off times of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c (e.g., MOSFETs).

[0051] The intermediate circuit voltage Uzk of the intermediate circuit or high-voltage circuit can be detected by the HV voltage detection unit 18 of the inverter output stage 2. Additionally, temperature sensors 19 and 20 can be provided to sense the temperature T of the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c of the inverter output stage 2 and report it to the processor 12, such as... Figure 1 As shown.

[0052] In the current curve storage device 25 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c, during each initialization, for example, N=124 current curves are transmitted from the processor 12 to the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, and 7c via UART communication interfaces 14 and 15. Each current curve consists of a current curve for the turn-on process (EIN) and a current curve for the turn-off process (AUS), such as... Figure 4 As shown. The current curves indicate the shape of the drive signals TS applied to the control input terminals 8a, 9a, 8b, 9b, 8c, and 9c of the relevant semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c of the inverter output stage 2 during the corresponding switching process.

[0053] The indexes of N=124 current curves are stored in a 3-D lookup table (LUT2) of the current curve storage device 25 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c. The assignment of the current curves is also performed by the processor 12.

[0054] The calculated phase current Ipha (e.g., 7 bits) is used as input to a 1-D lookup table (LUT1). The output of the 1-D lookup table (LUT1) provides an index idxIPha (e.g., 4 bits) for the phase current. An index idxUTnet (e.g., 3 bits) for the intermediate circuit voltage and an index IdxUTnet (e.g., 2 bits) for the measured temperatures T of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c are sent directly from the processor 12 to the drive circuits 6a, 7a, 6b, 7b, 6c, 7c via UART communication interfaces 14, 15.

[0055] The address is formed using these three indices: IdxIpha (4 bits), IdxUTnet (3 bits), and IdxTemp (2 bits). This address is used as input to a 3-D lookup table (LUT2), such as... Figure 4 As shown. The 3-D lookup table LUT2 is also implemented in the current curve storage device 25 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c.

[0056] The output of the 3-D lookup table (LUT2) provides the address idxCP (7 bits) of the selected on or off current curve, which is then provided to the current source driver by the current curve storage device 25.

[0057] In one embodiment of the control device 1, the current curve storage device 25 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c stores other current curves for special cases. The current curves for special cases stored in the current curve storage device 25 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c preferably include at least one current curve for a communication failure, at least one current curve for a short circuit, and / or at least one current curve for an overcurrent.

[0058] For example, five gate current profiles are provided for special cases, and their selection is performed by the gate driver ASIC. For instance, 128 current profiles are stored for the turn-on and turn-off processes, such as... Figure 4 As shown. As a backup layer, a current profile is set in case of timeout or communication failure (CRC security). For other fault conditions, for example, four special current profiles for short circuits / overcurrents are stored in the current profile storage device 25 of the drive circuits 6a, 7a, 6b, 7b, 6c, and 7c.

[0059] Inverter output stage 2 preferably forms part of the inverter. Inverter output stage 2 has at least one half-bridge, which includes series-connected semiconductor switches and corresponding drive circuitry. For example... Figure 1As shown, in one possible implementation, the inverter output stage 2 includes three half-bridges 3a, 3b, and 3c, wherein each half-bridge of the inverter output stage 2 includes two semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c connected in series. The number of half-bridges can vary in different implementations. In one possible implementation, the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c are constructed using transistors, particularly field-effect transistors (FETs) or IGBTs. In one possible implementation, the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c are IGBTs (Insulated Gate Bipolar Transistors), but other semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c of the same form can also be used, for example, in the form of JFETs (Junction Field-Effect Transistors) or MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), particularly SiC power transistors. If the semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c include IGBT switches, diodes can also be provided in anti-parallel with each IGBT switch. For clarity, Figure 1 The diode is not shown in the diagram.

[0060] The control device 1 also includes a processor 12, which is connected via an interface to the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, and 7c of the inverter output stage 2. Each of the six semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c of the inverter output stage 2 has a control input terminal 8a, 9a, 8b, 9b, 8c, and 9c, which is designed to receive drive signals TS from the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, and 7c of the inverter output stage 2.

[0061] In one embodiment of the control device 1, each half-bridge 3a, 3b, 3c of the inverter output stage 2 has two semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c connected in series. These switches are designed to provide a sinusoidal phase current Iph at connection nodes 13a, 13b, 13c to the electrical load connected thereto during normal operation of the inverter output stage 2. Connection nodes 13a, 13b, 13c are connected to the output terminals 22a, 22b, 22c of the inverter output stage 2 via lines 21a, 21b, 21c, as shown below. Figure 1 As shown. The connected electrical load can be inductive, especially the windings of a motor.

[0062] The half-bridges 3a, 3b, and 3c of inverter output stage 2 are connected in parallel between the positive terminal T+ and the negative terminal T- of the high-voltage circuit. HS semiconductor switches 4a, 4b, and 4c are connected to the positive terminal T+, and LS semiconductor switches 5a, 5b, and 5c are connected to the negative terminal T- of the high-voltage circuit.

[0063] In one possible implementation, communication interfaces 14 and 15 are constructed using UART interfaces. In another possible implementation, drive circuits 6a, 7a, 6b, 7b, 6c, and 7c can be constructed using an ASIC.

[0064] ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c are provided with information via UART interfaces 14 and 15. Based on this information, ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c can autonomously determine the current phase current Ipha for use in the switching process. Here, the calculation unit 23 of ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c preferably calculates the sine curve of the phase current in real time based on the peak value, frequency Omega, and phase angle of the phase current. Information on the current intermediate circuit voltage Uzk and the temperature T of the power semiconductor switches 4a, 5a, 4b, 5b, 4c, and 5c can be transmitted from processor 12 to ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c.

[0065] For example, N=124 current curves are stored in a 3D lookup table (LUT2) of the current curve storage device 25, allowing them to be autonomously selected by the ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c at switching times based on phase current, intermediate circuit voltage Uzk, and power module temperature T. Compared to traditional software solutions, selecting the correct current curve by the ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c is significantly faster and more accurate. Implementing the calculations within the ASIC driver circuits 6a, 7a, 6b, 7b, 6c, and 7c also avoids the extremely high resource requirements of the processor 12.

[0066] Figure 2 A simplified flowchart illustrating one possible implementation of the method according to the invention is shown.

[0067] The method for switching the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c of the inverter output stage 2 via the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, 7c basically includes three main steps S1, S2, and S3.

[0068] In the first step S1, the processor 12 of the control device 1 provides the phase current parameters set during the switching process of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c of the inverter output stage 2 to the corresponding drive circuits 6a, 7a, 6b, 7b, 6c, 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c.

[0069] In the second step S2, the calculation unit 23 of the driving circuits 6a, 7a, 6b, 7b, 6c, 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c calculates the current sinusoidal phase current curve of the phase current Ipha for the switching process of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c based on the parameters provided by the processor 12.

[0070] In the third step S3, based on the sinusoidal phase current curves of the phase currents calculated by the calculation unit 23 of the driving circuits 6a, 7a, 6b, 7b, 6c, 7c, the current curves stored in the current curve storage device 25 of the driving circuits 6a, 7a, 6b, 7b, 6c, 7c of the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c are selected for performing the switching process in the semiconductor switches 4a, 5a, 4b, 5b, 4c, 5c.

[0071] Additionally, the stored current profile can be selected based on voltage and / or temperature.

[0072] The control device 1 can be programmed with different gate current profiles for charging and discharging power transistors 4a, 5a, 4b, 5b, 4c, and 5c. It supports the selection of the optimal gate charge and discharge profiles for the actual operating conditions of the inverter during operation.

[0073] The gate current profile enables adaptation to different inverter operating conditions (e.g., temperature, intermediate circuit voltage, phase current) or fault conditions (overcurrent, safe state) based on information provided by processor 12.

[0074] The HV side requires no external gate resistor, AMCL component, safety state logic, or ADC. This allows for a significant reduction in external components, thereby reducing space requirements on the board.

Claims

1. A control device (1) for semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) of an inverter output stage (2), the control device having a processor (12) and having drive circuits (6a, 7a, 6b, 7b, 6c, 7c) respectively provided for each semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) of the inverter output stage (2), wherein, The processor (12) is designed to transmit parameters of the phase current during the switching process of one of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) in the inverter output stage (2) to the corresponding drive circuit (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) via communication interfaces (14, 15). The driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) have a computing unit (23) designed to calculate the current sinusoidal phase current curves of the phase currents for the switching process of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) based on parameters transmitted by the processor (12). Furthermore, the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) have a current curve storage device (25). The current curve storage device is designed to select the current curve stored in the current curve storage device based on the sinusoidal phase current curve calculated by the calculation unit (23) of the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) and / or based on voltage and / or based on temperature, and provide it to the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) for performing the switching process in the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c).

2. The control device according to claim 1, wherein, The parameters of the phase current transmitted from the processor (12) to the drive circuit (6a, 7a, 6b, 7b, 6c, 7c) include the peak value of the phase current, the frequency of the phase current, and the phase angle of the phase current.

3. The control device according to claim 1 or 2, wherein, The current curve storage device (25) of the drive circuit (6a, 7a, 6b, 7b, 6c, 7c) has a one-dimensional first lookup table (LUT1) designed to provide a first index (IdxIpha) for the phase current correlation of different amplitude ranges of the phase current curves calculated by the calculation unit (23) of the drive circuit (6a, 7a, 6b, 7b, 6c, 7c).

4. The control device according to claim 3, wherein, The current curve storage device (25) of the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) has a multidimensional second lookup table (LUT2) designed to select the address of the current curve storage device (25) according to a first index (IdxPha) for phase current correlation provided by the first lookup table (LUT1) and according to at least one other index, wherein the current curves of the corresponding semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) turned on and / or turned off by the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) are stored at the selected address.

5. The control device according to claim 4, wherein, Other indices used to select the address of the current curve storage device (25) include a voltage index (IdxUTnet) and / or a temperature index (IdxTemp).

6. The control device according to claim 4 or 5, wherein, Other indexes used to select the address of the current curve storage device (25) are transmitted by the processor (12) through the communication interface (14) to the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c).

7. The control device according to claim 5 or 6, wherein, The voltage index (IdxUTnet) indicates the voltage of the high-voltage circuit connected to the inverter output stage (2) to supply voltage to it.

8. The control device according to claim 5 or 6, wherein, The temperature index (IdxTemp) indicates the temperature of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) that are switched by the drive circuits (6a, 7a, 6b, 7b, 6c, 7c).

9. The control device according to any one of claims 1 to 8, wherein, Other current curves for special cases are stored in the current curve storage device (25) of the drive circuit (6a, 7a, 6b, 7b, 6c, 7c).

10. The control device according to claim 9, wherein, The current curves for special situations stored in the current curve storage device (25) of the drive circuits (6a, 7a, 6b, 7b, 6c, 7c) include at least one current curve for a communication failure, at least one current curve for a short circuit, and / or at least one current curve for an overcurrent.

11. A method for switching semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) of an inverter output stage (2) via corresponding drive circuits (6a, 7a, 6b, 7b, 6c, 7c), comprising the following steps: The processor (12) provides the phase current parameters set during the switching process of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) in the inverter output stage (2) to the corresponding drive circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) (S1). The computing unit (23) of the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) calculates the current sinusoidal phase current curve (S2) of the phase current for the switching process of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) based on the parameters provided by the processor (12). as well as Based on the sinusoidal phase current curve calculated by the calculation unit (23) of the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) and / or based on voltage and / or based on temperature, the current curve stored in the current curve storage device (25) of the driving circuit (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) is selected for performing the switching process (S3) in the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c).

12. A drive system for an n-phase motor, wherein, n ≥ 1, the driving system The inverter output stage (2) has at least one half-bridge (3a, 3b, 3c), the half-bridge comprising series-connected semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) and corresponding drive circuits (6a, 7a, 6b, 7b, 6c, 7c), wherein the inverter output stage (2) is powered by an intermediate circuit capacitor of a high-voltage circuit and is designed to generate an n-phase power supply voltage for the motor. A control device (1) has semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) for the inverter output stage (2), the control device having a processor (12) and drive circuits (6a, 7a, 6b, 7b, 6c, 7c) respectively provided for each semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) of the inverter output stage (2). The processor (12) is designed to transmit the phase current parameters during the switching process of one of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) in the inverter output stage (2) to the corresponding drive circuit (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switch (4a, 5a, 4b, 5b, 4c, 5c) via communication interfaces (14, 15). The driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) have a computing unit (23) designed to calculate the current sinusoidal phase current curves of the phase currents for the switching process of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) based on parameters transmitted by the processor (12). Furthermore, the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) have a current curve storage device (25). The current curve storage device is designed to select the current curve stored in the current curve storage device based on the sinusoidal phase current curve calculated by the calculation unit (23) of the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) and / or based on voltage and / or based on temperature, and provide it to the driving circuits (6a, 7a, 6b, 7b, 6c, 7c) of the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c) for performing the switching process in the semiconductor switches (4a, 5a, 4b, 5b, 4c, 5c).

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