Perovskite solar cell, preparation method thereof and three-terminal tandem solar cell
By using the ALD process to prepare dense perovskite films on silicon substrates and combining it with in-situ annealing, the problems of non-uniformity and process complexity of perovskite films in existing 3T perovskite/crystalline silicon tandem solar cells have been solved, thereby improving the performance and industrialization potential of the cells.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TIANJIN ZHONGHUAN SEMICON CO LTD
- Filing Date
- 2026-04-08
- Publication Date
- 2026-06-30
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Figure CN122318705A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solar cell fabrication technology, and in particular to a perovskite solar cell, its fabrication method, and a three-terminal tandem solar cell. Background Technology
[0002] Currently, tandem solar cells have become an important technological path to improve photoelectric conversion efficiency in order to break through the Shockley-Quiet limit of single-junction solar cells. Among them, perovskite / crystalline silicon tandem solar cells have attracted much attention due to their theoretical efficiency of up to 45%, strong compatibility of fabrication processes, and high cost potential. According to the electrode configuration, the mainstream tandem structures include two-terminal (2T), three-terminal (3T), and four-terminal (4T) types. Compared with the 2T structure, which requires strict matching of sub-cell current density, and the 4T structure, which suffers from optical loss and increased system complexity due to additional leads, the 3T tandem solar cell, by setting an independently addressable intermediate shared electrode between the top and bottom cells, enables the two sub-cells to operate independently at their respective maximum power points (MPP), significantly alleviating the current matching constraint; at the same time, it reduces the number of transparent conductive oxide (TCO) layers, reduces parasitic absorption, and simplifies process integration, which is beneficial for large-scale manufacturing and system maintenance.
[0003] However, existing 3T perovskite / crystalline silicon tandem solar cells face two major bottlenecks: Firstly, bottom cells typically use monocrystalline silicon (Cz-Si) with a pyramidal textured surface to enhance light capture. However, this micro-nano rough surface severely restricts the uniform film formation of the perovskite light-absorbing layer, making it difficult to form a dense, pinhole-free, low-defect-density perovskite film on a high aspect ratio textured surface. This leads to intensified interfacial recombination, an increase in non-radiative recombination centers of charge carriers, and a significant decrease in open-circuit voltage and fill factor.
[0004] Secondly, in order to adapt to the textured surface and improve the carrier selectivity, existing processes often introduce TCO materials such as indium tin oxide (ITO) as transport layers or electrodes multiple times. This not only increases the cost of raw materials and sputtering targets, but also results in high equipment occupancy, narrow process window and large yield fluctuations due to the superposition of multiple vacuum processes, which seriously restricts the industrialization.
[0005] In view of this, the present invention is hereby proposed. Summary of the Invention
[0006] The purpose of this invention is to provide a perovskite solar cell, a method for preparing the same, and a three-terminal tandem solar cell, aiming to solve at least one of the aforementioned technical problems in the prior art.
[0007] In order to achieve the above-mentioned objectives of the present invention, the following technical solution is adopted: The first aspect of the present invention provides a method for fabricating a perovskite solar cell, wherein a first transport layer is first fabricated on the surface of a silicon substrate; then, an atomic layer deposition (ALD) process is used to generate a perovskite thin film on the surface of the first transport layer, followed by in-situ annealing to obtain a perovskite absorber layer; and then, a second transport layer, a buffer layer, and a transparent conductive layer are sequentially fabricated on the surface of the perovskite absorber layer to obtain a perovskite solar cell.
[0008] Further, the ALD process specifically includes: S1, placing the substrate with the first transport layer deposited into the ALD equipment, evacuating, heating and holding it at that temperature, and then using an inert gas to perform a first purging of the substrate surface; S2, then performing Pb source pulse deposition followed by a second purging, perovskite precursor reactive deposition and a third purging; S3, repeating S2 until the perovskite film reaches the preset thickness and then ending to obtain the perovskite film.
[0009] Preferably, the Pb source includes Pb(NMe2)2 or Pb(dpm)2.
[0010] In some embodiments of the present invention, the perovskite solar cell has a pin structure, and the first transport layer is a hole transport layer.
[0011] Preferably, the hole transport layer is made of NiO. x At least one of PTAA, PEDOT:PSS, Spiro-OMeTAD, CuI, and CuSCN.
[0012] Preferably, the thickness of the hole transport layer is 5~50nm.
[0013] In other embodiments of the present invention, the perovskite solar cell has a nip structure, and the first transport layer is an electron transport layer.
[0014] Preferably, the electron transport layer is made of TiO2, SnO2, ZnO, or C. 60 At least one of them.
[0015] Preferably, the thickness of the electron transport layer is 5~50nm.
[0016] Furthermore, the material of the perovskite absorber layer has the general formula ABX3; wherein A is an organic cation or a monovalent metal cation, B is a divalent metal cation, and X is a halogen or pseudohalogen group.
[0017] Preferably, A is selected from CH3NH3. + NH2CH=NH2 + FA + MA + Cs + 、Rb+ At least one of them.
[0018] Preferably, the B is selected from Pb. 2+ Sn 2+ 、Sr 2+ Cu 2+ At least one of them.
[0019] Preferably, X is selected from Cl - ,Br - I - SCN - At least one of them.
[0020] Furthermore, the material of the perovskite absorber layer is Cs. 0.17 FA 0.83 Pb(I 0.65 Br 0.35 )3, with a band gap of 1.77~1.80eV.
[0021] Preferably, the thickness of the perovskite absorber layer is 300~2000 nm.
[0022] Preferably, after the atomic layer deposition (ALD) process, the cooling rate is controlled at 2~3℃ / min, and the furnace is cooled to room temperature to complete the in-situ annealing.
[0023] In one embodiment of the present invention, when the perovskite solar cell has a pin structure, the second transport layer is an electron transport layer.
[0024] Preferably, the electron transport layer is made of TiO2, SnO2, ZnO, or C. 60 At least one of them.
[0025] Preferably, the electron transport layer is made of SnO2 with a thickness of 10-20 nm and has a PEIE modification layer on its surface with a thickness of 1-2 nm.
[0026] Preferably, the electron transport layer is made of SnO2 and TiO2, with a mass ratio of SnO2 to TiO2 of 7:3.
[0027] In another embodiment of the present invention, when the perovskite solar cell is a nip structure, the second transport layer is a hole transport layer.
[0028] Preferably, the hole transport layer is made of NiO. x At least one of PTAA, PEDOT:PSS, Spiro-OMeTAD, CuI, and CuSCN.
[0029] Preferably, the thickness of the hole transport layer is 5~50nm.
[0030] Furthermore, the material of the buffer layer includes at least one of molybdenum oxide, tin oxide, vanadium oxide, and tungsten oxide.
[0031] Preferably, the thickness of the buffer layer is 10~20nm.
[0032] Preferably, the transparent conductive layer is made of at least one of ITO, IZO, AZO, IWO, and In2O3.
[0033] Preferably, the thickness of the transparent conductive layer is 80~120nm.
[0034] The second aspect of the present invention provides a perovskite solar cell, which is prepared by the preparation method described in the first aspect; the perovskite solar cell has a pin structure and includes, in sequence from the substrate side to the light-receiving surface side, a first transport layer, a perovskite absorption layer, a second transport layer, a buffer layer, and a transparent conductive layer; wherein, the first transport layer is a hole transport layer and the second transport layer is an electron transport layer.
[0035] The second aspect of the present invention provides another perovskite solar cell, which is prepared by the preparation method described in the first aspect; the perovskite solar cell has a nip structure and includes, in sequence from the substrate side to the light-receiving surface side, a first transport layer, a perovskite absorption layer, a second transport layer, a buffer layer, and a transparent conductive layer; wherein, the first transport layer is an electron transport layer and the second transport layer is a hole transport layer.
[0036] A third aspect of the present invention provides a three-terminal tandem solar cell, comprising, from the light-receiving surface to the back-lighting surface, a transparent substrate, a top electrode, a perovskite top cell, a composite layer, a crystalline silicon bottom cell, and a back electrode; wherein the perovskite top cell is the perovskite solar cell described in the second aspect, and the crystalline silicon bottom cell is a back-contact crystalline silicon cell; the three-terminal tandem solar cell has a fully back-contact three-terminal structure, and the top electrode, the P-type electrode of the crystalline silicon bottom cell, and the N-type electrode are all led out to the back-lighting surface of the cell, forming three independent electrode terminals.
[0037] Furthermore, the top electrode is an ITO layer.
[0038] Preferably, the composite layer comprises an ITO layer and a MoOx layer sequentially from the light-receiving surface to the backlighting surface.
[0039] Preferably, the crystalline silicon bottom cell sequentially comprises a front surface field, an n-type crystalline silicon substrate, a back contact doped region, a back passivation layer, and a back antireflection layer.
[0040] Preferably, the front surface field is an n++ type doped layer.
[0041] Preferably, the n-type crystalline silicon substrate is Cz-Si single-crystal silicon with a resistivity > 5 Ω·cm.
[0042] Preferably, the back electrode includes a P-region electrode corresponding to the P-type doped region of the crystalline silicon bottom cell and an N-region electrode corresponding to the N-type doped region.
[0043] Preferably, the material of the P-region electrode and / or the N-region electrode is silver or copper.
[0044] Compared with the prior art, the present invention has at least the following beneficial effects: The preparation method provided by this invention employs ALD (Alternating Deposition) technology to directly deposit a perovskite thin film on the surface of the first transport layer, combined with in-situ annealing. The inherent self-limiting surface reaction mechanism of ALD makes it insensitive to the pyramidal textured morphology of the silicon substrate, overcoming the physical limitations of traditional solution methods or evaporation methods in terms of uneven film formation on micro / nano rough surfaces. This successfully prepares a perovskite absorber layer with precisely controllable thickness, dense structure without pinholes, and consistent grain orientation, significantly suppressing interface-bulk recombination and improving carrier lifetime. In-situ annealing avoids thermal damage to the underlying transport layer and silicon substrate caused by high-temperature post-processing, while simultaneously promoting hydrogen atom diffusion in the bottom cell to passivate dangling bonds on the silicon surface, synergistically improving Vb. OC Compared to FF, it eliminates the need for a separate annealing furnace and associated conveyor system, simplifying production line integration, reducing equipment investment and cleanroom occupancy, and decreasing the frequency of TCO material reuse, thereby effectively reducing manufacturing costs and process complexity.
[0045] The perovskite solar cell provided by this invention forms a low-barrier, low-interface-state-density ohmic contact between a dense, low-defect-density perovskite layer obtained by ALD and a first / second transport layer with high mobility and precise energy level matching. This significantly suppresses interfacial recombination and improves VL. OC The pin and nip dual-path design adapts to different stack-up integration requirements, taking into account both carrier selectivity and process compatibility, and avoiding carrier extraction loss caused by energy level mismatch on textured silicon in traditional single configurations.
[0046] The three-terminal tandem solar cell provided by this invention, given the advantages of the aforementioned perovskite solar cells, can achieve the formation of a perovskite absorber layer with high uniformity and low defect density on the pyramidal textured surface of a silicon substrate. Combined with a transport layer with precise energy level matching and a full back contact electrode design, it significantly suppresses interface recombination, reduces front-side shading loss, improves Jsc, enhances efficiency, and maintains high photoelectric conversion efficiency and industrial feasibility. Attached Figure Description
[0047] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0048] Figure 1 This is a schematic diagram of the three-terminal stack of perovskite and TBC.
[0049] Icons: 10-Silicon substrate; 12-Front surface field; 14-Composite layer; 16-Hole transport layer; 18-Perovskite absorber layer; 20-Electron transport layer; 22-Transparent conductive layer; 24-Passivation layer; 25-n-type polysilicon doped region; 26-p-type polysilicon doped region; 28-Back passivation layer; 30-Back antireflection layer; 32-Electrode. Detailed Implementation
[0050] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.
[0051] In the following, the terms “comprising,” “having,” and their cognates, which may be used in various embodiments of the invention, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as excluding, firstly, the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more features, numbers, steps, operations, elements, components, or combinations thereof.
[0052] The first aspect of the present invention provides a method for fabricating a perovskite solar cell. First, a first transport layer is prepared on the surface of a silicon substrate 10. Then, an atomic layer deposition (ALD) process is used to generate a perovskite thin film on the surface of the first transport layer, followed by in-situ annealing to obtain a perovskite absorber layer 18. A second transport layer, a buffer layer, and a transparent conductive layer 22 are then sequentially prepared on the surface of the perovskite absorber layer 18 to obtain a perovskite solar cell.
[0053] The preparation method provided by this invention employs ALD (Alternating Deposition) technology to directly deposit a perovskite thin film on the surface of the first transport layer, combined with in-situ annealing. The inherent self-limiting surface reaction mechanism of ALD makes it insensitive to the pyramidal textured morphology of the silicon substrate 10, overcoming the physical limitations of traditional solution methods or vapor deposition methods in terms of uneven film formation on micro / nano rough surfaces. This successfully prepares a perovskite absorber layer 18 with precisely controllable thickness, dense structure without pinholes, and consistent grain orientation, significantly suppressing interface-bulk recombination and improving carrier lifetime. In-situ annealing avoids thermal damage to the underlying transport layer and silicon substrate caused by high-temperature post-processing, while simultaneously promoting hydrogen atom diffusion in the bottom cell to passivate dangling bonds on the silicon surface, synergistically improving Vb. OC Compared to FF, it eliminates the need for a separate annealing furnace and associated conveyor system, simplifying production line integration, reducing equipment investment and cleanroom occupancy, and decreasing the frequency of TCO material reuse, thereby effectively reducing manufacturing costs and process complexity.
[0054] Further, the ALD process specifically comprises: S1, placing the substrate with the first transport layer deposited into the ALD equipment, evacuating, heating and holding it at that temperature, and then using an inert gas to perform a first purging of the substrate surface; S2, then performing Pb source pulse deposition followed by a second purging, perovskite precursor reactive deposition and a third purging; S3, repeating S2 until the perovskite film reaches the preset thickness and then ending to obtain the perovskite film.
[0055] Preferably, the Pb source includes Pb(NMe2)2 or Pb(dpm)2.
[0056] In some specific embodiments of the present invention, the ALD process specifically includes the following steps: 1. Pre-vacuum and heating: Place the substrate with the first transport layer deposited into the ALD equipment and evacuate to 5×10⁻⁶. -4 Pa, simultaneously heated to 140℃ at a heating rate of 5℃ / min, and held at that temperature for 10s.
[0057] 2. First purge: High-purity N2 or Ar is used to purge the substrate surface at a gas flow rate of 2000 sccm for 30 seconds.
[0058] 3. Pb source pulse deposition: The substrate is transferred into the first chamber, and a Pb precursor is introduced. The source flow rate is 1200~1400 sccm, the carrier gas N2 flow rate is 700 sccm, and the pulse time is 25s to form a Pb source monomolecular adsorption layer on the substrate surface. The Pb precursor is preferably Pb(NMe2)2 or Pb(dpm)2.
[0059] 4. Second purging: The substrate is transferred into the second chamber and purged with inert gas at a flow rate of 2200 sccm for 8 seconds to remove unadsorbed Pb precursor.
[0060] 5. Perovskite precursor reactive deposition: The substrate is transferred into the third chamber, and a mixed precursor gas of CsI, FAI, PbI2, and PbBr2 is introduced. The molar ratio of each component in the mixed gas is 0.17:0.83:0.65:0.35, the source flow rate is 1400~1600 sccm, the carrier gas N2 flow rate is 700 sccm, and the introduction time is 25s. The gas reacts with the Pb source monolayer on the substrate surface to form a perovskite monolayer.
[0061] 6. Third purge: The substrate is transferred to the fourth chamber and purged with high-purity N2 at a flow rate of 2200 sccm for 8 seconds to remove unreacted precursors and byproducts.
[0062] 7. Cyclic deposition: Repeat steps 3 to 6 for 600 cycles to obtain a perovskite film of the preset thickness.
[0063] 8. Post-purging: High-purity N2 is used to purge the substrate surface at a gas flow rate of 2800 sccm for 40 seconds.
[0064] 9. In-situ annealing: Turn off the heating and control the cooling rate to 2~3℃ / min. Cool the furnace to room temperature to complete the in-situ annealing.
[0065] In some embodiments of the present invention, the perovskite solar cell has a pin structure, and the first transport layer is a hole transport layer 16 located on the side of the silicon substrate 10. It can directly form good contact with the textured silicon substrate and effectively extract photogenerated holes, avoiding the reverse recombination of electrons / holes at the interface. At the same time, it provides an energy level matching, chemical compatibility and thermal stability buffer platform for subsequent ALD deposition of perovskite.
[0066] Preferably, the hole transport layer 16 is made of NiO. x At least one of PTAA, PEDOT:PSS, Spiro-OMeTAD, CuI, and CuSCN.
[0067] Preferably, the thickness of the hole transport layer 16 is 5-50 nm. Typically, but not limitingly, the thickness of the hole transport layer 16 can be, for example, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, or 50 nm, or any value within the range of 5-50 nm.
[0068] In other embodiments of the present invention, the perovskite solar cell has a nip structure, and the first transport layer is an electron transport layer 20, which can efficiently extract electrons generated by the silicon bottom cell, realize band gradient coupling and selective carrier tunneling between the top cell and the bottom cell, and avoid interference of p-type HTL on silicon surface passivation under high temperature / light illumination, thereby improving the interface stability and Voc synergistic gain of the stacked device.
[0069] Preferably, the electron transport layer 20 is made of TiO2, SnO2, ZnO, or C. 60 At least one of them.
[0070] Preferably, the thickness of the electron transport layer 20 is 5-50 nm. Typically, but not limitingly, the thickness of the electron transport layer 20 can be, for example, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, or 50 nm, or any value within the range of 5-50 nm.
[0071] Furthermore, the material of the perovskite absorber layer 18 has the general formula ABX3; wherein A is an organic cation or a monovalent metal cation, B is a divalent metal cation, and X is a halogen or pseudohalogen group.
[0072] Preferably, A is selected from CH3NH3. + NH2CH=NH2 + FA + MA + Cs + 、Rb + At least one of them.
[0073] Preferably, the B is selected from Pb. 2+ Sn 2+ 、Sr 2+ Cu 2+ At least one of them.
[0074] Preferably, X is selected from Cl - ,Br - I - SCN - At least one of them.
[0075] Furthermore, the material of the perovskite absorber layer 18 is Cs. 0.17 FA 0.83 Pb(I 0.65 Br 0.35 )3, with a band gap of 1.77~1.80eV.
[0076] Preferably, the thickness of the perovskite absorber layer 18 is 300~2000 nm.
[0077] Typically, but not limitingly, the thickness of the perovskite absorber layer 18 can be, for example, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, 1100 nm, 1200 nm, 1300 nm, 1400 nm, 1500 nm, 1600 nm, 1700 nm, 1800 nm, 1900 nm, or 2000 nm, or any value in the range of 300 to 2000 nm.
[0078] Preferably, after the atomic layer deposition (ALD) process, the cooling rate is controlled at 2~3℃ / min, and the furnace is cooled to room temperature to complete in-situ annealing. This allows for the simultaneous stress relaxation and ordered crystallization of perovskite crystals within the ALD chamber, avoiding phase separation or pinhole defects caused by thermal shock. At the same time, it promotes the diffusion of hydrogen atoms from the transport layer / interface to the silicon surface to achieve in-situ passivation, thereby synergistically improving the crystal quality of the perovskite layer, carrier lifetime, and passivation effect of the silicon / perovskite heterojunction interface.
[0079] In one embodiment of the present invention, when the perovskite solar cell has a pin structure, the second transport layer is an electron transport layer 20.
[0080] Preferably, the electron transport layer 20 is made of TiO2, SnO2, ZnO, or C. 60 At least one of them.
[0081] Preferably, the electron transport layer 20 is made of SnO2 with a thickness of 10-20 nm and has a PEIE modification layer with a thickness of 1-2 nm on its surface. SnO2 provides high electron mobility and a suitable conduction band position. Combined with the ultrathin PEIE modification layer, its surface dipole can be precisely controlled, the work function can be reduced, and the SnO2 surface defect states can be passivated, thereby achieving perovskite / ETL interface energy level gradient matching, suppressing electron back-injection and interface recombination, and significantly improving Voc and device stability.
[0082] Typically, but not limitingly, the thickness of the electron transport layer 20 can be, for example, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, or 20 nm, or any value within the range of 10 to 20 nm; the surface of the electron transport layer 20 is provided with a PEIE modification layer, typically, but not limitingly, the thickness of the PEIE modification layer can be, for example, 1 nm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, or 2 nm, or any value within the range of 1 to 2 nm.
[0083] Preferably, the electron transport layer 20 is made of SnO2 and TiO2, with a mass ratio of SnO2 to TiO2 of 7:3.
[0084] In another embodiment of the present invention, when the perovskite solar cell is a nip structure, the second transport layer is a hole transport layer 16.
[0085] Preferably, the hole transport layer 16 is made of NiO. x At least one of PTAA, PEDOT:PSS, Spiro-OMeTAD, CuI, and CuSCN.
[0086] Preferably, the thickness of the hole transport layer 16 is 5~50nm.
[0087] Typically, but not limitingly, the thickness of the hole transport layer 16 can be, for example, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm or 50 nm, or any value in the range of 5 to 50 nm.
[0088] Furthermore, the material of the buffer layer includes at least one of molybdenum oxide, tin oxide, vanadium oxide, and tungsten oxide.
[0089] Preferably, the thickness of the buffer layer is 10~20nm.
[0090] Typically, but not limitingly, the thickness of the buffer layer can be, for example, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm or 20 nm, or any value in the range of 10 to 20 nm.
[0091] Preferably, the transparent conductive layer 22 is made of at least one of ITO, IZO, AZO, IWO, and In2O3.
[0092] Preferably, the thickness of the transparent conductive layer 22 is 80~120nm.
[0093] Typically, but not limitingly, the thickness of the transparent conductive layer 22 can be, for example, 80 nm, 90 nm, 100 nm, 110 nm or 120 nm, or any value in the range of 80 to 120 nm.
[0094] Preferably, the transparent conductive layer 22 is prepared by any one of magnetron sputtering, CVD, ALD, and electron beam evaporation.
[0095] The second aspect of the present invention provides a perovskite solar cell, which is prepared by the preparation method described in the first aspect; the perovskite solar cell has a pin structure and includes, in sequence from the substrate side to the light-receiving surface side, a first transport layer, a perovskite absorption layer 18, a second transport layer, a buffer layer, and a transparent conductive layer 22; wherein, the first transport layer is a hole transport layer 16, and the second transport layer is an electron transport layer 20.
[0096] The second aspect of the present invention provides another perovskite solar cell, which is prepared by the preparation method described in the first aspect; the perovskite solar cell has a nip structure and includes, in sequence from the substrate side to the light-receiving surface side, a first transport layer, a perovskite absorption layer 18, a second transport layer, a buffer layer, and a transparent conductive layer 22; wherein, the first transport layer is an electron transport layer 20, and the second transport layer is a hole transport layer 16.
[0097] The perovskite solar cell provided by this invention forms a low-barrier, low-interface-state-density ohmic contact between a dense, low-defect-density perovskite layer obtained by ALD and a first / second transport layer with high mobility and precise energy level matching. This significantly suppresses interfacial recombination and improves VL. OC The pin and nip dual-path design adapts to different stack-up integration requirements, taking into account both carrier selectivity and process compatibility, and avoiding carrier extraction loss caused by energy level mismatch on textured silicon in traditional single configurations.
[0098] A third aspect of the present invention provides a three-terminal tandem solar cell, comprising, from the light-receiving surface to the back-lighting surface, a transparent substrate, a top electrode 32, a perovskite top cell, a composite layer 14, a crystalline silicon bottom cell, and a back electrode 32; wherein the perovskite top cell is the perovskite solar cell described in the second aspect, and the crystalline silicon bottom cell is a back-contact crystalline silicon cell; the three-terminal tandem solar cell has a fully back-contact three-terminal structure, and the top electrode 32, the P-type electrode 32 and the N-type electrode 32 of the crystalline silicon bottom cell are all led out to the back-lighting surface of the cell, forming three independent electrode terminals 32.
[0099] The three-terminal tandem solar cell provided by this invention, given the advantages of the aforementioned perovskite solar cells, can achieve the formation of a highly uniform, low-defect-density perovskite absorber layer 18 on a silicon substrate pyramidal textured surface. Combined with a precisely energy-level matched transport layer and a full-back contact electrode 32 design, it significantly suppresses interface recombination and reduces front-side shading loss. S Improved efficiency and high photoelectric conversion efficiency, while maintaining industrial feasibility.
[0100] In one embodiment of the present invention Figure 1 This is a schematic diagram of the three-terminal stack of perovskite and TBC. From the light-receiving surface to the backlighting surface, the layers are: conductive electrode 32, ITO, electron transport layer 20 (SnO2+PEIE), and perovskite active layer (Cs). 0.17 FA 0.83 Pb(I 0.65 Br 0.353) Hole transport layer 16 (NiOx+Me-4PACz), composite layer 14 (ITO+MoOx), crystalline silicon front passivation layer 24 (n++), single crystal silicon, back doped passivation layer 24 (n poly / isolation region / p poly alternately exist), passivation / antireflection film, metal electrode 32; and connected through external circuit to form a three-terminal series battery.
[0101] Furthermore, the top electrode 32 is an ITO layer.
[0102] Preferably, the composite layer 14 comprises an ITO layer and a MoOx layer sequentially from the light-receiving surface to the back-light-receiving surface.
[0103] Preferably, the crystalline silicon bottom cell sequentially includes a front surface field 12, an n-type crystalline silicon substrate 10, a back contact doped region, a back passivation layer 28, and a back antireflection layer 30.
[0104] Preferably, the front surface field 12 is an n++ type doped layer.
[0105] Preferably, the n-type crystalline silicon substrate 10 is Cz-Si single-crystal silicon with a resistivity > 5 Ω·cm.
[0106] Preferably, the back electrode 32 includes a P-region electrode 32 corresponding to the P-type doped region of the crystalline silicon bottom cell and an N-region electrode 32 corresponding to the N-type doped region.
[0107] Preferably, the material of the P-region electrode 32 and / or the N-region electrode 32 is silver or copper.
[0108] Furthermore, the crystalline silicon bottom cell is a TBC cell, and the back contact doped region is an alternating arrangement of n-type doped polycrystalline silicon region, isolation region, and p-type doped polycrystalline silicon region; wherein the n-type doped polycrystalline silicon region includes a 1 nm thick tunneling oxide layer and a 200 nm thick n-type doped polycrystalline silicon layer, and the p-type doped polycrystalline silicon region includes a 1.5 nm thick tunneling oxide layer and a 300 nm thick p-type doped polycrystalline silicon layer.
[0109] Furthermore, the crystalline silicon bottom cell is a HIBC cell, and the back contact doped region is an alternating p-type doped amorphous silicon region, an isolation region, and an n-type doped polycrystalline silicon region; wherein the p-type doped amorphous silicon region includes an intrinsic amorphous silicon layer and a p-type doped amorphous silicon layer with a total thickness of 200 nm, and the n-type doped polycrystalline silicon region includes a 1 nm thick tunneling oxide layer and a 200 nm thick n-type doped polycrystalline silicon layer.
[0110] Furthermore, the back passivation layer 28 is a 4nm thick AlOx layer; the back antireflection layer 30 is a 60-65nm thick SiN layer, a 12-15nm thick SiON layer, and a 35nm thick SiO2 layer stacked sequentially; wherein the refractive index of the SiN layer is 1.98-2.05, the refractive index of the SiON layer is 1.80-1.85, and the refractive index of the SiO2 layer is 1.45-1.47.
[0111] This invention employs a multi-chamber ALD process to prepare a perovskite absorber layer 18. Based on the self-limiting surface reaction characteristics of ALD, a uniform, dense, and pinhole-free perovskite thin film can be formed on a crystalline silicon substrate with a textured surface, unaffected by the substrate morphology. This effectively solves the problem of uneven film formation on textured substrates in solution-based processes, significantly reduces film defects and leakage current, and reduces carrier recombination losses.
[0112] This invention employs a controlled-rate cooling in-situ annealing process. After ALD deposition, the perovskite film crystallization annealing is simultaneously completed in the deposition chamber by controlling the cooling rate of 2~3℃ / min. This eliminates the need for additional annealing equipment and post-processing steps, significantly simplifying the preparation process and reducing production costs. At the same time, the slow low-temperature cooling process promotes the diffusion of hydrogen into the crystalline silicon bottom cell, helping to improve the surface passivation effect of the bottom cell and further optimizing the overall performance of the tandem cell.
[0113] This invention precisely controls the composition of the perovskite absorber layer 18, using FA + and Cs + Mixing A-site cations suppresses phase separation in the perovskite film, significantly improving the long-term stability of the battery. By adjusting the I / Br ratio, the band gap of the perovskite layer is precisely controlled at 1.77~1.80 eV, achieving a perfect match with the band gap of the crystalline silicon bottom cell, maximizing the photoelectric conversion efficiency of the tandem cell.
[0114] This invention optimizes the structural design of the carrier transport layer, employing a double-layer hole transport layer of NiOx and Me-4PACz16, which perfectly matches the valence band of the perovskite layer. This simultaneously achieves both surface passivation and hole selection functions, reducing the interface defect density to 102. 11 cm -2 The SnO2 electron transport layer 20 prepared by ALD, combined with PEIE interface modification, exhibits excellent conduction band matching with the perovskite layer, high electron mobility, and can effectively reduce interface recombination, thereby increasing the open-circuit voltage of the battery by 50~80mV.
[0115] The fully back-contact three-terminal stacked structure designed in this invention leads both the top electrode 32 and the P / N electrode 32 of the bottom battery to the back surface of the battery, with no metal electrodes 32 on the front side. This reduces the front-side light-shielding loss from the traditional 5-8% to below 2%, and increases the short-circuit current density by 1-2 mA / cm². 2 Battery efficiency is improved by 1.5-2%; at the same time, the three-terminal structure does not require strict current matching, which solves the problem of current mismatch in two-terminal stacked batteries, improves the working stability of the battery in different environments, and adapts to the needs of industrial applications.
[0116] The preparation method of this invention is highly compatible with existing photovoltaic mass production processes, does not require a large number of new special equipment, has strong process controllability and high yield, and produces perovskite cells and three-terminal tandem cells with high photoelectric conversion efficiency, excellent long-term stability, and low production cost, making it suitable for large-scale promotion and application.
[0117] The present invention is further illustrated below with specific embodiments and comparative examples. However, it should be understood that these embodiments are merely for illustrative purposes and should not be construed as limiting the invention in any way. Unless otherwise specified, the raw materials used in the embodiments and comparative examples of the present invention were carried out under conventional conditions or conditions recommended by the manufacturer. Reagents or instruments used, unless otherwise specified, are all commercially available conventional products.
[0118] In the embodiments and comparative examples of this invention, the substrate used is a single-crystal silicon wafer of size M10 with a thickness of 90 μm and a resistivity of 5-50 Ω·cm; all reagents are of photovoltaic grade purity and can be obtained through commercial channels.
[0119] Example 1 This embodiment provides a method for fabricating a perovskite solar cell. The fabricated cell has a pin structure, and the specific steps are as follows: 1. Select a crystalline silicon substrate 10 (pyramid height is 1μm), and deposit a NiOx hole transport layer 16 with a thickness of 20nm on the substrate surface using the ALD process at a deposition temperature of 120℃. After deposition, prepare a Me-4PACz layer with a thickness of 8nm on the surface of the NiOx layer using a spin coating process at a speed of 4000rpm and a spin coating time of 30s. Anneal at 100℃ for 5min to obtain a double-layer hole transport layer 16.
[0120] 2. Cs were fabricated on the surface of hole transport layer 16 using a multi-chamber ALD process. 0.17 FA 0.83 Pb(I 0.65 Br 0.35 3. The perovskite absorber layer 18 has a thickness of 500 nm and a band gap of 1.78 eV. The specific process steps are as follows: 2.1 Pre-vacuuming and heating: Place the substrate with the hole transport layer 16 deposited on it into the ALD equipment and evacuate it to 5 × 10⁻⁶. - 4 Pa, simultaneously heated to 140℃ at a heating rate of 5℃ / min, and held at that temperature for 10s.
[0121] 2.2 First purge: High-purity N2 was used to purge the substrate surface at a gas flow rate of 2000 sccm for 30 seconds.
[0122] 2.3 Pb source pulse deposition: The substrate is transferred into the first chamber, and Pb(NMe2)2 precursor is introduced. The source flow rate is 1300 sccm, the carrier gas N2 flow rate is 700 sccm, and the pulse time is 25s, forming a Pb source monomolecular adsorption layer on the substrate surface.
[0123] 2.4 Second purge: The substrate is transferred into the second chamber and purged with high-purity N2 at a flow rate of 2200 sccm for 8 seconds to remove unadsorbed Pb precursor.
[0124] 2.5 Perovskite precursor reactive deposition: The substrate is transferred into the third chamber, and a mixed precursor gas of CsI, FAI, PbI2, and PbBr2 is introduced with a molar ratio of 0.17:0.83:0.65:0.35, a source flow rate of 1500 sccm, a carrier gas N2 flow rate of 700 sccm, and an introduction time of 25 s. The gas reacts with the Pb source monolayer in a self-confined surface reaction to form a perovskite monolayer.
[0125] 2.6 Third purge: The substrate is transferred to the fourth chamber and purged with high-purity N2 at a flow rate of 2200 sccm for 8 seconds to remove unreacted precursors and byproducts.
[0126] 2.7 Cyclic deposition: Repeat steps 2.3 to 2.6 for 600 cycles to obtain a 500 nm thick perovskite film.
[0127] 2.8 Post-purging: High-purity N2 is used to purge the substrate surface at a gas flow rate of 2800 sccm for 40 seconds.
[0128] 2.9 In-situ annealing: Turn off the heating and control the cooling rate at 2.5℃ / min. Cool the furnace to room temperature to complete the in-situ annealing and obtain a dense crystalline perovskite absorber layer 18.
[0129] 3. A SnO2 electron transport layer 20 with a thickness of 15 nm was prepared on the surface of the perovskite absorber layer 18 using the ALD process at a deposition temperature of 100 °C. Subsequently, a PEIE modification layer with a thickness of 1 nm was prepared on the surface of the SnO2 layer using a spin coating process at a speed of 3000 rpm for a spin coating time of 30 s, followed by annealing at 80 °C for 3 min.
[0130] 4. A molybdenum oxide buffer layer with a thickness of 15 nm was prepared on the surface of the electron transport layer 20 using an electron beam evaporation process; subsequently, an ITO transparent conductive layer 22 with a thickness of 100 nm was prepared using a magnetron sputtering process to obtain a pin-structured perovskite solar cell.
[0131] Example 2 This embodiment provides a method for fabricating a perovskite solar cell, which differs from Embodiment 1 only in that: In step 2 of the ALD process, the Pb precursor is Pb(dpm)2, the source flow rate is 1400 sccm, the mixed precursor gas source flow rate is 1600 sccm, and the cooling rate in step 2.9 is 3℃ / min; the electron transport layer 20 in step 3 is a SnO2:TiO2 composite layer 14 with a SnO2 to TiO2 mass ratio of 7:3, a thickness of 15 nm, and no PEIE modification layer.
[0132] The remaining steps and parameters are the same as in Example 1, and perovskite solar cells are obtained.
[0133] Example 3 This embodiment provides a method for fabricating a perovskite solar cell. The fabricated cell has a nip structure, and the specific steps are as follows: 1. Select a crystalline silicon substrate 10 and use the ALD process to prepare a SnO2 electron transport layer 20 with a thickness of 15nm on the substrate surface at a deposition temperature of 100℃. Then, use a spin coating process to prepare a PEIE modification layer with a thickness of 1nm on the SnO2 layer surface at a rotation speed of 3000rpm, a spin coating time of 30s, and annealing at 80℃ for 3min.
[0134] 2. Same as the steps in Example 1.
[0135] 3. A NiOx hole transport layer 16 with a thickness of 20 nm was deposited on the surface of the perovskite absorber layer 18 using the ALD process at a deposition temperature of 120 °C. After deposition, a Me-4PACz layer with a thickness of 8 nm was prepared on the surface of the NiOx layer using a spin coating process at a speed of 4000 rpm and a spin coating time of 30 s. The layer was then annealed at 100 °C for 5 min to obtain the double-layer hole transport layer 16.
[0136] 4. Same as the steps in Example 1.
[0137] Example 4 This embodiment provides a method for fabricating a perovskite solar cell. The difference from Embodiment 1 is that the pyramid height of the crystalline silicon substrate 10 is 6 μm. The remaining steps are the same as in Embodiment 1 and will not be repeated here.
[0138] Example 5 This embodiment provides a method for fabricating a perovskite solar cell. The difference from Embodiment 1 is that the pyramid height of the crystalline silicon substrate 10 is 12 μm. The remaining steps are the same as in Embodiment 1 and will not be repeated here.
[0139] Example 6 This embodiment provides a method for preparing a perovskite solar cell. The difference from Embodiment 1 is that the cooling annealing rate in step 2.9 is 1℃ / min. The remaining steps are the same as in Embodiment 1 and will not be repeated here.
[0140] Example 7 This embodiment provides a method for preparing a perovskite solar cell. The difference from Embodiment 1 is that the cooling annealing rate in step 2.9 is 5°C / min. The remaining steps are the same as in Embodiment 1 and will not be repeated here.
[0141] Comparative Example 1 This comparative example provides a method for preparing a perovskite solar cell. The only difference from Example 1 is that step 2 uses a spin coating process to prepare the perovskite absorber layer 18 instead of an ALD process. After spin coating, the perovskite absorber layer is annealed at 140°C for 10 minutes. All other steps and parameters are the same as in Example 1.
[0142] Comparative Example 2 This comparative example provides a method for preparing a perovskite solar cell. The only difference from Example 1 is that after the ALD deposition in step 2 is completed, the cell is directly and rapidly cooled to room temperature without an in-situ annealing step. After removal, it is annealed for an additional 10 minutes in a nitrogen atmosphere at 140°C. All other steps and parameters are the same as in Example 1.
[0143] Application Examples 1-7 This application example provides a three-terminal tandem solar cell, with the following configuration from the light-receiving surface to the back-lighting surface: Transparent substrate: Ultra-white tempered glass, 3.2mm thick.
[0144] Top electrode 32: ITO layer, 40 nm thick, fabricated by magnetron sputtering.
[0145] Perovskite top cell: corresponding to the perovskite solar cells prepared in Examples 1-7.
[0146] Composite layer 14: consists of a 50 nm thick ITO layer and a 6 nm thick MoOx layer, fabricated by magnetron sputtering.
[0147] Crystalline silicon bottom cell: TBC back contact cell, comprising, in sequence, a front surface field 12 (20nm n++ type doped layer), an n-type crystalline silicon substrate 10 (130μm Cz-Si, resistivity 6Ω·cm), a back contact doped region (alternating n-type doped polycrystalline silicon region, isolation region, and p-type doped polycrystalline silicon region; the n-type doped polycrystalline silicon region consists of a 1nm SiO2 tunneling layer and a 200nm n-type doped polycrystalline silicon layer, and the p-type doped polycrystalline silicon region consists of a 1.5nm SiO2 tunneling layer and a 300nm p-type doped polycrystalline silicon layer), a back passivation layer 28 (4nm AlOx layer), and a back antireflection layer 30 (62nm SiN layer, refractive index 2.0; 13nm SiON layer, refractive index 1.82; 35nm SiO2 layer, refractive index 1.46). Back electrode 32: includes a P-region silver electrode 32 corresponding to the p-type doped region and an N-region silver electrode 32 corresponding to the n-type doped region.
[0148] The stacked battery in this embodiment has a full back contact three-terminal structure. The top electrode 32, P-region electrode 32, and N-region electrode 32 are all led out to the back surface of the battery to form three independent electrode terminals 32.
[0149] Application Example 8 This application example provides a three-terminal tandem solar cell, which differs from Application Example 1 only in that: The crystalline silicon bottom cell is a HIBC back contact cell. The back contact doped region consists of alternating p-type doped amorphous silicon region 26, isolation region, and n-type doped polycrystalline silicon region 25. Among them, the p-type doped amorphous silicon region 26 consists of ia-Si:H layer and pa-Si:H layer with a total thickness of 200nm, and the n-type doped polycrystalline silicon region 25 consists of 1nm SiO2 tunneling layer and 200nm n-type doped polycrystalline silicon layer. The remaining structure and parameters are the same as in Application Example 1.
[0150] Comparative application examples 1-2 These comparative application examples provide a three-terminal tandem solar cell. The difference between these examples and Application Example 1 is that the perovskite top cell uses the perovskite solar cell provided in Comparative Examples 1-2. The remaining steps are the same as in Application Example 1 and will not be repeated here.
[0151] Test case The following performance tests were conducted on the batteries prepared for the above application examples and the comparative application examples: 1. Photoelectric performance testing: under AM1.5G standard spectrum, 1000W / m 2 Under light intensity and a test temperature of 25°C, the open-circuit voltage Voc (mV) and short-circuit current density Jsc (mA / cm²) of the solar cell were measured using an IV tester. 2 ), fill factor FF (%), photoelectric conversion efficiency Eff (%).
[0152] 2. Interface defect density test: The interface defect density of the battery is tested using thermal conductivity spectroscopy, and the unit is cm⁻¹. -2 .
[0153] 3. Stability test: The battery is placed in a constant temperature and humidity chamber at 85℃ and 85% for 1000 hours of continuous aging, and the efficiency retention rate of the battery after aging is tested.
[0154] The test results are shown in Table 1 below: Table 1
[0155] As can be seen from Table 1, compared with Application Example 1, the perovskite film deposited by ALD has significantly better crystallinity, density, and uniformity than the film prepared by spin coating. The interface defect density is 5 orders of magnitude lower than that of the comparative example, the cell conversion efficiency is 3.35% higher, and the stability is also significantly better than that of the perovskite film prepared by spin coating.
[0156] Comparing Application Example 1 and Application Example 3, although the electrical performance of the NIP structure is similar to that of the PIN structure, the efficiency retention rate of the NIP structure after the double 85 test is significantly lower than that of the PIN structure because the electron transport layer 20 of the NIP structure is easily catalyzed by light to decompose the perovskite layer.
[0157] Compared with Application Examples 4 and 5, Application Example 1 shows that the light-trapping property deteriorates after the size of the velvet pyramid becomes abnormally large, thus Jsc is significantly reduced.
[0158] Application Example 8: HIBC uses amorphous silicon passivation in the P-region, which reduces J0 to <1 fA / cm. 2 It is much lower than the ~5fA / cm of p-poly. 2 The battery performance showed that Voc and FF were slightly higher than those of the TBC structure; Application Examples 2 / 6 / 7 had suboptimal composition or preparation process, resulting in poor perovskite film quality. Consequently, their performance and stability were inferior to Application Example 1.
[0159] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A method for preparing a perovskite solar cell, characterized in that, First, a first transport layer is prepared on the surface of a silicon substrate. Then, an atomic layer deposition (ALD) process is used to generate a perovskite thin film on the surface of the first transport layer, followed by in-situ annealing to obtain a perovskite absorber layer. Next, a second transport layer, a buffer layer, and a transparent conductive layer are sequentially prepared on the surface of the perovskite absorber layer to obtain a perovskite solar cell.
2. The preparation method according to claim 1, characterized in that, The ALD process specifically includes: S1. Place the substrate with the first transport layer deposited into the ALD device, evacuate, heat up and keep it at that temperature, and then use an inert gas to perform the first purging on the substrate surface. S2, followed by Pb source pulse deposition, then second purging, perovskite precursor reactive deposition, and third purging; S3. Repeat S2 until the perovskite film reaches the preset thickness, and then the perovskite film is obtained. Preferably, the Pb source includes Pb(NMe2)2 or Pb(dpm)2.
3. The preparation method according to claim 1, characterized in that, The perovskite solar cell has a pin structure; the first transport layer is a hole transport layer. Preferably, the hole transport layer is made of NiO. x At least one of PTAA, PEDOT:PSS, Spiro-OMeTAD, CuI, and CuSCN; Preferably, the thickness of the hole transport layer is 5~50 nm; Preferably, the perovskite solar cell has a nip structure; the first transport layer is an electron transport layer; Preferably, the electron transport layer is made of TiO2, SnO2, ZnO, or C. 60 At least one of them; Preferably, the thickness of the electron transport layer is 5~50nm.
4. The preparation method according to any one of claims 1 to 3, characterized in that, The material formula of the perovskite absorber layer is ABX3; Wherein, A is an organic cation or a monovalent metal cation; B is a divalent metal cation; and X is a halogen or pseudohalogen group. Preferably, A is selected from CH3NH3. + NH2CH=NH2 + FA + MA + Cs + 、Rb + At least one of them; Preferably, the B is selected from Pb. 2+ Sn 2+ 、Sr 2+ Cu 2+ At least one of them; Preferably, X is selected from Cl - ,Br - I - SCN - At least one of them.
5. The preparation method according to any one of claims 1 to 3, characterized in that, The material of the perovskite absorber layer is Cs. 0.17 FA 0.83 Pb(I 0.65 Br 0.35 )3; band gap is 1.77~1.80 eV; Preferably, the thickness of the perovskite absorber layer is 300~2000 nm; Preferably, after the atomic layer deposition (ALD) process, the cooling rate is controlled at 2~3℃ / min; the furnace is cooled to room temperature to complete in-situ annealing.
6. The preparation method according to any one of claims 1 to 3, characterized in that, When the perovskite solar cell has a pin structure, the second transport layer is an electron transport layer; Preferably, the electron transport layer is made of TiO2, SnO2, ZnO, or C. 60 At least one of them; Preferably, the electron transport layer is made of SnO2; has a thickness of 10-20 nm; and has a PEIE modification layer on its surface; the PEIE modification layer has a thickness of 1-2 nm. Preferably, the electron transport layer is made of SnO2 and TiO2; the mass ratio of SnO2 to TiO2 is 7:3; Preferably, when the perovskite solar cell has a nip structure, the second transport layer is a hole transport layer; Preferably, the hole transport layer is made of NiO. x At least one of PTAA, PEDOT:PSS, Spiro-OMeTAD, CuI, and CuSCN; Preferably, the thickness of the hole transport layer is 5~50nm.
7. The preparation method according to any one of claims 1 to 3, characterized in that, The material of the buffer layer includes at least one of molybdenum oxide, tin oxide, vanadium oxide, and tungsten oxide; Preferably, the thickness of the buffer layer is 10~20nm; Preferably, the transparent conductive layer is made of at least one of ITO, IZO, AZO, IWO, and In2O3; Preferably, the thickness of the transparent conductive layer is 80~120nm.
8. A perovskite solar cell, characterized in that, Prepared by the preparation method according to any one of claims 1-7; The perovskite solar cell has a pin structure, which includes, in sequence from the substrate side to the light-receiving surface side, a first transport layer, a perovskite absorption layer, a second transport layer, a buffer layer, and a transparent conductive layer. Wherein, the first transport layer is a hole transport layer; the second transport layer is an electron transport layer; or, The perovskite solar cell has a nip structure, which includes, from the substrate side to the light-receiving surface side, a first transport layer, a perovskite absorption layer, a second transport layer, a buffer layer, and a transparent conductive layer. The first transport layer is an electron transport layer; the second transport layer is a hole transport layer.
9. A three-terminal tandem solar cell, characterized in that, From the light-receiving surface to the back-light-receiving surface, it includes: a transparent substrate, a top electrode, a perovskite top cell, a composite layer, a crystalline silicon bottom cell, and a back electrode. Wherein, the perovskite top cell is the perovskite solar cell according to claim 8; The crystalline silicon bottom cell is a back-contact crystalline silicon cell; The three-terminal tandem solar cell has a fully back-contact three-terminal structure, with the top electrode, the P-type electrode of the crystalline silicon bottom cell, and the N-type electrode all led out to the back surface of the cell, forming three independent electrode terminals.
10. The three-terminal tandem solar cell according to claim 9, characterized in that, The top electrode is an ITO layer; Preferably, the composite layer comprises an ITO layer and a MoOx layer sequentially from the light-receiving surface to the backlighting surface; Preferably, the crystalline silicon bottom cell sequentially comprises a front surface field, an n-type crystalline silicon substrate, a back contact doped region, a back passivation layer, and a back antireflection layer; Preferably, the front surface field is an n++ type doped layer; Preferably, the n-type crystalline silicon substrate is Cz-Si single-crystal silicon with a resistivity > 5 Ω·cm; Preferably, the back electrode includes a P-region electrode corresponding to the P-type doped region of the crystalline silicon bottom cell and an N-region electrode corresponding to the N-type doped region; Preferably, the material of the P-region electrode and / or the N-region electrode is silver or copper.