A solar cell and a manufacturing method thereof, a photovoltaic module

Abstract

This disclosure relates to the photovoltaic field, and particularly to a solar cell and its manufacturing method, and a photovoltaic module. The solar cell includes: a substrate comprising a first surface and a second surface, and a third surface connecting the first and second surfaces; the first surface comprising a first region and a second region; the second region being located on the side of the first surface closer to the third surface, and having a width of 100 μm to 500 μm along a first direction; a tunneling layer located in the first region; a doped conductive region located on the side of the tunneling layer away from the substrate; multiple electrodes arranged along the first direction, extending along a second direction and located in the first region, and electrically connected to the doped conductive region; a first passivation portion located in the first and second regions, and located on the side of the doped conductive region away from the tunneling layer; and a second passivation portion located on the third surface and at least in the second region, and located on the side of the first passivation portion away from the substrate, which can at least improve the photoelectric conversion efficiency of the solar cell.

Description

Technical Field

[0001] This disclosure relates to the photovoltaic field, and in particular to a solar cell and its manufacturing method, and a photovoltaic module. Background Technology

[0002] Photovoltaic power generation refers to the conversion of solar energy into electrical energy through the photovoltaic effect of semiconductors. For example, TOPCON (Tunnel Oxide Passivated Contact) cells have received increasing attention due to their better photoelectric conversion performance.

[0003] TOPCON solar cells are a type of tunneling oxide passivated contact solar cell technology based on the selective carrier principle. In TOPCON solar cells, selective carrier transport is achieved by forming a passivated contact structure on the substrate surface. The passivated contact structure includes a tunneling layer and a doped conductive layer.

[0004] The manufacturing process of solar cells involves cutting a whole cell into multiple sub-cells. The cut surfaces of the cells have a damaged layer. If the damaged layer is not removed, it will form recombination centers in subsequent processes, affecting the photoelectric conversion efficiency of the solar cell. Summary of the Invention

[0005] This disclosure provides a solar cell and its manufacturing method, as well as a photovoltaic module, which can at least improve the photoelectric conversion efficiency of the solar cell.

[0006] This disclosure provides a solar cell, comprising: a substrate including a first surface and a second surface, and a third surface connecting the first surface and the second surface; the first surface including a first region and a second region, the second region being located on the side of the first surface near the third surface, and having a width of 100 μm to 500 μm along a first direction; a tunneling layer located in the first region; a doped conductive region located on the side of the tunneling layer away from the substrate; a plurality of electrodes arranged along the first direction, the plurality of electrodes extending along a second direction and located in the first region, and electrically connected to the doped conductive region, the second direction being a direction intersecting the first direction; a first passivation portion located in the first region and the second region, and located on the side of the doped conductive region away from the tunneling layer; and a second passivation portion located on the third surface and at least in the second region, and located on the side of the first passivation portion away from the substrate.

[0007] Optionally, the material of the first passivation portion includes at least one of aluminum oxide, silicon nitride, magnesium oxide, or hafnium oxide.

[0008] Optionally, the material of the second passivation portion includes at least one of aluminum oxide, silicon nitride, silicon dioxide, doped polycrystalline silicon, or doped amorphous silicon.

[0009] Optionally, the thickness of the first passivation portion is 5nm to 12nm.

[0010] Optionally, the thickness of the second passivation portion is 40 nm to 60 nm.

[0011] Optionally, along the first direction, the width of the second passivation portion on the first surface is greater than 0 and less than or equal to 1.5 mm.

[0012] Optionally, the first region includes a plurality of first sub-regions and a plurality of second sub-regions; the tunneling layer is located at least on the first sub-region; the doped conductive region is located on the side of the tunneling layer corresponding to the first sub-region away from the substrate; the plurality of electrodes are located on the first sub-region and are electrically connected to the doped conductive region.

[0013] Optionally, the first surface includes a first area and a second area arranged along the first direction, or the first surface includes two second areas and a first area located between the two second areas.

[0014] Optionally, the doped conductive region includes a first doped portion and a second doped portion arranged alternately in the first direction, wherein the conductivity type of the first doped portion is different from that of the second doped portion; the plurality of electrodes includes a first electrode and a second electrode, wherein the first electrode is electrically connected to the first doped portion and the second electrode is electrically connected to the second doped portion.

[0015] This disclosure also provides a method for manufacturing a solar cell, comprising: obtaining a substrate including a first surface and a second surface, the first surface including a plurality of first regions and at least one second region arranged along a first direction; forming a tunneling layer located on the first surface; forming a doped conductive region located on the side of the tunneling layer away from the substrate; removing the doped conductive region and the tunneling layer located in the second region; forming a first passivation portion located in the first region and the second region; forming a plurality of electrodes located on the first region and electrically connected to the doped conductive region, the plurality of electrodes being arranged along the first direction and extending along a second direction, the second direction being a direction intersecting the first direction; cutting with the second region as a cutting area; and forming a second passivation portion located at least in the second region, and the second passivation portion being located on the side of the first passivation portion away from the substrate.

[0016] Optionally, the substrate further includes a third surface connected to the first surface and the second surface; forming the second passivation portion includes forming the second passivation portion in a portion of the third surface and the first surface.

[0017] Optionally, removing the doped conductive region and the tunneling layer located in the second region includes: using a laser scanning process to remove the doped conductive region and the tunneling layer located in the second region until the substrate is exposed.

[0018] Optionally, the process parameters of the laser scanning process include: a laser wavelength of 355nm~532nm and a power density of 1J / cm². 2 ~5J / cm 2 The spot size is 100μm~500μm.

[0019] Optionally, forming the second passivation portion includes: using a first deposition process to form the second passivation portion on the side of the first passivation portion away from the substrate; wherein the process parameters of the first deposition process include: a process temperature of 150°C to 220°C, and a precursor of trimethylaluminum and an aqueous solution.

[0020] This disclosure also provides a photovoltaic module, comprising: a battery string, which is formed by connecting a plurality of solar cells as described above, or by connecting a plurality of solar cells formed by a method for manufacturing solar cells as described above; an encapsulating film for covering the surface of the battery string; and a cover plate for covering the surface of the encapsulating film away from the battery string.

[0021] The technical solution provided in this disclosure has at least the following advantages: In the solar cell disclosed herein, the first surface of the substrate includes a first region and a second region. The second region is located on the side of the first surface closer to the third surface and has a width of 100 μm to 500 μm. A tunneling layer and a doped conductive region are disposed in the first region, and multiple electrodes are electrically connected to the doped conductive region. A first passivation portion covers the first and second regions and is located on the side of the doped conductive region away from the tunneling layer. A second passivation portion is located on the third surface and at least covers the second region, and is located on the side of the first passivation portion away from the substrate. The second passivation portion provides passivation protection for the third surface, which helps to reduce the surface state density of the third surface and suppress carrier recombination on the third surface. Simultaneously, in the second region, the first passivation portion and the second passivation portion form a stacked structure, further enhancing the passivation effect of the second region, effectively reducing interfacial recombination, and improving the photoelectric conversion efficiency of the solar cell. Attached Figure Description

[0022] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0023] Figure 1 This is a schematic diagram of the structure of a first type of solar cell provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of the structure of a second type of solar cell provided in an embodiment of this disclosure; Figure 3 This is a schematic diagram of the structure of a third type of solar cell provided in an embodiment of this disclosure; Figure 4 This is a schematic diagram of the structure of a fourth type of solar cell provided in an embodiment of this disclosure; Figure 5 A schematic flowchart illustrating a method for manufacturing a solar cell according to an embodiment of this disclosure; Figure 6 A schematic diagram of the substrate structure in the manufacturing method of the solar cell provided in this disclosure embodiment; Figure 7 In order to be in Figure 6 A schematic diagram of the structure after the tunneling layer is formed on the structure shown; Figure 8 In order to be in Figure 7 A schematic diagram of the structure after the formation of doped conductive regions on the structure shown; Figure 9 In order to be in Figure 7 The diagram shows the structure after removing the doped conductive region and tunneling layer of the second region. Figure 10 In order to be in Figure 9 A schematic diagram of the structure after the first passivation portion is formed on the structure shown; Figure 11 In order to be in Figure 10 A schematic diagram of the structure after electrodes are formed on the shown structure; Figure 12 This is a partial three-dimensional structural diagram of a photovoltaic module provided in an embodiment of the present disclosure; Figure 13 for Figure 12 A schematic diagram of a cross-sectional structure along the cross-sectional direction NN1.

[0024] Explanation of reference numerals in the attached figures: Substrate 1, tunneling layer 2, doped conductive region 3, first passivation part 4, second passivation part 5, electrode 6, first surface 11, second surface 12, third surface 13, first region I, second region II, first sub-region 101, second sub-region 102, first doped part 31, second doped part 32, first electrode 61, second electrode 62, solar cell 100, encapsulating film 201, cover plate 202, conductive strip 203. Detailed Implementation

[0025] Currently, as photovoltaic modules are developed towards more segmented modules such as three-section and four-section modules, the cutting edge length per unit area has increased significantly. Laser cutting generates numerous defects and dangling bonds at the edges, forming strong recombination centers and significantly reducing cell efficiency.

[0026] To address the aforementioned issues, those skilled in the art perform additional passivation treatment on the edges after cutting. However, this type of treatment process has poor compatibility with the back passivation contact structure of TOPCon batteries, which can negatively impact battery performance.

[0027] To address this problem, this disclosure creatively proposes a solar cell that comprises a first region on a first surface of a substrate and a second region adjacent to a third surface. A tunneling layer, a doped conductive region, and an electrode are sequentially formed in the first region, and a first passivation layer covers both the first and second regions. A second passivation layer is located on the third surface and at least covers the second region, and is stacked on the side of the first passivation layer away from the substrate. This structure, on the one hand, passivates the third surface through the second passivation layer, reducing its surface state density; on the other hand, it forms a double-layer passivation stack in the second region, synergistically suppressing carrier recombination, thereby improving the photoelectric conversion efficiency of the cell.

[0028] In the description of the embodiments of this disclosure, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary or secondary relationship of the indicated technical features. In the description of the embodiments of this disclosure, "multiple" means two or more, unless otherwise explicitly defined. Similarly, "multiple sets" refers to two or more sets (including two sets), and "multiple pieces" refers to two or more pieces (including two pieces).

[0029] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this disclosure. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0030] In the description of the embodiments of this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0031] In the description of the embodiments of this disclosure, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the embodiments of this disclosure and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the embodiments of this disclosure. For example, if the device or element in the illustration is inverted, then the element described as "below," "under," "below," or "bottom" of other elements or features will be oriented "above" or "top" of said other elements or features. Therefore, the term "below" may, depending on the context in which the term is used, encompass both above and below orientations, which will be obvious to those skilled in the art. Materials may be oriented in other ways (e.g., rotated 90 degrees, inverted, flipped), and the spatial relative descriptive terms used herein may be interpreted accordingly.

[0032] In the description of the embodiments of this disclosure, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of this disclosure according to the specific circumstances.

[0033] In the accompanying drawings corresponding to the embodiments of this disclosure, the thickness and / or area of ​​layers, films, panels, regions, etc., are enlarged for better understanding and ease of description. Throughout the specification, the same reference numerals denote the same elements. It should be understood that when describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component may be "directly" located on the surface of the other component, or there may be an intermediate component between the two components. Conversely, when describing a component on the surface of another component, or a component "directly" on another component, or a component surface on which another component is formed or disposed, it indicates that there is no intermediate component between the two components. Furthermore, when describing a component as "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0034] In the description of the embodiments of this disclosure, when a component "includes" another component, other components are not excluded unless otherwise stated, and may be further included. The formation or placement of a second component above or on a first component, or on the surface of a first component, or on one side of a first component, may include embodiments where the first and second components are in direct contact, and may also include embodiments where an additional component may be placed between the first and second components, thereby preventing direct contact between the first and second components. For simplicity and clarity, various components may be drawn at different scales. In the drawings, some layers / components may be omitted for simplicity. Unless otherwise specified, the formation or placement of a second component on the surface of a first component refers to direct contact between the first and second components. The term "component" can refer to a layer, film, region, portion, structure, etc.

[0035] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "component" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0036] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this disclosure to facilitate a better understanding of the disclosure. However, the technical solutions claimed in this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0037] Figure 1 This is a schematic diagram of the structure of a solar cell provided in an embodiment of this disclosure.

[0038] refer to Figure 1 The solar cell includes: a substrate 1, a tunneling layer 2, a doped conductive region 3, a first passivation portion 4, a second passivation portion 5, and an electrode 6.

[0039] The substrate 1 includes a first surface 11 and a second surface 12, and a third surface 13 connecting the first surface 11 and the second surface 12. The first surface 11 includes a first region I and a second region II. The second region II is located on the side of the first surface 11 close to the third surface 13, and the width of the second region II along the first direction X is 100μm~500μm. The tunneling layer 2 is located in the first region I. The doped conductive region 3 is located on the side of the tunneling layer 2 away from the substrate 1. Multiple electrodes 6 are arranged along the first direction X, and the multiple electrodes 6 extend along the second direction and are located in the first region I, and are electrically connected to the doped conductive region 3. The second direction is the direction intersecting the first direction X. The first passivation portion 4 is located in the first region I and the second region II, and the first passivation portion 4 is located on the side of the doped conductive region 3 away from the tunneling layer 2. The second passivation portion 5 is located on the third surface 13 and at least in the second region II, and the second passivation portion 5 is located on the side of the first passivation portion 4 away from the substrate 1.

[0040] It should be noted that solar cells can be segmented cells obtained by cutting a whole cell. The third surface 13 can be the cutting surface of the segmented cell. The third surface 13 has a large number of defects and dangling bonds, which can easily lead to carrier recombination.

[0041] For those skilled in the art, the first surface 11 can be divided into a first region I and a second region II. The second region II is the cutting line area, which can be understood as a narrow band area adjacent to the inner side of the cutting line.

[0042] In battery graphic design, the outermost main grid electrode line is called the "border line". To ensure printing accuracy and avoid cutting the electrodes, the border line must be placed a certain distance inside the cutting line. That is to say, the position and size of the second zone II are determined based on the position of the border line in the segmented battery graphic design, and the border line is generally required to be outside the cutting area.

[0043] In some embodiments, the distance between the border line and the cutting area is greater than or equal to 100 μm.

[0044] If the width of the second zone II is too small, it cannot effectively cover the cutting-affected area, resulting in insufficient passivation; if the width of the second zone II is too large, it occupies too much effective power generation area, reducing efficiency; the width of the second zone II is 100μm~500μm, which can balance process tolerance, electrode printing quality and edge passivation effect.

[0045] In some examples, the substrate 1 provided in this disclosure embodiment can be a silicon substrate, specifically an N-type or P-type monocrystalline silicon substrate or a polycrystalline silicon substrate. The solar cell can be an emitter and back passivated cell (PERC), a tunnel oxide passivated contact cell (TOPCon), an interdigitated back contact cell (IBC), etc. These are just examples and are not specifically limited.

[0046] Substrate 1 is used to receive incident light and generate photogenerated carriers. In some embodiments, substrate 1 may be a semiconductor substrate.

[0047] In some embodiments, the material of substrate 1 can be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material can be monocrystalline, polycrystalline, amorphous, or microcrystalline (a state simultaneously possessing both monocrystalline and amorphous states is called microcrystalline). For example, silicon can be at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0048] In some embodiments, the material of substrate 1 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanide, silicon carbide, gallium arsenide, indium gallium arsenide, perovskite, cadmium telluride, copper indium selenide, etc.

[0049] The substrate 1 can also be a sapphire substrate, a silicon substrate on an insulator, or a germanium substrate on an insulator.

[0050] Substrate 1 can be either an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type dopant element, which can be any one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). The P-type semiconductor substrate is doped with a P-type dopant element, which can be any one of group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0051] Base 1 has a front and a back facing each other.

[0052] It is understood that in some embodiments, the first surface 11 can serve as the back side of the substrate, and the second surface 12 can serve as the front side of the substrate.

[0053] In some embodiments, the solar cell is a single-sided cell, where the front side of the substrate serves as the light-receiving surface to receive incident light, and the back side serves as the backlighting surface. In some embodiments, the solar cell is a bifacial cell, where both the front and back sides of the substrate can serve as light-receiving surfaces to receive incident light. It is understood that the backlighting surface referred to in the embodiments of this disclosure can also receive incident light, but the degree of reception of incident light is weaker than that of the light-receiving surface, and therefore it is defined as the backlighting surface.

[0054] In some embodiments, a texturing process can be performed on at least one of the front or back surfaces of the substrate 1 to form a textured surface on at least one of the front or back surfaces of the substrate 1. This can enhance the absorption and utilization rate of incident light on the front and back surfaces of the substrate 1. In some embodiments, the textured surface can be a pyramid textured surface. As a common textured surface, pyramid textured surface not only reduces the reflectivity of the substrate surface but also forms light traps, enhancing the absorption effect of the substrate on incident light and improving the photoelectric conversion efficiency of the solar cell.

[0055] Specifically, if the solar cell is a single-sided cell, a textured surface, such as a pyramidal textured surface, can be formed on the light-receiving surface of the substrate 1, while the back-lighting surface of the substrate can be a polished surface, meaning the back-lighting surface of the substrate is flatter than the light-receiving surface. It should be noted that for single-sided cells, a textured surface can also be formed on both the light-receiving and back-lighting surfaces of the substrate.

[0056] If the solar cell is a bifacial cell, a textured surface can be formed on both the light-receiving side and the back-lighting side of the substrate 1.

[0057] In some embodiments, the passivated contact structure is located in the first region I, and the passivated contact structure can form band bending in the first region I to achieve selective transport of charge carriers.

[0058] The passivated contact structure includes a tunneling layer 2 and a doped conductive region 3. The tunneling layer 2 is located in the first region I, and the doped conductive region 3 is located on the surface of the tunneling layer 2.

[0059] The dopant concentration in the doped conductive region 3 is higher than that in the substrate 1, forming a sufficiently high potential barrier in the first region I. This barrier induces band bending in the first region I, enabling the aggregation of majority carriers and the depletion of minority carriers, thus reducing carrier recombination. The tunneling layer 2 causes an asymmetric shift in the band structure of the first region I, making the barrier for majority carriers lower than that for minority carriers. Therefore, majority carriers can easily tunnel through the tunneling layer 2 to the doped conductive region 3, while minority carriers have difficulty passing through the tunneling layer 2, achieving selective carrier transport. Furthermore, the tunneling layer 2 also provides chemical passivation. Specifically, due to interface state defects at the interface between the substrate 1 and the tunneling layer 2, the interface state density in the first region I is high. This increased interface state density promotes recombination of photogenerated carriers, reducing the fill factor, short-circuit current, and open-circuit voltage of the solar cell, thereby resulting in lower photoelectric conversion efficiency.

[0060] The tunneling layer 2 is located in the first region I, so that the tunneling layer 2 has a chemical passivation effect on the first region I. Specifically, by saturating the dangling bonds in the first region I, the defect state density of the first region I is reduced, and the recombination centers on the surface of the substrate 1 are reduced, thereby reducing the carrier recombination rate.

[0061] In some embodiments, the material of the tunneling layer 2 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or magnesium fluoride.

[0062] The doped conductive region 3 also serves as a field passivation effect. Specifically, the doped conductive region 3 forms an electrostatic field pointing towards the interior of the substrate 1 in the first region I, causing minority carriers to escape from the interface, thereby reducing the minority carrier concentration and decreasing the carrier recombination rate at the interface of the substrate 1. This increases the open-circuit voltage, short-circuit current, and fill factor of the solar cell, thus improving the photoelectric conversion efficiency of the solar cell.

[0063] The material doped with conductive region 3 may include at least one of amorphous silicon, polycrystalline silicon, or silicon carbide.

[0064] The conductive region 3 can be doped with doping elements of the same type as the substrate 1. For example, if the substrate is doped with P-type doping elements, the conductive region 3 can also be doped with P-type doping elements; if the substrate is doped with N-type doping elements, the conductive region 3 can also be doped with N-type doping elements.

[0065] It can be seen that the passivated contact structure provides good surface passivation for the first region I. The tunneling layer 2 allows majority carriers to tunnel into the doped conductive region 3 while blocking minority carrier recombination. This allows the majority carriers to be transported laterally in the doped conductive region 3 and collected by the metal electrode, thereby greatly reducing the metal contact recombination current and improving the open-circuit voltage and short-circuit current of the solar cell.

[0066] The solar cell may further include a first passivation portion 4, which is located in the first region I and the second region II, and is located on the side of the doped conductive region 3 away from the tunneling layer 2. That is, the first passivation portion 4 is located on the surface of the doped conductive region 3 and the surface of the substrate 1 corresponding to the second region II.

[0067] The first passivation part 4 can effectively passivate the first surface 11. For example, it can chemically passivate the dangling bonds of the first surface 11, saturate the dangling bonds of the first surface 11, reduce the defect state density of the first surface 11, and suppress carrier recombination of the first surface 11.

[0068] The solar cell may also include a second passivation portion 5, which is located on the third surface 13 and at least in the second region II, and is located on the side of the first passivation portion 4 away from the substrate 1.

[0069] The second passivation part 5 is located on the third surface 13 and can play a good passivation role on the third surface 13. For example, it can perform good chemical passivation on the dangling bonds of the third surface 13, saturate the dangling bonds of the third surface 13, reduce the defect state density of the third surface 13, and suppress carrier recombination of the third surface 13.

[0070] The second passivation portion 5 is located at least in the second region II. Specifically, the second passivation portion 5 covers at least a part or all of the second region II. Since the second region II does not have a passivation contact structure, its surface passivation capability is relatively weak. Therefore, by forming a stacked structure between the first passivation portion 4 and the second passivation portion 5 in the second region II, the local passivation effect can be effectively enhanced, compensating for the missing passivation contact function, thereby suppressing carrier recombination.

[0071] In some cases, the second passivation section 5 can also extend into a portion of the first region I. This design forms continuous passivation protection from the first surface 11 to the third surface 13, significantly reducing the edge recombination rate of the segmented cell.

[0072] The solar cell also includes a plurality of electrodes 6 arranged at intervals along a first direction X. Each of the plurality of electrodes 6 extends along a second direction. The first direction X intersects the second direction and is parallel to the back surface. The first direction X and the second direction may be perpendicular to each other.

[0073] Multiple electrodes 6 are located on the surface of the first passivation part 4 and are electrically connected to the doped conductive region 3.

[0074] It should be noted that the electrical connection between the two actually means that both are made of conductive materials and are directly connected or connected through other conductive materials. Therefore, when the photovoltaic cell is generating electricity, there is an electrical connection between the two.

[0075] The majority carriers in the substrate 1 tunnel through the tunneling layer 2 into the doped conductive region 3. The majority carriers in the doped conductive region 3 are then transported to the electrode 6, which is in electrical contact with the doped conductive region 3, and are collected by the electrode 6.

[0076] The portion of the doped conductive region 3 that is in contact with the metal electrode is usually defined as the electrode region, and the portion of the doped conductive region 3 that is not in contact with the metal electrode is usually defined as the non-electrode region.

[0077] In some embodiments, the doping concentration in the electrode region is greater than that in the non-electrode region. This results in a lower sheet resistance in the electrode region compared to the non-electrode region. The electrode 6 is in electrical contact with the electrode region. Due to the lower sheet resistance of the electrode region, the contact resistance between the electrode 6 and the electrode region is also lower, enabling the formation of a better ohmic contact. This reduces metal-to-metal recombination between the electrode 6 and the electrode region, which is beneficial for improving the carrier collection capability of the electrode 6.

[0078] The lower concentration of doped elements in the non-electrode region results in a weaker parasitic absorption capacity of the non-electrode region for incident light. This reduces the parasitic absorption of incident light by the doped conductive layer in the non-electrode region and improves the absorption and utilization rate of the substrate for incident light.

[0079] In some embodiments, the material of electrode 6 may be a metal, such as copper, silver, nickel or aluminum.

[0080] In the solar cell disclosed herein, the first surface of the substrate includes a first region and a second region. The second region is located on the side of the first surface closer to the third surface and has a width of 100 μm to 500 μm. A tunneling layer and a doped conductive region are disposed in the first region, and multiple electrodes are electrically connected to the doped conductive region. A first passivation portion covers the first and second regions and is located on the side of the doped conductive region away from the tunneling layer. A second passivation portion is located on the third surface and at least covers the second region, and is located on the side of the first passivation portion away from the substrate. The second passivation portion provides passivation protection for the third surface, which helps to reduce the surface state density of the third surface and suppress carrier recombination on the third surface. Simultaneously, in the second region, the first passivation portion and the second passivation portion form a stacked structure, further enhancing the passivation effect of the second region, effectively reducing interfacial recombination, and improving the photoelectric conversion efficiency of the solar cell.

[0081] The embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings.

[0082] In some embodiments, the material of the first passivation portion 4 includes at least one of aluminum oxide, silicon nitride, magnesium oxide, or hafnium oxide.

[0083] The first passivation portion 4 can be a single-layer structure or a multi-layer structure. For a multi-layer structure, the materials of different layers can be different from each other, or some layers can be made of the same material but different from the materials of other layers. For example, the first passivation portion 4 can be a multi-layer structure of silicon nitride layer and aluminum oxide layer.

[0084] In some embodiments, the material of the second passivation portion 5 includes at least one of aluminum oxide, silicon nitride, silicon dioxide, doped polycrystalline silicon, or doped amorphous silicon.

[0085] The second passivation portion 5 can be a single-layer structure or a multi-layer structure. For a multi-layer structure, the materials of different layers can be different from each other, or some layers can be made of the same material but different from the materials of other layers. For example, the second passivation portion 5 can be a multi-layer structure of silicon nitride and aluminum oxide layers.

[0086] For example, both the first passivation portion 4 and the second passivation portion 5 can be made of aluminum oxide. The aluminum oxide layer has a high density of fixed negative charge, which can effectively repel minority carriers (electrons) from migrating to the cutting edge, thus suppressing surface recombination from a physical mechanism. After the slab battery is cut, the first passivation portion 4 and the second passivation portion 5 can be well connected, forming a continuous passivation protection between the third surface 13 and the first surface 11, which significantly reduces the carrier recombination rate in the edge region.

[0087] In some embodiments, the thickness of the first passivation portion 4 is 5nm to 12nm; for example, 5nm to 8nm, 8nm to 10nm, or 10nm to 12nm.

[0088] In some embodiments, the thickness of the first passivation portion 4 can be 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, or 12nm, etc.

[0089] When the thickness of the first passivation layer 4 is less than 5 nm, the film may be discontinuous, making it difficult to effectively cover the silicon surface and resulting in insufficient passivation. When the thickness of the first passivation layer 4 exceeds 12 nm, although good passivation can be achieved, it may introduce increased stress, higher process costs, or adverse effects on subsequent layer deposition. A thickness of 5 nm to 12 nm can ensure that alumina or other high-dielectric materials form a dense and continuous passivation layer, fully utilizing their field-effect passivation and chemical passivation capabilities, while also taking into account process feasibility and compatibility with the overall battery structure.

[0090] In some embodiments, the thickness of the second passivation portion 5 is 40nm to 60nm; for example, 40nm to 50nm, 50nm to 55nm, or 55nm to 60nm.

[0091] In some embodiments, the thickness of the first passivation portion 4 can be 40nm, 41nm, 42nm, 43nm, 44nm, 45nm, 46nm, 47nm, 48nm, 49nm, 50nm, 51nm, 52nm, 53nm, 54nm, 55nm, 56nm, 57nm, 58nm, 59nm, or 60nm, etc.

[0092] If the thickness of the second passivation portion 5 is less than 40 nm, it may be difficult to completely cover the surface roughness and defects generated during the cutting process, resulting in insufficient passivation. If the thickness of the second passivation portion 5 exceeds 60 nm, it may introduce problems such as excessive film stress, decreased adhesion, or increased process costs. A thickness of 40 nm to 60 nm can effectively saturate the dangling bonds of the third surface 13 and the second region II while ensuring good step coverage and density, and fully utilize the field-effect passivation effect of materials such as alumina.

[0093] In some embodiments, along the first direction X, the width of the second passivation portion 5 on the first surface 11 is greater than 0 and less than or equal to 1.5 mm; for example, it can be 0.1 mm, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, 0.9 mm, 1 mm, 1.1 mm, 1.2 mm, 1.3 mm, 1.4 mm, or 1.5 mm, etc.

[0094] If the width approaches 0, it cannot effectively cover the high-risk area near the cutting line, making it difficult to form continuous passivation; if the width exceeds 1.5mm, it will encroach on too much of the effective power generation area of ​​the battery surface, reducing short-circuit current and overall efficiency. By controlling the width of the second passivation part 5 on the first surface 11 to be greater than 0 and not more than 1.5mm, it can ensure that it fully covers the sensitive areas of the second region II and the adjacent third surface, while avoiding unnecessary shading or area loss of the main functional area.

[0095] refer to Figure 2 In some embodiments, the first region I includes a plurality of first sub-regions 101 and a plurality of second sub-regions 102; a tunneling layer is located at least on the first sub-region 101; a doped conductive region 3 is located on the side of the tunneling layer 2 corresponding to the first sub-region 101 away from the substrate 1; a plurality of electrodes 6 are located on the first sub-region 101 and are electrically connected to the doped conductive region 3.

[0096] For those skilled in the art, the first region I can be divided into multiple first sub-regions 101 and multiple second sub-regions 102, wherein the first sub-region 101 is generally used to refer to the relative region in which the electrode 6 is formed in the subsequent metallization process, and the second sub-region 102 is generally used to refer to other regions besides the first sub-region 101.

[0097] The second subregion 102 does not have a tunneling layer 3 and a doped conductive region 3, so as to reduce the parasitic absorption effect of the second subregion 102 on carrier transport, so that more photons can be transported to the substrate 1, thereby increasing the short-circuit current.

[0098] refer to Figures 1 to 2 In some embodiments, the first surface 11 includes a first region I and a second region II arranged along a first direction; or, referring to Figure 3 The first side 11 includes two second zones II and a first zone I located between the two second zones II.

[0099] The two layouts described above correspond to different battery slab design requirements: When the battery is cut on one side, such as when only one side of the edge is cut, a second region II can be set on the first surface 11, located on the side of the first region I near the third surface 13; when the battery is cut on both sides, such as when it is slab-cut in the middle and both sides are cut, a second region II is set on each side of the first surface 11, with the first region I sandwiched between the two second regions II. The second region II always corresponds to the area adjacent to the future cutting line and is used to deploy the enhanced passivation structure, while the first region I serves as the main photoelectric conversion area, carrying the tunneling layer 2, the doped conductive region 3, and the electrode 6.

[0100] refer to Figure 4 In some embodiments, the doped conductive region 3 includes a first doped portion 31 and a second doped portion 32 arranged alternately in the first direction X. The conductivity type of the first doped portion 31 is different from that of the second doped portion 32. The multiple electrodes 6 include a first electrode 61 and a second electrode 62. The first electrode 61 is electrically connected to the first doped portion 31, and the second electrode 62 is electrically connected to the second doped portion 32.

[0101] It is understood that the embodiments disclosed herein are also applicable to BC batteries, where the first doped portion 31 and the second doped portion 32 are p-type and n-type, respectively, or the first doped portion 31 and the second doped portion 32 are n-type and p-type, respectively. Alternating emitter regions and back field regions are formed on the first surface 11 (the back side of the battery), constituting a complete pn junction. The first electrode 61 and the second electrode 62 are both located on the first surface 11, collecting holes and electrons respectively, preventing the front electrode from blocking light and increasing the short-circuit current. Since all electrical functions are concentrated on the first surface 11, the second surface 12 does not need to be equipped with metal grid lines, enabling full-surface light reception.

[0102] In this configuration, the first passivation part 4 and the second passivation part 5 provide dual passivation protection for the second region II near the cutting edge, effectively suppressing edge recombination of the alternating doped region of the first surface 11 caused by laser cutting, and ensuring the efficiency stability and reliability of the BC cell under high slab density.

[0103] The solar cell may also include an emitter located within the substrate 1, with at least a portion of the second surface 12 serving as the top surface of the emitter.

[0104] In some embodiments, a portion of the second surface 12 serves as the top surface of the emitter to form a selective emitter. In a specific example, the emitter may be directly opposite the electrode 6.

[0105] In some embodiments, the entire surface of substrate 1 serves as the top surface of the emitter.

[0106] The emitter has the opposite doping type to the substrate 1, and forms a PN junction with the substrate 1. In some embodiments, the emitter material is the same as the substrate 1 material.

[0107] The solar cell may also include a third passivation section. The third passivation section is located on the surface of the emitter away from the substrate 1, providing good passivation for the front side of the substrate 1, reducing the defect state density on the front side of the substrate 1, and effectively suppressing carrier recombination on the front side of the substrate 1. The third passivation section also provides good anti-reflection, reducing the reflection of incident light from the front side of the substrate 1 and improving the utilization rate of incident light by the substrate 1.

[0108] The material of the third passivation section can be at least one of silicon oxide, aluminum oxide, silicon nitride, or silicon oxynitride.

[0109] In some embodiments, the third passivation portion may be a single-layer structure. In some embodiments, the third passivation portion may also be a multi-layer structure, wherein the materials of each layer in the multi-layer structure may be different from each other, or, a portion of the layers may be made of different materials, while the remaining portion may be made of the same material. For example, the third passivation portion may be a multi-layer structure of silicon nitride layers and aluminum oxide layers.

[0110] In some embodiments, electrode 6 is also located on the surface of the third passivation portion and is in electrical contact with the emitter.

[0111] In the solar cell disclosed herein, the first surface of the substrate includes a first region and a second region. The second region is located on the side of the first surface closer to the third surface and has a width of 100 μm to 500 μm. A tunneling layer and a doped conductive region are disposed in the first region, and multiple electrodes are electrically connected to the doped conductive region. A first passivation portion covers the first and second regions and is located on the side of the doped conductive region away from the tunneling layer. A second passivation portion is located on the third surface and at least covers the second region, and is located on the side of the first passivation portion away from the substrate. The second passivation portion provides passivation protection for the third surface, which helps to reduce the surface state density of the third surface and suppress carrier recombination on the third surface. Simultaneously, in the second region, the first and second passivation portions form a stacked structure, further enhancing the passivation effect of the second region, effectively reducing interfacial recombination, and improving the photoelectric conversion efficiency of the solar cell. Furthermore, by reasonably setting the materials and thicknesses of the first and second passivation portions, a good connection between the first and second passivation portions is ensured, forming continuous passivation protection between the third surface and the first surface, significantly reducing the carrier recombination rate in the edge region.

[0112] refer to Figure 5 In another aspect, this disclosure provides a method for manufacturing a solar cell, which will be described below using a TOPCON cell as an example.

[0113] The method for manufacturing this solar cell includes at least the following steps: S1: Obtain a substrate, the substrate including a first surface and a second surface, the first surface including a plurality of first regions and at least one second region arranged along a first direction.

[0114] refer to Figure 6 In some embodiments, the substrate 1 may be subjected to a doping process, such as ion implantation, to diffuse dopant elements into the substrate 1.

[0115] In some embodiments, a texturing process is performed on at least one of the surfaces of the first surface 11 or the second surface 12 of the substrate 1 to form a texturing surface on at least one of the surfaces of the first surface 11 or the second surface 12.

[0116] An emitter is formed in substrate 1. The doping type of the emitter is opposite to that of substrate 1. In some embodiments, taking N-type doping of substrate 1 as an example, the method of forming the emitter may include: An initial substrate is provided, and a diffusion process is performed on the initial substrate surface to diffuse a P-type dopant element from the surface of the initial substrate into a portion of the initial substrate, thereby converting the portion of the initial substrate with diffused P-type dopant element into an emitter. The remaining portion of the initial substrate forms substrate 1. In some embodiments, the diffusion process can be an ion implantation process.

[0117] S2: Formation of a tunneling layer, which is located on the first surface.

[0118] refer to Figure 7 In some embodiments, a deposition process can be used to form the tunneling layer 2 on the first surface 11. The deposition process can include either atomic layer deposition or chemical vapor deposition.

[0119] In some embodiments, the material of the tunneling layer 2 may include at least one of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, amorphous silicon, or polycrystalline silicon.

[0120] S3: Formation of a doped conductive region, which is located on the side of the tunneling layer away from the substrate.

[0121] refer to Figure 8 A doped conductive region 3 is formed on the surface of the tunneling layer 2 away from the substrate 1. The material of the doped conductive region 3 can be at least one of amorphous silicon, polycrystalline silicon, or silicon carbide.

[0122] Taking polycrystalline silicon as an example, where the material of the doped conductive region 3 is polycrystalline silicon, in some embodiments, the method for forming the doped conductive region 3 may include: An intrinsic polycrystalline silicon layer is formed on the surface of the tunneling layer 2 using a deposition process, such as atomic layer deposition. Next, the intrinsic polycrystalline silicon layer is doped to introduce elements, forming a doped conductive region 3.

[0123] In some embodiments, the doping process may include depositing a dopant source on the surface of the intrinsic polysilicon layer away from the substrate 1, the dopant source comprising a first dopant element. In some embodiments, the first dopant element may be an N-type dopant element. In some embodiments, the N-type dopant source may be a pentavalent element or a compound, such as phosphorus or a phosphorus-containing compound, such as phosphorus trichloride.

[0124] While depositing the dopant source on the first surface 11, oxygen is introduced and the temperature is increased to push the first dopant element in the dopant source into the intrinsic polycrystalline silicon layer, forming the doped conductive region 3.

[0125] S4: Remove the doped conductive region and tunneling layer located in the second region.

[0126] refer to Figure 9 In some embodiments, the doped conductive region 3 and tunneling layer 2 located in the second region II are removed until the surface of the substrate 1 corresponding to the second region II is exposed.

[0127] S5: Forming a first passivation portion, which is located in the first region and the second region.

[0128] refer to Figure 10In some embodiments, a deposition process can be used to form a first passivation portion 4 on the surface of the doped conductive region 3 and the surface of the substrate 1 corresponding to the second region II.

[0129] In some embodiments, the method of forming the first passivation portion 4 may include forming the first passivation portion 4 on the surface of the doped conductive region 3 using a PECVD (Plasma Enhanced Chemical Vapor Deposition) method.

[0130] S6: Form multiple electrodes located on the first region and electrically connected to the doped conductive region. The multiple electrodes are arranged along the first direction and extend along the second direction, which is the direction that intersects with the first direction.

[0131] refer to Figure 11 In some embodiments, the method of forming electrode 6 may include: printing metal paste on the surface of a portion of the first passivation portion 4 using a screen printing process.

[0132] In some embodiments, the metal paste may include at least one of silver, aluminum, copper, tin, gold, lead, or nickel.

[0133] In some embodiments, the metal paste is sintered using a sintering process. The metal paste contains highly corrosive components such as glass. During sintering, these corrosive components corrode the first passivation portion 4 and the partially doped conductive region 3, causing the metal paste to penetrate these areas. This allows the metal paste to burn through the doped conductive region 3 from the side away from the substrate 1 into a portion of the doped conductive region 3, forming the electrode 6.

[0134] S7: Cut the area using the second zone as the cutting area.

[0135] In some embodiments, a laser is used to cut the cutting lines in the second region II to obtain several segmented batteries.

[0136] S8: Form a second passivation portion, the second passivation portion being at least located in the second region, and the second passivation portion being located on the side of the first passivation portion away from the substrate.

[0137] refer to Figure 1 In some embodiments, a second passivation portion 5 is formed on the surface of the first passivation portion 4 located at least in the second region II, away from the substrate 1.

[0138] refer to Figure 1 In some embodiments, the substrate 1 further includes a third surface 13 connected to the first surface 11 and the second surface 12; forming the second passivation portion 5 includes forming the second passivation portion 5 in a portion of the third surface 13 and the first surface 11.

[0139] For example, the second passivation portion 5 continuously covers the third surface 13 and the second region II. The third surface 13 is the cut surface after the battery is sliced, and there are a large number of defect states introduced by laser cutting; while the second region II is adjacent to the third surface 13 and is in a high stress and high recombination risk range. By continuously depositing the second passivation portion 5 on a portion of the third surface 13 and the first surface 11 in the same process step, a seamless passivation transition from the third surface 13 to the first surface 11 can be achieved, effectively saturating the dangling bonds on the cut surface and the adjacent front area, reducing the overall defect state density, and forming a stacked structure with the first passivation portion 4 in the second region II, synergistically enhancing the edge passivation effect, thereby significantly suppressing nonradiative recombination of charge carriers at the battery edge, improving open circuit voltage and battery reliability.

[0140] In some embodiments, removing the doped conductive region 3 and the tunneling layer 2 located in the second region II includes: using a laser scanning process to remove the doped conductive region 3 and the tunneling layer 2 located in the second region II until the substrate 1 is exposed.

[0141] By precisely removing the doped conductive region 3 and tunneling layer 2 of the second region II using laser scanning before cutting, it is possible to avoid the formation of high recombination channels at the edge by residual polysilicon or doped layer, while providing a clean and uniform silicon surface for subsequent deposition of the first passivation part 4 and the second passivation part 5.

[0142] In some embodiments, the process parameters of the laser scanning process include: the wavelength of the laser is 355nm~532nm, for example, it can be 355nm~400nm, 400nm~500nm, or 500nm~532nm, etc.; the power density is 1J / cm². 2 ~5J / cm 2 For example, it could be 1 J / cm 2 ~2J / cm 2 2J / cm 2 ~4J / cm 2 or 4J / cm 2 ~5J / cm 2 The spot size is 100μm~500μm, for example, it can be 100μm~200μm, 200μm~400μm or 400μm~500μm, etc.

[0143] In some embodiments, the laser wavelength of the laser scanning process can be 355nm, 365nm, 375nm, 385nm, 395nm, 405nm, 415nm, 425nm, 435nm, 445nm, 455nm, 465nm, 475nm, 485nm, 495nm, 505nm, 515nm, 525nm, or 532nm, etc.

[0144] In some embodiments, the power density of the laser scanning process can be 1 J / cm². 2 2J / cm 2 3J / cm 2 4J / cm 2 Or 5J / cm 2 wait.

[0145] In some embodiments, the spot size of the laser scanning process can be 100μm, 200μm, 300μm, 400μm, or 500μm, etc.

[0146] In some embodiments, forming a second passivation portion includes: forming a second passivation portion on the side of the first passivation portion away from the substrate using a first deposition process; wherein the process parameters of the first deposition process include: a process temperature of 150°C to 220°C, and a precursor of trimethylaluminum and an aqueous solution.

[0147] The first deposition process can be PECVD, atomic layer deposition (ALD), or other methods.

[0148] It should be noted that in the above-mentioned scheme in which the first region I includes multiple first sub-regions 101 and multiple second sub-regions 102, the removal of the doped conductive region 3 and tunneling layer 2 located in the second region II and the removal of the doped conductive region 3 and tunneling layer 2 in the second sub-region 102 can be performed in the same step.

[0149] In some embodiments, the width ratio of the second region II to the second sub-region 102 is in the range of 1:(0.3~0.6).

[0150] The following provides a detailed description of a method for manufacturing a solar cell according to an embodiment of the present disclosure. Examples and comparative examples of solar cells manufactured according to the method for manufacturing a solar cell according to an embodiment of the present disclosure are given below.

[0151] Example This embodiment provides a method for manufacturing a solar cell, the method of which is as follows: 1) Provide an N-type silicon wafer.

[0152] 2) Use an alkaline solution to perform double-sided pile forming to obtain a pyramid pile surface.

[0153] 3) Boron diffusion is performed on the front side of the silicon wafer to form a P-type emitter.

[0154] 4) Use HF aqueous solution to remove BSG from the back of the silicon wafer, and then polish the back of the wafer with a tank alkaline solution.

[0155] 5) After alkaline polishing, a 1nm~2nm silicon oxide layer is deposited on the back of the battery using LPCVD (temperature 500℃~700℃), followed by the deposition of a 100nm~150nm phosphorus-doped amorphous silicon layer (doping concentration 1×10¹⁹-5×10²⁰ cm⁻¹). - ³), annealed in a nitrogen atmosphere at 700℃~800℃ for 10 to 30 minutes to transform into a polycrystalline silicon layer.

[0156] 6) Use a laser with a wavelength of 355nm or 532nm (power density 1J / cm2~5J / cm2, spot size 100μm~500μm) to remove one or more (width 200μm~1000μm) preset cutting areas of silicon oxide layer and polysilicon layer to the silicon substrate.

[0157] 7) Use HF aqueous solution to remove PSG from the front side of the silicon wafer, and clean the polycrystalline silicon layer around the front side with a tank alkaline solution.

[0158] 8) A 5nm~12nm aluminum oxide (AlOx) passivation layer is deposited on the front and back sides of the silicon wafer by atomic layer deposition (ALD).

[0159] 9) Electrodes are printed on the surface of the silicon wafer by screen printing, and the electrodes are sintered at high temperature to form a good ohmic contact with the silicon wafer.

[0160] 10) Use a laser to cut the cutting lines in the preset cutting area to obtain several segmented batteries.

[0161] 11) An aluminum oxide layer of 40nm~60nm is formed on the surface of the aluminum oxide layer on the cutting surface and the preset cutting area.

[0162] Comparative Example This comparative example provides a method for manufacturing a solar cell, the method of which is as follows: The difference between this comparative example and the embodiment is that step (6) is omitted in this comparative example, while the remaining steps are consistent with those in the embodiment. That is, the silicon oxide layer and polycrystalline silicon layer in the preset cutting area of ​​the batch of solar cells formed in the comparative example are not removed.

[0163] Tests showed that a batch of solar cells formed through the examples had an open-circuit voltage that was increased by about 0.6 mV and a fill factor that was increased by 0.02 compared to a batch of solar cells formed in the comparative examples, and a photoelectric conversion efficiency (η) that was increased by 0.03%.

[0164] The above results indicate that the manufacturing method of solar cells provided in this disclosure can significantly alleviate recombination losses introduced by laser cutting, thereby improving the overall electrical performance and reliability of multi-segment solar cells.

[0165] According to some embodiments of this disclosure, another aspect of this disclosure also provides a photovoltaic module, including a plurality of solar cells as described in the above embodiments, or a plurality of solar cells manufactured by the manufacturing method of the solar cells in the above embodiments. The photovoltaic module provided by another embodiment of this disclosure will be described in detail below with reference to the accompanying drawings. For parts that are the same as or corresponding to the previous embodiment, please refer to the corresponding descriptions of the foregoing embodiments, which will not be repeated in detail below.

[0166] Figure 12 This is a partial three-dimensional structural diagram of a photovoltaic module provided in an embodiment of the present disclosure; Figure 13 for Figure 12 A schematic diagram of a cross-sectional structure along the cross-sectional direction NN1.

[0167] refer to Figure 12 and Figure 13 The photovoltaic module provided in this embodiment includes: a battery string, an encapsulating film 201, and a cover plate 202.

[0168] The battery string is formed by connecting multiple solar cells as described in the above embodiments, or by connecting multiple solar cells formed by the manufacturing method of the solar cells described in the above embodiments.

[0169] It should be noted that solar cells are electrically connected to form multiple cell strings, which are electrically connected in series and / or parallel. Since solar cells include segmented cells, and these segmented cells are formed by dividing a whole solar cell, the reduced current in the segmented cells can improve the power loss of the photovoltaic module, thereby increasing the photoelectric conversion efficiency of the photovoltaic module.

[0170] In one or more embodiments, reference is made to Figure 13 As shown, multiple battery strings can be electrically connected through conductive strip 203. Figure 13 This illustration only depicts one possible positional relationship between solar cells, where the electrodes of the solar cells with the same polarity are arranged in the same direction, or in other words, the electrodes of each solar cell with the positive polarity are arranged facing the same side, thereby connecting the different sides of two adjacent solar cells with conductive strips. In some embodiments, the solar cells can also be arranged with electrodes of different polarities facing the same side, that is, the electrodes of multiple adjacent solar cells are arranged in the order of first polarity, second polarity, and first polarity, respectively, then the conductive strip connects two adjacent cells on the same side.

[0171] In one or more embodiments, there is no spacing between the solar cells, that is, the solar cells overlap each other.

[0172] refer to Figure 13 The encapsulating film 201 is used to cover the surface of the battery string.

[0173] In one or more embodiments, the encapsulating film includes a first encapsulating layer and a second encapsulating layer. The first encapsulating layer covers one of the front or back sides of the solar cell, and the second encapsulating layer covers the other of the front or back sides of the solar cell. Specifically, at least one of the first encapsulating layer or the second encapsulating layer can be an organic encapsulating film such as polyvinyl butyral (PVB) film, ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene coelastomer (POE) film, or polyethylene terephthalate (PET) film.

[0174] In some cases, the first encapsulation layer and the second encapsulation layer still have a boundary line before lamination. After lamination, the photovoltaic module no longer has the concept of a first encapsulation layer and a second encapsulation layer, that is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film.

[0175] refer to Figure 13 The cover plate 202 is used to cover the surface of the encapsulating film 201 away from the battery string.

[0176] In one or more embodiments, the cover plate can be a glass cover plate, a plastic cover plate, or other cover plate with light-transmitting function. Specifically, the surface of the cover plate facing the encapsulating film can be an uneven surface, thereby increasing the utilization rate of incident light. The cover plate includes a first cover plate and a second cover plate, the first cover plate being opposite to the first encapsulation layer, and the second cover plate being opposite to the second encapsulation layer.

[0177] In one or more embodiments, reference is made to Figure 12 As shown, the solar cells 100 in the battery string are arranged along the direction U, and the main grids of two adjacent solar cells 100 in the battery string are staggered in the direction Y. For photovoltaic modules, by setting the main grids of two adjacent solar cells 100 in the battery string to be staggered in the direction Y, the different potentials of the photovoltaic modules can be tested, thereby improving the reliability of the test results.

[0178] In one or more embodiments, the solar cell includes, but is not limited to, one or any combination of PERC (Passivated Emitter Rear Cell), IBC (Interdigitated Back Contact), TOPCon (Tunnel Oxide Passivated Contact), HIT / HJT (Heterojunction Technology) cells, thin-film solar cells, and tandem solar cells. Thin-film solar cells include, but are not limited to, perovskite thin-film solar cells, copper indium selenide (CIGS) thin-film solar cells, gallium arsenide (GaAs) thin-film solar cells, and cadmium sulfide (CdS) thin-film solar cells. Tandem solar cells include, but are not limited to, perovskite cells stacked with crystalline silicon cells, perovskite cells stacked with perovskite cells, and perovskite cells stacked with thin-film cells.

[0179] Those skilled in the art will understand that the above embodiments are specific examples of implementing this disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of this disclosure. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure should be determined by the scope defined in the claims.

Claims

1. A solar cell, characterized in that, include: The substrate includes a first surface and a second surface, and a third surface connecting the first surface and the second surface. The first surface includes a first region and a second region. The second region is located on the side of the first surface close to the third surface, and the width of the second region is 100μm~500μm along a first direction. A tunneling layer located in the first region; A doped conductive region, wherein the doped conductive region is located on the side of the tunneling layer away from the substrate; Multiple electrodes are arranged along the first direction, the multiple electrodes extend along the second direction and are located in the first region, and are electrically connected to the doped conductive region, wherein the second direction is the direction intersecting the first direction; A first passivation portion is located in the first region and the second region, and the first passivation portion is located on the side of the doped conductive region away from the tunneling layer; The second passivation portion is located on the third surface and at least in the second region, and the second passivation portion is located on the side of the first passivation portion away from the substrate.

2. The solar cell according to claim 1, characterized in that, The material of the first passivation portion includes at least one of aluminum oxide, silicon nitride, magnesium oxide, or hafnium oxide.

3. The solar cell according to claim 1 or 2, characterized in that, The material of the second passivation portion includes at least one of aluminum oxide, silicon nitride, silicon dioxide, doped polycrystalline silicon, or doped amorphous silicon.

4. The solar cell according to claim 1 or 2, characterized in that, The thickness of the first passivation portion is 5nm~12nm.

5. The solar cell according to claim 1, characterized in that, The thickness of the second passivation portion is 40nm~60nm.

6. The solar cell according to claim 1 or 5, characterized in that, Along the first direction, the width of the second passivation portion on the first surface is greater than 0 and less than or equal to 1.5 mm.

7. The solar cell according to claim 1, characterized in that, The first region includes multiple first sub-regions and multiple second sub-regions; The tunneling layer is located at least on the first sub-region; The doped conductive region is located on the side of the tunneling layer corresponding to the first sub-region away from the substrate; The plurality of electrodes are located on the first sub-region and are electrically connected to the doped conductive region.

8. The solar cell according to claim 1, characterized in that, The first surface includes a first area and a second area arranged along the first direction, or the first surface includes two second areas and a first area located between the two second areas.

9. The solar cell according to claim 1 or 8, characterized in that, The doped conductive region includes a first doped portion and a second doped portion arranged alternately in the first direction, wherein the conductivity type of the first doped portion is different from that of the second doped portion. The plurality of electrodes includes a first electrode and a second electrode, wherein the first electrode is electrically connected to the first doped portion and the second electrode is electrically connected to the second doped portion.

10. A method for manufacturing a solar cell, characterized in that, include: A substrate is obtained, the substrate including a first surface and a second surface, the first surface including a plurality of first regions and at least one second region arranged along a first direction; A tunneling layer is formed, the tunneling layer being located on the first surface; A doped conductive region is formed, the doped conductive region being located on the side of the tunneling layer away from the substrate; Remove the doped conductive region and the tunneling layer located in the second region; A first passivation portion is formed, which is located in the first region and the second region; Multiple electrodes are formed, which are located on the first region and electrically connected to the doped conductive region. The multiple electrodes are arranged along the first direction and extend along the second direction, which is the direction that intersects with the first direction. Cut the area using the second region as the cutting area; A second passivation portion is formed, the second passivation portion being at least located in the second region, and the second passivation portion being located on the side of the first passivation portion away from the substrate.

11. The method for manufacturing a solar cell according to claim 10, characterized in that, The substrate further includes a third surface connected to the first surface and the second surface; forming the second passivation portion includes forming the second passivation portion in a portion of the third surface and the first surface.

12. The method for manufacturing a solar cell according to claim 10, characterized in that, The removal of the doped conductive region and the tunneling layer located in the second region includes: A laser scanning process is used to remove the doped conductive region and the tunneling layer located in the second region until the substrate is exposed.

13. The method for manufacturing a solar cell according to claim 12, characterized in that, The process parameters of the laser scanning process include: The wavelength of the laser is 355nm~532nm, the power density is 1J / cm 2 ~5J / cm 2 , and the spot size is 100μm~500μm.

14. The method for manufacturing a solar cell according to claim 10, characterized in that, The formation of the second passivation portion includes: A first deposition process is used to form a second passivation portion on the side of the first passivation portion away from the substrate; The process parameters of the first deposition process include: a process temperature of 150℃~220℃, and a precursor of trimethylaluminum and an aqueous solution.

15. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple solar cells as described in any one of claims 1 to 9, or by connecting multiple solar cells formed by the manufacturing method of solar cells as described in any one of claims 10 to 14; An encapsulating film is used to cover the surface of the battery string; A cover plate is used to cover the surface of the encapsulating film away from the battery string.

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