Chip heat dissipation method and device based on silicon carbide and multilayer metal low temperature bonding

Abstract

The application discloses a chip heat dissipation method and device based on silicon carbide and multilayer metal low-temperature bonding. The device comprises a silicon carbide substrate, a first nanoscale metal film formed on the surface of the silicon carbide substrate, a silicon-based functional chip, and a second nanoscale metal film formed on the back surface of the silicon-based functional chip. The two are aligned and firmly combined through low-temperature hot-press bonding. After bonding, flux is applied at the solder ball position and reflow soldering is performed to form the final electrical, mechanical and thermal conduction connection. The scheme realizes a direct low-resistance heat channel between the chip and the high-thermal-conductivity SiC substrate, significantly reduces the interface thermal resistance, and realizes nearly zero-delay transient heat dissipation. The bonding temperature is lower than the melting point of the solder ball, avoiding solder ball melting short circuit and improving reliability. The process is compatible with the existing semiconductor manufacturing process and is suitable for high-power-density application scenarios such as AI, automatic driving and big data.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor heat dissipation and packaging technology, specifically relating to a chip heat dissipation method and apparatus based on silicon carbide and multilayer metal low-temperature bonding. Background Technology

[0002] With the rapid development of emerging applications such as artificial intelligence, autonomous driving, and big data, the power consumption of high-performance computing chips is increasing exponentially. Traditional heat dissipation methods are no longer sufficient to meet the increasingly stringent heat dissipation requirements, and thermal management has become a key bottleneck limiting chip performance improvement. The thermal conductivity of silicon substrates is only 148 W·(m·K)⁻¹, and the thermal conductivity of conventional ceramic substrates is about 200-230 W·(m·K)⁻¹, far lower than the highest thermal conductivity of silicon carbide (SiC) ≈500 W·(m·K)⁻¹. Compared with alumina (≈30 W·(m·K)⁻¹) and sapphire (≈35 W·(m·K)⁻¹), SiC's thermal conductivity is second only to diamond, but it has significant advantages in terms of the manufacturing cost and process maturity of large-size wafers. Therefore, SiC is increasingly becoming the heat dissipation substrate material that achieves the best balance between performance, cost, and feasibility.

[0003] Currently, the mainstream chip heat dissipation solutions mainly include:

[0004] (1) Air cooling: relies on airflow to remove the heat generated by the chip. The thermal conductivity of air at 100℃ is only 0.0317W·(m·K)⁻¹, and the heat dissipation limit is less than 1W·cm⁻², which is difficult to meet the heat dissipation requirements of AI chips with high power density and large load fluctuation.

[0005] (2) Liquid cooling: The liquid circulates directly or indirectly to contact the chip and conducts heat to the cooling station. Although the liquid has a high specific heat capacity and thermal conductivity, the system structure is complex, the cost is high, the space occupied is large, and there is a safety hazard of leakage leading to equipment damage.

[0006] (3) Thermal interface material (TIM) heat dissipation: High thermal conductivity filler is filled between the chip and the heat sink to reduce contact thermal resistance. Ordinary TIM has insufficient long-term reliability; high-end materials can provide lower thermal resistance, but they are expensive; liquid metal has excellent thermal conductivity, but it faces risks such as leakage and metal corrosion.

[0007] The aforementioned traditional heat dissipation technologies have significant limitations in high-power, highly integrated chip applications, and there is an urgent need for a heat dissipation solution that combines high thermal conductivity, low cost, simplified process, and reliability. Summary of the Invention

[0008] The purpose of this invention is to overcome the shortcomings of the prior art and provide a chip heat dissipation method and apparatus based on silicon carbide and multilayer metal low-temperature bonding, which solves the problems of heat dissipation performance, cost, reliability and process complexity in the above-mentioned background art.

[0009] One of the technical solutions adopted by this invention to solve its technical problem is: providing a chip heat dissipation method based on silicon carbide and multilayer metal low-temperature bonding, comprising the following steps:

[0010] S1, Pretreatment of silicon-based chip and silicon carbide substrate surface;

[0011] S2. Sputter a first nanometer-scale metal film on the back of a silicon-based chip and a second nanometer-scale metal film on the surface of a silicon carbide substrate;

[0012] S3. Align and bond the first nanoscale metal film of the silicon-based chip and the second nanoscale metal film of the silicon carbide substrate to form a pre-bonded sample.

[0013] S4. Perform hot-press bonding on the pre-bonded sample, with a pressure range of 3~8MPa and a temperature range of 180~210℃, while ensuring that the temperature is lower than the melting point of the chip solder balls.

[0014] S5. Apply flux to the solder ball positions of the bonding sample and perform reflow soldering at a reflow temperature of 180~280℃ to complete the chip heat dissipation based on the silicon carbide substrate.

[0015] In a preferred embodiment of the present invention, step S1, the pretreatment method includes organic solvent soaking, ultrasonic cleaning, drying, and plasma activation treatment. Specifically, it includes:

[0016] S1-1. Place the silicon-based chip and silicon carbide sample in an organic solvent for ultrasonic cleaning and then dry them.

[0017] S1-2. Plasma activation treatment is performed on the back side of the silicon-based chip and the surface of the silicon carbide sample, respectively.

[0018] In a preferred embodiment of the present invention, the organic solvent includes alcohol and acetone, and the ultrasonic parameters are 53 kHz, 20°C, and 5 minutes.

[0019] In a preferred embodiment of the present invention, the plasma activation treatment uses O2 and Ar plasma with a power of 150W and a duration of 6 minutes.

[0020] In a preferred embodiment of the present invention, in step S2, the first nanoscale metal film and the second nanoscale metal film have at least two layers, and the metal sputtered in each layer includes any one of Ti, Cu, Au, Ag or Cr.

[0021] In a preferred embodiment of the present invention, the first nanoscale metal thin film and the second nanoscale metal thin film have a 2-4 layer structure, and the thickness of each layer is 20-500 nm.

[0022] In a preferred embodiment of the present invention, the first nanoscale metal film is a Ti / Au nanoscale metal film, and the second nanoscale metal film is a Ti / Cu / Ti / Au nanoscale metal film; wherein the thickness of each layer is 20nmTi / 100nmAu, 20nmTi / 500nmCu / 20nmTi / 100nmAu.

[0023] In a preferred embodiment of the present invention, the hot-press bonding pressure is 3~8MPa.

[0024] In a preferred embodiment of the present invention, in step S5, the bonded sample is first placed in an organic solvent for ultrasonic cleaning and then dried before reflow soldering.

[0025] In a preferred embodiment of the present invention, the reflow soldering temperature is 180~280℃.

[0026] In a preferred embodiment of the present invention, the chip solder balls are made of Sn96.5Ag3Cu0.5, Sn96.5Ag3.5, or Sn-Au.

[0027] The second technical solution adopted by the present invention to solve its technical problem is: a chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding is provided, including a silicon-based chip, a metal bonding layer and a silicon carbide substrate; a first nanoscale metal thin film is provided on the back side of the silicon-based chip; a second nanoscale metal thin film is provided on the surface of the silicon carbide substrate; the metal bonding layer is formed by aligning and bonding the first nanoscale metal thin film and the second nanoscale metal thin film through low-temperature hot pressing bonding, and the bonding temperature is lower than the melting point of the chip solder balls.

[0028] In a preferred embodiment of the present invention, the first nanoscale metal thin film and the second nanoscale metal thin film have at least two layers, and the metal sputtered in each layer includes any one of Ti, Cu, Au, Ag or Cr.

[0029] In a preferred embodiment of the present invention, the first nanoscale metal thin film and the second nanoscale metal thin film have a 2-4 layer structure, and the thickness of each layer is 20-500 nm.

[0030] In a preferred embodiment of the present invention, the temperature range of the low-temperature hot-press bonding is 180°C to 210°C, and the pressure range is 3 to 8 MPa.

[0031] In a preferred embodiment of the present invention, after bonding is completed, flux is applied to the solder ball portion formed on the bonding interface and reflow soldering is performed to form a chip based on a silicon carbide substrate.

[0032] In a preferred embodiment of the present invention, the solder ball is melted, wetted, and forms a metal-to-metal solder joint with the metal bonding layer during the reflow stage.

[0033] Compared with the prior art, this technical solution has the following advantages:

[0034] This solution achieves direct, low-resistance heat conduction between the chip and the heat dissipation substrate through low-temperature hot-press bonding of multilayer nanoscale metal thin films on a silicon carbide (SiC) high thermal conductivity substrate. The bonding temperature is lower than the melting point of the solder balls, preventing short circuits caused by high-temperature melting of the solder balls and significantly improving packaging reliability. Surface pretreatment with plasma activation and ultrasonic cleaning improves the adhesion and bonding strength of the metal layer, reduces interface thermal resistance, and enables almost zero delay in transient heat dissipation. The process is compatible with conventional sputtering, hot-pressing, and reflow soldering production lines, enabling mass production at low cost, and meeting the comprehensive requirements of high-power computing chips in AI, autonomous driving, and big data for efficient heat dissipation, reliability, and economy. Attached Figure Description

[0035] Figure 1 This is a flowchart of the method in the embodiment;

[0036] Figure 2 This is a structural diagram of the device in the embodiment. Detailed Implementation

[0037] Unless otherwise specified, the materials and reagents involved in the following examples can be purchased directly from legitimate channels, or synthesized or modified for use, and there are no restrictions on specific brands or batch numbers.

[0038] Example

[0039] This embodiment discloses a chip heat dissipation method based on silicon carbide and multilayer metal low-temperature bonding, comprising the following steps:

[0040] S1, Pre-treatment of silicon-based chip and silicon carbide substrate surfaces; Silicon-based chip size 19.52mm, silicon carbide substrate size 19.52mm;

[0041] S1-1. Place the silicon-based chip and silicon carbide substrate in alcohol and acetone organic solvents respectively for ultrasonic cleaning at a frequency of 53KHz, a temperature of 20℃, and a time of 5 minutes, and then blow them dry.

[0042] S1-2. Perform plasma activation treatment on the back side of the silicon-based chip and the surface of the silicon carbide substrate, respectively, using O2 and Ar plasma, with a power of 150W and a time of 6 minutes.

[0043] S2. Sputter a Ti / Au nanoscale metal thin film on the back side of a silicon-based chip after plasma activation treatment; sequentially sputter four metal thin films of Ti, Cu, Ti, and Au on the surface of a silicon carbide substrate after plasma activation treatment to form a multilayer Ti / Cu / Ti / Au nanoscale metal thin film; wherein the thickness of each layer is 20nmTi / 100nmAu, 20nmTi / 500nmCu / 20nmTi / 100nmAu.

[0044] S3. Align and bond the nanoscale metal thin film surfaces of the silicon-based chip and the silicon carbide substrate to form a pre-bonded sample;

[0045] S4. Perform hot-press bonding on the pre-bonded sample at a temperature range of 180~210℃, ensuring the temperature is below the melting point of the chip solder balls. In this embodiment, the solder balls are Sn96.5Ag3Cu0.5, with a melting point of 217℃.

[0046] S5. Place the bonded sample in an alcoholic organic solvent for ultrasonic cleaning at 53 kHz and then dry it. Apply flux to the solder ball positions of the bonded sample and perform reflow soldering at a temperature of 280°C to complete the chip heat dissipation based on the silicon carbide substrate.

[0047] This embodiment is a chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding, including a silicon-based chip, a metal bonding layer, and a silicon carbide substrate. The back side of the silicon-based chip is provided with a Ti / Au nanoscale metal film, and the surface of the silicon carbide substrate is provided with a Ti / Cu / Ti / Au nanoscale metal film. The metal bonding layer is formed by aligning and bonding the Ti / Au nanoscale metal film of the silicon-based chip to the Ti / Cu / Ti / Au nanoscale metal film of the silicon carbide substrate through low-temperature hot-press bonding, with the bonding temperature lower than the melting point of the chip solder balls. After bonding, flux is applied to the solder ball areas formed at the bonding interface, and reflow soldering is performed to form a chip based on the silicon carbide substrate. During the reflow stage, the solder balls are melted, wetted, and form metal-metal solder joints with the metal bonding layer. Subsequently, rapid cooling causes the solder balls to solidify, completing the final electrical, thermal, and mechanical connection. For chips with a heat flux density of 500 W / cm², a silicon carbide substrate combined with a multilayer metal low-temperature bonding scheme can reduce the chip junction temperature by 11.2℃, significantly improving heat dissipation efficiency. This solution effectively addresses the thermal management challenges of current artificial intelligence and high-performance computing chips operating at high power densities, providing crucial heat dissipation assurance for continuous chip performance improvement.

[0048] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip heat dissipation method based on silicon carbide and multilayer metal low-temperature bonding, characterized in that: Includes the following steps: S1, Pretreatment of silicon-based chip and silicon carbide substrate surface; S2. Sputter a first nanometer-scale metal film on the back of a silicon-based chip and a second nanometer-scale metal film on the surface of a silicon carbide substrate; S3. Align and bond the first nanoscale metal film of the silicon-based chip and the second nanoscale metal film of the silicon carbide substrate to form a pre-bonded sample. S4. Perform hot-press bonding on the pre-bonded sample, with a pressure range of 3~8MPa and a temperature range of 180~210℃, while ensuring that the temperature is lower than the melting point of the chip solder balls. S5. Apply flux to the solder ball positions of the bonding sample and perform reflow soldering at a reflow temperature of 180~280℃ to complete the chip heat dissipation based on the silicon carbide substrate.

2. The chip heat dissipation method based on silicon carbide and multilayer metal low-temperature bonding according to claim 1, characterized in that: In step S1, the pretreatment methods include organic solvent soaking, ultrasonic cleaning, drying, and plasma activation treatment.

3. The chip heat dissipation method based on silicon carbide and multilayer metal low-temperature bonding according to claim 1, characterized in that: In step S2, the first nanoscale metal film and the second nanoscale metal film have at least two-layer structures, and the metal sputtered in each layer includes any one of Ti, Cu, Au, Ag or Cr.

4. The chip heat dissipation method based on silicon carbide and multilayer metal low-temperature bonding according to claim 1, characterized in that: In step S5, the bonded sample is first placed in an organic solvent for ultrasonic cleaning and then dried before reflow soldering.

5. A chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding, characterized in that: It includes a silicon-based chip, a metal bonding layer, and a silicon carbide substrate; the back side of the silicon-based chip is provided with a first nanoscale metal film; the surface of the silicon carbide substrate is provided with a second nanoscale metal film; the metal bonding layer is formed by aligning and bonding the first nanoscale metal film and the second nanoscale metal film through low-temperature hot pressing bonding, and the bonding temperature is lower than the melting point of the chip solder balls.

6. The chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding according to claim 5, characterized in that: The first and second nanoscale metal films have at least two-layer structures, and the metal sputtered in each layer includes any one of Ti, Cu, Au, Ag or Cr.

7. The chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding according to claim 5, characterized in that: The first and second nanoscale metal films have a 2-4 layer structure, with each layer having a thickness of 20-500 nm.

8. The chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding according to claim 5, characterized in that: The temperature range for the low-temperature hot-press bonding is 180~210℃, and the pressure range is 3~8MPa.

9. The chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding according to claim 5, characterized in that: After bonding is completed, flux is applied to the solder ball areas formed on the bonding interface and reflow soldering is performed to form a chip based on a silicon carbide substrate.

10. The chip heat dissipation device based on silicon carbide and multilayer metal low-temperature bonding according to claim 9, characterized in that: During the reflow phase, the solder balls are melted, wetted, and form metal-to-metal solder joints with the metal bonding layer.

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