A method for equalizing charge and discharge of a battery pack

Abstract

The application discloses a charging and discharging equalization control method of a battery pack, and the method comprises the following steps: in the charging or discharging stage of the battery pack, the voltage of all single batteries in the battery pack and the terminal voltage of all battery modules are collected in real time, and a first voltage difference and a second voltage difference are calculated; the equalization scheduling instruction is generated based on the comparison between the first voltage difference and a first threshold value and the comparison between the second voltage difference and a second threshold value; the switch state combination in each battery module is dynamically scheduled according to the equalization scheduling instruction, and the corresponding inter-module multi-grade gradient equalization scheduling between the first operation mode, the mixed mode of the first operation mode and the second operation mode and the second operation mode of each battery module in the charging or discharging stage is controlled, so that the hierarchical dynamic equalization control of the battery pack is realized. The application can further improve the equalization efficiency.

Description

Technical Field

[0001] This invention relates to the field of equalization control technology, and more specifically, to a method for equalizing the charging and discharging of a battery pack. Background Technology

[0002] Lithium-ion batteries, with their advantages of high energy density, long cycle life, and environmental friendliness, have been widely used in electric vehicles, energy storage systems, and consumer electronics. Battery packs, as the core carriers of lithium-ion battery applications, are typically composed of dozens or even hundreds of individual cells connected in series and parallel. Their overall performance, lifespan, and safety depend not only on the performance of individual cells but also on the consistency between them. Due to differences in materials, aging rates, and charging / discharging losses during manufacturing and use, individual cells are prone to voltage and capacity deviations. If these deviations are not corrected over a long period, some cells may overcharge or over-discharge during the battery pack's charging and discharging process, accelerating battery aging, shortening the overall battery pack lifespan, and even triggering safety hazards such as thermal runaway.

[0003] Currently, existing battery balancing methods mainly transfer energy from high-voltage cells to low-voltage cells through external circuits or directly consume the energy of high-voltage cells. The balancing time is long and has a lag. This lag not only leads to untimely balancing but also causes significant energy loss during the energy transfer process. This energy loss also directly wastes the stored power in the battery pack, thus greatly reducing the charging and discharging efficiency of the battery pack. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a charge-discharge equalization control method for a battery pack, applied to a single-cell topology of the battery pack. The single-cell topology of the battery pack comprises at least two battery modules connected in series. Each battery module has a positive terminal P and a negative terminal N. Except for the last one, the negative terminal N of each battery module is connected to the positive terminal P of the adjacent battery module. Each battery module includes a first single-cell battery. Second single cell First switching transistor Second switching transistor and the third switching transistor The first single cell battery The positive electrode is connected to the positive terminal P, and the first single cell is... The negative terminal and the second switching transistor The source connection; the second single cell The positive terminal and the second switching transistor The drain connection, the second single cell The negative terminal is connected to the negative terminal N; the first switching transistor The source electrode is connected to the second single cell. The positive terminal and the second switching transistor Between the drains of the first switching transistor The drain of the third switching transistor is connected to the positive terminal P; The source of the third switch is connected to the negative terminal N. The drain is connected to the first single cell. The negative terminal and the second switching transistor Between the source and the first switch transistor; Second switching transistor and the third switching transistor The connection positions are interchangeable; wherein, during the charging or discharging phase of each battery module, if the first switch transistor... With the third switching transistor The pulse width modulation signal is a low-level signal and the second switch transistor When the signal is high, the first switching transistor is controlled. With the third switching transistor Turn off and control the second switching transistor. The battery module is turned on to be in a first operating mode, and the first single cell is... With the second single cell The first switch is connected in series within the battery module; With the third switching transistor The pulse width modulation signal is a high-level signal and the second switch is When the signal is low, the first switching transistor is controlled. With the third switching transistor Turn on and control the second switching transistor. The battery module is switched off to a second operating mode, and the first individual battery cell is switched off. With the second single cell The battery pack is connected in parallel within the battery module, and the charge / discharge equalization control method includes the following steps: S01: During the charging or discharging phase of the battery pack, the voltage of all individual cells in the battery pack and the terminal voltage of all battery modules are collected in real time. S02: Calculate the absolute value of the voltage difference between two individual cells within each battery module based on the voltage of the individual cells, generate the first voltage difference value, and calculate the second voltage difference value between the battery module with the highest terminal voltage and the battery module with the lowest terminal voltage in the battery pack based on the terminal voltage of all battery modules. S03: Based on comparing the first voltage difference with a preset first threshold and based on comparing the second voltage difference with a preset second threshold, a balance scheduling instruction is generated, which includes an intra-module balance trigger flag, an inter-module balance trigger flag, and balance target level information, wherein the first threshold is less than the second threshold; wherein, generating the balance scheduling instruction includes the following steps: The first voltage difference calculated for each battery module is compared with the first threshold. If the first voltage difference corresponding to any battery module is greater than the first threshold, a first logic signal is generated for that battery module. The first logic signal indicates that the internal equalization of the battery module needs to be triggered immediately, and the internal equalization trigger flag of the battery module is set. After completing the first voltage difference comparison of all battery modules, all battery modules that have not set the equalization trigger flag are selected, and the second voltage difference corresponding to these battery modules is compared with the second threshold. If the second voltage difference is greater than the second threshold, a second logic signal is generated. The second logic signal indicates that the equalization between modules corresponding to the battery pack needs to be triggered, and the equalization trigger flag between modules is set. When the inter-module equalization trigger flag is set, the battery modules whose intra-module equalization trigger flags are not set are divided into at least three discrete voltage levels according to the terminal voltage of all battery modules. Corresponding equalization target level information is generated for each battery module. The equalization target level information is used to indicate the target operating mode or target current coefficient that the battery module should be assigned in subsequent equalization control. At the same time, the corresponding intra-module equalization trigger flag, inter-module equalization trigger flag and equalization target level information are integrated to generate equalization scheduling instructions. S04: Dynamically schedule the first switching transistor in each battery module according to the equalization scheduling command. Second switching transistor and the third switching transistor The system combines switching states and controls each battery module to perform parallel self-balancing within the module or multi-level gradient balancing scheduling between modules corresponding to the first operating mode, the first operating mode and the second operating mode, and the second operating mode during the charging or discharging phase, thereby performing hierarchical dynamic balancing control of the battery pack.

[0005] The beneficial effects of this application are as follows: By collecting the voltage of all individual cells and the terminal voltage of all battery modules in real time throughout the entire charging or discharging process of the battery pack, subtle changes in individual cell voltage and module terminal voltage can be captured synchronously during charging and discharging. This allows for timely monitoring of the operating status of each cell and module, preventing the accumulation and expansion of deviations. Simultaneously, the data collection scope covers all individual cells and battery modules, avoiding the potential for overcharging or over-discharging due to unmonitored local conditions, providing timely and comprehensive data support for subsequent equalization judgments. Based on the collected individual cell voltages, the absolute value of the voltage difference between the two cells within each battery module is calculated to generate the first voltage difference. Simultaneously, based on the terminal voltages of all battery modules, the second voltage difference between the modules with the highest and lowest terminal voltages is calculated, distinguishing between deviations between individual cells within a module and overall deviations between modules, providing a clear basis for subsequent graded equalization. Furthermore, by clearly distinguishing between the two types of differences, priority can be given to subtle deviations between individual cells within a module, preventing these subtle deviations from accumulating into significant deviations between modules. This fundamentally shortens equalization time, reduces energy loss, avoids wasting stored energy in the battery pack, further improves equalization timeliness and charging / discharging efficiency, and ensures the consistency of each cell and module within the battery pack. Then, based on the comparison between the first voltage difference and the preset first threshold, and the second voltage difference and the preset second threshold, and knowing that the first threshold is less than the second threshold, it can determine in real time whether to initiate intra-module and inter-module balancing, achieving timely balancing triggering and avoiding deviation accumulation. Setting the first threshold to be less than the second threshold ensures that minor deviations between individual cells within the module are preferentially triggered for balancing, reducing the difficulty and energy loss of subsequent inter-module balancing. Simultaneously, the balancing target level information provides clear guidance for subsequent switching transistor state switching, avoiding blind balancing operations and shortening balancing time. According to the balancing scheduling command, the switching state combination of the three switching transistors in each battery module is dynamically scheduled, controlling each battery module to perform intra-module parallel self-balancing during charging or discharging, or to perform multi-level gradient balancing scheduling between modules between the first operating mode, mixed mode, and second operating mode. This achieves hierarchical dynamic balancing control of the battery pack. By switching the internal switching transistors of the module to adjust the series and parallel connection modes of individual batteries, without the need for external circuitry, the balancing time is significantly shortened, solving the balancing lag problem, while also significantly reducing energy loss and avoiding power waste. The hierarchical dynamic balancing and multi-level gradient scheduling can adjust the balancing intensity according to the type and degree of deviation, avoiding over-balancing or under-balancing, further improving balancing efficiency, ensuring full charging and discharging of the battery pack, significantly improving charging and discharging efficiency, while avoiding overcharging and over-discharging of individual cells, delaying battery aging, and extending the battery pack's lifespan. Attached Figure Description

[0006] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a schematic diagram of the electrical principle structure of a single battery cell topology in the battery pack of Example 1; Figure 2 This is a schematic diagram of the electrical principle of the battery module in the first operating mode in Example 1; Figure 3 This is a schematic diagram of the electrical principle of the battery module in the second operating mode in Example 1; Figure 4 This is a flowchart illustrating the steps of the charge-discharge equalization control method for the battery pack in Example 2. Figure 5 This is a schematic diagram of the process of parallel self-balancing within the module or multi-level gradient balancing scheduling between modules during the charging stage in Example 2. Figure 6 This is a schematic diagram of the process of parallel self-balancing within the module or multi-level gradient balancing scheduling between modules during the discharge stage in Example 2. Figure 7 for Figure 4 A detailed flowchart illustrating the steps involved in generating balanced scheduling instructions in S03. Detailed Implementation

[0007] The following drawings disclose several embodiments of the present invention. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not essential. Furthermore, for the sake of simplicity, some conventional structures and components will be shown in the drawings in a simple schematic manner.

[0008] To further understand the invention's content, features, and effects, the following embodiments are provided, and detailed descriptions are given below in conjunction with the accompanying drawings: Example 1 Reference Figure 1-3 , Figure 1 This is a schematic diagram of the electrical principle structure of a single battery cell topology in the battery pack of Example 1; Figure 2 This is a schematic diagram of the electrical principle of the battery module in the first operating mode in Example 1; Figure 3 This is a schematic diagram of the electrical principle when the battery module is in the second operating mode in Embodiment 1. The battery pack's individual cell topology in this embodiment includes at least two battery modules connected in series. Each battery module has a positive terminal P and a negative terminal N. Except for the last one, the negative terminal N of each battery module is connected to the positive terminal P of the adjacent battery module. Each battery module includes a first individual cell. Second single cell First switching transistor Second switching transistor and the third switching transistor The first single cell battery The positive electrode is connected to the positive terminal P, and the first single cell is... The negative terminal and the second switching transistor The source connection; the second single cell The positive terminal and the second switching transistor The drain connection, the second single cell The negative terminal is connected to the negative terminal N; the first switching transistor The source electrode is connected to the second single cell. The positive terminal and the second switching transistor Between the drains of the first switching transistor The drain of the third switching transistor is connected to the positive terminal P; The source of the third switch is connected to the negative terminal N. The drain is connected to the first single cell. The negative terminal and the second switching transistor Between the source and the first switch transistor; Second switching transistor and the third switching transistor The connection positions can be interchanged; Wherein, during the charging or discharging phase of each battery module, if the first switching transistor... With the third switching transistor The pulse width modulation signal is a low-level signal and the second switch transistor When the signal is high, the first switching transistor is controlled. With the third switching transistor Turn off and control the second switching transistor. The battery module is turned on to be in a first operating mode, and the first single cell is... With the second single cell The first switch is connected in series within the battery module; With the third switching transistor The pulse width modulation signal is a high-level signal and the second switch is When the signal is low, the first switching transistor is controlled. With the third switching transistor Turn on and control the second switching transistor. The battery module is switched off to a second operating mode, and the first individual battery cell is switched off. With the second single cell They are connected in parallel within the battery module.

[0009] In this embodiment of the invention, the battery pack consists of at least two battery modules connected in series. Each battery module has a positive terminal P and a negative terminal N. Except for the last battery module, the negative terminal N of the previous battery module is directly connected to the positive terminal P of the adjacent next battery module. This connection method forms a series circuit among all battery modules, ensuring that the charging and discharging current can flow through each battery module sequentially, providing a path for the energy output and input of the entire battery pack. Each battery module integrates a first single cell. Second single cell First switching transistor Second switching transistor and the third switching transistor The connection method of each component can be the first single cell battery. The positive terminal is connected to the positive terminal P of its battery module, the first single cell. The negative terminal is connected to the second switching transistor. The source electrode, the second single cell The positive terminal is connected to the second switching transistor. The drain electrode, the second single cell The negative terminal is connected to the negative terminal N of its battery module, and the first switching transistor... The source electrode is connected to the second cell. The positive terminal and the second switching transistor Between the drain and the first switching transistor The drain of the third switching transistor is connected to the positive terminal P of its battery module. The source of the third switch is connected to the negative terminal N of its battery module. The drain electrode is connected to the first single cell. The negative terminal and the second switching transistor The connection positions of the switching transistors between their sources can be interchanged, that is, the first switching transistor... Second switching transistor and the third switching transistor The positions of the switches can be interchanged, meaning that any one of the switches can be connected to the first single cell. Between the negative electrode and the negative terminal N, or the first single cell Negative electrode and second single cell Between the positive electrodes, or between the second single cell Between the positive electrode and the positive terminal P, and also, the connection position of any two of the switching transistors can also be in the first single cell. Between the positive electrode and the positive terminal P, or between the second single cell Between the negative terminal and the negative terminal N, ensure that the first single cell can be switched on or off after the switching transistor is turned on or off. With the second single cell It can be connected in series or in parallel, but its operating logic always corresponds to the switch state and operating mode.

[0010] The core operation of each battery module involves switching between two operating modes through the on / off control of various switching transistors. The operation of both modes is synchronized with the charging and discharging phases and directly determines the connection method and current distribution of the individual cells within the battery module. When the battery module is in the charging or discharging phase, if the first switching transistor... With the third switching transistor The pulse width modulation signal is a low-level signal, and the second switch transistor... The pulse width modulation signal is a high-level signal, and a low-level signal will control the first switching transistor. With the third switching transistor When turned off, a high-level signal will control the second switching transistor. When the circuit is turned on, the battery module enters the first operating mode, and the first single cell... With the second single cell A series connection is formed within the battery module, allowing the charging and discharging current to flow completely through the two series-connected individual cells without shunt loss. During charging, the current flows in from the positive terminal P and passes sequentially through the first individual cell. Second switching transistor Second single cell Finally, the current flows out from the negative terminal N; during discharge, the current flows in the opposite direction, flowing out from the positive terminal P, and passing through the second single cell in sequence. Second switching transistor First single cell The current flows in from the negative terminal N. In this mode, the current of a single cell is consistent with the charging and discharging current of the module, which is used to achieve fast charging and discharging.

[0011] When the first switching transistor With the third switching transistor The pulse width modulation signal is a high-level signal, and the second switch transistor... When the pulse width modulation signal is a low-level signal, the high-level signal controls the first switching transistor. With the third switching transistor When the transistor is turned on, a low-level signal controls the second switching transistor. When shut down, the battery module switches to the second operating mode, at which point the first individual battery cell... With the second single cell Within the battery module, parallel connections are formed. During operation, the higher-voltage individual cells automatically charge the lower-voltage cells until their voltages are equal, achieving self-balancing within the module. During charging, the total charging current is evenly distributed between the two parallel cells, with each cell receiving half of the total charging current. During discharging, the discharge currents of the two cells are combined to form the total discharge current of the module, again with each cell receiving half of the total discharge current. This mode achieves both cell-level balancing within the module and slows down the charging and discharging rate.

[0012] Example 2 like Figure 4-6 As shown, Figure 4 This is a flowchart illustrating the steps of the charge-discharge equalization control method for the battery pack in Example 2. Figure 5 This is a schematic diagram of the process of parallel self-balancing within the module or multi-level gradient balancing scheduling between modules during the charging stage in Example 2. Figure 6 This is a flowchart illustrating the parallel self-balancing within a module or the multi-level gradient balancing scheduling between modules during the discharge phase in Embodiment 2. This embodiment provides a charge-discharge balancing control method for a battery pack. The method is applied to the single-cell topology of the battery pack as described in Embodiment 1. The charge-discharge balancing control method for the battery pack includes the following steps: S01: During the charging or discharging phase of the battery pack, the voltage of all individual cells in the battery pack and the terminal voltage of all battery modules are collected in real time. In this embodiment of the invention, after the battery pack starts charging and discharging, the equalization control unit immediately activates the voltage acquisition module to synchronously acquire the voltage of all individual cells in the battery pack and the terminal voltage of all battery modules. The battery pack contains 8 battery modules, each containing 2 individual cells, for a total of 16 individual cells. The acquisition frequency is set to once every 20ms, and the acquisition timestamp is recorded synchronously during acquisition to ensure that the timing of the voltage data of all individual cells and the terminal voltage of the battery modules is consistent, avoiding deviations in subsequent difference calculations due to acquisition delays. During the acquisition process, the voltage acquisition module acquires the terminal voltage of each individual cell one by one through the acquisition interface integrated within the module, and then acquires the overall terminal voltage of each battery module. After acquisition, the data is directly transmitted to the temporary storage unit of the equalization control unit. The storage format is sorted in "module number-individual cell number-voltage value-timestamp" for easy subsequent classification and calculation. The collected terminal voltages of the eight battery modules were 3.22V, 3.24V, 3.25V, 3.26V, 3.28V, 3.29V, 3.31V, and 3.32V, respectively. Examples of the voltages of the two individual cells within each module are as follows: 3.22V module: 1.61V, 1.61V; 3.32V module: 1.67V, 1.65V; 3.28V module: 1.63V, 1.65V. The voltages of the remaining modules are evenly distributed around the module terminal voltages. The collected data is updated in real time to ensure it reflects the real-time status of the batteries.

[0013] S02: Calculate the absolute value of the voltage difference between two individual cells within each battery module based on the voltage of the individual cells, generate the first voltage difference value, and calculate the second voltage difference value between the battery module with the highest terminal voltage and the battery module with the lowest terminal voltage in the battery pack based on the terminal voltage of all battery modules. In this embodiment of the invention, by extracting all individual cell voltage and battery module terminal voltage data collected by S01, the absolute value of the voltage difference between the two individual cells within each battery module is first calculated to generate a first voltage difference. The calculation logic is to subtract the voltages of the two individual cells within the same module and take the absolute value. Each module corresponds to a first voltage difference, which is used to determine whether equalization is needed within the module. Taking a 3.32V module as an example, its two individual cell voltages are 1.67V and 1.65V, respectively, and the first voltage difference = |1.67V-1.65V| = 0.02V = 20mV; taking a 3.28V module as an example, the individual cell voltages are 1.63V and 1.65V, and the first voltage difference = |1.63V-1.65V| = 0.02V = 20mV; taking a 3.25V module as an example, the individual cell voltages are 1.62V and 1.63V, and the first voltage difference = 0.01V = 10mV. After the first voltage difference of all modules is calculated, it is stored one by one according to the module number. The second voltage difference is then calculated. The calculation logic is to subtract the minimum value from the maximum value of the terminal voltage of all battery modules in the battery pack. The terminal voltage data collected by S01 is extracted, and the highest terminal voltage value is determined to be 3.32V and the lowest value is 3.22V. The second voltage difference = 3.32V - 3.22V = 0.10V = 100mV. After the calculation is completed, it is stored together with all the first voltage differences to provide data support for subsequent equalization judgment.

[0014] S03: Based on the comparison between the first voltage difference and the preset first threshold, and based on the comparison between the second voltage difference and the preset second threshold, generate a balanced scheduling instruction that includes the balanced trigger flag within the module, the balanced trigger flag between modules, and the balanced target level information, wherein the first threshold is less than the second threshold; In this embodiment of the invention, a first threshold and a second threshold are preset, i.e., the first threshold is set to 50mV and the second threshold is set to 80mV, clearly indicating that the first threshold is less than the second threshold. These thresholds are set based on the individual characteristics of the battery module and are used to distinguish the triggering conditions for equalization within and between modules. The equalization control unit compares the first voltage difference of each module with the first threshold one by one. If the first voltage difference of a module is greater than the first threshold, equalization within the module is triggered, and the equalization trigger flag for that module is set; if the first voltage difference is less than or equal to the first threshold, the equalization trigger flag is set to 0. Simultaneously, the second voltage difference is compared with the second threshold. The calculated second voltage difference is 100mV, which is greater than the second threshold of 80mV, triggering equalization between modules, and the equalization trigger flag between modules is set; if the second voltage difference is less than or equal to the second threshold, the equalization trigger flag between modules is set to 0. Combining the first voltage differences of each module, all the first voltage differences of all modules are less than 50mV, therefore all the equalization trigger flags within modules are set to 0, and the equalization trigger flag between modules is set to 1. Subsequently, the balancing target level information is generated. Combining the previous level division logic, the 8 modules are sorted from high to low according to their terminal voltage and divided into 2 high-energy levels, 4 medium-energy levels, and 2 low-energy levels. The balancing target is clearly defined as reducing the voltage difference between modules. Finally, a balancing scheduling instruction containing balancing trigger flags within all modules, balancing trigger flags between modules, and balancing target level information is generated. The instruction is transmitted to the execution module of the balancing control unit for subsequent switch status control.

[0015] Among them, reference Figure 7 , Figure 7 for Figure 4 A detailed flowchart illustrating the steps involved in generating the balanced scheduling instruction in step S03 of this embodiment is provided. The generation of the balanced scheduling instruction in step S03 of this embodiment includes the following steps: S031: Compare the first voltage difference calculated for each battery module with the first threshold; S032: If the first voltage difference corresponding to any battery module is greater than the first threshold, a first logic signal is generated for the battery module. The first logic signal indicates that the internal equalization of the battery module needs to be triggered immediately, and the internal equalization trigger flag of the battery module is set. S033: After completing the first voltage difference comparison of all battery modules, filter out all battery modules that have not set the equalization trigger flag in the module, and compare the second voltage difference corresponding to these battery modules with the second threshold. If the second voltage difference is greater than the second threshold, generate a second logic signal. The second logic signal indicates that the equalization between modules corresponding to the battery pack needs to be triggered, and set the equalization trigger flag between modules. S034: When the inter-module equalization trigger flag is set, the battery modules with unset intra-module equalization trigger flags are divided into at least three discrete voltage levels, and corresponding equalization target level information is generated for each battery module. The equalization target level information is used to indicate the target operating mode or target current coefficient that the battery module should be allocated in subsequent equalization control. At the same time, the corresponding intra-module equalization trigger flag, inter-module equalization trigger flag and equalization target level information are integrated to generate an equalization scheduling command.

[0016] In this embodiment of the invention, the first voltage difference is defined as the voltage difference between two individual cells within each battery module, i.e., ΔV_cell = |Vx1|. Vx2|, the first threshold is set to 50mV. This threshold is determined based on the internal balancing mechanism of the battery module and is used to determine whether to immediately activate the internal balancing mechanism. The voltage acquisition module collects the terminal voltage of the two individual cells within each battery module every 20ms. After collection, the voltage difference calculation module calculates the first voltage difference for each battery module. The calculation process involves taking the absolute difference between the terminal voltages of the two individual cells. For example, within a certain battery module... The terminal voltage is 3.25V. The terminal voltage is 3.21V, and the calculated first voltage difference is 40mV; in another battery module The terminal voltage is 3.30V. With a terminal voltage of 3.23V, the calculated first voltage difference is 70mV. The first voltage difference calculated for each battery module is compared one by one with the first threshold of 50mV. The comparison process is executed synchronously by the internal equalization control unit to ensure that the comparison results of all battery modules are output synchronously, avoiding equalization delays caused by the comparison order.

[0017] If the first voltage difference corresponding to any battery module exceeds a first threshold of 50mV, the equalization control unit immediately generates a first logic signal for that battery module. This first logic signal is a high-level signal, explicitly indicating that the internal equalization of that battery module needs to be triggered immediately. Simultaneously, the internal equalization trigger flag set within the equalization control unit is changed from low to high, marking that the battery module is in an internal equalization state and will not participate in the initial screening for inter-module equalization. For example, for the battery module with a first voltage difference of 70mV, if the first voltage difference is greater than 50mV, the equalization control unit generates the first logic signal, sets the internal equalization trigger flag for that module, and triggers the switching of the MOS switch within that module, causing... and The drive signal becomes high level. When the drive signal goes low, the second operating mode is entered to achieve parallel self-balancing of individual cells within the module until the first voltage difference within the module drops to within 20mV.

[0018] After all battery modules complete the first voltage difference comparison, the system automatically records all battery modules with and without the internal equalization trigger flag set, completing the initial triggering and marking of internal equalization. Next, it filters out all battery modules whose internal equalization trigger flag is not set, i.e., those with a first voltage difference less than or equal to 50mV that do not require immediate internal equalization. The second voltage difference is defined as the terminal voltage difference between all battery modules without the internal equalization trigger flag set, i.e., ΔV_mod = Vmax_mod. Vmin_mod, based on the logic that inter-module equalization must be triggered after intra-module equalization is completed, and the voltage difference between modules must be higher than the individual voltage difference within a module, sets the second threshold to 80mV, which is greater than the first threshold of 50mV. This ensures that intra-module equalization takes precedence over inter-module equalization, preventing inter-module equalization from interfering with the intra-module individual voltage equalization effect. The voltage acquisition module reconfirms the terminal voltage of unset modules. The equalization control unit calculates the maximum and minimum terminal voltage values ​​of all unset modules; the difference between these two values ​​is the second voltage difference. For example, if six unset modules are selected with terminal voltages of 3.22V, 3.26V, 3.24V, 3.31V, 3.25V, and 3.32V respectively, the calculated maximum terminal voltage is 3.32V, the minimum is 3.22V, and the second voltage difference is 100mV. The calculated second voltage difference is compared with a second threshold of 80mV. If the second voltage difference is greater than the second threshold, the equalization control unit generates a second logic signal, which is a high-level signal, indicating that the inter-module equalization of the battery pack needs to be triggered, and the inter-module equalization trigger flag is set from low to high. If the second voltage difference is less than or equal to the second threshold, the second logic signal is not generated, the inter-module equalization trigger flag remains low, and inter-module equalization is not started.

[0019] When the inter-module equalization trigger flag is set, the terminal voltages of all battery modules whose inter-module equalization trigger flags are not set are sorted and divided into three discrete voltage levels from low to high. During the division process, it is ensured that the number of battery modules in each level is as even as possible. If the total number of modules cannot be evenly distributed, one more module is allocated to the middle level. Taking six unset modules as an example, the terminal voltage of 3.22V is the lowest level, 3.24V, 3.25V, and 3.26V are the medium level, and 3.31V and 3.32V are the highest level. Corresponding equalization target level information is generated for each battery module at each level: During charging, the equalization target level information for the lowest level module indicates that it adopts the first operating mode, with a target current coefficient of 1.0 and a charging current of Ic, to accelerate charging; the equalization target level information for the medium level module indicates that it adopts a hybrid PWM control of the first and second operating modes, with a target current coefficient of 0.5~1.0 and a charging current of 0.5~1.0Ic, for stable charging; the equalization target level information for the highest level module indicates that it adopts the second operating mode, with a target current coefficient of 0.5 and a charging current of Ic / 2, to suppress excessively fast charging. During discharge, the highest-level module adopts the first operating mode with a target current coefficient of 1.0 and a discharge current of Id, prioritizing discharge. The mid-level module uses a hybrid PWM control of the first and second operating modes, with a target current coefficient of 0.5~1.0 and a discharge current of 0.5~1.0Id, ensuring stable discharge. The lowest-level module adopts the second operating mode with a target current coefficient of 0.5 and a discharge current of Id / 2, mitigating excessively rapid discharge. The intra-module equalization trigger flags, inter-module equalization trigger flags, and equalization target level information corresponding to all battery modules are integrated and combined into equalization scheduling instructions according to a preset format. These instructions specify the equalization state, trigger type, and target operating parameters of each battery module, used for subsequent driving of MOS switch switching and current regulation, achieving balanced charge and discharge control of the battery pack.

[0020] S04: Dynamically schedule the first switching transistor in each battery module according to the equalization scheduling command. Second switching transistor and the third switching transistor The system combines switching states and controls each battery module to perform parallel self-balancing within the module or multi-level gradient balancing scheduling between modules corresponding to the first operating mode, the first operating mode and the second operating mode, and the second operating mode during the charging or discharging phase, thereby performing hierarchical dynamic balancing control of the battery pack.

[0021] In this embodiment of the invention, the first switching transistor in each battery module is dynamically scheduled according to the generated balanced scheduling instruction. Second switching transistor and the third switching transistor The switching state combinations directly determine the module's operating mode. Three switching state combinations correspond to three operating modes: the first operating mode is the first switching transistor... Third switching transistor Turn off, second switch transistor On; the second operating mode is the first switching transistor. Third switching transistor Turn on, second switching transistor The system operates in two modes: shutdown and hybrid mode, which involves alternating between two switching states. When the first voltage difference exceeds a first threshold of 50mV, the corresponding intra-module parallel self-balancing is executed. During the charging phase, the balancing control unit collects the first voltage difference between two individual cells within the module every 20ms, using 20mV as the internal loop threshold. If the first voltage difference is less than 20mV, intra-module balancing is complete and the module can participate in subsequent inter-module multi-level gradient balancing scheduling; otherwise, the second operating mode is maintained, and monitoring and comparison are repeated until the target is met. During the discharging phase, when the intra-module voltage difference is greater than 50mV, the system switches to the second operating mode. The balancing current is estimated using the voltage change rate at 20ms intervals and a preset internal resistance. A 100mA balancing current threshold and a 15mV voltage convergence threshold are used as the judgment conditions. When the real-time balancing current is less than 100mA and the voltage difference is less than 15mV, balancing is considered complete, and the system switches to the first operating mode and maintains monitoring for 500ms, sampling every 20ms during this period. If the voltage difference is consistently less than 50mV, it participates in subsequent inter-module multi-level gradient balancing scheduling; if it exceeds 50mV again, it returns to the second operating mode to continue balancing. Inter-module multi-level gradient balancing scheduling also includes charging and discharging phases. The core difference lies in adapting to the direction of charging and discharging current. The specific implementation is as follows: During the charging phase, the balancing control unit first selects battery modules that have completed intra-module balancing and whose first voltage difference is less than 50mV. The voltage acquisition module collects the terminal voltage every 20ms and records the timestamp. After sorting the terminal voltages from low to high, according to the logic of "making the number of each level as even as possible and assigning excess modules to the medium voltage level", the 8 modules are divided into 2 low voltage levels, 4 medium voltage levels, and 2 high voltage levels. For the low-voltage range, a first charging strategy is configured, with the control module continuously operating in the first operating mode, allocating a first current allocation coefficient of 1.0, and the charging current equal to the total charging current of 2A. For the medium-voltage range, a second charging strategy is configured, combining the internal resistance power loss calculation with the single-unit equivalent circuit model and predicting the temperature rise rate, and integrating the adjustment factor to generate a second current allocation coefficient of 0.54. A 10kHz pulse width modulation signal is used to control the alternation of the two operating modes, with an average charging current of 1.08A. For the high-voltage range, a third charging strategy is configured, with the control module continuously operating in the second operating mode, allocating a third current allocation coefficient of 0.5, and a charging current of 1A. During charging, the voltage difference is monitored every 20ms, and the ranges are reordered every 100ms until the voltage difference at the module terminals is less than 80mV, at which point the normal charging mode is switched. During the discharge phase, the equalization control unit first determines the discharge state, then selects 8 modules that meet the criteria, collecting the terminal voltage every 20ms and sorting them from high to low, dividing them into 2 high-energy ranges, 4 medium-energy ranges, and 2 low-energy ranges according to the same logic.For the high-energy range, a first-type discharge strategy is configured, continuously operating in the first operating mode, with a fourth current allocation coefficient of 1.0 and a discharge current of 2A. For the medium-energy range, a second-type discharge strategy is configured, calculating the remaining available capacity and capacity deviation rate through the attenuation equation, and generating a fifth current allocation coefficient of 0.9086 by incorporating the discharge demand factor, controlling the alternation of the two operating modes, with an average discharge current of approximately 1.82A. For the low-energy range, a third-type discharge strategy is configured, continuously operating in the second operating mode, with a sixth current allocation coefficient of 0.5 and a discharge current of 1A. During the discharge process, the voltage difference is monitored synchronously, and the ranges are reordered and reclassified every 100ms until the voltage difference at the module end is less than 80mV, at which point the normal discharge mode is switched. Through two-stage targeted scheduling, the switching state and current allocation coefficient are dynamically adjusted to achieve graded dynamic balance control of the battery pack, ensuring safe and balanced charging and discharging.

[0022] Furthermore, the first switching transistor in each battery module is dynamically scheduled according to the balanced scheduling instruction. Second switching transistor and the third switching transistor The combination of switch states includes the following steps: If the first voltage difference corresponding to all battery modules is greater than the first threshold, then the battery module whose equalization trigger flag is set will have its first switching transistor forcibly controlled. and the third switching transistor Turn on and control its second switching transistor. When shut down, the battery module is forced to switch to the second operating mode to prioritize the parallel self-balancing within the module; If the first voltage difference corresponding to all battery modules is less than or equal to the first threshold and the second voltage difference is greater than the second threshold, the target current coefficient of the battery module corresponding to the one whose equalization trigger flag is not set but whose equalization trigger flag is set is determined according to its corresponding equalization target level information. If the second voltage difference is less than or equal to the second threshold, the iteration is repeated and returned to S02. Based on the charging or discharging stage and the target current coefficient, the target operating mode switching command corresponding to the battery module is obtained. The target operating mode switching command includes a first operating mode, a mixture of the first and second operating modes, and a PWM mode signal with a duty cycle corresponding to the second operating mode. The first operating mode is the first switching transistor. and the third switching transistor Turn off, and the second switch transistor Conduction; Based on the target operating mode switching command, a first switching transistor corresponding to the battery module is generated. Second switching transistor and the third switching transistor A combination of pulse width modulation (PWM) signal sequences; applying the PWM signal sequence combination to the gate of the corresponding switch transistor to dynamically schedule the first switch transistor in each battery module. Second switching transistor and the third switching transistor The combination of switch states.

[0023] In this embodiment of the invention, by real-time reading of the first voltage difference value and the equalization trigger flag status within all battery modules, the first voltage difference values ​​of all battery modules are uniformly compared to confirm whether there is a situation where the first voltage difference value of all battery modules is greater than a first threshold of 50mV. If it is determined that the first voltage difference value corresponding to all battery modules is greater than 50mV, that is, the equalization trigger flag within all battery modules is set, a switch control signal is immediately sent to each battery module to forcibly control the first switch transistor in each battery module. and the third switching transistor Turn on, and simultaneously control the second switching transistor. The system is shut down, forcing all battery modules to switch to the second operating mode. In this mode, the two individual cells within each module form a parallel circuit, with the higher-voltage cell automatically charging the lower-voltage cell, performing parallel self-balancing within the module. Specifically, during the charging phase (e.g....), Figure 5 As shown), the equalization control unit continuously monitors the first voltage difference between the two individual cells in each battery module every 20ms through the voltage acquisition module. A voltage internal cycle threshold of 20mV is set. After each monitoring, the first voltage difference is compared with this threshold. If the first voltage difference is less than 20mV, it indicates that equalization within the module is complete, and its equalization trigger flag is set low, allowing it to participate in subsequent inter-module multi-level gradient equalization scheduling. If the first voltage difference is still greater than or equal to 20mV, the battery module continues to maintain its second operating mode, iteratively executing the monitoring and comparison operation until the first voltage difference meets the requirement. During the discharge phase (e.g....), Figure 6 As shown), the exit condition for parallel self-balancing within the module differs from that during the charging phase. When any battery module is forcibly switched to the second operating mode due to a first voltage difference exceeding 50mV, the balancing control unit continuously monitors the voltage of the two individual cells within the module. It estimates the current flowing through the second switching transistor using the voltage change rate and battery internal resistance parameters. The real-time equalization current is calculated by pre-setting and storing the internal resistance parameters based on the battery's factory test data, and the voltage change rate is calculated by dividing the difference between two consecutively collected cell voltages by the collection interval (20ms). A 100mA equalization current threshold and a 15mV voltage convergence threshold (a first threshold less than 50mV) are set. When the monitored real-time equalization current drops below 100mA and the first voltage difference decreases below 15mV, the self-balancing within the module is considered complete. After completion, the original gear strategy is not immediately restored; instead, the system switches to the first operating mode and maintains a preset monitoring duration of 500ms. During this monitoring duration, the first voltage difference is collected every 20ms. If it remains below 50mV, the equalization trigger flag within the module is set to low, allowing it to re-participate in the gear division and strategy allocation for multi-level gradient equalization scheduling between modules. If the first voltage difference exceeds 50mV again during the monitoring process, the system switches back to the second operating mode and continues to execute the parallel self-balancing within the module.

[0024] The system synchronously monitors the first and second voltage differences of all battery modules. If it is determined that the first voltage difference for all battery modules is less than or equal to a first threshold of 50mV, and the second voltage difference is greater than a second threshold of 80mV, meaning that the equalization trigger flag within all modules is not set and the equalization trigger flag between modules is set, the equalization control unit reads the equalization target level information corresponding to each unset module and extracts the target current coefficient for each module from the information. The target current coefficient for the lowest level module is 1.0, for the medium level it is 0.5~1.0, and for the highest level it is 0.5, ensuring that the target current coefficient completely corresponds to the previous level division. If the second voltage difference is detected to be less than or equal to a second threshold of 80mV, it indicates that the voltage difference between modules is within a reasonable range, and there is no need to perform equalization between modules. The equalization control unit does not send any switching scheduling instructions, iterates back to S02, collects the terminal voltage and individual cell voltage of all battery modules again, recalculates the first and second voltage differences, and generates a new equalization scheduling instruction to achieve closed-loop iteration of equalization control.

[0025] The system determines whether the battery pack is currently in a charging or discharging phase, and this state is determined by monitoring the direction of the total current in the battery pack. Current flowing into the battery pack indicates a charging phase, while current flowing out indicates a discharging phase. Based on the determined charging / discharging phase and the target current coefficient for each module, the target operating mode switching command for that battery module is obtained. The switching state of the first operating mode is defined as the first switching transistor. and the third switching transistor Turn off, second switching transistor When the circuit is turned on, the two individual cells in the battery module are connected in series, and all the charging and discharging current flows through the two individual cells; the second operating mode is the first switching transistor. and the third switching transistor On, second switching transistor When switched off, the two individual battery cells are connected in parallel. The hybrid mode is a PWM mode that switches between the first and second operating modes according to a preset duty cycle. During the charging phase, the lowest-level module (target current coefficient 1.0) corresponds to the first operating mode switching command, the mid-level module (target current coefficient 0.5~1.0) corresponds to the hybrid mode switching command, and the PWM duty cycle is set to 50%-100% for the first operating mode and 0%-50% for the second operating mode. The highest-level module (target current coefficient 0.5) corresponds to the second operating mode switching command. During the discharging phase, the highest-level module (target current coefficient 1.0) corresponds to the first operating mode switching command, the mid-level module (target current coefficient 0.5-1.0) corresponds to the hybrid mode switching command, and the PWM duty cycle is also set to 50%-100% for the first operating mode and 0%-50% for the second operating mode. The lowest-level module (target current coefficient 0.5) corresponds to the second operating mode switching command. The switching commands explicitly include the switching sequence and duty cycle parameters for each mode.

[0026] Based on the target execution mode switching command for each battery module, generate the first switching transistor corresponding to that module. Second switching transistor and the third switching transistor The pulse width modulation (PWM) signal sequence is combined. During the generation process, the on and off times of each switch are determined according to the mode type and duty cycle in the switching command. The PWM signal frequency is set to 10kHz, with a high-level signal controlling the switch to turn on and a low-level signal controlling the switch to turn off. For example, in the mid-range module during the charging stage, the generated PWM signal sequence combination is: second switch... High level for 500-1000μs, low level for 0-500μs, first switching transistor and the third switching transistor A high-level signal lasts for 0-500μs, and a low-level signal lasts for 500-1000μs, ensuring that the two modes alternately switch with duty cycles of 50%-100% and 0%-50% to achieve a target charging current of 0.5~1.0Ic. After generating a combination of pulse width modulation signal sequences, the signals are applied to the gates of the corresponding switches through the switch driver module. When the gate receives a high-level signal, the switch is turned on; when it receives a low-level signal, it is turned off, dynamically scheduling the switching state combinations of the three switches in each battery module.

[0027] Furthermore, such as Figure 5 As shown, the multi-level gradient balancing scheduling among modules during the charging phase includes the following steps: Based on the terminal voltage of all battery modules during the charging phase, they are sorted in ascending order; The sorted battery module set is dynamically divided into three subsets, which are defined as the low-voltage module subset, the medium-voltage module subset, and the high-voltage module subset, respectively. Configure a first type of charging strategy for each battery module in the low-voltage module subset. The first type of charging strategy is to control the battery module to continuously operate in the first operating mode and assign a first battery allocation coefficient to it, so that the charging current flowing through the battery module is equal to the total charging current of the battery pack. A second type of charging strategy is configured for each battery module in the medium-voltage module subset. The second type of charging strategy is to control the battery module to alternately operate in the first operating mode and the second operating mode according to its pulse width modulation duty cycle, and to assign a second current allocation coefficient to it. The second current allocation coefficient is between 0.5 and 1.0 or a value dynamically calculated based on the average voltage of the medium-voltage module subset, so that the average charging current flowing through the battery module is the product of the total charging current of the battery pack and the second current allocation coefficient. A third type of charging strategy is configured for each battery module in the high-voltage module subset. The third type of charging strategy is to control the battery module to continuously operate in the second operating mode and assign a third battery allocation coefficient to it, so that the charging current flowing through the battery module is equal to half of the total charging current of the battery pack.

[0028] In this embodiment of the invention, after the battery pack enters the charging stage, the equalization control unit first completes the intra-module equalization screening, excluding battery modules that are still in the intra-module equalization state (intra-module equalization trigger flag set), and only selecting battery modules that have completed intra-module equalization and whose first voltage difference is less than 50mV to participate in the inter-module multi-level gradient equalization scheduling. The voltage acquisition module collects the terminal voltage of all battery modules participating in the scheduling every 20ms, recording the acquisition timestamp synchronously to ensure that the terminal voltage data of all modules are consistent in timing and to avoid sorting deviations due to acquisition delays. After acquisition, the equalization control unit organizes all valid terminal voltage data, using a step-by-step comparison method to prioritize battery modules with smaller terminal voltages and prioritize those with larger terminal voltages, completing the sorting from low to high order and forming an ordered set of battery modules. Taking a battery module containing 8 modules that have completed internal balancing as an example, the collected terminal voltages are 3.22V, 3.24V, 3.25V, 3.26V, 3.28V, 3.29V, 3.31V, and 3.32V, respectively. The ordered set obtained after sorting is 3.22V, 3.24V, 3.25V, 3.26V, 3.28V, 3.29V, 3.31V, and 3.32V. After sorting, the ordered set is stored in real time to provide data support for subsequent dynamic division of gear levels.

[0029] Based on the total number of battery modules in the sorted set, the system is dynamically divided into low-voltage, medium-voltage, and high-voltage subsets. The core logic of this division is to ensure that the number of modules in each subset is as even as possible. If the total number of modules is divisible by 3, the number of modules in each subset is exactly the same. If the total number of modules is not divisible by 3, the excess modules are all assigned to the medium-voltage subset. This utilizes the transitional characteristics of the medium-voltage subset to avoid a large difference in the number of modules between the low-voltage and high-voltage subsets, which could lead to an imbalance in current distribution during the equalization process. During the division process, the total number of battery modules in the sorted set is first calculated. The total number is then divided by 3 to obtain the baseline number of modules for each subset. The actual number of modules for each subset is then determined based on the remainder. Taking the above 8 battery modules as an example, 8 divided by 3 gives a baseline quantity of 2, with a remainder of 2. Therefore, there are 2 modules in the low-voltage subset, 4 modules in the medium-voltage subset, and 2 modules in the high-voltage subset. Based on the ordered set of terminal voltages for the eight modules, the low-voltage module subset selects the first two modules in the order, with terminal voltages of 3.22V and 3.24V respectively; the medium-voltage module subset selects the middle four modules, with terminal voltages of 3.25V, 3.26V, 3.28V, and 3.29V respectively; and the high-voltage module subset selects the last two modules in the order, with terminal voltages of 3.31V and 3.32V respectively. After the division, the equalization control unit marks each module with a corresponding voltage level identifier, clearly defining the voltage level of each module, ensuring accurate matching of subsequent charging strategies, and avoiding voltage level confusion that could lead to equalization failure.

[0030] A first-type charging strategy is configured for each battery module in the low-voltage module subset. The core purpose of this strategy is to accelerate the charging speed of the low-voltage modules, quickly reduce the voltage difference between them and the medium-voltage and high-voltage modules, and achieve overall voltage balance of the battery pack. The equalization control unit sends switching control commands to each module in the low-voltage module subset. The control module continuously operates in the first operating mode, i.e., the first switching transistor within the control module... and the third switching transistor Turn off, second switch transistor When the module is turned on, the two individual battery cells are in series, allowing the entire charging current to flow through them without shunt loss, thus enabling rapid charging. Simultaneously, a first current allocation coefficient is assigned to this module, set to 1.0. The core calculation logic of this coefficient is the ratio of the module's actual charging current to the total charging current of the battery pack; therefore, the charging current flowing through this module equals the total charging current of the battery pack. Given the context-defined total charging current of 2A for the battery pack, each module in the low-voltage module subset receives a charging current of 2A. During charging, the equalization control unit synchronously collects the terminal voltage of the low-voltage module and the first voltage difference within the module every 20ms, tracking voltage changes in real time. If the first voltage difference within the module exceeds 50mV, inter-module equalization is immediately paused, switching to intra-module equalization mode. After intra-module equalization is complete, it re-participates in the inter-module multi-level gradient equalization scheduling, ensuring coordinated execution of intra-module and inter-module equalization.

[0031] A second type of charging strategy is configured for each battery module in the medium-voltage module subset. The core purpose of this strategy is to achieve stable charging, taking into account both charging speed and voltage balance. This avoids widening of the voltage difference between the medium-voltage and low-voltage modules, as well as preventing further increase in the voltage difference between the medium-voltage and high-voltage modules. At the same time, it ensures the safety of battery module temperature rise and avoids overheating damage. First, the real-time terminal voltage of each target battery module in the medium-voltage module subset is acquired through the voltage acquisition module. Simultaneously, the total charging current of the battery pack in the current charging stage is acquired (maintained at 2A). Combined with the parameters of the pre-fixed equivalent circuit model of the battery cell in the battery management system, which includes the ohmic internal resistance (0.02Ω), polarization internal resistance (0.03Ω), and capacitance (1000μF) parameters of the individual battery cell, the real-time internal resistance power loss of the target battery module is calculated by multiplying the total internal resistance by the square of the total charging current. The calculation logic is that the total internal resistance is equal to the sum of the ohmic internal resistance and the polarization internal resistance, and the real-time internal resistance power loss is equal to the total internal resistance multiplied by the square of the total charging current. Taking the above medium-voltage target battery module as an example, the total internal resistance is 0.05Ω, and the real-time internal resistance power loss is calculated as 0.05Ω × (2A). 2=0.2W. Subsequently, the equalization control unit extracts the temperature data of the target battery module from the most recent 10 collections through the temperature acquisition module, calculates the historical average temperature (set to 25℃), and combines it with the real-time internal resistance power loss. Based on the battery module's heat capacity parameter (10J / ℃), it predicts the temperature rise rate of the target battery module in the next control cycle (100ms). The prediction logic is that the temperature rise rate equals the real-time internal resistance power loss multiplied by the control cycle, and then divided by the heat capacity. The calculated temperature rise rate is 0.2W × 0.1s ÷ 10J / ℃ = 0.002℃ / ms. The battery management system presets an optimal temperature rise rate threshold (0.003℃ / ms) associated with the current average state of charge of the battery pack (set to 60%). This threshold is determined based on the matching relationship between the battery's thermal safety characteristics and the state of charge. The difference between the optimal temperature rise rate threshold and the predicted temperature rise rate is divided by the optimal temperature rise rate threshold to calculate the ratio, resulting in (0.003-0.002)÷0.003≈0.33. The calculation result is limited to between 0 and 1, generating a first adjustment factor of 0.33, and ensuring that the predicted temperature rise rate never exceeds the optimal temperature rise rate threshold. Next, the equalization control unit extracts the highest terminal voltage (3.24V) of the low-voltage module subset and the lowest terminal voltage (3.31V) of the high-voltage module subset. Combined with the average terminal voltage (3.27V) of the medium-voltage module subset, the difference between the average terminal voltage of the medium-voltage module and the highest terminal voltage of the low-voltage module is calculated to be 3.27V - 3.24V = 0.03V, and the difference between the lowest terminal voltage of the high-voltage module and the average terminal voltage of the medium-voltage module is 3.31V - 3.27V = 0.04V. Based on these two differences, the sigmoid function is used to dynamically calculate the second adjustment factor under the current control cycle. The expression for this function is set as f(x) = 1 ÷ (1 + e^(-x) / x) = 1 / (x - ... -x), where x is the input parameter, which is calculated as the difference between the average terminal voltage of the medium voltage range and the highest voltage of the low voltage range, divided by the difference between the lowest terminal voltage of the high voltage range and the highest voltage of the low voltage range. Substituting the values, we get x = 0.03V ÷ (0.03V + 0.04V) ≈ 0.43. Substituting this into the function, we get the second adjustment factor as approximately 0.61. The characteristics of this function are preset. When the average terminal voltage of the medium voltage range is closer to the lowest terminal voltage of the high voltage range, the second adjustment factor approaches 1.0, and when it is closer to the highest voltage of the low voltage range, it approaches 0.5. Finally, the first adjustment factor and the second adjustment factor are fused together to calculate the second current allocation coefficient according to the preset formula: Second Current Allocation Coefficient = First Adjustment Factor × Second Adjustment Factor + 0.5 × (1 - First Adjustment Factor). Substituting the values, we get 0.33 × 0.61 + 0.5 × (1 - 0.33) = 0.2013 + 0.335 = 0.536. We take an approximate value of 0.54 to ensure that the coefficient is between 0.5 and 1.0. When the first adjustment factor is 1, it indicates that the temperature rise is completely safe, and the second current allocation coefficient is equal to the second adjustment factor; when the first adjustment factor is 0, it indicates a temperature rise warning, and the second current allocation coefficient is fixed at 0.5. The calculated second current allocation coefficient is used as the target duty cycle of the pulse width modulation signal for controlling the switching of the switch in the target battery module. The pulse width modulation signal frequency is set to 10kHz, and the target duty cycle is 0.54, that is, the module operates in the first operating mode (first switch) for 54μs every 100μs. Third switching transistor Turn off, second switch transistor (Conduction), 46μs operation in the second operating mode (first switching transistor) Third switching transistor Turn on, second switching transistor (Shutdown) to achieve a smooth alternation between the two operating modes, so that the average charging current flowing through the target battery module is the product of the total charging current of the battery pack (2A) and the second current distribution coefficient (0.54), i.e. 1.08A, which takes into account both the balancing effect and temperature rise safety.

[0032] A third charging strategy is configured for each battery module in the high-voltage module subset. The core purpose of this strategy is to suppress the charging speed of the high-voltage module, prevent its terminal voltage from rising further, gradually narrow the terminal voltage difference with the low-voltage and medium-voltage modules, and ensure overall charging balance of the battery pack. Switching control commands are sent to each module in the high-voltage module subset, and the control module continuously operates in the second operating mode, i.e., the first switching transistor within the control module... and the third switching transistor Turn on, second switching transistor When the module is switched off, the two individual battery cells are connected in parallel, and the charging current is evenly distributed between them, achieving decelerated charging and effectively suppressing the rate of voltage rise in individual battery cells. Simultaneously, a third current allocation coefficient is assigned to this module, set to 0.5. According to the calculation logic of the current allocation coefficient, the charging current flowing through this battery module is equal to half of the total charging current of the battery pack. Combined with the total charging current of 2A for the battery pack, the charging current of each module in the high-voltage module subset is 1A. This current is evenly distributed between the two individual battery cells within the module, with each individual battery cell receiving a charging current of 0.5A. This effectively suppresses the rapid voltage rise of the high-voltage module and prevents damage to individual battery cells due to overcurrent. During charging, the equalization control unit monitors the terminal voltage of the high-voltage module and the first voltage difference within the module every 20ms. If the first voltage difference exceeds the first threshold of 50mV, inter-module equalization is immediately paused, switching to intra-module equalization mode. After intra-module equalization is completed, it re-participates in the inter-module multi-level gradient equalization scheduling. Throughout the charging process, the equalization control unit re-collects the voltage of all modules every 100ms, reorders and divides the battery modules into different charging levels, and dynamically optimizes the charging strategy parameters for each level until the voltage difference between all modules is less than the second threshold of 80mV. Then, it switches to normal charging mode to ensure that the battery pack charging process is safe, balanced, and efficient.

[0033] Furthermore, configuring the second type of charging strategy for each battery module in the medium-voltage module subset includes the following steps: Obtain the terminal voltage of the target battery module in the medium-voltage module subset, and calculate the real-time internal resistance power loss of the target battery module based on the total charging current of the battery pack in the current charging stage and the preset battery cell equivalent circuit model parameters. Based on real-time internal resistance power loss and historical average temperature data of the target battery module, predict the temperature rise rate of the target battery module in the next control cycle; obtain the optimal temperature rise rate threshold preset in the battery management system that is associated with the current average state of charge of the battery pack, and calculate the ratio of the optimal temperature rise rate threshold to the difference between the optimal temperature rise rate and the optimal temperature rise rate threshold. The output value is limited to 0~1 to generate the first adjustment factor, where the temperature rise rate ≤ the optimal temperature rise rate threshold. Obtain the highest terminal voltage of the low-voltage module subset and the lowest terminal voltage of the high-voltage module subset, and calculate the difference between the average terminal voltage of the medium-voltage module subset and the highest terminal voltage of the low-voltage module subset. At the same time, calculate the difference between the lowest terminal voltage of the high-voltage module subset and the average terminal voltage of the medium-voltage module subset. Based on the difference between the average terminal voltage of the medium-voltage module subset and the highest terminal voltage of the low-voltage module subset, and the difference between the lowest terminal voltage of the high-voltage module subset and the average terminal voltage of the medium-voltage module subset, a second adjustment factor is dynamically calculated under the current control cycle based on the sigmoid function. The sigmoid function is configured such that when the average terminal voltage is closer to the highest terminal voltage, the second adjustment factor approaches 1.0, and when the average terminal voltage is closer to the lowest terminal voltage, the second adjustment factor approaches 0.5. The first adjustment factor and the second adjustment factor are fused to obtain the second current allocation coefficient, specifically the second current allocation coefficient = first adjustment factor × second adjustment factor + 0.5 × (1 - first adjustment factor), so that the second current allocation coefficient is between 0.5 and 1.0. When the first adjustment factor is 1, it represents temperature rise safety, and the second current allocation coefficient = second adjustment factor; when the first adjustment factor is 0, it represents temperature rise warning, and the second current allocation coefficient = 0.5. The second current allocation coefficient is used as the target duty cycle of the pulse width modulation signal for controlling the on and off of the switching transistor in the target battery module, so as to realize the alternating operation of the first operating mode and the second operating mode.

[0034] In this embodiment of the invention, the terminal voltage of each target battery module in the medium-voltage module subset is first acquired every 20ms by the voltage acquisition module. The acquisition is synchronized with the acquisition of the total charging current of the battery pack to ensure consistent data timing. Simultaneously, the battery management system pre-stores the equivalent circuit model parameters of the individual battery cells. This model includes the ohmic internal resistance, polarization internal resistance, and capacitance parameters of the individual battery cells. The ohmic internal resistance is set to 0.02Ω, the polarization internal resistance to 0.03Ω, and the capacitance to 1000μF. The model parameters are calibrated and fixed using battery factory test data and are used to accurately calculate the real-time internal resistance power loss of the module. Based on the acquired terminal voltage of the target battery module and the total charging current of the battery pack at the current charging stage (set to 2A), combined with the equivalent circuit model parameters, the real-time internal resistance power loss of the target battery module is calculated. The calculation process is as follows: first, the total internal resistance of the module is calculated, which is the sum of the ohmic internal resistance and the polarization internal resistance, resulting in a total internal resistance of 0.05Ω; then, according to the power loss formula, real-time internal resistance power loss = total internal resistance × (total charging current) 2 Substituting the values, we obtain the real-time internal resistance power loss = 0.05Ω × (2A). 2 =0.2W. Taking a target battery module with a terminal voltage of 3.27V in the medium-voltage module sub-module as an example, its collected terminal voltage is stable at around 3.27V. Combined with the above parameters, the calculated real-time internal resistance power loss is stable at 0.2W, providing data support for subsequent temperature rise rate prediction.

[0035] The surface temperature of the target battery module is collected every 50ms, and the temperature data from the most recent 10 collections is stored. The average value of these data is calculated to obtain the historical average temperature data of the target battery module, assuming that the calculated historical average temperature is 25℃. Based on the real-time internal resistance power loss and historical average temperature data, the temperature rise rate of the target battery module in the next control cycle (the control cycle is set to 100ms) is predicted. The prediction logic is as follows: all internal resistance power loss is converted into heat. According to the heat capacity parameter of the battery module (set to 10J / ℃), the temperature rise value per unit time is calculated. Temperature rise rate = real-time internal resistance power loss × control cycle ÷ heat capacity. Substituting the values, the temperature rise rate is calculated as 0.2W × 0.1s ÷ 10J / ℃ = 0.002℃ / ms.The battery management system presets an optimal temperature rise rate threshold associated with the current average state of charge (SOC) of the battery pack. When the SOC is set to 60%, the corresponding optimal temperature rise rate threshold is set to 0.003℃ / ms. (Based on battery thermal safety characteristics, the battery module's thermal capacity is set to 10J / ℃, the real-time internal resistance power loss is 0.2W, and the control cycle is 100ms. Derived from these parameters, if the temperature rise rate exceeds 0.003℃ / ms, the temperature rise within the 100ms control cycle will exceed 0.03℃. Long-term accumulation will lead to a rapid increase in module temperature, exceeding the battery's safe operating range.) A temperature range (typically -20℃ to 60℃) poses a risk of thermal runaway, therefore a threshold below this critical value needs to be set. A state of charge (SOC) of 60% indicates the middle stage of battery charging. At this point, the individual battery cells have moderate activity and relatively stable internal resistance (ohmic internal resistance 0.02Ω, polarization internal resistance 0.03Ω), resulting in strong charge acceptance. Therefore, there is no need to excessively restrict temperature rise, and the threshold is set at 0.003℃ / ms, avoiding excessive temperature rise without affecting charging efficiency. If the SOC increases (e.g., above 80%), the battery's internal resistance increases, heat dissipation capacity decreases, and the optimal temperature rise rate threshold will decrease accordingly. For example, if the state of charge (SOC) decreases (e.g., below 30%), the threshold can be appropriately increased to form a dynamic threshold system linked to the SOC. The medium-voltage module needs to balance stable charging and voltage balance, with a target average charging current of approximately 1.08A. The corresponding internal resistance power loss is stable at 0.2W. A threshold of 0.003℃ / ms can match the temperature rise pattern under this power loss, ensuring that the predicted temperature rise rate (0.002℃ / ms) is within a safe range. Simultaneously, it provides a reasonable difference for calculating the first adjustment factor, ensuring that the second current distribution coefficient (0.54) is within the range... The optimal temperature rise rate threshold is set between 0.5 and 1.0 to achieve a balance between temperature rise safety and equalization. This threshold is calibrated and fixed using battery factory test data. During testing, module temperature rise data is collected under conditions of 60% state of charge and 2A charging current. After multiple tests, 80% of the safety threshold (approximately 0.00375℃ / ms) is taken as the preset threshold. This maintains safety redundancy while avoiding a decrease in charging efficiency due to an excessively low threshold, ultimately set at 0.003℃ / ms. The higher the state of charge, the lower the optimal temperature rise rate threshold, ensuring safe operation of the battery under different state of charge. The difference between the optimal temperature rise rate threshold and the predicted temperature rise rate is divided by the optimal temperature rise rate threshold to calculate the ratio: (0.003-0.002)÷0.003≈0.33. The calculation result is limited to between 0 and 1, generating a first adjustment factor of 0.33. The predicted temperature rise rate (0.002℃ / ms) is ≤ the optimal temperature rise rate threshold (0.003℃ / ms), which meets the safety requirements.

[0036] The system retrieves terminal voltage data from the low-voltage, high-voltage, and medium-voltage module subsets in real time. All data is valid within the most recent 20ms acquisition period, ensuring data timeliness. First, the terminal voltages of all modules in the low-voltage module subset are extracted, and the highest voltage is selected. Taking the eight module categories mentioned above as an example, the terminal voltages of the low-voltage module subset are 3.22V and 3.24V, with the highest voltage being 3.24V. Next, the terminal voltages of all modules in the high-voltage module subset are extracted, and the lowest voltage is selected. The terminal voltages of the high-voltage module subset are 3.31V and 3.32V, with the lowest voltage being 3.31V. Finally, the average terminal voltage of the medium-voltage module subset is calculated. The medium-voltage module terminal voltages are 3.25V, 3.26V, 3.28V, and 3.29V. The average terminal voltage is calculated as (3.25 + 3.26 + 3.28 + 3.29) ÷ 4 = 3.27V. Based on the above data, the difference between the average terminal voltage of the medium-voltage module subset and the highest terminal voltage of the low-voltage module subset is calculated, i.e., 3.27V - 3.24V = 0.03V; at the same time, the difference between the lowest terminal voltage of the high-voltage module subset and the average terminal voltage of the medium-voltage module subset is calculated, i.e., 3.31V - 3.27V = 0.04V. These two differences are used for the subsequent dynamic calculation of the second adjustment factor, which intuitively reflects the voltage difference between the medium-voltage module and other modules.

[0037] Based on the two calculated differences, the second adjustment factor under the current control cycle is dynamically calculated using the sigmoid function. The expression for the sigmoid function is set as f(x) = 1 ÷ (1 + e^x). -x ), where x is the input parameter. The calculation logic for the input parameter is (average terminal voltage of medium voltage range - highest terminal voltage of low voltage range) ÷ (lowest terminal voltage of high voltage range - highest terminal voltage of low voltage range). Substituting the values, we get x = 0.03V ÷ (0.04V + 0.03V) = 0.03 ÷ 0.07 ≈ 0.43. Substituting the x value into the sigmoid function, we get f(0.43) = 1 ÷ (1 + e -0.43 The second adjustment factor is 0.61. This sigmoid function is pre-configured with specific characteristics: when the average voltage at the medium voltage level is closer to the lowest voltage at the high voltage level, the input parameter x approaches 1, the function value approaches 1.0, and the second adjustment factor approaches 1.0; when the average voltage at the medium voltage level is closer to the highest voltage at the low voltage level, the input parameter x approaches 0, the function value approaches 0.5, and the second adjustment factor approaches 0.5, ensuring that the second adjustment factor can be dynamically adjusted according to the voltage position of the medium voltage module to meet the balancing requirements between modules. If the average voltage at the medium voltage level is 3.30V (closer to the lowest voltage at the high voltage level of 3.31V), the calculated x≈(3.30-3.24)÷0.07≈0.86, substituting this into the function, we get the second adjustment factor≈0.70, which approaches 1.0, conforming to the function configuration characteristics.

[0038] The first adjustment factor generated in the first step and the second adjustment factor generated in the fourth step are merged, and the second current allocation coefficient is calculated according to a preset formula: Second Current Allocation Coefficient = First Adjustment Factor × Second Adjustment Factor + 0.5 × (1 - First Adjustment Factor). This ensures the second current allocation coefficient is between 0.5 and 1.0. Substituting the first adjustment factor of 0.33 and the second adjustment factor of 0.61, the calculation is: 0.33 × 0.61 + 0.5 × (1 - 0.33) = 0.2013 + 0.335 = 0.5363, meaning the second current allocation coefficient is 0.54. If the first adjustment factor is 1, it indicates that the temperature rise is completely safe. In this case, the formula simplifies to: Second Current Allocation Coefficient = 1 × Second Adjustment Factor + 0.5 × 0 = Second Adjustment Factor. For example, when the second adjustment factor is 0.70, the second current allocation coefficient is 0.70. If the first adjustment factor is 0, it indicates a temperature rise warning. In this case, the formula simplifies to: Second Current Allocation Coefficient = 0 × Second Adjustment Factor + 0.5 × 1 = 0.5, ensuring the battery module's temperature rise is safe. After calculating the second current distribution coefficient, it is directly used as the target duty cycle of the pulse width modulation signal controlling the on / off state of the switching transistors within the target battery module. The pulse width modulation signal frequency is set to 10kHz, and the target duty cycle is 0.54, meaning the duty cycle for the first operating mode is 54% and the duty cycle for the second operating mode is 46%. Within every 100μs, the module operates in the first operating mode (first switching transistor) for 54μs. Third switching transistor Turn off, second switch transistor (Conduction), 46μs operation in the second operating mode (first switching transistor) Third switching transistor Turn on, second switching transistor The system alternates between two operating modes (shutdown and shutdown) to ensure that the average charging current flowing through the target battery module is the product of the total charging current of the battery pack (2A) and the second current distribution coefficient (0.54), which is 1.08A. This balances stable charging and voltage equalization while preventing excessive temperature rise, ensuring safe and stable charging of the medium-voltage module. The above steps are repeated every 100ms control cycle, dynamically updating the second current distribution coefficient and pulse width modulation duty cycle to adapt to real-time changes in battery module voltage and temperature rise, ensuring balanced charging between modules.

[0039] Furthermore, after implementing the alternating operation of the first and second operating modes of the medium-voltage module subset during the charging phase, the method further includes dynamically adjusting the members of the module subsets at different voltage levels, specifically: At the end of each control cycle, the updated terminal voltage of all battery modules is reacquired; based on the updated terminal voltage, the maximum difference between the terminal voltages of all battery modules is recalculated, and it is determined whether it is less than or equal to the second threshold. If it is less than or equal to the second threshold, the inter-module multi-level gradient equalization scheduling is exited and the iteration is restarted to return to S02. If the maximum difference in terminal voltage between modules is still greater than the second threshold, all battery modules are re-sorted from low to high according to the updated terminal voltage, and the composition of the low-voltage module subset, medium-voltage module subset and high-voltage module subset is dynamically updated based on the re-sorting result. For battery modules newly added to the medium-voltage module subset, their updated terminal voltage is recalculated according to the configured second-type charging strategy, and they are assigned an independent second current allocation coefficient and target duty cycle. For battery modules that remain in the medium-voltage module subset, their second current distribution coefficient is calculated by voltage hysteresis comparison based on their updated terminal voltage and the difference between the updated subset average terminal voltage and the adjacent voltage range boundary voltage, and their target duty cycle is adjusted accordingly.

[0040] In this embodiment of the invention, the control cycle is set to 100ms. At the end of each control cycle, the updated back-end voltage of all battery modules participating in the equalization scheduling is immediately collected through the voltage acquisition module. The acquisition interval is maintained at 20ms to ensure that the updated back-end voltage can reflect the voltage status of each module after charging in real time. The acquisition range covers 8 battery modules that have completed intra-module equalization and are not in the intra-module equalization state, excluding modules that are still performing intra-module equalization to avoid invalid data interfering with the adjustment logic. After the acquisition is completed, the equalization control unit sorts out all updated back-end voltages and calculates the maximum difference between the inter-module terminal voltages of all battery modules. The calculation logic is to extract the maximum value and the minimum value among the updated back-end voltages of all modules, and the difference between the two is the maximum difference between the inter-module terminal voltages. Based on the initial terminal voltages and charging strategies of the eight battery modules mentioned earlier, after a 100ms control cycle of charging, the updated terminal voltages are 3.23V, 3.25V, 3.26V, 3.27V, 3.28V, 3.29V, 3.30V, and 3.31V, respectively. The maximum value of 3.31V and the minimum value of 3.23V are extracted, and the maximum difference in terminal voltage between modules is calculated to be 0.08V, or 80mV. This maximum difference is then compared with the second threshold (80mV) to determine if it is less than or equal to the second threshold. If it is less than or equal to the second threshold, it indicates that the terminal voltages of all modules in the battery pack have reached a balanced state. The multi-level gradient balancing scheduling between modules is immediately exited, and the iteration returns to S02. The terminal voltages and individual cell voltages of all battery modules are collected again, and the first and second voltage differences are recalculated, initiating a new round of balancing control loops. If the maximum difference is still greater than the second threshold, the subsequent member adjustment process is initiated.

[0041] If the maximum difference in voltage between modules still exceeds the second threshold, the equalization control unit reorders all updated back-end voltages. Using a step-by-step comparison method, battery modules with smaller updated back-end voltages are placed at the front, and those with larger voltages at the back, forming a new ordered set of battery modules. Taking the updated back-end voltages of 3.23V, 3.25V, 3.26V, 3.27V, 3.28V, 3.29V, 3.30V, and 3.31V as an example, the reordered ordered set would be 3.23V, 3.25V, 3.26V, 3.27V, 3.28V, 3.29V, 3.30V, and 3.31V. According to the corresponding voltage level division logic, the baseline number of the 8 modules is 2, with a remainder of 2. The configuration remains unchanged: 2 modules for low voltage, 4 modules for medium voltage, and 2 modules for high voltage. Based on the reordered set, the composition of the three voltage levels is dynamically updated: the low voltage module subset selects the two modules with the highest voltage values, with terminal voltages of 3.23V and 3.25V respectively (the original low voltage 3.22V module voltage increases to 3.23V, while the original medium voltage 3.25V module voltage does not increase significantly and thus enters the low voltage level); the medium voltage module... The block subset selects the middle four modules, with terminal voltages of 3.26V, 3.27V, 3.28V, and 3.29V respectively (the original 3.24V medium-voltage module rises to 3.25V to enter the low-voltage range, the voltages of the other three original medium-voltage modules rise slightly, and the voltage of the original 3.30V high-voltage module drops to 3.29V to enter the medium-voltage range); the high-voltage module subset selects the last two modules in the sorted order, with terminal voltages of 3.30V and 3.31V respectively (the original 3.32V high-voltage module drops to 3.31V and remains in the high-voltage range). After the update, the equalization control unit re-marks the voltage level identifier for each module, overwriting the original identifier, to ensure that the voltage level members match the current voltage state.

[0042] For battery modules newly entering the medium-voltage module subset, the equalization control unit recalculates and assigns them an independent second current allocation coefficient and target duty cycle according to the second type of charging strategy, ensuring that the charging strategy of the newly entering modules adapts to the current medium-voltage equalization requirements. Taking a newly entered medium-voltage module with a terminal voltage of 3.29V as an example, the equalization control unit first obtains the updated back-end voltage of the module (3.29V) through the voltage acquisition module, and simultaneously acquires the current total charging current of the battery pack (maintaining a constant 2A). Combining the preset battery cell equivalent circuit model parameters (ohmic internal resistance 0.02Ω, polarization internal resistance 0.03Ω, capacitance 1000μF), the real-time internal resistance power loss of the module is calculated. The total internal resistance is 0.05Ω, and the real-time internal resistance power loss = 0.05Ω × (2A). 2=0.2W. Extract the temperature data from the last 10 times of this module and calculate the historical average temperature of 25.2℃. Combined with the heat capacity parameter of 10J / ℃, the predicted temperature rise rate for the next control cycle is 0.2W × 0.1s ÷ 10J / ℃ = 0.002℃ / ms. The current average state of charge of the battery pack is still 60%, and the optimal temperature rise rate threshold remains at 0.003℃ / ms. Calculate the first adjustment factor = (0.003 - 0.002) ÷ 0.003 ≈ 0.33. Then, the updated highest voltage of the low-voltage range (3.25V) and the lowest voltage of the high-voltage range (3.30V) are extracted. The updated average terminal voltage of the medium-voltage range is calculated as (3.26+3.27+3.28+3.29)÷4=3.275V. The difference between the average terminal voltage of the medium-voltage range and the highest voltage of the low-voltage range is 3.275-3.25=0.025V. The difference between the lowest voltage of the high-voltage range and the average terminal voltage of the medium-voltage range is 3.30-3.275=0.025V. Substituting these values ​​into the sigmoid function, the second adjustment factor is calculated. The input parameter x=0.025÷(0.025+0.025)=0.5, and the function value f(0.5)=1÷(1+e -0.5 )≈0.62, the second current distribution coefficient is calculated as 0.33×0.62+0.5×(1-0.33)=0.2046+0.335=0.5396, and the approximate value is 0.54. The target duty cycle is set to 0.54 to ensure that the charging rhythm of this module is consistent with that of other modules in the medium voltage range.

[0043] For battery modules that remain in the mid-voltage module subset, the equalization control unit calculates their second current allocation coefficient based on the difference between their updated back-end voltage, the updated average mid-voltage terminal voltage, and the boundary voltage of adjacent voltage levels, using voltage hysteresis comparison. The target duty cycle is adjusted accordingly to ensure the charging strategy for retained modules adapts to voltage changes and maintains the equalization effect. The logic of the voltage hysteresis comparison is as follows: a hysteresis width of 5mV is set. When the difference between the updated back-end voltage of the module and the average mid-voltage terminal voltage is within the hysteresis range, the original second current allocation coefficient is maintained; when it exceeds the hysteresis range, the coefficient is adjusted according to the direction of the difference: a positive difference (module voltage higher than average voltage) decreases the coefficient, while a negative difference (module voltage lower than average voltage) increases the coefficient. Taking the 3.27V terminal voltage module that remains in the medium voltage range as an example, its updated back-end voltage is 3.27V, and the average terminal voltage in the medium voltage range after the update is 3.275V. The difference between the two is -0.005V (i.e. -5mV), which is within the hysteresis width of 5mV. There is no need to adjust the second current distribution coefficient, which remains at 0.54, and the target duty cycle remains at 0.54. Taking a module with a terminal voltage of 3.26V that is kept in the medium voltage range as an example, the back-end voltage is updated to 3.26V. The difference between this and the average terminal voltage is -0.015V (i.e. -15mV), which exceeds the hysteresis range. Therefore, the second current distribution coefficient needs to be increased. The adjustment logic is that for every 1mV exceeding the hysteresis range, the coefficient increases by 0.01. The calculated adjusted coefficient is 0.54 + (15-5) × 0.01 = 0.64. The target duty cycle is adjusted to 0.64, that is, the duty cycle of the first operating mode is 64% and the duty cycle of the second operating mode is 36%. The average charging current is adjusted to 2A × 0.64 = 1.28A to speed up the charging process. Taking the 3.28V terminal voltage module retained in the medium voltage range as an example, the updated back-end voltage of 3.28V has a difference of 0.005V (5mV) from the average terminal voltage, which is within the hysteresis range, and the maintenance coefficient is 0.54. If the difference reaches 0.012V (12mV), it exceeds the hysteresis range, and the coefficient is reduced to 0.54-(12-5)×0.01=0.47. Since the coefficient needs to be between 0.5 and 1.0, it is adjusted to 0.5, and the target duty cycle is set to 0.5 to ensure compliance with the strategy requirements. After all the retained modules are adjusted, the equalization control unit synchronizes the new second current distribution coefficient and the target duty cycle to the corresponding switching transistor drive module, updates the pulse width modulation signal, and realizes the dynamic adjustment of the two operating modes. All the above steps are repeated in each control cycle until the maximum difference between the terminal voltages of the modules is less than or equal to the second threshold, thus completing the dynamic member adjustment and equalization control.

[0044] Furthermore, the calculation of the second current distribution coefficient through voltage hysteresis comparison includes the following steps: A first voltage hysteresis band is set at the boundary between the low-voltage module subset and the medium-voltage module subset, and a second voltage hysteresis band is set at the boundary between the medium-voltage module subset and the high-voltage module subset. A battery module is moved from the low-voltage module subset to the medium-voltage module subset only when its updated terminal voltage rises from below the lower limit of the first voltage hysteresis band to above its upper limit; conversely, it is moved back from the medium-voltage module subset to the low-voltage module subset only when its terminal voltage falls from above the upper limit of the first voltage hysteresis band to below its lower limit. A battery module is moved from the medium-voltage module subset to the high-voltage module subset only when its updated terminal voltage rises from below the lower limit of the second voltage hysteresis band to above its upper limit; conversely, it is moved back from the high-voltage module subset to the medium-voltage module subset only when its terminal voltage falls from above the upper limit of the second voltage hysteresis band to below its lower limit. Using the upper limit of the first voltage hysteresis band and the lower limit of the second voltage hysteresis band as dynamic input boundaries, the second battery allocation coefficient of any battery module in the mid-voltage module subset is dynamically calculated based on these dynamic input boundaries: 0.5 + 0.5 × ,in This is the updated terminal voltage of the battery module. This represents the upper limit of the current cycle of the first voltage hysteresis band. The lower limit of the current cycle of the second voltage hysteresis band is set, and the calculation result is also limited to between 0.5 and 1.0. The recalculated second battery allocation coefficient is directly used as the target duty cycle of the battery module in the next control cycle to generate the pulse width modulation signal for controlling its switching transistor.

[0045] In this embodiment of the invention, the equalization control unit first sets a first voltage hysteresis band at the boundary between the low-voltage module subset and the medium-voltage module subset, and sets a second voltage hysteresis band at the boundary between the medium-voltage module subset and the high-voltage module subset. The width of both hysteresis bands is set to 5mV. The upper and lower limits of the hysteresis bands are dynamically set based on the boundary voltages of each gear after the update in the previous control cycle, ensuring that the hysteresis bands can adapt to real-time changes in the battery module voltage, avoiding frequent gear switching due to small voltage fluctuations, and ensuring the stability of the equalization control. The setting logic for the first voltage hysteresis band is as follows: the highest voltage of the low-voltage module subset in the previous control cycle is used as a reference, with a lower limit of the reference voltage minus 2.5mV and an upper limit of the reference voltage plus 2.5mV. The setting logic for the second voltage hysteresis band is as follows: the lowest voltage of the high-voltage module subset in the previous control cycle is used as a reference, with a lower limit of the reference voltage minus 2.5mV and an upper limit of the reference voltage plus 2.5mV. Based on the updated gear boundary voltages, the highest voltage of the low-voltage gear in the previous control cycle was 3.25V. Therefore, the lower limit of the first voltage hysteresis band is 3.25V - 0.0025V = 3.2475V, and the upper limit is 3.25V + 0.0025V = 3.2525V. The lowest voltage of the high-voltage gear in the previous control cycle was 3.30V. Therefore, the lower limit of the second voltage hysteresis band is 3.30V - 0.0025V = 3.2975V, and the upper limit is 3.30V + 0.0025V = 3.3025V. After the two hysteresis bands are set, they are stored in the temporary storage unit of the equalization control unit as the benchmark for gear adjustment and coefficient calculation in the current control cycle.

[0046] The system monitors the updated terminal voltages of all battery modules in real time, focusing on modules near the boundary between low and medium voltage ranges. Based on the upper and lower limits of the first voltage hysteresis band, it determines whether to adjust the module's voltage range. A module is only moved from the low-voltage to the medium-voltage subset when its updated terminal voltage rises from below the lower limit (3.2475V) to above the upper limit (3.2525V). This ensures that voltage adjustments are only made when the voltage increase reaches the hysteresis width and stably exceeds the upper limit, avoiding erroneous adjustments caused by minor voltage fluctuations. For example, a module with a low-voltage mid-range terminal voltage of 3.24V, after one control cycle of charging, updates its terminal voltage to 3.253V. This voltage rises from below 3.2475V to above 3.2525V, meeting the adjustment condition, and is thus moved from the low-voltage to the medium-voltage range. Conversely, a battery module in the medium-voltage range is only adjusted back to the low-voltage range module subset when its terminal voltage drops from above the upper limit of the first voltage hysteresis band (3.2525V) to below its lower limit (3.2475V). For example, a module with a medium-voltage terminal voltage of 3.255V, after one control cycle of charging, updates its terminal voltage to 3.246V. This voltage drops from above 3.2525V to below 3.2475V, meeting the adjustment condition, and is thus adjusted back to the low-voltage range. After adjustment, the composition of each range is updated synchronously to ensure that the range assignment matches the voltage state.

[0047] The system synchronously tracks battery modules near the boundary between the medium and high voltage ranges. Based on the upper and lower limits of the second voltage hysteresis band, it determines whether to adjust their voltage range assignment. The adjustment logic is consistent with the first voltage hysteresis band, ensuring consistency and stability in voltage range adjustment. A battery module is only moved from the medium-voltage to the high-voltage subset when its updated terminal voltage rises from below the lower limit of the second voltage hysteresis band (3.2975V) to above its upper limit (3.3025V). For example, a module with a medium-voltage terminal voltage of 3.295V, after one control cycle of charging, updates its terminal voltage to 3.303V. This voltage rises from below 3.2975V to above 3.3025V, meeting the adjustment condition, and the module is moved from the medium-voltage to the high-voltage range. Conversely, when the terminal voltage of a battery module in the high-voltage range drops from above the upper limit of the second voltage hysteresis band (3.3025V) to below its lower limit (3.2975V), it is adjusted from the high-voltage module subset back to the medium-voltage module subset. For example, a module with a terminal voltage of 3.305V in the high-voltage range, after charging for one control cycle, updates its terminal voltage to 3.296V. ​​This voltage drops from above 3.3025V to below 3.2975V, meeting the adjustment condition, and it is adjusted from the high-voltage range back to the medium-voltage range. After the adjustment, the range identifiers of each module are re-marked, overwriting the original identifiers, and the boundary voltage between the medium-voltage and high-voltage ranges is updated to provide a reference for the hysteresis band setting of the next control cycle.

[0048] Extract the upper limit (3.2525V) of the first voltage hysteresis band and the lower limit (3.2975V) of the second voltage hysteresis band within the current control cycle. Use these two values ​​as dynamic input boundaries and substitute them into a preset formula to dynamically calculate the second current distribution coefficient of any battery module in the mid-voltage module subset. The formula is set as: Second current distribution coefficient = 0.5 + 0.5 × ,in This is the updated terminal voltage of the battery module. This represents the upper limit of the current cycle of the first voltage hysteresis band. This is the lower limit of the current cycle for the second voltage hysteresis band. During calculation, if the result exceeds the range of 0.5 to 1.0, the result is automatically limited to this range to ensure compliance with the requirements of the second type of charging strategy. Taking a module with a mid-voltage of 3.26V in the medium-voltage range as an example... =3.26V, =3.2525V, =3.2975V, first calculate the numerator = 3.26V - 3.2525V = 0.0075V, denominator = 3.2975V - 3.2525V = 0.045V. The ratio of the two is 0.0075 ÷ 0.045 ≈ 0.1667. Substituting into the formula, we get the second current distribution coefficient = 0.5 + 0.5 × 0.1667 ≈ 0.583. This value is between 0.5 and 1.0 and does not need to be restricted. Taking a module with a mid-range voltage of 3.28V in the medium voltage range as an example... =3.28V, numerator = 3.28 - 3.2525 = 0.0275V, ratio = 0.0275 ÷ 0.045 ≈ 0.6111, the calculated second current distribution coefficient = 0.5 + 0.5 × 0.6111 ≈ 0.805, which meets the requirements. Taking a module with a mid-voltage of 3.25V in the medium-voltage range as an example, =3.25V, numerator = 3.25 - 3.2525 = -0.0025V, the ratio is negative, the calculated second current distribution coefficient = 0.5 + 0.5 × (-0.0025 ÷ 0.045) ≈ 0.472, which is limited to 0.5. Taking a module with a mid-voltage of 3.30V in the medium-voltage range as an example, =3.30V, numerator = 3.30 - 3.2525 = 0.0475V, ratio = 0.0475 ÷ 0.045 ≈ 1.0556, the calculated second current distribution coefficient = 0.5 + 0.5 × 1.0556 ≈ 1.0278, which is limited to 1.0. After the calculation, the newly obtained second current distribution coefficient is directly used as the target duty cycle of the battery module in the next control cycle. The equalization control unit generates a pulse width modulation signal to control the corresponding switch based on the target duty cycle. The signal frequency is maintained at 10kHz, and the duty cycle is consistent with the value of the second current distribution coefficient, realizing the alternating operation of the first operating mode and the second operating mode, ensuring that the charging speed of the medium-voltage module is adapted to the voltage balance state. The above calculation and adjustment steps are repeated in each control cycle until the maximum difference between the terminal voltages of the modules is less than or equal to the second threshold.

[0049] Furthermore, in addition to being statically obtained based on a width of 5mV as described above, the first voltage hysteresis band can also be obtained through the following dynamic process. This dynamic process, which involves setting a first voltage hysteresis band at the boundary between the low-voltage module subset and the medium-voltage module subset, includes the following steps: Record all the terminal voltage change paths of the battery modules corresponding to the low-voltage module subset entering the medium-voltage module subset within the past N control cycles, forming an access voltage behavior sequence; filter and fit the access voltage behavior sequence to extract the access feature trajectory representing the terminal voltage near the boundary between the low-voltage module subset and the medium-voltage module subset; Based on the slope and curvature features of the admission feature trajectory, predict the dynamic offset of the boundary voltage of the low-voltage module subset within the current control cycle. Within the current control cycle, calculate the standard deviation of the terminal voltage of all battery modules in the current low-voltage module subset and the medium-voltage module subset, respectively, as the low-voltage dispersion and medium-voltage dispersion within the subset; calculate the difference between the maximum terminal voltage in the current low-voltage module subset and the minimum terminal voltage in the current medium-voltage module subset, as the boundary voltage difference reflecting the degree of voltage proximity between the two subsets at the boundary. The low-voltage range dispersion and the medium-voltage range dispersion are added together, and the absolute value of the dynamic offset is combined to generate the basic hysteresis bandwidth. Half of the boundary voltage difference is superimposed on the boundary between the low-voltage range module subset and the medium-voltage range module subset to generate a dynamic hysteresis center voltage. Based on this dynamic hysteresis center voltage, half of the basic hysteresis bandwidth is superimposed upwards and downwards to obtain the upper limit and lower limit of the first voltage hysteresis band, respectively.

[0050] In this embodiment of the invention, the first step is to collect and construct the access voltage behavior sequence. For example, the control cycle is set to 100ms, and N is 10 control cycles, which means the voltage change data within 1000ms is accumulated. This corresponds to the 8 battery modules mentioned above (the modules have completed equalization and the first voltage difference is less than 50mV). The focus is on the battery modules that move from the low-voltage module subset to the medium-voltage module subset. The terminal voltage data of these modules is collected in real time within each control cycle. The terminal voltage is collected every 20ms and the timestamp is recorded to ensure time consistency. By tracking cycle by cycle, the terminal voltage value collected each time during the process of each module moving from the low-voltage to the medium-voltage range is recorded and arranged in chronological order to form the access voltage behavior sequence. In this example, taking the module with a low voltage of 3.24V entering the medium voltage range as an example, the terminal voltages collected within 10 control cycles are 3.24V, 3.242V, 3.245V, 3.247V, 3.25V, 3.252V, 3.253V, 3.255V, 3.257V, and 3.26V respectively. The voltage data of this module and all other modules that enter the medium voltage range from the low voltage range are sorted by time, integrated to form a complete access voltage behavior sequence, and stored in the temporary storage unit of the equalization control unit for subsequent feature extraction.

[0051] Next, the input voltage behavior sequence is filtered and fitted to extract the input feature trajectory. The filtering uses a moving average filtering method, setting the sliding window to three sampling points, meaning the average of every three consecutive terminal voltage data points is taken. This filters out minor fluctuations caused by electromagnetic interference during voltage acquisition. Taking the input voltage behavior sequence of a certain module (3.24V, 3.242V, 3.245V, 3.247V, 3.25V, 3.252V, 3.253V, 3.255V, 3.257V, 3.26V) as an example, the filtered data is approximately (3.24 + 3.242 + 3.245) ÷ 3 ≈ 3.242V, (3.242+3.245+3.247)÷3≈3.245V, (3.245+3.247+3.25)÷3≈3.247V, (3.247+3.25+3.252)÷3≈3.249V, (3.25+3.252 +3.253)÷3≈3.252V, (3.252+3.253+3.255)÷3≈3.253V, (3.253+3.255+3.257)÷3≈3.255V, (3.255+3.257+3.26)÷3≈3.257V. After filtering, a linear fitting method is used to fit the filtered data. With the timestamp as the horizontal axis and the filtered voltage as the vertical axis, the fitted line is calculated using the least squares method. The expression of the fitted line is y=kx+b, where k is the slope and b is the intercept. During the calculation, the sum of the products of the filtered data and the corresponding timestamps, the sum of the data, and the sum of the timestamps are accumulated and substituted into the least squares formula to solve for k and b. After obtaining the fitted line, the line segment near the boundary between the low-voltage and medium-voltage ranges (i.e., the terminal voltage is between 3.2475V and 3.2525V) is extracted as the entry feature trajectory representing the terminal voltage near the boundary between the two ranges. This trajectory can reflect the voltage change pattern when the module enters the medium-voltage range from the low-voltage range, providing a basis for subsequent dynamic offset prediction.

[0052] Subsequently, based on the slope and curvature characteristics of the access feature trajectory, the dynamic offset of the boundary voltage corresponding to the low-voltage module subset within the current control cycle is predicted. First, the slope of the access feature trajectory is calculated. The slope k is calculated using a two-point method by fitting a straight line. The starting point (time t1, voltage v1) and the ending point (time t2, voltage v2) of the access feature trajectory are selected. The slope k = (v2 - v1) ÷ (t2 - t1). Taking the fitted access feature trajectory as an example, for instance, if the starting point t1 = 300ms, v1 = 3.247V, and the ending point t2 = 800ms, v2 = 3.252V, the slope k is calculated as (3.252 - 3.247) ÷ (800 - 300) = 0.005V ÷ 500ms = 0.00001V / ms. Curvature characteristics are achieved by calculating the curvature of the fitted straight line. Since the trajectory after linear fitting is a straight line, the curvature is 0. If the fitted trajectory is a curve, the curvature is calculated using the curvature formula, which is: ,in The second derivative of the fitted curve, The first derivative (i.e., the slope) is used to calculate the curvature. After that, the slope is multiplied by (1 + curvature) to obtain the product factor. The sign of the slope is then used to determine the voltage change trend. If the slope is greater than 0, it is determined that the voltage at the corresponding terminal of the low-voltage module subset is trending upward. The dynamic offset is used as a positive compensation value. The compensation value is proportional to the absolute value of the slope. The calculation logic is: dynamic offset = k × 1000, converted to mV, i.e., 0.00001V / ms × 1000 = 0.01mV / ms. Combined with the current control cycle of 100ms, the dynamic offset of the current control cycle is calculated as 0.01mV / ms × 100ms = 1mV. If the slope is less than or equal to 0, it is determined that there is no significant upward trend, and the dynamic offset is set to zero. The calculation of the high-voltage module subset when obtaining the second voltage hysteresis band is the opposite. It is determined whether the slope is less than zero. If it is less than zero, it shows a downward trend and is used as a negative compensation value. The rest of the calculation logic is the same as that of the low-voltage module, to ensure that the boundary voltage offset can adapt to the voltage change trend and avoid incorrect switching of the gear due to voltage change.

[0053] Next, the dispersion of the low-voltage range, the dispersion of the medium-voltage range, and the boundary voltage difference are calculated. Within the current control cycle, the terminal voltages of all battery modules within the low-voltage and medium-voltage module subsets are collected via the voltage acquisition module. The low-voltage module subset contains two modules with terminal voltages of 3.23V and 3.25V, respectively. The medium-voltage module subset contains four modules with terminal voltages of 3.26V, 3.27V, 3.28V, and 3.29V, respectively. To calculate the dispersion of the low-voltage range, first, the average value of the low-voltage module terminal voltages is calculated: average value = (3.23V + 3.25V) ÷ 2 = 3.24V. Then, the square of the difference between each module's terminal voltage and the average value is calculated: (3.23V - 3.24V). 2 =0.0001V2 (March 25-24) 2 =0.0001V 2 Adding the two squared values ​​and dividing by the number of modules, we get the variance: (0.0001 + 0.0001) ÷ 2 = 0.0001V 2 The standard deviation is the square root of the variance. Low-pressure dispersion = V = 0.01V = 10mV. Using the same method, the dispersion of the medium-voltage range is calculated. The average voltage at the medium-voltage end is (3.26 + 3.27 + 3.28 + 3.29) ÷ 4 = 3.275V. The square of the difference between the voltage at each module end and the average value is (3.26 - 3.275). 2 =0.000225V 2 (3.27-3.275) 2 =0.000025V 2 (3.28-3.275) 2 =0.000025V 2 (3.29-3.275) 2 =0.000225V 2 Variance = (0.000225 + 0.000025 + 0.000025 + 0.000225) ÷ 4 = 0.0005 ÷ 4 = 0.000125V 2 Medium pressure dispersion = V≈0.0112V=11.2mV. Then, the boundary voltage difference is calculated. The maximum terminal voltage of the low-voltage module subset is extracted as 3.25V, and the minimum terminal voltage of the medium-voltage module subset is 3.26V. The difference between the two is 3.26V-3.25V=0.01V=10mV. This difference reflects the closeness of the voltages of the two subsets at the boundary. The smaller the difference, the closer the boundary voltages of the two voltage levels are, and the easier it is for incorrect voltage switching to occur. This needs to be avoided through hysteresis band adjustment.

[0054] Finally, the upper and lower limits of the first voltage hysteresis band are generated. The dispersion of the low-voltage range and the dispersion of the medium-voltage range are added together to obtain 10mV + 11.2mV = 21.2mV. Combined with the dynamic offset of 1mV, the basic hysteresis bandwidth is generated. The basic hysteresis bandwidth = sum of dispersion + dynamic offset = 21.2mV + 1mV = 22.2mV. Half of the boundary voltage difference is superimposed on the boundary between the low-voltage range and the medium-voltage range to generate the dynamic hysteresis center voltage. The boundary voltage difference is 10mV, and half of it is 5mV. The initial boundary voltage between the low-voltage range and the medium-voltage range is 3.25V (the highest voltage of the low-voltage range in the previous control cycle). Therefore, the hysteresis center voltage = 3.25V + 5mV = 3.255V. Using the hysteresis center voltage as a reference, half of the basic hysteresis bandwidth is superimposed both upwards and downwards. Half of the basic hysteresis bandwidth is 22.2mV ÷ 2 = 11.1mV. Therefore, the upper limit of the first voltage hysteresis band is 3.255V + 11.1mV = 3.2661V, and the lower limit is 3.255V - 11.1mV = 3.2439V. When obtaining the second voltage hysteresis band, the boundary setting logic between the medium-voltage and high-voltage module subsets is consistent with that between the low-voltage and medium-voltage module subsets. The voltages at the high-voltage module subset terminals are 3.30V and 3.31V respectively, and the maximum voltage at the medium-voltage module subset terminal is 3.29V. The boundary voltage difference is 3.30V - 3.29V = 10mV. The high-voltage dispersion is calculated as (3.30 + 3.31) ÷ 2 = 3.305V, and the variance is (3.30 - 3.305). 2 + (3.31-3.305) 2 ÷2 = 0.000025V 2 The standard deviation is 0.005V = 5mV. The dispersion of the medium-voltage range is still 11.2mV. The sum of the dispersions is 5mV + 11.2mV = 16.2mV. If the dynamic offset of the high-voltage range is a negative compensation value of -1mV, the base hysteresis bandwidth is 16.2mV + |-1mV| = 17.2mV. However, if the dynamic offset of the high-voltage range is a negative compensation value of -20mV, the base hysteresis bandwidth is 16.2mV - 20mV = -3.8mV, leading to a decrease in the base... The hysteresis bandwidth is negative, but this value cannot be negative, so an absolute value needs to be added. The hysteresis center voltage = 3.295V (the average of the highest voltage of the medium voltage range and the lowest voltage of the high voltage range), the upper limit = 3.295V + 8.6mV = 3.3036V, and the lower limit = 3.295V - 8.6mV = 3.2864V. The hysteresis bandwidth set in this way can dynamically adapt to the voltage dispersion and voltage change trend, avoiding current fluctuations caused by frequent range switching.

[0055] Furthermore, the prediction of the dynamic offset of the boundary voltage corresponding to the low-voltage module subset within the current control cycle based on the slope and curvature features of the admission feature trajectory includes the following steps: Obtain the slope and curvature features corresponding to the admission feature trajectory; The product factor is obtained based on the slope and curvature features, specifically the product factor = slope × (1 + curvature). Based on the product factor, the dynamic offset of the boundary voltage corresponding to the low-voltage module subset in the current control cycle is predicted. It is determined whether the slope is greater than zero. If it is greater than zero, it is determined that the terminal voltage corresponding to the low-voltage module subset is on an upward trend, and the dynamic offset is used as a positive compensation value; otherwise, it is determined that there is no significant upward trend, and the dynamic offset is set to zero.

[0056] In this embodiment of the invention, the slope and curvature features corresponding to the admission feature trajectory are first obtained. The admission feature trajectory is the voltage change trajectory near the boundary between the low-voltage and medium-voltage ranges extracted after the moving average filtering and linear fitting described above. The slope feature is calculated by the first derivative of the fitted straight line. Two feature points on the trajectory are selected using the two-point method, namely the starting feature point (time t3=400ms, voltage v3=3.248V) and the ending feature point (time t4=900ms, voltage v4=3.253V) near the boundary. The slope k=(v4-v3)÷(t4-t3)=(3.253-3.248)÷(900-400)=0.005V÷500ms=0.00001V / ms. This slope is positive, indicating that the terminal voltage is on an upward trend. The curvature feature is calculated using the second derivative of the fitted curve. Since linear fitting was used previously, the fitted trajectory is a straight line, and the second derivative is 0, therefore the curvature K=0. If the admission feature trajectory is a non-linear curve, for example, if the voltage data of the filter back-end of a certain module are 3.24V, 3.243V, 3.247V, 3.252V, 3.258V, and 3.265V, a quadratic fitting is used to obtain the curve equation y=ax. 2 Given +bx+c, solve for the three parameters a, b, and c using the least squares method, and then calculate the second derivative. =2a, substituting into the curvature formula ,in =2ax+b, select points near the boundary and substitute them to calculate the curvature value.

[0057] The slope and curvature feature are then multiplied to obtain the product factor, which is calculated as: product factor = slope k × (1 + curvature K). Since the curvature K of the current linearly fitted trajectory is 0, the product factor is calculated as: product factor = 0.00001V / ms × 1 = 0.00001V / ms. Based on the product factor, the dynamic offset within the current control cycle is predicted. Combined with the positive or negative slope to determine the voltage change trend, the offset calculation rule is set: when the slope is greater than 0, it is determined that the voltage at the corresponding terminal of the low-voltage module subset is on an upward trend, and the dynamic offset is a positive compensation value. The compensation value is positively correlated with the absolute value of the slope and the product factor. The calculation logic is: dynamic offset = k × 1000 × (1 + K), where 1000 is the unit conversion factor to convert V / ms to mV / ms. When K = 0, the dynamic offset = 0.00001V / ms × 1000 × 1 = 0.01mV / ms. The current control cycle is 100ms, so the dynamic offset of the current control cycle = 0.01mV / ms × 100ms = 1mV. This positive compensation value is used to raise the hysteresis center voltage to prevent the module from entering the medium-voltage range prematurely due to the voltage rising too quickly, which would cause abnormal current distribution and generate heat. If the slope is less than or equal to 0, it is determined that there is no significant upward trend. In this case, regardless of the size of the product factor, the dynamic offset will be set to zero because when the voltage has no upward trend, the boundary voltage does not need to be compensated, thus avoiding over-compensation that could lead to gear switching delay.

[0058] For the high-voltage module subset, the prediction logic is the opposite of that for the low-voltage module. First, the slope and curvature features of the high-voltage module subset's admission feature trajectory (the voltage change trajectory of the module from the high-voltage module to the medium-voltage module) are obtained. The slope and curvature are calculated using the same method as for the low-voltage module. Two feature points near the boundary between the high-voltage module and the medium-voltage module are selected, such as (t5=400ms, v5=3.302V) and (t6=900ms, v6=3.297V). The slope k is calculated as (3.297-3.302)÷(900-400)=-0.005V÷500ms=-0.00001V / ms, and the curvature K=0 (linear fitting). The system checks if the slope is less than zero. The current slope is -0.00001V / ms, which is less than zero. Therefore, the voltage at the corresponding terminal of the high-voltage module subset is determined to be decreasing. The dynamic offset is used as the negative compensation value. The compensation value calculation logic is: dynamic offset = k × 1000 × (1 + K). Substituting the values, we get the dynamic offset = -0.00001V / ms × 1000 × 1 = -0.01mV / ms. The current control cycle is 100ms, therefore the negative compensation value = -1mV (consistent with the negative compensation logic for the high-voltage range). This negative compensation value is used to reduce the hysteresis center voltage between the high-voltage and medium-voltage ranges, preventing the module from prematurely entering the medium-voltage range due to a rapid voltage drop, which could lead to abnormal discharge current and excessive heat generation. If the slope of the high-voltage module subset is greater than or equal to zero, it is determined that there is no significant decreasing trend. The dynamic offset is then set to zero to ensure reasonable compensation of the high-voltage boundary voltage and avoid current fluctuations caused by improper compensation.

[0059] Furthermore, such as Figure 6 As shown, the multi-level gradient balancing scheduling among modules during the discharge phase includes the following steps: Based on the terminal voltage of all battery modules during the discharge phase, they are sorted in descending order; The sorted set of battery modules is dynamically divided into three additional subsets, which are defined as the high-energy module subset, the medium-energy module subset, and the low-energy module subset, respectively. Configure a first type of discharge strategy for each battery module in the high-energy module subset. The first type of discharge strategy is to control the battery module to continuously operate in the first operating mode and assign a fourth battery allocation coefficient to it so that the discharge current is equal to the total discharge current of the battery pack. A second type of discharge strategy is configured for each battery module in the medium-energy module subset. The second type of discharge strategy is to control the battery module to alternately operate in the first operating mode and the second operating mode according to its pulse width modulation duty cycle, and to assign a fifth current allocation coefficient to it, so that the average discharge current of the battery module is the product of the total discharge current of the battery pack and the fifth current allocation coefficient. A third type of discharge strategy is configured for each battery module in the low-energy module subset. The third type of discharge strategy is to control the battery module to continuously operate in the second operating mode and assign a sixth battery allocation coefficient to it, so that the discharge current is equal to half of the total discharge current of the battery pack.

[0060] In this embodiment of the invention, after the battery pack enters the discharge stage, the equalization control unit first determines the current state through the charge / discharge status monitoring module. This module determines the discharge state by monitoring the direction of the total current in the battery pack; the discharge stage occurs when the total current flows out of the battery pack. Subsequently, the equalization control unit completes the equalization screening within the module, excluding battery modules still in the equalization state (with the equalization trigger flag set), and selecting only 8 battery modules that have completed equalization within the module and have a first voltage difference of less than 50mV to participate in the multi-level gradient equalization scheduling between modules. The voltage acquisition module collects the terminal voltage of all battery modules participating in the scheduling every 20ms, and records the acquisition timestamp synchronously to ensure that the terminal voltage data of all modules are consistent in timing and to avoid sorting deviations due to acquisition delays. After the acquisition is completed, the equalization control unit organizes all valid terminal voltage data and uses a step-by-step comparison method to rank battery modules with larger terminal voltages at the front and battery modules with smaller terminal voltages at the back, completing the sorting from high to low and forming an ordered set of battery modules. Based on the initial discharge terminal voltages of the eight battery modules, the collected terminal voltages were 3.22V, 3.24V, 3.25V, 3.26V, 3.28V, 3.29V, 3.31V, and 3.32V, respectively. After sorting, the ordered set was 3.32V, 3.31V, 3.29V, 3.28V, 3.26V, 3.25V, 3.24V, and 3.22V. This ordered set was stored in real time after sorting to provide data support for subsequent dynamic gear allocation.

[0061] Based on the total number of battery modules in the sorted set, the system dynamically divides them into high-energy, medium-energy, and low-energy module subsets. The core logic of this division is consistent with the charging stage level division, ensuring that the number of modules in each level is as even as possible. If the total number of modules is not divisible by 3, all excess modules are assigned to the medium-energy module subset. This utilizes the transitional characteristics of the medium-energy level to avoid a large gap between the number of high-energy and low-energy modules, which could lead to current imbalance during discharge equalization. During the division process, the total number of battery modules in the sorted set is first calculated. The total number is then divided by 3 to obtain the baseline number of modules for each level. The actual number of modules for each level is then determined based on the remainder. For example, with 8 battery modules, 8 divided by 3 gives a baseline of 2, with a remainder of 2. Therefore, there are 2 high-energy modules, 4 medium-energy modules, and 2 low-energy modules. Based on the sorted set of terminal voltages, the high-energy module subset selects the first two modules in the sorted sequence, with terminal voltages of 3.32V and 3.31V respectively; the medium-energy module subset selects the middle four modules, with terminal voltages of 3.29V, 3.28V, 3.26V, and 3.25V respectively; and the low-energy module subset selects the last two modules in the sorted sequence, with terminal voltages of 3.24V and 3.22V respectively. After the partitioning is completed, the equalization control unit marks each module with a corresponding energy level identifier, clearly defining the energy level to which each module belongs. This ensures that subsequent discharge strategies can be accurately matched, avoiding energy level confusion that could lead to equalization failure.

[0062] Each battery module in the high-energy module subset is configured with a first-type discharge strategy. The core purpose of this strategy is to accelerate the discharge rate of the high-energy modules, quickly narrow the voltage difference between them and the mid-energy and low-energy modules, achieve overall battery pack discharge balance, and prevent over-discharge of high-energy modules or premature shutdown of low-energy modules. The equalization control unit sends switching control commands to each module in the high-energy module subset, and the control module continuously operates in the first operating mode, i.e., the first switching transistor within the control module... and the third switching transistor Turn off, second switch transistor When the module is turned on, the two individual cells are in series, allowing the entire discharge current to flow through them without shunt loss, thus achieving rapid discharge. Simultaneously, a fourth current allocation coefficient is assigned to this module, set to 1.0. The core calculation logic of this coefficient is the ratio of the module's actual discharge current to the total discharge current of the battery pack; therefore, the discharge current flowing through this module equals the total discharge current of the battery pack. The total discharge current of the battery pack is set to 2A, and the discharge current of each module in the high-energy module subset is 2A. During discharge, the equalization control unit synchronously collects the terminal voltage of the high-energy module and the first voltage difference within the module every 20ms, tracking voltage changes in real time. If the first voltage difference within the module exceeds 50mV, inter-module equalization is immediately paused, switching to intra-module equalization mode. After intra-module equalization is completed, it re-participates in the inter-module multi-level gradient equalization scheduling, ensuring coordinated execution of intra-module and inter-module equalization.

[0063] A second type of discharge strategy is configured for each battery module in the mid-energy module subset. The core purpose of this strategy is to achieve stable discharge, balancing discharge speed and voltage. This avoids widening of the voltage gap between mid-energy and high-energy modules, as well as preventing further increases in the voltage gap between mid-energy and low-energy modules, while ensuring battery module thermal safety and discharge efficiency. First, the real-time discharge capacity data of each target battery module in the mid-energy module subset is acquired through a capacity acquisition module. This data is calculated by multiplying the cumulative discharge current and discharge time, i.e., real-time discharge capacity = total discharge current × discharge time. For example, with a total discharge current of 2A and a discharge time of 100ms, the real-time discharge capacity = 2A × 0.1s = 0.2Ah. Simultaneously, the capacity decay trajectory in the battery's historical cycle data is extracted. This trajectory is generated by fitting the capacity change data from multiple charge-discharge cycles. The fitting logic is to use the cycle number as the horizontal axis and the remaining capacity as the vertical axis, and use linear fitting to obtain the decay equation, specifically Q(n) = Q0 - k. a ×n, where Q(n) is the remaining usable capacity of the battery module after n charge-discharge cycles, Q0 is the initial capacity of the battery module at the time of manufacture, and k a The parameters Q0 and k in this equation represent the capacity decay coefficient. a The parameters were rigorously calibrated using historical battery cycle test data. The specific parameter determination process is as follows: First, the battery module of this model was selected for charge-discharge cycle testing, and the measured remaining usable capacity at different cycle counts was continuously recorded. Three representative sets of test data were selected as calibration samples: 1.4Ah of measured remaining usable capacity after 100 cycles, 1.3Ah of measured remaining usable capacity after 200 cycles, and 1.2Ah of measured remaining usable capacity after 300 cycles. The three sets of sample data were then substituted into the decay equation Q(n)=Q0-k. a×n, we get three sets of equations: when n=100, 1.4=Q0-100k a When n=200, 1.3=Q0-200k a When n=300, 1.2=Q0-300k a The parameters are solved by solving a system of simultaneous equations. First, subtract the first two sets of equations: 1.4 - 1.3 = (Q0 - 100k) a )-(Q0-200k a The calculation yields 0.1 = 100k a Solving for k, we get a =0.1÷100=0.001Ah / time; k a Substituting 0.001 Ah / time into the first set of equations 1.4 = Q0 - 100 × 0.001, we get Q0 = 1.4 + 0.1 = 1.5 Ah; to verify the accuracy of the parameters, k... aSubstituting Q0 into the third set of sample data for verification, Q(300) = 1.5 - 0.001 × 300 = 1.2 Ah, which is completely consistent with the measured remaining usable capacity, confirming that the parameters are correct. The final attenuation equation is determined to be Q(n) = 1.5 - 0.001n. Combining this with the current cycle count (set to 400), substituting it into the attenuation equation, the remaining usable capacity of the target battery module at the end of the current discharge phase is calculated to be 1.5 - 0.001 × 400 = 1.1 Ah, consistent with the previously predicted value. Taking a module with a medium-energy-range terminal voltage of 3.28V as an example, the predicted remaining usable capacity is 1.1 Ah. Subsequently, the average remaining available capacity prediction value of the high-energy module subset is obtained synchronously. The current cycle counts of the two high-energy modules are 380 and 385, respectively. Substituting into the decay equation, their remaining available capacities are calculated to be 1.12Ah (1.5 - 0.001 × 380) and 1.115Ah (1.5 - 0.001 × 385). The average predicted value is (1.12 + 1.115) ÷ 2 = 1.1175Ah. The deviation of the average predicted value calculation in the previous text is corrected to ensure consistency with the derivation of the decay equation. The capacity deviation rate between the remaining available capacity of the target module and the average predicted value is calculated. The deviation rate is (1.1 - 1.1175) ÷ 1.1175 ≈ -0.0157. Taking the absolute value, we get 0.0157. This value reflects the capacity difference between the target module and the high-energy module. The larger the absolute value, the greater the difference between the remaining capacity of the target module and the high-energy module, and the higher the urgency of discharge. This urgency needs to be quantified by the first discharge demand factor. The first discharge demand factor is generated through fuzzy inference mapping. The fuzzy inference logic is pre-set, and the core correlation is that "the larger the absolute value of the capacity deviation rate, the closer the first discharge demand factor is to 1.0". The mapping process needs to combine the preset fuzzy rules to divide the absolute value of the capacity deviation rate into multiple intervals. Each interval corresponds to a fixed range of the first discharge demand factor. When the absolute value of the capacity deviation rate is in the range of 0.01 to 0.02, the corresponding mapped first discharge demand factor is 0.85. The absolute value of the capacity deviation rate calculated in this case is 0.0157, which is exactly in this range. Therefore, the mapped first discharge demand factor is 0.85. At the same time, this value is normalized to ensure that it is strictly constrained between 0 and 1. This reflects the high urgency of the target module's discharge and avoids the value from exceeding a reasonable range, providing reasonable input for the subsequent calculation of the comprehensive discharge demand index and the fifth current allocation coefficient.The voltage and current acquisition modules simultaneously acquire the terminal voltage (3.28V) and discharge current (2A) of the target module. The instantaneous power loss is calculated as: terminal voltage × discharge current - (theoretical power of a single unit in series). The theoretical power of a single unit in series is calculated as: (average voltage of a single unit × 2) × discharge current. The average voltage of a single unit is 3.28V ÷ 2 = 1.64V. The theoretical power is (1.64 × 2) × 2 = 6.56W. The instantaneous power loss is 3.28 × 2 - 6.56 = 0W. Combining this with the theoretical maximum allowable power loss of 0.3W under the current state of charge of 60%, the power load factor is obtained as: 0 ÷ 0.3 = 0. The power load factor is input into the inverse proportional function (y = 1 ÷ (1 + x)) to generate the second discharge demand factor as: 1 ÷ (1 + 0) = 1.0, which is constrained to be between 0 and 1. The first discharge demand factor and the second discharge demand factor are multiplicatively combined to obtain the comprehensive discharge demand index = 0.85 × 1.0 = 0.85. The gain coefficient k is set to 2 (where the specific derivation process is the fifth current distribution coefficient = 1.0). 0.5×exp( k × Comprehensive Discharge Demand Index); the medium-energy current allocation coefficient needs to be constrained between 0.5 and 1.0, and tends to 1.0 as the comprehensive discharge demand index increases, to ensure that the urgency of discharge matches the current allocation; a comprehensive discharge demand index of 0.85 is a relatively high value, and exp( The value of k×0.85 is relatively small, ensuring that the allocation coefficient is close to 1.0 and falls within the range of 0.5 to 1.0; if k=1, exp( (0.85)≈0.427, Fifth current distribution coefficient = 1.0 0.5 × 0.427 = 0.7865, the value is too low and cannot reflect the urgency of higher discharge at the medium energy level; if k = 2, exp( 1.7)≈0.1827, Fifth current distribution coefficient=1.0 0.5 × 0.1827 ≈ 0.9086, this value is between 0.5 and 1.0, which meets the requirements for stable discharge in the medium energy range and can also respond to the urgency of discharge caused by capacity deviation, matching the actual operating conditions of the module; if k ≥ 3, exp( Since k×0.85 approaches 0, the allocation coefficient is close to 1.0, which is not significantly different from the high-energy coefficient, thus losing the significance of gradient control. In summary, considering the discharge demand index, gradient control, and coefficient range constraints, the gain coefficient k=2 is determined. Substituting this into the formula, the fifth current allocation coefficient = 1.0-0.5×exp(-2×0.85), we calculate exp(-1.7)≈0.1827, and the fifth current allocation coefficient = 1.0-0.5×0.1827≈0.9086, which is between 0.5 and 1.0. This coefficient is directly mapped to a target duty cycle of 0.91, and the pulse width modulation signal frequency is set to 10kHz. That is, within every 100μs, the module operates in the first operating mode for 91μs and in the second operating mode for 9μs, achieving alternating operation of the two operating modes. The average discharge current = 2A×0.9086≈1.82A, which is suitable for the medium-energy discharge demand.

[0064] A third type of discharge strategy is configured for each battery module in the low-energy module subset. The core purpose of this strategy is to suppress the discharge rate of the low-energy modules, prevent their terminal voltage from dropping further, prevent damage to the low-energy modules due to over-discharge, gradually narrow the terminal voltage difference with the high-energy and medium-energy modules, and ensure overall battery pack discharge balance. The equalization control unit sends switching control commands to each module in the low-energy module subset, and the control module continuously operates in the second operating mode, i.e., the first switching transistor within the control module... and the third switching transistor Turn on, second switching transistor When the module is shut down, the two individual cells are connected in parallel, and the discharge current is evenly distributed between them, achieving decelerated discharge and effectively suppressing the rate of voltage drop in individual cells. Simultaneously, a sixth current allocation coefficient is assigned to this module, set to 0.5. According to the calculation logic of the current allocation coefficient, the discharge current flowing through this battery module is equal to half of the total discharge current of the battery pack. Combined with the total discharge current of 2A, the discharge current of each module in the low-energy module subset is 1A, which is evenly distributed between the two individual cells within the module, resulting in a discharge current of 0.5A for each individual cell. This effectively suppresses the rapid voltage drop of the low-energy module and prevents over-discharge damage to individual cells. During discharge, the equalization control unit monitors the terminal voltage of the low-energy module and the first voltage difference within the module every 20ms. If the first voltage difference exceeds the first threshold of 50mV, inter-module equalization is immediately paused, switching to intra-module equalization mode. After intra-module equalization is completed, it re-participates in the inter-module multi-level gradient equalization scheduling. Throughout the discharge phase, the equalization control unit re-collects the voltage of all modules every 100ms, reorders and divides the battery modules into different levels, and dynamically optimizes the discharge strategy parameters for each level until the voltage difference between all modules is less than the second threshold of 80mV. Then, it switches to normal discharge mode to ensure that the battery pack discharge process is safe, balanced, and efficient.

[0065] Furthermore, configuring the second type of discharge strategy for each battery module in the medium-energy module subset includes the following steps: The system acquires real-time discharge capacity data of the target battery module in the medium-energy module subset, and combines this data with the capacity decay trajectory extracted from the battery's historical cycle data to predict the remaining usable capacity of the battery module at the end of the current discharge phase. Simultaneously acquire the predicted average remaining available capacity of the high-energy module subset, calculate the capacity deviation rate between the remaining available capacity of the target battery module and the predicted average remaining available capacity, and generate a normalized first discharge demand factor that reflects the current discharge urgency of the target battery module through fuzzy inference mapping based on the capacity deviation rate. The instantaneous power loss of the target battery module is calculated based on its discharge current and terminal voltage. The instantaneous power loss is divided by the theoretical maximum allowable power loss of the target battery module under the current state of charge to obtain the power load rate characterizing the thermal safety margin. At the same time, the power load rate is input into an inverse proportional function to generate a second discharge demand factor characterizing the discharge efficiency. The output value of the second discharge demand factor is constrained to be between 0 and 1. The first discharge demand factor and the second discharge demand factor are multiplicatively fused to obtain the comprehensive discharge demand index; the comprehensive discharge demand index is used as the independent variable to calculate the fifth current allocation coefficient, specifically the fifth current allocation coefficient = 1.0 - 0.5 × exp(-k × comprehensive discharge demand index), where k is the preset gain coefficient; The fifth current distribution coefficient is directly mapped to the target duty cycle of the pulse width modulation signal that controls the on / off state of the corresponding switch of the target battery module, so as to realize the alternating operation of the first operating mode and the second operating mode.

[0066] In this embodiment of the invention, real-time discharge capacity data of target battery modules in the medium-energy module subset is acquired. The acquisition frequency is consistent with the terminal voltage acquisition frequency, both being acquired once every 20ms. During the acquisition process, discharge time and discharge current data are recorded simultaneously. The real-time discharge capacity data is calculated by multiplying the cumulative discharge current and discharge duration. The calculation logic is: real-time discharge capacity = total discharge current × discharge duration, where the total discharge current remains constant at a set value of 2A, and the discharge duration is accumulated from the time the target module enters the medium-energy subset. Taking a target module with a medium-energy terminal voltage of 3.28V as an example, the module has been continuously discharging for 100ms after entering the medium-energy range. Substituting into the formula, the real-time discharge capacity is calculated as 2A × 0.1s = 0.2Ah. Simultaneously, the equalization control unit extracts the battery historical cycle data of the target module, filters out the remaining usable capacity data corresponding to different charge-discharge cycle numbers from the historical data, and generates a capacity decay trajectory through linear fitting. The fitting process uses the cycle number as the horizontal axis and the remaining usable capacity as the vertical axis. The decay equation is obtained by calibration with multiple sets of historical data. The decay equation is specifically Q(n) = Q0 - k. a ×n, where Q(n) is the remaining usable capacity after n charge-discharge cycles, Q0 is the initial factory capacity, and k a This represents the capacity attenuation coefficient. The parameter determination process uses the calibrated parameters, i.e., Q0 = 1.5Ah, k a =0.001Ah / cycle, no need to reset. Combining the current cycle count of 400 set for the target module, substituting into the equation, the current remaining available capacity is calculated as 1.5 - 0.001 × 400 = 1.1Ah. This value is the remaining available capacity of the target module at the end of the current discharge phase.

[0067] The predicted remaining available capacity of all modules in the high-energy-range module subset is obtained synchronously. The acquisition method is consistent with the calculation logic of the target module, namely, it is calculated using the historical cycle data, current cycle count, and decay equation of each module. Combining the parameters of the two high-energy-range modules, the module with a terminal voltage of 3.32V has a current cycle count of 380. Substituting these values ​​into the decay equation, the remaining available capacity is calculated as 1.5 - 0.001 × 380 = 1.12Ah; the module with a terminal voltage of 3.31V has a current cycle count of 385. Substituting these values ​​into the decay equation, the remaining available capacity is calculated as 1.5 - 0.001 × 385 = 1.115Ah. The average predicted remaining available capacity of the high-energy-range module subset is then calculated. The calculation logic is the sum of the remaining available capacities of all modules divided by the number of modules. Substituting the values, we get (1.12Ah + 1.115Ah) ÷ 2 = 1.1175Ah. Then, the capacity deviation rate between the remaining available capacity of the target module and the average predicted value is calculated. The deviation rate is calculated as (remaining available capacity of the target module - average predicted value of the high-energy range) ÷ average predicted value of the high-energy range. Substituting the remaining available capacity of the target module of 1.1Ah and the average predicted value of 1.1175Ah, we get (1.1Ah - 1.1175Ah) ÷ 1.1175Ah ≈ -0.0157. Taking the absolute value, we get 0.0157. Based on the capacity deviation rate, a first discharge demand factor is generated through fuzzy inference mapping. The absolute value of the capacity deviation rate is divided into three core intervals: 0~0.005, 0.005~0.01, and 0.01~0.02. The specific settings of the first discharge demand factor for each interval are as follows, with the setting logic strictly adhering to the core correlation that "the larger the absolute value of the deviation rate, the closer the first discharge demand factor is to 1.0". Specifically, when the absolute value of the capacity deviation rate is in the 0~0.005 interval, the corresponding first discharge demand factor is 0.65. This interval has the smallest deviation rate, indicating that the capacity difference between the target module and the high-energy module is extremely small, and the urgency of discharge is the lowest, hence the smallest factor value. When the absolute value of the capacity deviation rate is in the 0.005~0.01 interval, the corresponding first discharge demand factor is 0.75. This interval has a moderate deviation rate, indicating that... There is a slight capacity difference between the target module and the high-energy module, indicating a moderate discharge urgency, with factor values ​​between 0.65 and 0.85. When the absolute value of the capacity deviation rate is in the range of 0.01 to 0.02, the corresponding first discharge demand factor is 0.85. The deviation rate in this range is relatively large, indicating a significant capacity difference between the target module and the high-energy module, and a high discharge urgency, with factor values ​​close to 1.0. The closer the first discharge demand factor is to 1.0, the better. Specifically, when the absolute value of the deviation rate is in the range of 0.01 to 0.02, the corresponding first discharge demand factor is 0.85. The calculated value of 0.0157 falls within this range, thus mapping the first discharge demand factor to 0.85. This value is then normalized to ensure it is strictly between 0 and 1, used to quantify the current discharge urgency of the target module.

[0068] The real-time terminal voltage of the target battery module is acquired through a voltage acquisition module, and the real-time discharge current is acquired through a current acquisition module. Both are acquired synchronously to ensure data timing consistency. Based on these two data points, the current instantaneous power loss of the target module is calculated. The calculation logic is: Instantaneous Power Loss = Real-time Terminal Voltage × Real-time Discharge Current - Theoretical Power of Two Cells in Series Connection. The theoretical power of two cells in series connection is the theoretical output power of the module, calculated as: Average Voltage of Two Cells × 2 × Real-time Discharge Current. The average voltage of two cells is half the real-time terminal voltage of the target module. Taking the target module S23 with a set real-time terminal voltage of 3.28V and a real-time discharge current of 2A as an example, the average voltage of two cells in series connection is 3.28V ÷ 2 = 1.64V, the theoretical power of two cells in series connection is 1.64V × 2 × 2A = 6.56W, and the instantaneous power loss is 3.28V × 2A - 6.56W = 0W. Subsequently, the theoretical maximum allowable power loss of the target module under the current state of charge is obtained. The current state of charge is set to 60%. Considering the correlation between the thermal safety characteristics of individual battery cells and the state of charge, the theoretical maximum allowable power loss under 60% charge is set to 0.3W. The power load factor is calculated by dividing the instantaneous power loss by the theoretical maximum allowable power loss. Substituting the values, we get 0W ÷ 0.3W = 0. The power load factor is input into a preset inverse proportional function to generate a second discharge demand factor. The inverse proportional function is y = 1 ÷ (1 + x), where x is the power load factor. The characteristic of this function is that the larger the power load factor, the smaller the second discharge demand factor, indicating lower discharge efficiency, and vice versa. Substituting the power load factor of 0, we obtain the second discharge demand factor = 1 ÷ (1 + 0) = 1.0. The output value is constrained between 0 and 1 to ensure that the value meets the requirements of subsequent fusion calculations.

[0069] The first discharge demand factor and the second discharge demand factor are multiplicatively fused. The fusion logic is that the two factors are directly multiplied to obtain a comprehensive discharge demand index. This index comprehensively reflects the discharge urgency and discharge efficiency of the target module. The larger the index, the higher the discharge urgency and the better the discharge efficiency, requiring a corresponding increase in discharge speed. Substituting the first discharge demand factor of 0.85 and the second discharge demand factor of 1.0, the comprehensive discharge demand index is calculated as 0.85 × 1.0 = 0.85. Then, the comprehensive discharge demand index is used as the independent variable and substituted into the preset formula to calculate the fifth current allocation coefficient. The specific formula is: fifth current allocation coefficient = 1.0 - 0.5 × exp(-k × comprehensive discharge demand index), where k is the preset gain coefficient. The gain coefficient is determined by strict calibration based on the discharge characteristics of the battery module, and k = 2. Substituting the comprehensive discharge demand index 0.85 and k = 2, the calculation process is as follows: first, calculate the index part exp(-2 × 0.85) = exp(-1.7) ≈ 0.1827, then calculate 0.5 × 0.1827 = 0.09135, and finally obtain the fifth current allocation coefficient = 1.0 - 0.09135 ≈ 0.9086, which is between 0.5 and 1.0.

[0070] The calculated fifth current allocation coefficient is directly mapped to the target duty cycle of the pulse width modulation (PWM) signal controlling the on / off state of the corresponding switch in the target battery module. The mapping logic ensures that the fifth current allocation coefficient and the target duty cycle are completely consistent, guaranteeing that the PWM signal duty cycle accurately matches the current discharge requirements. The PWM signal frequency remains at a set 10kHz, determined by the response characteristics of the battery module switch, ensuring smooth switching between the two operating modes without current surges. The target duty cycle is 0.9086, approximating to 0.91, meaning that within each 100μs period of the PWM signal, the target module operates in the first operating mode for 91μs and in the second operating mode for 9μs. Specifically, the first operating mode corresponds to the first switch within the module. and the third switching transistor Turn off, second switching transistor When the circuit is turned on, the two individual battery cells are connected in series, and there is no shunt loss in the discharge current; the second operating mode is the first switching transistor. and the third switching transistor On, second switching transistor When the battery is switched off, the two individual cells are connected in parallel, and the discharge current is diverted and slowed down. By alternating between the two operating modes, the average discharge current of the target module is calculated as follows: Total discharge current × Fifth current distribution coefficient = 2A × 0.9086 ≈ 1.82A. This achieves stable discharge while balancing discharge speed and voltage, adapting to the discharge requirements of the medium-energy module and ensuring that the voltage difference between the target module and the high-energy and low-energy modules gradually decreases, thus guaranteeing overall balanced discharge of the battery pack. Each control cycle follows a set 100ms interval, repeating all the above steps and dynamically updating the parameters to ensure that the second type of discharge strategy always adapts to the real-time state of the target module.

[0071] The above description is merely an embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of the claims of the present invention.

Claims

1. A method for charge-discharge equalization control of a battery pack, characterized in that, A single-cell topology for a battery pack, comprising at least two battery modules connected in series, each battery module having a positive terminal P and a negative terminal N, wherein the negative terminal N of each battery module (except the last one) is connected to the positive terminal P of the adjacent battery module; each battery module includes a first single cell. Second single cell First switching transistor Second switching transistor and the third switching transistor The first single cell battery The positive electrode is connected to the positive terminal P, and the first single cell is... The negative terminal and the second switching transistor The source connection; the second single cell The positive terminal and the second switching transistor The drain connection, the second single cell The negative terminal is connected to the negative terminal N; the first switching transistor The source electrode is connected to the second single cell. The positive terminal and the second switching transistor Between the drains of the first switching transistor The drain of the third switching transistor is connected to the positive terminal P; The source of the third switch is connected to the negative terminal N. The drain is connected to the first single cell. The negative terminal and the second switching transistor Between the source and the first switch transistor; Second switching transistor and the third switching transistor The connection positions are interchangeable; wherein, during the charging or discharging phase of each battery module, if the first switch transistor... With the third switching transistor The pulse width modulation signal is a low-level signal and the second switch transistor When the signal is high, the first switching transistor is controlled. With the third switching transistor Turn off and control the second switching transistor. The battery module is turned on to be in a first operating mode, and the first single cell is... With the second single cell The first switch is connected in series within the battery module; With the third switching transistor The pulse width modulation signal is a high-level signal and the second switch is When the signal is low, the first switching transistor is controlled. With the third switching transistor Turn on and control the second switching transistor. The battery module is switched off to a second operating mode, and the first individual battery cell is switched off. With the second single cell The battery pack is connected in parallel within the battery module, and the charge / discharge equalization control method includes the following steps: S01: During the charging or discharging phase of the battery pack, the voltage of all individual cells in the battery pack and the terminal voltage of all battery modules are collected in real time. S02: Calculate the absolute value of the voltage difference between two individual cells within each battery module based on the voltage of the individual cells, generate the first voltage difference value, and calculate the second voltage difference value between the battery module with the highest terminal voltage and the battery module with the lowest terminal voltage in the battery pack based on the terminal voltage of all battery modules. S03: Based on comparing the first voltage difference with a preset first threshold and based on comparing the second voltage difference with a preset second threshold, a balance scheduling instruction is generated, which includes an intra-module balance trigger flag, an inter-module balance trigger flag, and balance target level information, wherein the first threshold is less than the second threshold; wherein, generating the balance scheduling instruction includes the following steps: The first voltage difference calculated for each battery module is compared with the first threshold. If the first voltage difference corresponding to any battery module is greater than the first threshold, a first logic signal is generated for that battery module. The first logic signal indicates that the internal equalization of the battery module needs to be triggered immediately, and the internal equalization trigger flag of the battery module is set. After completing the first voltage difference comparison of all battery modules, all battery modules that have not set the equalization trigger flag are selected, and the second voltage difference corresponding to these battery modules is compared with the second threshold. If the second voltage difference is greater than the second threshold, a second logic signal is generated. The second logic signal indicates that the equalization between modules corresponding to the battery pack needs to be triggered, and the equalization trigger flag between modules is set. When the inter-module equalization trigger flag is set, the battery modules whose intra-module equalization trigger flags are not set are divided into at least three discrete voltage levels according to the terminal voltage of all battery modules. Corresponding equalization target level information is generated for each battery module. The equalization target level information is used to indicate the target operating mode or target current coefficient that the battery module should be assigned in subsequent equalization control. At the same time, the corresponding intra-module equalization trigger flag, inter-module equalization trigger flag and equalization target level information are integrated to generate equalization scheduling instructions. S04: Dynamically schedule the first switching transistor in each battery module according to the equalization scheduling command. Second switching transistor and the third switching transistor The system combines switching states and controls each battery module to perform parallel self-balancing within the module or multi-level gradient balancing scheduling between modules corresponding to the first operating mode, the first operating mode and the second operating mode, and the second operating mode during the charging or discharging phase, thereby performing hierarchical dynamic balancing control of the battery pack.

2. The charge-discharge equalization control method for a battery pack according to claim 1, characterized in that, The first switching transistor in each battery module is dynamically scheduled according to the balanced scheduling instruction. Second switching transistor and the third switching transistor The combination of switch states includes the following steps: If the first voltage difference corresponding to all battery modules is greater than the first threshold, then the battery module whose equalization trigger flag is set will have its first switching transistor forcibly controlled. and the third switching transistor Turn on and control its second switching transistor. When shut down, the battery module is forced to switch to the second operating mode to prioritize the parallel self-balancing within the module; If the first voltage difference corresponding to all battery modules is less than or equal to the first threshold and the second voltage difference is greater than the second threshold, the target current coefficient of the battery module corresponding to the one whose equalization trigger flag is not set but whose equalization trigger flag is set is determined according to its corresponding equalization target level information. If the second voltage difference is less than or equal to the second threshold, the iteration is repeated and returned to S02. Based on the charging or discharging stage and the target current coefficient, the target operating mode switching command corresponding to the battery module is obtained. The target operating mode switching command includes a first operating mode, a mixture of the first and second operating modes, and a PWM mode signal with a duty cycle corresponding to the second operating mode. The first operating mode is the first switching transistor. and the third switching transistor Turn off, and the second switch transistor Conduction; Based on the target operating mode switching command, a first switching transistor corresponding to the battery module is generated. Second switching transistor and the third switching transistor A combination of pulse width modulation signal sequences; applying the combination of pulse width modulation signal sequences to the gate of the corresponding switching transistor to dynamically schedule the first switching transistor in each battery module. Second switching transistor and the third switching transistor The combination of switch states.

3. The charge-discharge equalization control method for a battery pack according to claim 1, characterized in that, The multi-level gradient equalization scheduling among modules during the charging phase includes the following steps: Based on the terminal voltage of all battery modules during the charging phase, they are sorted in ascending order; The sorted battery module set is dynamically divided into three subsets, which are defined as the low-voltage module subset, the medium-voltage module subset, and the high-voltage module subset, respectively. Configure a first type of charging strategy for each battery module in the low-voltage module subset. The first type of charging strategy is to control the battery module to continuously operate in the first operating mode and assign a first battery allocation coefficient to it, so that the charging current flowing through the battery module is equal to the total charging current of the battery pack. A second type of charging strategy is configured for each battery module in the medium-voltage module subset. The second type of charging strategy is to control the battery module to alternately operate in the first operating mode and the second operating mode according to its pulse width modulation duty cycle, and to assign a second current allocation coefficient to it. The second current allocation coefficient is between 0.5 and 1.0 or a value dynamically calculated based on the average voltage of the medium-voltage module subset, so that the average charging current flowing through the battery module is the product of the total charging current of the battery pack and the second current allocation coefficient. A third type of charging strategy is configured for each battery module in the high-voltage module subset. The third type of charging strategy is to control the battery module to continuously operate in the second operating mode and assign a third battery allocation coefficient to it, so that the charging current flowing through the battery module is equal to half of the total charging current of the battery pack.

4. The charge-discharge equalization control method for a battery pack according to claim 3, characterized in that, Configuring a second type of charging strategy for each battery module in the medium-voltage module subset includes the following steps: Obtain the terminal voltage of the target battery module in the medium-voltage module subset, and calculate the real-time internal resistance power loss of the target battery module based on the total charging current of the battery pack in the current charging stage and the preset battery cell equivalent circuit model parameters. Based on real-time internal resistance power loss and historical average temperature data of the target battery module, predict the temperature rise rate of the target battery module in the next control cycle; obtain the optimal temperature rise rate threshold preset in the battery management system that is associated with the current average state of charge of the battery pack, and calculate the ratio of the optimal temperature rise rate threshold to the difference between the optimal temperature rise rate and the optimal temperature rise rate threshold. The output value is limited to 0~1 to generate the first adjustment factor, where the temperature rise rate ≤ the optimal temperature rise rate threshold. Obtain the highest terminal voltage of the low-voltage module subset and the lowest terminal voltage of the high-voltage module subset, and calculate the difference between the average terminal voltage of the medium-voltage module subset and the highest terminal voltage of the low-voltage module subset. At the same time, calculate the difference between the lowest terminal voltage of the high-voltage module subset and the average terminal voltage of the medium-voltage module subset. Based on the difference between the average terminal voltage of the medium-voltage module subset and the highest terminal voltage of the low-voltage module subset, and the difference between the lowest terminal voltage of the high-voltage module subset and the average terminal voltage of the medium-voltage module subset, a second adjustment factor is dynamically calculated under the current control cycle based on the sigmoid function. The sigmoid function is configured such that when the average terminal voltage is closer to the highest terminal voltage, the second adjustment factor approaches 1.0, and when the average terminal voltage is closer to the lowest terminal voltage, the second adjustment factor approaches 0.

5. The first adjustment factor and the second adjustment factor are fused to obtain the second current allocation coefficient, specifically the second current allocation coefficient = first adjustment factor × second adjustment factor + 0.5 × (1 - first adjustment factor), so that the second current allocation coefficient is between 0.5 and 1.

0. When the first adjustment factor is 1, it represents temperature rise safety, and the second current allocation coefficient = second adjustment factor; when the first adjustment factor is 0, it represents temperature rise warning, and the second current allocation coefficient = 0.

5. The second current allocation coefficient is used as the target duty cycle of the pulse width modulation signal for controlling the on and off of the switching transistor in the target battery module, so as to realize the alternating operation of the first operating mode and the second operating mode.

5. The charge-discharge equalization control method for a battery pack according to claim 4, characterized in that, After implementing the alternating operation of the first and second operating modes of the medium-voltage module subset during the charging phase, the method further includes dynamically adjusting the members of the module subsets at different voltage levels, specifically: At the end of each control cycle, the updated terminal voltage of all battery modules is reacquired; based on the updated terminal voltage, the maximum difference between the terminal voltages of all battery modules is recalculated, and it is determined whether it is less than or equal to the second threshold. If it is less than or equal to the second threshold, the inter-module multi-level gradient equalization scheduling is exited and the iteration is restarted to return to S02. If the maximum difference in terminal voltage between modules is still greater than the second threshold, all battery modules are re-sorted from low to high according to the updated terminal voltage, and the composition of the low-voltage module subset, medium-voltage module subset and high-voltage module subset is dynamically updated based on the re-sorting result. For battery modules newly added to the medium-voltage module subset, their updated terminal voltage is recalculated according to the configured second-type charging strategy, and they are assigned an independent second current allocation coefficient and target duty cycle. For battery modules that remain in the medium-voltage module subset, their second current distribution coefficient is calculated by voltage hysteresis comparison based on their updated terminal voltage and the difference between the updated subset average terminal voltage and the adjacent voltage range boundary voltage, and their target duty cycle is adjusted accordingly.

6. The charge-discharge equalization control method for a battery pack according to claim 5, characterized in that, The calculation of the second current distribution coefficient by voltage hysteresis comparison includes the following steps: A first voltage hysteresis band is set at the boundary between the low-voltage module subset and the medium-voltage module subset, and a second voltage hysteresis band is set at the boundary between the medium-voltage module subset and the high-voltage module subset. A battery module is moved from the low-voltage module subset to the medium-voltage module subset only when its updated terminal voltage rises from below the lower limit of the first voltage hysteresis band to above its upper limit; conversely, it is moved back from the medium-voltage module subset to the low-voltage module subset only when its terminal voltage falls from above the upper limit of the first voltage hysteresis band to below its lower limit. A battery module is moved from the medium-voltage module subset to the high-voltage module subset only when its updated terminal voltage rises from below the lower limit of the second voltage hysteresis band to above its upper limit; conversely, it is moved back from the high-voltage module subset to the medium-voltage module subset only when its terminal voltage falls from above the upper limit of the second voltage hysteresis band to below its lower limit. Using the upper limit of the first voltage hysteresis band and the lower limit of the second voltage hysteresis band as dynamic input boundaries, the second battery allocation coefficient of any battery module in the mid-voltage module subset is dynamically calculated based on these dynamic input boundaries: 0.5 + 0.5 × ,in This is the updated terminal voltage of the battery module. This represents the upper limit of the current cycle of the first voltage hysteresis band. The lower limit of the current cycle of the second voltage hysteresis band is set, and the calculation result is also limited to between 0.5 and 1.

0. The recalculated second battery allocation coefficient is directly used as the target duty cycle of the battery module in the next control cycle to generate the pulse width modulation signal for controlling its switching transistor.

7. The charge-discharge equalization control method for a battery pack according to claim 6, characterized in that, The step of defining a first voltage hysteresis band at the boundary between the low-voltage module subset and the medium-voltage module subset includes the following steps: Record all the terminal voltage change paths of the battery modules corresponding to the low-voltage module subset entering the medium-voltage module subset within the past N control cycles, forming an access voltage behavior sequence; filter and fit the access voltage behavior sequence to extract the access feature trajectory representing the terminal voltage near the boundary between the low-voltage module subset and the medium-voltage module subset; Based on the slope and curvature features of the admission feature trajectory, predict the dynamic offset of the boundary voltage of the low-voltage module subset within the current control cycle. Within the current control cycle, calculate the standard deviation of the terminal voltage of all battery modules in the current low-voltage module subset and the medium-voltage module subset, respectively, as the low-voltage dispersion and medium-voltage dispersion within the subset; calculate the difference between the maximum terminal voltage in the current low-voltage module subset and the minimum terminal voltage in the current medium-voltage module subset, as the boundary voltage difference reflecting the degree of voltage proximity between the two subsets at the boundary. The low-voltage range dispersion and the medium-voltage range dispersion are added together, and the absolute value of the dynamic offset is combined to generate the basic hysteresis bandwidth. Half of the boundary voltage difference is superimposed on the boundary between the low-voltage range module subset and the medium-voltage range module subset to generate a dynamic hysteresis center voltage. Based on this dynamic hysteresis center voltage, half of the basic hysteresis bandwidth is superimposed upwards and downwards to obtain the upper limit and lower limit of the first voltage hysteresis band, respectively.

8. The charge-discharge equalization control method for a battery pack according to claim 7, characterized in that, The prediction of the dynamic offset of the boundary voltage corresponding to the low-voltage module subset within the current control cycle based on the slope and curvature features of the admission feature trajectory includes the following steps: Obtain the slope and curvature features corresponding to the admission feature trajectory; The product factor is obtained based on the slope and curvature features, specifically the product factor = slope × (1 + curvature). Based on the product factor, the dynamic offset of the boundary voltage corresponding to the low-voltage module subset in the current control cycle is predicted. It is determined whether the slope is greater than zero. If it is greater than zero, it is determined that the terminal voltage corresponding to the low-voltage module subset is on an upward trend, and the dynamic offset is used as a positive compensation value; otherwise, it is determined that there is no significant upward trend, and the dynamic offset is set to zero.

9. The charge-discharge equalization control method for a battery pack according to claim 1, characterized in that, The multi-level gradient equalization scheduling among modules during the discharge phase includes the following steps: Based on the terminal voltage of all battery modules during the discharge phase, they are sorted in descending order; The sorted set of battery modules is dynamically divided into three additional subsets, which are defined as the high-energy module subset, the medium-energy module subset, and the low-energy module subset, respectively. Configure a first type of discharge strategy for each battery module in the high-energy module subset. The first type of discharge strategy is to control the battery module to continuously operate in the first operating mode and assign a fourth battery allocation coefficient to it so that the discharge current is equal to the total discharge current of the battery pack. A second type of discharge strategy is configured for each battery module in the medium-energy module subset. The second type of discharge strategy is to control the battery module to alternately operate in the first operating mode and the second operating mode according to its pulse width modulation duty cycle, and to assign a fifth current allocation coefficient to it, so that the average discharge current of the battery module is the product of the total discharge current of the battery pack and the fifth current allocation coefficient. A third type of discharge strategy is configured for each battery module in the low-energy module subset. The third type of discharge strategy is to control the battery module to continuously operate in the second operating mode and assign a sixth battery allocation coefficient to it, so that the discharge current is equal to half of the total discharge current of the battery pack.

10. The charge-discharge equalization control method for a battery pack according to claim 9, characterized in that, Configuring a second type of discharge strategy for each battery module in the mid-range module subset includes the following steps: The system acquires real-time discharge capacity data of the target battery module in the medium-energy module subset, and combines this data with the capacity decay trajectory extracted from the battery's historical cycle data to predict the remaining usable capacity of the battery module at the end of the current discharge phase. Simultaneously acquire the predicted average remaining available capacity of the high-energy module subset, calculate the capacity deviation rate between the remaining available capacity of the target battery module and the predicted average remaining available capacity, and generate a normalized first discharge demand factor that reflects the current discharge urgency of the target battery module through fuzzy inference mapping based on the capacity deviation rate. The instantaneous power loss of the target battery module is calculated based on its discharge current and terminal voltage. The instantaneous power loss is divided by the theoretical maximum allowable power loss of the target battery module under the current state of charge to obtain the power load rate characterizing the thermal safety margin. At the same time, the power load rate is input into an inverse proportional function to generate a second discharge demand factor characterizing the discharge efficiency. The output value of the second discharge demand factor is constrained to be between 0 and 1. The first discharge demand factor and the second discharge demand factor are multiplicatively fused to obtain the comprehensive discharge demand index; the comprehensive discharge demand index is used as the independent variable to calculate the fifth current allocation coefficient, specifically the fifth current allocation coefficient = 1.0 - 0.5 × exp(-k × comprehensive discharge demand index), where k is the preset gain coefficient; The fifth current distribution coefficient is directly mapped to the target duty cycle of the pulse width modulation signal that controls the on / off state of the corresponding switch of the target battery module, so as to realize the alternating operation of the first operating mode and the second operating mode.

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