Back contact cells, cell assemblies and photovoltaic systems

Abstract

The application relates to the technical field of solar cells, and provides a back contact cell, a cell assembly and a photovoltaic system. In the back contact cell, a first medium layer comprises a first part located on a first region, a second part located on a second region and a third part located on an isolation region; a p-type doped layer is arranged on the first part; an n-type doped layer is arranged on the second part; an isolation layer is arranged on the third part; the distribution density of first holes is greater than that of third holes; the distribution density of second holes is greater than that of the third holes; and the size of the third holes is smaller than that of the first holes and / or the size of the third holes is smaller than that of the second holes. In this way, by specifically differentiating the hole density and the hole size on different parts of the corresponding part region of the first medium layer, the combination of relatively optimal performance can be achieved as a whole, and the performance and conversion effect of the back contact cell are improved.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and more particularly to a back-contact cell, a cell module, and a photovoltaic system. Background Technology

[0002] In the field of solar cell technology, back-contact cells typically employ alternating n-type and p-type polycrystalline silicon layers on the back of the cell to form the electron emitter and hole back field, respectively, thereby achieving contact passivation of the positive and negative electrodes. This design completely avoids the metal electrode blocking the light-receiving surface, thus significantly improving the light-harvesting capability and short-circuit current output.

[0003] In related technologies, to avoid excessive recombination caused by direct contact between the n-region and p-region, a tunneling layer can be formed across the entire back side. P-type and n-type doped layers are then formed on this tunneling layer, with an undoped intrinsic layer acting as an isolation barrier. This achieves isolation between the p-region and n-region without deep trenches on the silicon substrate, reducing edge recombination losses caused by trenches. However, in this traditional approach, the n-type doped region, p-type doped region, and intrinsic isolation region are formed separately on the tunneling layer. The tunneling layer is often treated as a single unit for homogenization and optimization, failing to differentiate its design to address the distinct functional requirements of each region. This makes it difficult to achieve optimal field passivation and interface passivation matching across all three regions simultaneously. In particular, if the isolation region has poor passivation, it may still become a recombination center, limiting further improvements in cell efficiency. Summary of the Invention

[0004] This application provides a back-contact battery, a battery module, and a photovoltaic system.

[0005] This application is implemented as follows: the back contact battery in the embodiments of this application includes: A silicon substrate having opposing front and back sides, the back side including a first region and a second region spaced apart from each other and an isolation region located between the first region and the second region; A first dielectric layer is stacked on the back side, the first dielectric layer comprising a first portion located on the first region, a second portion located on the second region, and a third portion located on the isolation region, wherein a plurality of first holes are formed in the first portion, a plurality of second holes are formed in the second portion, and a plurality of third holes are formed in the third portion; and A p-type doped layer is stacked on the first part, an n-type doped layer is stacked on the second region, and an isolation layer is stacked on the third part. The two sides of the isolation layer are respectively connected to the p-type doped layer and the n-type doped layer. The p-type doped layer is doped with a third group element, and the n-type doped layer is doped with a fifth group element. Wherein, the distribution density of the first hole is greater than that of the third hole, the distribution density of the second hole is greater than that of the third hole, the size of the third hole is smaller than that of the first hole, and / or the size of the third hole is smaller than that of the second hole.

[0006] In some embodiments, the distribution density of the first pore is 5E3-5E4 pores / μm. 2 The distribution density of the second pore is 5E3-5E4 pores / μm. 2 The distribution density of the third pore is less than or equal to 3E4 pores / μm. 2 .

[0007] In some embodiments, the size of the first hole is less than or equal to 10 nm, the size of the second hole is less than or equal to 10 nm, and the size of the third hole is less than or equal to 3 nm.

[0008] In some embodiments, the distribution density of the second hole is greater than that of the first hole.

[0009] In some embodiments, the isolation layer includes a middle portion, a first contact portion, and a second contact portion. The first contact portion and the second contact portion are respectively connected to both sides of the middle portion. The first contact portion is located between the middle portion and the p-type doped layer and is connected to the p-type doped layer. The second contact portion is located between the middle portion and the n-type doped layer and is connected to the n-type doped layer. The first contact portion is doped with a third group element and the doping concentration of the third group element in the first contact portion is less than the doping concentration of the third group element in the p-type doped layer. The second contact portion is doped with a fifth group element and the doping concentration of the fifth group element in the second contact portion is less than the doping concentration of the fifth group element in the n-type doped layer. Wherein, the intermediate portion is an intrinsic portion undoped with Group 3 and Group 5 elements; or, the intermediate portion is doped with at least one of Group 3 and Group 5 elements, and the doping concentration of the dopant element in the intermediate portion is less than 1E16 / cm³. 3 .

[0010] In some embodiments, the distribution density of the third holes on the portion of the third part corresponding to the first contact portion is greater than the distribution density of the third holes on the portion of the third part corresponding to the middle portion. The distribution density of the third holes on the portion corresponding to the second contact portion in the third part is also greater than the distribution density of the third holes on the portion corresponding to the middle portion in the third part.

[0011] In some embodiments, a first inner expansion layer is formed on the portion of the silicon substrate covered by the p-type doped layer, the first inner expansion layer being doped with a third group element, and a second inner expansion layer is formed on the portion of the silicon substrate covered by the n-type doped layer, the second inner expansion layer being doped with a fifth group element. The first inner expansion layer and the second inner expansion layer are not in direct contact within the silicon substrate.

[0012] In some embodiments, a third inner expansion layer is formed on the portion of the silicon substrate covered by the first contact portion, the third inner expansion layer is doped with a third group element, and the thickness of the third inner expansion layer is less than the thickness of the first inner expansion layer. The portion of the silicon substrate covered by the second contact portion has a fourth inner expansion layer, which is doped with a fifth group element, and the thickness of the fourth inner expansion layer is less than the thickness of the second inner expansion layer.

[0013] In some embodiments, a fifth inner expansion layer is formed on the portion of the silicon substrate covered by the middle portion, and the thickness of the fifth inner expansion layer is less than the thickness of the third inner expansion layer and the thickness of the fourth inner expansion layer.

[0014] This application also provides a battery assembly comprising a plurality of back contact batteries as described in any of the preceding claims.

[0015] This application also provides a photovoltaic system, which includes the aforementioned battery components.

[0016] In the back contact battery, its fabrication method, battery module, and photovoltaic system of this application embodiment, the first dielectric layer includes a first portion located on a first region, a second portion located on a second region, and a third portion located on an isolation region. A p-type doped layer is disposed on the first portion, an n-type doped layer is disposed on the second portion, and an isolation layer is disposed on the third portion. The p-type and n-type doped layers are separated by the isolation layer. The distribution density of the first pore is greater than that of the third pore, the distribution density of the second pore is greater than that of the third pore, and the size of the third pore is smaller than that of the first pore and / or the size of the third pore is smaller than that of the second pore. Thus, by specifically differentiating the pore density and pore size in different portions of the corresponding regions of the first dielectric layer, a superior combination of performance can be achieved overall, thereby improving the performance and conversion efficiency of the back contact battery.

[0017] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of a photovoltaic system module provided in an embodiment of this application; Figure 2 This is a schematic diagram of a battery assembly provided in an embodiment of this application; Figure 3 This is a schematic diagram of the planar structure of the back contact battery provided in an embodiment of this application; Figure 4 yes Figure 3 A schematic diagram of the cross-sectional structure of the back contact battery along line IV-IV. Figure 5 This is a schematic diagram of the hole distribution structure on the first dielectric layer of the back contact battery provided in the embodiments of this application; Figure 6 This is another cross-sectional structural diagram of the back contact battery provided in the embodiments of this application; Figure 7 This is another cross-sectional structural diagram of the back contact battery provided in the embodiments of this application; Figure 8 This is another cross-sectional structural diagram of the back contact battery provided in the embodiments of this application.

[0019] Explanation of key component symbols: Photovoltaic system 1000, battery module 200, back contact battery 100, silicon substrate 10, front side 11, back side 12, first region 121, second region 122, isolation region 123, first dielectric layer 20, first part 21, first hole 210, second part 22, second hole 220, third part 23, third hole 230, p-type doped layer 31, n-type doped layer 32, isolation layer 33, first inner expansion layer 40, second inner expansion layer 50, third inner expansion layer 60, fourth inner expansion layer 70, fifth inner expansion layer 80. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. It should be noted that the embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this application and are not intended to limit this application.

[0021] In the description of this application, it should be understood that the terms "upper", "lower", "left", "right", "lateral", "longitudinal", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0022] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "several" means two or more, unless otherwise explicitly specified.

[0023] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0024] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0025] Please see Figure 1 and Figure 2 The photovoltaic system 1000 in this application embodiment may include the battery module 200 in this application embodiment, and the battery module 200 in this application embodiment may include a plurality of back contact batteries 100 in this application embodiment.

[0026] In embodiments of this application, multiple back-contact batteries 100 in the battery assembly 200 can be connected in series to form multiple battery strings. Each battery string can be connected in series, in parallel, or in a series-parallel combination to achieve current collection and output. For example, the connection between individual battery cells can be achieved by welding solder strips, or the connection between individual battery strings can be achieved by busbars. In some embodiments, the individual battery strings can form a battery cell array, and then be packaged together by a front plate, a front adhesive film, a rear adhesive film, and a back plate to form the battery assembly 200.

[0027] In the embodiments of this application, please refer to Figures 3-5 The back contact battery 100 in this embodiment may include a silicon substrate 10, a first dielectric layer 20, a p-type doped layer 31, an n-type doped layer 32, and an isolation layer 33.

[0028] like Figure 4 As shown, the silicon substrate 10 has a front side 11 and a back side 12. In some embodiments, the back side 12 may be a continuous and substantially flat surface without trench regions. Specifically, the back side 12 may be a polished surface or a textured surface with a pyramidal structure, without limitation. Of course, in some possible embodiments, the back side 12 of the silicon substrate 10 may also have nanoscale pits or trenches.

[0029] The back surface 12 of the silicon substrate 10 may include a first region 121 and a second region 122 spaced apart from each other, and an isolation region 123 located between the first region 121 and the second region 122.

[0030] The first dielectric layer 20 is stacked on the back surface 12 and can completely cover the entire back surface 12. The first dielectric layer 20 may include a first part 21, a second part 22 and a third part 23. The first part 21 is located on the first region 121, the second part 22 is located on the second region 122 and the third part 23 is located on the isolation region 123.

[0031] A p-type doped layer 31 is stacked on the first portion 21, an n-type doped layer 32 is stacked on the second portion 22, and an isolation layer 33 is stacked on the third portion 23. The two sides of the isolation layer 33 are respectively connected to the p-type doped layer 31 and the n-type doped layer 32. That is, the back of the back contact battery 100 has p-type doped layers 31 and n-type doped layers 32 spaced apart, and an isolation layer 33 located between the p-type doped layers 31 and n-type doped layers 32. The two sides of the isolation layer 33 are respectively connected to the p-type doped layer 31 and the n-type doped layer 32. In other words, the first portion 21 and the p-type doped layer 31 are stacked sequentially on the first region 121, the second portion 22 and the n-type doped layer 32 are stacked sequentially on the second region 122, and the isolation layer 33 is stacked sequentially on the isolation region 123. In some embodiments, the p-type doped layer 31, the isolation layer 33, and the n-type doped layer 32 are a continuous, uninterrupted structure.

[0032] The p-type doped layer 31 and the n-type doped layer 32 have opposite polarities. The p-type doped layer 31 is doped with a Group 3 element (e.g., boron, gallium), and the n-type doped layer 32 is doped with a Group 5 element (e.g., phosphorus, arsenic, antimony). In some embodiments, the Group 3 element is preferably boron, and the Group 5 element is preferably phosphorus. In some possible embodiments, the doping concentration of the Group 5 element in the n-type doped layer 32 is greater than the doping concentration of the Group 3 element in the p-type doped layer 31. Of course, in some embodiments, the doping concentration of the Group 3 element in the p-type doped layer 31 is greater than the doping concentration of the Group 5 element in the n-type doped layer 32; this is not a limitation.

[0033] like Figure 3 As shown, in some embodiments, the first region 121, the isolation region 123, and the second region 122 are arranged along a first direction and all three can extend along a second direction. That is, a plurality of first regions 121 and a plurality of second regions 122 are arranged alternately along the first direction and extend along the second direction. The isolation region 123 is between adjacent first regions 121 and second regions 122. The first direction and the second direction can be the longitudinal direction and the transverse direction of the back contact battery 100, respectively. No specific limitation is made here.

[0034] The number of first region 121, second region 122, and isolation region 123 are all several, and the number of p-type doped layer 31 and n-type doped layer 32 are all several. Figure 4 (Only one p-type doped layer 31 and one n-type doped layer 32 are shown in the diagram.) The number of isolation layers 33 is also several. The number of p-type doped layers 31 corresponds to the number of first regions 121, the number of n-type doped layers 32 corresponds to the number of second regions 122, and the number of isolation layers 33 corresponds to the number of isolation regions 123. Several p-type doped layers 31 and several n-type doped layers 32 are arranged alternately along the first direction. An isolation layer 33 is provided between adjacent p-type doped layers 31 and n-type doped layers 32. That is, in the back contact battery 100, adjacent p-type doped layers 31 and n-type doped layers 32 are separated by isolation layers 33. Similarly, in the first dielectric layer 20, the number of the first portion 21, the second portion 22, and the third portion 23 corresponds to the number of first regions 121, second regions 122, and isolation regions 123, respectively.

[0035] In some embodiments, as described above, the silicon substrate 10 does not have trenches, and the surfaces of the first region 121, the isolation region 123, and the second region 122 are a single continuous and substantially flat surface. The surfaces of the three regions are substantially flush. The absence of trenches here means that after cleaning, polishing, or texturing the silicon substrate 10, no trench etching is performed on the surface of the silicon substrate 10 to ensure the flatness and integrity of the back surface 12 of the silicon substrate 10. That is, in some embodiments, the back surface 12 of the silicon substrate 10 does not have trenches formed by etching processes such as laser etching. The back surface 12 of the silicon substrate 10 is a continuous and complete polished or textured surface. Of course, some areas may be textured and some areas may be polished; this is not limited here. In the embodiments of this application, the front surface 11 of the silicon substrate 10 is a flat surface, and the front surface 11 may be textured or polished; this is not limited here.

[0036] like Figure 5 As shown, in the embodiments of this application, the distribution density of the first hole 210 is greater than the distribution density of the third hole 230, and the distribution density of the second hole 220 is greater than the distribution density of the third hole 230. The size of the third hole 230 is smaller than the size of the first hole 210, and / or the size of the third hole 230 is smaller than the size of the second hole 220. In some embodiments, it is preferable that the size of the third hole 230 is smaller than the size of the first hole 210 and also smaller than the hole size of the second hole 220.

[0037] It should be noted that the “size of the hole” refers to the length of the line connecting the two furthest points on the contour formed by each hole on the surface of the first dielectric layer 20 away from the silicon substrate 10.

[0038] It should also be noted that, in the embodiments of this application, the distribution density of the holes can be measured and characterized by TEM, STEM, spherical aberration TEM, spherical aberration STEM, etc.

[0039] In the back contact battery 100, battery module 200 and photovoltaic system 1000 of this application embodiment, the first dielectric layer 20 includes a first portion 21 located on a first region 121, a second portion 22 located on a second region 122 and a third portion 23 located on an isolation region 123. A p-type doped layer 31 is disposed on the first portion 21, an n-type doped layer 32 is disposed on the second portion 22, and an isolation layer 33 is disposed on the third portion 23. The p-type doped layer 31 and the n-type doped layer 32 are separated by the isolation layer 33. The distribution density of the first pore 210 is greater than the distribution density of the third pore 230, the distribution density of the second pore 220 is greater than the distribution density of the third pore 230, and the size of the third pore 230 is at least smaller than the size of one of the first pore 210 and the second pore 220.

[0040] Thus, on the one hand, by using the isolation layer 33 to directly isolate the p-type doped layer 31 and the n-type doped layer 32, lateral electrical isolation between the p-region and the n-region can be achieved without opening deep trenches in the silicon substrate 10. This avoids the sidewalls of the p-region and the n-region being completely destroyed during wet processes such as etching, which would induce severe nonradiative recombination of charge carriers. It also suppresses the carrier recombination centers formed by sidewall dangling bonds and interface defects, significantly reducing the nonradiative recombination loss of photogenerated charge carriers at the isolation boundary, thereby improving the open-circuit voltage and overall photoelectric conversion efficiency of the battery. At the same time, it avoids etching damage to the silicon substrate 10 and a significant reduction in the polarity of the silicon substrate 10.

[0041] On the other hand, by specifically designing the pore density and pore size of the first portion 21, second portion 22, and third portion 23 in the first dielectric layer 20 as described above, a region-customized function can be achieved on the same first dielectric layer 20. This design can ensure the field passivation effect of the first region 121 and the second region 122, and ensure the carrier collection efficiency of the first region 121 and the second region 122. By setting the pore density of the third portion 23 to be low and the pore size to be minimal, a better interface passivation effect can be obtained at the isolation region 123, reducing the interface state density of the isolation region 123, thereby reducing recombination at the isolation region 123 and improving the efficiency of the battery. Specifically, through this optimized design, the carrier collection efficiency can be guaranteed, and the isolation region 123 can also achieve a better interface passivation effect, thereby improving the overall performance of the back contact battery 100. In other words, by adopting the specific design of this application, by designing a first dielectric layer 20 on the back side 12 of the battery with different pore densities and pore sizes that precisely match the electrical functions of the n-region, p-region and isolation region, a better overall performance combination is achieved, thereby improving the performance and efficiency of the back contact battery 100.

[0042] Specifically, in the embodiments of this application, the silicon substrate 10 may be a p-type silicon substrate or an n-type silicon substrate, and no specific limitation is made here.

[0043] In some embodiments, the first dielectric layer 20 may be, for example, at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer, without limitation herein.

[0044] In some embodiments, the thickness of the first dielectric layer 20 may be 0.5nm-4nm, such as 0.5nm, 1nm, 1.5nm, 2nm, 2.5nm, 3nm, 3.5nm, 4nm or other values ​​between 0.5nm and 4nm, which are not specifically limited here, but are preferably 1.2nm-3nm.

[0045] In some embodiments, the thickness of the portion of the first dielectric layer 20 below the p-type doped layer 31 may be the same as or different from the thickness of the portion of the first dielectric layer 20 below the n-type doped layer 32. In some possible embodiments, the thickness of the portion of the first dielectric layer 20 below the n-type doped layer 32 may be 65%-140% of the thickness of the portion of the first dielectric layer 20 below the p-type doped layer 31, for example, 65%, 70%, 80%, 90%, 100%, 110%, 120%, 130%, 140%, or other values ​​between 65% and 140%, and is not specifically limited herein.

[0046] In some embodiments, the distribution density of the first pore 210 can be 5E3-5E4 pores / μm.2 The distribution density of the second pore 220 can be 5E3-5E4 pores / μm. 2 The distribution density of the third pore 230 can be less than or equal to 3E4 pores / μm. 2 .

[0047] The distribution density of the first cavity 210 can be, for example, 5E3 cavities / μm. 2 6E3 cells / μm 2 7E3 cells / μm 2 8E3 cells / μm 2 9E3 cells / μm 2 1E4 cells / μm 2 2E4 cells / μm 2 3E4 cells / μm 2 4E4 cells / μm 2 5E4 cells / μm 2 Or 5E3 / μm 2 -5E4 cells / μm 2 Other values ​​between.

[0048] The distribution density of the second pore 220 can be, for example, 5E3 pores / μm. 2 6E3 cells / μm 2 7E3 cells / μm 2 8E3 cells / μm 2 9E3 cells / μm 2 1E4 cells / μm 2 2E4 cells / μm 2 3E4 cells / μm 2 4E4 cells / μm 2 5E4 cells / μm 2 Or 5E3 / μm 2 -5E4 cells / μm 2 Other values ​​between.

[0049] The distribution density of the third pore 230 can be, for example, 1E2 pores / μm. 2 5E2 cells / μm 2 1E3 cells / μm 2 2E3 cells / μm 2 3E3 cells / μm 2 4E3 cells / μm 2 5E3 cells / μm 2 6E3 cells / μm 2 7E3 cells / μm 2 8E3 cells / μm 2 9E3 cells / μm 2 1E4 cells / μm 2 2E4 cells / μm2 3E4 cells / μm 2 Or less than 3E4 cells / μm 2 Other values.

[0050] In some embodiments, the distribution density of the third pore 230 is preferably 1E3 pores / μm. 2 -3E4 cells / μm 2 In some embodiments, the distribution density of the third pore 230 is preferably less than 5E3 pores / μm. 2 .

[0051] It should be noted that in such embodiments, regardless of the distribution density of the first hole 210, the second hole 220, and the third hole 230, the condition that the distribution density of the first hole 210 is greater than that of the third hole 230, and the distribution density of the second hole 220 is greater than that of the third hole 230, must be met. For example, in some possible embodiments, the distribution density of both the first hole 210 and the second hole 220 can be 5E3 holes / μm. 2 The distribution density of the third pore 230 is less than 5E3 pores / μm. 2 For example, in some embodiments, the distribution density of both the first hole 210 and the second hole 220 can be 1E4 holes / μm. 2 The distribution density of the third pore 230 is less than 1E4 pores / μm. 2 .

[0052] Thus, by analyzing the specific distribution density of the first hole 210, the second hole 220, and the third hole 230 Such specific optimization can achieve the function of customizing the regional pore distribution density on the same first dielectric layer 20. It can optimize the contact resistance of the two regions while balancing the passivation effect of the first region 121 and the interface passivation effect of the second region 122, thereby ensuring the carrier collection efficiency of the first region 121 and the second region 122. By setting the pore density of the third part 23 to a lower value and aligning its size eastward, a better interface passivation effect can be obtained in the isolation region 123, reducing the interface state density of the isolation region 123, thereby reducing recombination in the isolation region 123.

[0053] Furthermore, in some possible embodiments, the p-type doped layer, n-type doped layer, and isolation layer can be a continuous silicon material layer. During the fabrication process, an undoped or lightly doped silicon material layer (e.g., amorphous silicon layer, microcrystalline silicon layer, polycrystalline silicon layer, etc.) can be deposited on the entire first dielectric layer first. Then, the silicon material layer is selectively doped with boron and phosphorus to form a p-type doped layer and an n-type doped layer doped with a third group element, with an isolation layer between them. The first hole 210 on the first part can be formed simultaneously with the boron doping of the p-type doped layer. A specific distribution density of the first hole 210 can be formed by adjusting the doping concentration of the boron source, the temperature of high-temperature annealing, and the time. Similarly, the second hole 220 on the second part can be formed simultaneously with the phosphorus doping of the n-type doped layer. A specific distribution density of the second hole 220 can be formed by adjusting the doping concentration of the phosphorus source, the temperature of high-temperature annealing, and the time. Since the isolation layer is an undoped or lightly doped silicon material layer, the density of the third hole 230 on the isolation layer can be achieved by high-temperature annealing. In other words, the first hole 210, the second hole 220 and the third hole 230 can be formed simultaneously during the formation of the p-type doped layer, the n-type doped layer and the isolation layer, without the need for additional processing of the first dielectric layer.

[0054] Of course, in some possible embodiments, the first hole 210, the second hole 220 and the third hole 230 may also be formed by modifying different parts of the first dielectric layer by means of laser or other methods after the first dielectric layer is prepared, and there is no specific limitation here.

[0055] In some embodiments, the back contact battery 100 may further include a second dielectric layer (not shown), which may be stacked to cover the entire back surface 12. The second dielectric layer is the outermost film layer on one side of the back surface 12 of the back contact battery 100.

[0056] Thus, the addition of a second dielectric layer can further enhance the passivation effect of the battery, thereby improving the battery efficiency.

[0057] Specifically, in such embodiments, the second dielectric layer may be at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, a silicon carbide layer, and an amorphous silicon layer. The second dielectric layer may be a single-layer film structure or a multi-layer film structure, and there are no specific limitations here.

[0058] In the back contact battery 100, a first electrode (not shown) may be disposed on the p-type doped layer 31, and a second electrode (not shown) may be disposed on the n-type doped layer 32. The first electrode at least partially penetrates the second dielectric layer and makes conductive contact with the p-type doped layer 31, and the second electrode at least partially penetrates the second dielectric layer and makes conductive contact with the n-type doped layer 32.

[0059] In some possible embodiments, the distribution density of the second hole 220 may be greater than that of the first hole 210.

[0060] Thus, the n-region uses high-density holes to reduce contact resistance and increase the fill factor, the p-region uses medium-density holes to balance passivation and contact, and take into account both voltage and resistance, while the isolation regions 123 use extremely low-density holes to maximize the interface passivation effect.

[0061] In some embodiments, the size of the first hole 210 is less than or equal to 10 nm, for example, 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 2 nm, 1 nm or other values ​​less than 10 nm; The size of the second hole 220 is less than or equal to 10nm, for example, 10nm, 9nm, 8nm, 7nm, 6nm, 5nm, 4nm, 3nm, 2nm, 1nm or other values ​​less than 10nm; The size of the third aperture 230 is less than or equal to 3nm, for example, 3nm, 2.5nm, 2nm, 1.5nm, 1nm, 0.5nm, 0.2nm, or other values ​​less than 3nm.

[0062] Thus, by setting the size of the first hole 210 and the second hole 220 to less than 10 nm, the apertures of the first hole 210 and the second hole 220 can be avoided to be too large. This effectively suppresses the excessive aggregation and diffusion of dopants in the p-type doped layer 31 and the n-type doped layer 32 at the holes at high temperatures, prevents them from forming a continuous diffusion path that reaches the silicon substrate 10, and avoids excessive Auger recombination loss in the bulk region due to excessive inward expansion of dopants. This solves the problem of inward expansion from a physical mechanism perspective.

[0063] Furthermore, by setting the size of the third hole 230 to less than 3 nm, when the isolation layer 33 contains doped elements, the blocking effect on the doped elements at the isolation region 123 can be further enhanced, greatly reducing or even eliminating the inward diffusion at the isolation region 123, and further reducing Auger recombination in the bulk region. Moreover, this differentiated design can optimize the contact resistance of the p-region and n-region while ensuring the interface passivation effect of the isolation region 123.

[0064] Please see Figure 6In some embodiments, the isolation layer 33 may include a middle portion 331, a first contact portion 332, and a second contact portion 333. In a first direction, the first contact portion 332 and the second contact portion 333 are respectively connected to both sides of the middle portion 331. The first contact portion 332 is located between the middle portion 331 and the p-type doped layer 31 and is connected to both the middle portion 331 and the p-type doped layer 31. The second contact portion 333 is located between the middle portion 331 and the n-type doped layer 32 and is connected to both the middle portion 331 and the n-type doped layer 32.

[0065] The first contact portion 332 is doped with a Group 3 element, and the second contact portion 333 is doped with a Group 5 element. The doping concentration of the Group 3 element in the first contact portion 332 is less than the doping concentration of the Group 3 element in the p-type doped layer 31, and the doping concentration of the Group 5 element in the second contact portion 333 is less than the doping concentration of the Group 5 element in the n-type doped layer 32. The intermediate portion 331 can be an intrinsic portion undoped of Group 3 and Group 5 elements, or it can be doped with at least one of Group 3 and Group 5 elements (i.e., the intermediate portion 331 can be doped with only Group 3 elements, only Group 5 elements, or both). The doping concentration of the dopant element in the intermediate portion 331 is less than 1E16 / cm³. 3 For example, 1E13 / cm 3 5E13 / cm 3 5E14 / cm 3 1E15 / cm 3 5E15 / cm 3 Or less than 1E16 / cm 3 Other values ​​are not restricted here.

[0066] "The doping concentration of the doped element in the middle part 331 is less than 1E16 / cm³." 3 This refers to the situation where, in the case where only Group 3 elements are doped in the intermediate portion 331, the doping concentration of the Group 3 elements in the intermediate portion 331 is less than 1E16 / cm³. 3 When only Group 5 elements are doped in the intermediate portion 331, the doping concentration of the Group 5 elements in the intermediate portion 331 is less than 1E16 / cm. 3 When both Group III and Group V elements are doped in the intermediate portion 331, the doping concentration of the Group III element in the intermediate portion 331 is less than 1E16 / cm³. 3 The doping concentration of Group 5 elements in the middle 331 is also less than 1E16 / cm. 3It should be noted that, in this paper, the doping concentrations of Group 3 and Group 5 elements can be obtained through ECV testing. The ECV testing method is used to test the doping concentration of the region to be measured to obtain doping concentration curves for both concentration and depth.

[0067] Thus, by employing an isolation layer 33 with an undoped or very low-doped intermediate portion 331 to directly isolate the p-type doped layer 31 and the n-type doped layer 32, the isolation effect can be further improved. Simultaneously, using an intrinsic or low-doped scheme can further reduce parasitic absorption. Furthermore, by setting the doping concentration of the third group element in the first contact portion 332 to be relatively high but lower than the doping concentration of the p-type doped layer, and setting the doping concentration of the fifth group element in the second contact portion 333 to be relatively high but lower than the doping concentration of the n-type doped layer, the passivation effect of the isolation layer 33 can be improved while ensuring the isolation effect, thereby increasing the efficiency of the battery.

[0068] In some embodiments, the intermediate portion 331 may be simultaneously doped with Group 3 and Group 5 elements. When the intermediate portion 331 is simultaneously doped with Group 3 and Group 5 elements, the net doping concentration and Fermi level position can be more precisely and stably controlled through the compensation doping effect. This not only more effectively suppresses the capture of charge carriers by interface defects and significantly reduces interface recombination, but also improves material quality due to the partial offsetting effect of the two doping elements on lattice stress, thereby further enhancing the passivation effect and the robustness of device performance. Specifically, when the intermediate portion 331 is simultaneously doped with Group 5 and Group 3 elements, the intermediate portion 331 can provide better field passivation, and the doping of the Group 5 element can achieve a better edge recombination reduction effect. Specifically, when the intermediate portion 331 is doped with a Group 5 element (i.e., n-type), the Fermi level is raised in the conduction band direction, resulting in a high electron concentration at the interface, and most interface defect states are filled with electrons. Since these defects have a very slow hole capture rate for the captured electrons, recombination channels through interface defects are suppressed. This is the physical reason why n-type doping is more effective. Group 3 elements can achieve co-doping or compensating doping of both. By simultaneously incorporating Group 5 and Group 3 elements, the net doping concentration and Fermi level position can be more precisely adjusted, resulting in better interface passivation and electrical properties. This is especially useful when precise control of the absolute doping concentration is required.

[0069] Of course, in some embodiments, the isolation layer 33 may be doped with only one of the Group 3 and Group 5 elements, and no specific limitation is made here.

[0070] In some embodiments, the doping concentration of the third group element in the p-type doped layer 31 is greater than 10 times the doping concentration of the third group element per unit volume in the first contact portion 332, and the doping concentration of the fifth group element per unit volume in the n-type doped layer 32 is greater than 10 times the doping concentration of the fifth group element in the second contact portion 333.

[0071] With this configuration, a concentration difference of more than 10 times can create a sufficiently high carrier concentration gradient and significant band bending between the isolation layer 33 and the p-type doped layer 31 and n-type doped layer 32. This is equivalent to establishing a controllable potential barrier between the p-type doped layer 31 and the n-type doped layer 32, which can effectively block the direct diffusion and recombination of majority carriers, achieving more reliable electrical isolation than simply having a "low concentration". In addition, the isolation layer 33 has a substantially low doping level, which enables it to effectively form field passivation, but is far from reaching the level that would form a "pn-like junction" with the highly doped region or cause parasitic leakage.

[0072] In some embodiments, the doping concentration of the third group element in the first contact portion 332 gradually decreases in the direction away from the p-type doped layer 31. In some possible embodiments, the doping concentration of the third group element in the first contact portion 332 may exhibit a continuously decreasing trend.

[0073] This configuration optimizes the connection interface between the isolation layer 33 and the p-type doped layer 31, thereby optimizing carrier transport and recombination and effectively suppressing the recombination rate between the isolation layer 33 and the p-type doped layer 31.

[0074] In some embodiments, the doping concentration of the Group 5 element in the second contact portion 333 gradually decreases in the direction away from the n-type doped layer 32. In some possible embodiments, the doping concentration of the Group 5 element in the second contact portion 333 may exhibit a continuously decreasing trend.

[0075] This configuration optimizes the connection interface between the isolation layer 33 and the n-type doped layer 32, thereby optimizing carrier transport and recombination and effectively suppressing the recombination rate between the isolation layer 33 and the n-type doped layer 32.

[0076] Specifically, in some embodiments, the doping concentration of the third group element in the first contact portion 332 gradually decreases in the direction away from the p-type doped layer 31, and the doping concentration of the fifth group element in the second contact portion 333 also gradually decreases in the direction away from the n-type doped layer 32.

[0077] In this way, by optimizing the two connection interfaces between the isolation layer 33 and the p-type doped layer 31 and the n-type doped layer 32 respectively, the edge recombination region is transformed from both sides into a region with controlled recombination rate connected by gradient doping. The first contact 332 mainly optimizes electron transport and recombination, while the second contact 333 mainly optimizes hole transport and recombination. The combination of the two ensures that, regardless of the carrier type, smooth band guidance and effective recombination suppression can be obtained when traversing the entire complex structure (n-region-isolation region-p-region).

[0078] Please see Figure 6 In some embodiments, the width L1 (i.e., the length dimension in the first direction) of the isolation layer 33 can be 50μm-1mm, for example, 50μm, 60μm, 70μm, 80μm, 90μm, 100μm, 150μm, 200μm, 250μm, 300μm, 400μm, 500μm, 600μm, 700μm, 800μm, 900μm, 1000μm, or other values ​​between 50μm and 1000μm. This configuration effectively ensures the electrical isolation performance of the isolation layer 33.

[0079] In some embodiments, the width L3 (i.e., the length dimension in the first direction) of the first contact portion 332 can be 2μm-30μm, such as 2μm, 5μm, 10μm, 15μm, 20μm, 25μm, 30μm, or other values ​​between 2μm and 30μm, preferably 5μm-25μm. The width L4 (i.e., the length dimension in the first direction) of the second contact portion 333 can be 2μm-30μm, such as 2μm, 5μm, 10μm, 15μm, 20μm, 25μm, 30μm, or other values ​​between 2μm and 30μm, preferably 5μm-25μm.

[0080] In this way, we can avoid the problem of excessive width of both components leading to an excessive impact on the double-sided ratio.

[0081] In some embodiments, the ratio between the width L2 of the middle portion 331 and the overall width (i.e., L1) of the isolation layer 33 is greater than or equal to 80%, for example 80%, 82%, 84%, 86%, 88%, 90%, 92%, 96%, 98%, preferably greater than or equal to 90%.

[0082] Thus, by setting the width ratio of the middle portion 331 with a lower doping concentration in the isolation layer 33 to at least 80%, preferably at least 90%, the isolation performance can be further improved.

[0083] In some embodiments, the distribution density of the third holes 230 on the portion of the third part 23 corresponding to the first contact portion 332 is greater than the distribution density of the third holes 230 on the portion of the third part 23 corresponding to the middle portion 331, and the distribution density of the third holes 230 on the portion of the third part 23 corresponding to the second contact portion 333 is greater than the distribution density of the third holes 230 on the portion of the third part 23 corresponding to the middle portion 331.

[0084] Thus, by setting a larger distribution density of the third hole 230 below the first contact portion 332 and the second contact portion 333, the carrier collection efficiency can be further improved. On the other hand, by setting a smaller distribution density of the third hole 230 below the middle portion 331, the interface passivation effect of this region and the isolation effect of the corresponding region of the middle portion 331 can be guaranteed.

[0085] Please see Figure 4 In some embodiments, a first inner expansion layer 40 may be formed on the portion of the silicon substrate 10 covered by the p-type doped layer 31 (i.e., the portion corresponding to the first region 121), and a second inner expansion layer 50 may be formed on the portion of the silicon substrate 10 covered by the n-type doped layer 32 (i.e., the portion corresponding to the second region 122). The first inner expansion layer 40 and the second inner expansion layer 50 are not in direct contact within the silicon substrate 10. That is, the first inner expansion layer 40 is located at the position of the first region 121 of the silicon substrate 10, and the second inner expansion layer 50 is located at the position of the second region 122. The first inner expansion layer 40 is doped with a third group element, and the second inner expansion layer 50 is doped with a fifth group element. The first inner expansion layer 40 and the second inner expansion layer 50 are not in direct contact within the silicon substrate 10.

[0086] Thus, the first inner expansion layer 40 and the second inner expansion layer 50 do not directly contact each other in the body region, which can reduce Auger recombination losses in the body region and thus ensure the efficiency of the back contact battery 100.

[0087] In some embodiments, the thickness of both the first inner expansion layer 40 and the second inner expansion layer 50 is less than or equal to 150 nm. In some embodiments, when the third main group element is a third main group element and the second main group element is a fifth main group element, the thickness of the first inner expansion layer 40 may be greater than the thickness of the second inner expansion layer 50.

[0088] Please see Figure 7 In some embodiments, a third inner expansion layer 60 may be formed on the portion of the silicon substrate 10 covered by the first contact portion 332. The third inner expansion layer 60 is doped with a third group element, and the thickness of the third inner expansion layer 60 is less than the thickness of the first inner expansion layer 40.

[0089] Thus, the presence of a third inner layer 60 below the first contact portion 332 effectively enhances the lateral transport efficiency of carriers collected by the p-type doped layer 31, thereby improving the carrier collection efficiency. Simultaneously, the relatively thin thickness of the third inner layer 60 reduces Auger recombination losses in the bulk region of the back contact cell 100.

[0090] Furthermore, the doping concentration of the Group 3 element in the third inner layer 60 is lower than that in the first inner layer 40. This further reduces Auger recombination losses and leakage risks in the bulk region.

[0091] Please see Figure 8 In some embodiments, a fourth inner expansion layer 70 may be formed on the portion of the silicon substrate 10 covered by the second contact portion 333. The fourth inner expansion layer 70 is doped with a fifth group element, and the thickness of the fourth inner expansion layer 70 is less than the thickness of the second inner expansion layer 50.

[0092] Thus, the fourth inner expansion layer 70 below the second contact portion 333 can effectively improve the lateral transport efficiency of carriers collected by the n-type doped layer 32, thereby improving the carrier collection efficiency. At the same time, the thickness of the fourth inner expansion layer 70 is set to be relatively thin, which can reduce Auger recombination losses in the bulk region of the back contact cell 100.

[0093] Furthermore, the doping concentration of Group 5 elements in the fourth inner layer 70 is lower than that in the second inner layer 50. This further reduces Auger recombination losses and leakage risks in the bulk region.

[0094] Please see Figure 7 In some embodiments, the portion of the silicon substrate 10 covered by the middle portion 331 does not have an inner extension layer.

[0095] Thus, the position corresponding to the middle part 331 does not have an inner expansion layer, which can further improve the isolation effect between the p region and the n region while reducing Auger recombination loss in the body region, and further reduce the risk of leakage.

[0096] Specifically, in such an embodiment, the intermediate portion 331 may be an undoped intrinsic portion.

[0097] Of course, such as Figure 8 As shown, in some possible embodiments, a fifth inner expansion layer 80 may be formed on the portion of the silicon substrate 10 covered by the middle portion 331, the thickness of the fifth inner expansion layer 80 being less than the thickness of the third inner expansion layer 60 and the thickness of the fourth inner expansion layer 70.

[0098] Thus, the fifth inner expansion layer 80 reduces the lateral transport resistance and improves the lateral transport efficiency of charge carriers. At the same time, by making the thickness of the fifth inner expansion layer 80 relatively thin, the isolation performance can be effectively guaranteed.

[0099] Furthermore, the doping concentration of the Group 3 element in the fifth inner layer 80 is less than that in the third inner layer 60, and the doping concentration of the Group 5 element in the fifth inner layer 80 is less than that in the fourth inner layer 70.

[0100] In some embodiments, the isolation layer 33 may be doped with at least one of oxygen, nitrogen and carbon. The oxygen doping concentration in the isolation layer 33 is 1E16 / cm³. 3 -2E22 / cm 3 For example, 1E16 / cm 3 5E16 / cm 3 1E17 / cm 3 5E17 / cm 3 1E18 / cm 3 1E19 / cm 3 1E20 / cm 3 1E21 / cm 3 1E22 / cm 3 ; and / or, the nitrogen doping concentration in the isolation layer 33 is 1E16 / cm³. 3 -2E22 / cm 3 For example, 1E16 / cm 3 5E16 / cm 3 1E17 / cm 3 5E17 / cm 3 1E18 / cm 3 1E19 / cm 3 1E20 / cm 3 1E21 / cm 3 1E22 / cm 3 And / or, the carbon doping concentration in the isolation layer 33 is 1E16 / cm³. 3 -2E22 / cm 3 For example, 1E16 / cm 3 5E16 / cm 3 1E17 / cm 3 5E17 / cm 3 1E18 / cm 3 1E19 / cm 3 1E20 / cm 3 1E21 / cm 3 1E22 / cm 3 .

[0101] In other words, when oxygen is doped into the isolation layer 33, the oxygen doping concentration is 1E16 / cm³. 3 -2E22 / cm 3 When nitrogen is doped in the isolation layer 33, the nitrogen doping concentration is 1E16 / cm³. 3 -2E22 / cm 3 When carbon is doped in the isolation layer 33, the carbon doping concentration is 1E16 / cm³. 3 -2E22 / cm 3 .

[0102] Thus, by doping at least one of oxygen, nitrogen, and carbon elements into the isolation layer 33 and by specifically optimizing the content of oxygen, nitrogen, and carbon elements, the electrical isolation effect of the isolation layer 33 can be effectively improved, further reducing battery recombination and improving battery efficiency.

[0103] Specifically, in such an embodiment, the isolation layer 33 may be doped with only oxygen, and the oxygen doping concentration is controlled at 1E16 / cm³. 3 -2E22 / cm 3 Within this range, the isolation layer 33 can be doped with only nitrogen, and the nitrogen doping concentration can be controlled at 1E16 / cm. 3 -2E22 / cm 3 Within this range, the isolation layer 33 can also be doped with only carbon elements, and the nitrogen doping concentration can be controlled at 1E16 / cm. 3 -2E22 / cm 3 Within this range. Of course, in some embodiments, the isolation layer 33 may also be doped with two or three of the elements of oxygen, nitrogen and carbon, which is not limited here.

[0104] In the description of this specification, the references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0105] Furthermore, the above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A back-contact battery, characterized in that, include: A silicon substrate having opposing front and back sides, the back side including a first region and a second region spaced apart from each other and an isolation region located between the first region and the second region; A first dielectric layer is stacked on the back side, the first dielectric layer comprising a first portion located on the first region, a second portion located on the second region, and a third portion located on the isolation region, wherein a plurality of first holes are formed in the first portion, a plurality of second holes are formed in the second portion, and a plurality of third holes are formed in the third portion; and A p-type doped layer is stacked on the first part, an n-type doped layer is stacked on the second region, and an isolation layer is stacked on the third part. The two sides of the isolation layer are respectively connected to the p-type doped layer and the n-type doped layer. The p-type doped layer is doped with a third group element, and the n-type doped layer is doped with a fifth group element. Wherein, the distribution density of the first hole is greater than that of the third hole, the distribution density of the second hole is greater than that of the third hole, the size of the third hole is smaller than that of the first hole, and / or the size of the third hole is smaller than that of the second hole.

2. The back contact battery according to claim 1, characterized in that, The distribution density of the first pore is 5E3-5E4 pores / μm. 2 The distribution density of the second pore is 5E3-5E4 pores / μm. 2 The distribution density of the third pore is less than or equal to 3E4 pores / μm. 2 .

3. The back contact battery according to claim 1, characterized in that, The size of the first hole is less than or equal to 10 nm, the size of the second hole is less than or equal to 10 nm, and the size of the third hole is less than or equal to 3 nm.

4. The back contact battery according to claim 1, characterized in that, The distribution density of the second hole is greater than that of the first hole.

5. The back contact battery according to claim 1, characterized in that, The isolation layer includes a middle portion, a first contact portion, and a second contact portion. The first contact portion and the second contact portion are respectively connected to both sides of the middle portion. The first contact portion is located between the middle portion and the p-type doped layer and is connected to the p-type doped layer. The second contact portion is located between the middle portion and the n-type doped layer and is connected to the n-type doped layer. The first contact portion is doped with a third group element and the doping concentration of the third group element in the first contact portion is less than the doping concentration of the third group element in the p-type doped layer. The second contact portion is doped with a fifth group element and the doping concentration of the fifth group element in the second contact portion is less than the doping concentration of the fifth group element in the n-type doped layer. Wherein, the intermediate portion is an intrinsic portion undoped with Group 3 and Group 5 elements; or, the intermediate portion is doped with at least one of Group 3 and Group 5 elements, and the doping concentration of the dopant element in the intermediate portion is less than 1E16 / cm³. 3 .

6. The back contact battery according to claim 5, characterized in that, The distribution density of the third holes on the portion of the third part corresponding to the first contact portion is greater than the distribution density of the third holes on the portion of the third part corresponding to the middle portion. The distribution density of the third holes on the portion corresponding to the second contact portion in the third part is also greater than the distribution density of the third holes on the portion corresponding to the middle portion in the third part.

7. The back contact battery according to claim 5, characterized in that, The portion of the silicon substrate covered by the p-type doped layer has a first inner expansion layer formed therein, the first inner expansion layer being doped with a third group element. The portion of the silicon substrate covered by the n-type doped layer has a second inner expansion layer formed therein, the second inner expansion layer being doped with a fifth group element. The first inner expansion layer and the second inner expansion layer are not in direct contact within the silicon substrate.

8. The back contact battery according to claim 7, characterized in that, The portion of the silicon substrate covered by the first contact portion has a third inner expansion layer, which is doped with a third group element, and the thickness of the third inner expansion layer is less than the thickness of the first inner expansion layer. The portion of the silicon substrate covered by the second contact portion has a fourth inner expansion layer, which is doped with a fifth group element, and the thickness of the fourth inner expansion layer is less than the thickness of the second inner expansion layer.

9. The back contact battery according to claim 8, characterized in that, The portion of the silicon substrate covered by the middle portion has a fifth inner expansion layer, the thickness of which is less than the thickness of the third inner expansion layer and the thickness of the fourth inner expansion layer.

10. A battery assembly, characterized in that, Includes the back contact battery as described in any one of claims 1-9.

11. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 10.

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