A pulse width modulation method and a three-phase inverter

Abstract

The embodiment of the application discloses a pulse width modulation method and a three-phase inverter. The pulse width modulation method is applied to the three-phase inverter, and the pulse width modulation method comprises the following steps: according to thirteen vectors in basic vectors, a vector space formed by the basic vectors is divided into a large sector and a small sector; based on a preset modulation reference signal and symmetry of the sector, the large sector and the small sector are determined to determine a sector where a space voltage vector is located; according to the sector where the space voltage vector is located, an action time of the basic vector is determined, a bus voltage of the three-phase inverter is balanced and compensated, and a balanced compensation voltage is obtained; and based on the symmetry of the sector, the action time and the balanced compensation voltage, a duty cycle of a pulse width modulation signal is determined, and the pulse width modulation signal is used to drive a three-level inverter topology circuit. The pulse width modulation method and the three-phase inverter provided by the embodiment of the application can reduce the operation amount, reduce the operation complexity, and ensure the bus voltage balance.

Description

Technical Field

[0001] The embodiments of the present invention relate to pulse width modulation technology, and more particularly to a pulse width modulation method and a three-phase inverter. Background Technology

[0002] Inverters, such as three-phase inverters, are widely used in power systems as DC-to-AC converters. Inverters typically employ pulse width modulation (PWM), such as space vector pulse width modulation (SVM), to control the switching of individual transistors within the inverter, thereby changing the inverter's output.

[0003] Currently, existing pulse width modulation methods suffer from problems such as high computational load, complex calculations, and bus voltage imbalance. Summary of the Invention

[0004] This invention provides a pulse width modulation method and a three-phase inverter to reduce the amount of computation, lower computational complexity, and ensure bus voltage balance.

[0005] In a first aspect, embodiments of the present invention provide a pulse width modulation method applied to a three-phase inverter, the three-phase inverter including a three-level inverter topology circuit, the pulse width modulation method comprising: Obtain the basic vectors of the three-level inverter topology circuit; the basic vectors include thirteen vectors; Based on the thirteen basic vectors, the vector space formed by the basic vectors is divided into large sectors and small sectors; Based on the preset modulation reference signal and the symmetry of the sector, the large sector and the small sector are determined to identify the sector where the space voltage vector is located. Based on the sector where the space voltage vector is located, the duration of the basic vector is determined, and the bus voltage of the three-phase inverter is balanced and compensated to obtain a balanced compensation voltage. Based on the symmetry of the sector, the duration of the vector, and the balanced compensation voltage, the duty cycle of the pulse width modulation signal is determined. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

[0006] Optionally, the step of determining the large and small sectors based on the preset modulation reference signal and the symmetry of the sectors, and determining the sector where the space voltage vector is located, includes: Based on the relationship between the preset modulation reference signals Vα, Vβ and 0, and the relationship between P1 and P2, the sector number of the large sector where the space voltage vector is located is determined; P1 = tan60°, P2 = Vβ / Vα; Based on sector symmetry and the large sector where the space voltage vector is located, the sector number of the small sector where the space voltage vector is located is determined according to the relationship between P2 and P3; P3 = tan30°.

[0007] Optionally, determining the duration of action of the basic vector based on the sector where the space voltage vector is located includes: When the space voltage vector is located in the first large sector, the functional relationship between T1, T2, and T3 with respect to Vα1 and Vβ1 is determined according to the small sector where the space voltage vector is located, and T1, T2, and T3 are determined based on the functional relationship. The first sub-sector of the first large sector corresponds to basic vectors V1 and V2, and the durations of action of basic vectors V1 and V2 in the first sub-sector of the first large sector are T1 = Vα - Vβ × tan60° and T2 = Vβ / sin30° / sin60°, respectively. The second sub-sector of the first large sector corresponds to basic vectors V2 and V3, and the durations of action of basic vectors V2 and V3 in the second sub-sector of the first large sector are T2' = (Vα - Vβ × tan30°) × / sin60°, T3=(Vβ- Vα×tan30°)× The action time of the zero vector is T0 = T - T1 - T2 or T0 = T - T2' - T3, where T is the switching period of the pulse width modulation signal.

[0008] Optionally, before determining the functional relationship between T1, T2, and T3 with respect to Vα and Vβ based on the small sector where the space voltage vector is located, the following steps are included: Based on the preset modulation reference signals Vα and Vβ, determine the sum of squares of the preset modulation reference signals Vα and Vβ; When the sum of the squares of the preset modulation reference signals Vα and Vβ is greater than a preset threshold, Vα is assigned the value Vα1, and Vβ is assigned the value Vβ1; Vα1 = (m × Vα) / [(Vα)] 2 +(Vβ) 2 ], Vβ1=(m×Vβ) / [(Vα) 2 +(Vβ) 2 ], where m is the preset threshold.

[0009] Optionally, the step of balancing and compensating the bus voltage of the three-phase inverter to obtain a balanced compensation voltage includes: The difference between the positive bus voltage and the negative bus voltage of the three-phase inverter is calculated, and the difference is sequentially processed by input limiting, notch filtering, proportional-integral control and output limiting before being output to obtain the balanced compensation voltage.

[0010] Optionally, the notch filtering is performed twice, with the notch frequencies of the two notch filtering operations being f and 3f, respectively, where f = (F... A +F B +FC ) / 3,F A F B F C Both with F O Related, F O =G×F0+(1-G)×F1+F2, where G is a constant, 0≤G≤1, F0 is the original frequency of the mains power, F1 is the phase-locked frequency, and F2 is the compensation frequency.

[0011] Optionally, determining the duty cycle of the pulse width modulation signal based on the sector symmetry, the duration of action, and the balance compensation voltage includes: Based on the sector symmetry and the aforementioned operating time, the conduction time T of the switching transistors corresponding to phases A, B, and C of the three-phase inverter is determined. A T B T C When the space voltage vector is located in the first large sector, T A =T C =T0 / 2, T B =T A +T2 / 2 or T B = T A +T2' / 2; The duty cycle of the pulse width modulation signal is determined based on the balance compensation voltage and the conduction time of the switching transistor.

[0012] Optionally, after determining the sector number of the large sector where the space voltage vector is located, the process includes: Based on the sector number of the large sector where the space voltage vector is located, and the relationship between P2 and P3, the positions of the preset modulation reference signals Vα and Vβ in the three-phase coordinate system, located in phases A, B, and C of the three-phase inverter, are determined.

[0013] Optionally, determining the positions of the preset modulation reference signals Vα and Vβ in the three-phase coordinate system, corresponding to phases A, B, and C of the three-phase inverter, based on the sector number of the large sector where the space voltage vector is located and the magnitude relationship between P2 and P3, includes: If the preset modulation reference signal Vα is greater than zero, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase A of the three-phase inverter when converted to the three-phase coordinate system. If the preset modulation reference signal Vα is less than or equal to zero, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase A of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the second or third largest sector, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase B of the three-phase inverter when converted to the three-phase coordinate system. If the space voltage vector is located in the fifth or sixth sector, or if P2 is less than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase B of the three-phase inverter when converted to the three-phase coordinate system. If the space voltage vector is located in the fourth or fifth sector, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase C of the three-phase inverter when converted to the three-phase coordinate system. If the space voltage vector is located in the first or second largest sector, or -P2 is greater than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase C of the three-phase inverter when converted to the three-phase coordinate system.

[0014] Secondly, embodiments of the present invention provide a three-phase inverter, including: a three-level inverter topology circuit and a controller, wherein the controller is electrically connected to the three-level inverter topology circuit, and the controller is used to implement the pulse width modulation method as described in the first aspect to output the pulse width modulation signal to the three-level inverter topology circuit.

[0015] The present invention provides a pulse width modulation (PWM) method and a three-phase inverter. The PWM method is applied to a three-phase inverter, which includes a three-level inverter topology circuit. The PWM method includes: obtaining the basic vectors of the three-level inverter topology circuit; the basic vectors include thirteen vectors; dividing the vector space formed by the basic vectors into large sectors and small sectors based on the thirteen basic vectors; determining the large and small sectors based on a preset modulation reference signal and the symmetry of the sectors, and determining the sector where the space voltage vector is located; determining the duration of the basic vectors based on the sector where the space voltage vector is located, and performing balance compensation on the bus voltage of the three-phase inverter to obtain a balance compensation voltage; and determining the duty cycle of the PWM signal based on the symmetry of the sectors, the duration, and the balance compensation voltage. The PWM signal is used to drive the three-level inverter topology circuit. The pulse width modulation method and three-phase inverter provided in this invention divide the vector space formed by the thirteen basic vectors into large and small sectors, eliminating the need to divide sectors based on all the basic vectors. This results in fewer small sectors, reducing the computational load and complexity when calculating the duration of the basic vectors, the flipping time of the pulse width modulation signal, and the drive configuration. Furthermore, it provides balance compensation for the bus voltage of the three-phase inverter, ensuring bus voltage balance. Attached Figure Description

[0016] Figure 1 This is a flowchart of a pulse width modulation method provided in Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of a thirteen-vector provided in Embodiment 1 of the present invention; Figure 3 This is a schematic diagram of a large sector provided in Embodiment 1 of the present invention; Figure 4 This is a flowchart of a pulse width modulation method provided in Embodiment 2 of the present invention; Figure 5 This is a schematic diagram of a small sector provided in Embodiment 2 of the present invention; Figure 6 This is a schematic diagram of a large sector determination method provided in Embodiment 2 of the present invention; Figure 7 This is a schematic diagram of a method for determining the positive and negative half-axis of phase A provided in Embodiment 2 of the present invention; Figure 8 This is a schematic diagram of a B-phase positive and negative half-axis determination provided in Embodiment 2 of the present invention; Figure 9 This is a schematic diagram of a C-phase positive and negative half-axis determination provided in Embodiment 2 of the present invention; Figure 10 This is a schematic diagram of a sector conversion provided in Embodiment 2 of the present invention; Figure 11 This is a schematic diagram of a small sector determination method provided in Embodiment 2 of the present invention; Figure 12 This is a schematic diagram of a balance compensation provided in Embodiment 2 of the present invention; Figure 13 This is a flowchart of a balance compensation method provided in Embodiment 2 of the present invention; Figure 14 This is a schematic diagram of a frequency filtering method provided in Embodiment 2 of the present invention; Figure 15 This is a structural block diagram of a pulse width modulation device provided in Embodiment 3 of the present invention; Figure 16 This is a schematic diagram of the structure of an electronic device provided in Embodiment 4 of the present invention. Detailed Implementation

[0017] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0018] Example 1 Figure 1This is a flowchart of a pulse width modulation method provided in Embodiment 1 of the present invention. This embodiment can be applied to pulse width modulation of three-phase inverters, etc. The three-phase inverter includes a three-level inverter topology circuit and a controller. The controller is electrically connected to the three-level inverter topology circuit. The method can be executed by the controller. For example, the controller can be the main control chip DSP of the three-phase inverter. The controller can be implemented in software and / or hardware. The method specifically includes the following steps: Step 110: Obtain the basic vectors of the three-level inverter topology circuit; the basic vectors include thirteen vectors.

[0019] For example, Figure 2 This is a schematic diagram of a thirteen-vector method provided in Embodiment 1 of the present invention. (Reference) Figure 2 The thirteen basic vectors are the zero vector (000, 111, -1-1-1), six medium vectors (10-1, 1-10, 0-11, -101, -110, 01-1), and six large vectors (1-1-1, 1-11, -1-11, -111, -11-1, 11-1).

[0020] Step 120: Based on the thirteen basic vectors, divide the vector space formed by the basic vectors into large sectors and small sectors.

[0021] For example, Figure 3 This is a schematic diagram of a large sector provided in Embodiment 1 of the present invention. (Reference) Figure 2 and Figure 3 The vector space formed by the thirteen basic vectors can be divided into multiple large sectors, such as... Figure 3 The vector space in the diagram is divided into six large sectors, and each large sector can be further divided into two smaller sectors.

[0022] Step 130: Based on the preset modulation reference signal and the symmetry of the sector, determine the large sector and the small sector, and determine the sector where the space voltage vector is located.

[0023] Specifically, firstly, based on the magnitude of the preset modulation reference signal, the large sector where the space voltage vector is located is determined, and then the small sector within that large sector is determined. When the space vector is located in the first large sector, the small sector where the space vector is located is determined based on the magnitude of the preset modulation reference signal.

[0024] Step 140: Determine the duration of the basic vector based on the sector where the space voltage vector is located, and perform balance compensation on the bus voltage of the three-phase inverter to obtain the balance compensation voltage. Based on the symmetry of the sector, the duration of the vector, and the balance compensation voltage, determine the duty cycle of the pulse width modulation signal. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

[0025] Specifically, based on the large and small sectors where the space voltage vector resides, the duration of the basic vector is determined, and the bus voltage of the three-phase inverter is balanced to obtain a balance compensation voltage. Based on the sector symmetry, the duration of the basic vector, and the balance compensation voltage, the duty cycle of the PWM (Pulse Width Modulation) signal is determined to achieve SVPWM (Space Vector Pulse Width Modulation) based on thirteen vectors. This embodiment, by adding a balance compensation voltage, enables timely balancing of the bus midpoint after passive offset of the three-phase inverter bus, giving the above modulation method the ability to actively balance the midpoint.

[0026] The pulse width modulation method provided in this embodiment divides the vector space formed by the thirteen basic vectors into large and small sectors, eliminating the need to divide sectors based on all the basic vectors. This results in fewer small sectors, thereby reducing the computational load and complexity when calculating the action time of the basic vectors, the flipping time of the pulse width modulation signal, and the drive configuration. Furthermore, it provides balance compensation for the bus voltage of the three-phase inverter to ensure bus voltage balance.

[0027] Example 2 Figure 4 This is a flowchart of a pulse width modulation method provided in Embodiment 2 of the present invention. This embodiment can be applied to pulse width modulation of three-phase inverters, etc. The three-phase inverter includes a three-level inverter topology circuit and a controller. The controller is electrically connected to the three-level inverter topology circuit. The method can be executed by the controller, which can be the main control chip DSP of the three-phase inverter. The controller can be implemented in software and / or hardware. The method specifically includes the following steps: Step 210: Obtain the basic vectors of the three-level inverter topology circuit. The basic vectors include thirteen vectors.

[0028] The basic vectors of the three-level inverter topology circuit can be referred to in the specific description of step 110 above, and will not be repeated here.

[0029] Step 220: Divide the vector space formed by the thirteen basic vectors into the first major sector (0°-60°), the second major sector (60°-120°), the third major sector (120°-180°), the fourth major sector (180°-240°), the fifth major sector (240°-300°), and the sixth major sector (300°-360°). Each major sector is divided into two smaller sectors by its respective angle bisector, and the sector number of each major sector and the sector number of each smaller sector are determined.

[0030] For example, Figure 5 This is a schematic diagram of a small sector provided in Embodiment 2 of the present invention. In this embodiment, the vector space formed by the thirteen basic vectors is divided into six large sectors, starting from the sector line where the basic vectors 000-111 are located, in a counterclockwise direction of 60° each. (Reference) Figure 5 Each sector comprises a first and a second minor sector. Major sectors LS = 1, 2, 3, 4, 5, 6, where LS = 1 represents the first major sector, LS = 2 the second, LS = 3 the third, LS = 4 the fourth, LS = 5 the fifth, and LS = 6 the sixth. Minor sector 11 represents the first minor sector of the first major sector, and minor sector 12 represents the second minor sector of the first major sector.

[0031] Step 230: Based on the relationship between the preset modulation reference signals Vα, Vβ and 0, and the relationship between P1 and P2, determine the sector number of the large sector where the space voltage vector is located; P1 = tan60°, P2 = Vβ / Vα.

[0032] For example, Figure 6 This is a schematic diagram illustrating a large sector determination method provided in Embodiment 2 of the present invention. (Reference) Figure 6 When Vα is greater than 0, if Vβ is greater than 0 and P1 is greater than P2, then the large sector where the space voltage vector is located is determined to be the first large sector; when Vα is greater than 0, if Vβ is greater than 0 and P1 is less than or equal to P2, then the large sector where the space voltage vector is located is determined to be the second large sector; when Vα is greater than 0, if Vβ is less than or equal to 0 and -P1 is less than P2, then the large sector where the space voltage vector is located is determined to be the sixth large sector; when Vα is greater than 0, if Vβ1 is less than or equal to 0 and -P1 is greater than or equal to P2, then the large sector where the space voltage vector is located is determined to be the fifth large sector. When Vα is less than or equal to 0, if Vβ is greater than 0 and -P1 is greater than P2, then the sector containing the space voltage vector is determined to be the third largest sector; when Vα is less than or equal to 0, if Vβ is greater than 0 and -P1 is less than or equal to P2, then the sector containing the space voltage vector is determined to be the second largest sector; when Vα is less than or equal to 0, if Vβ is less than or equal to 0 and P1 is less than P2, then the sector containing the space voltage vector is determined to be the fifth largest sector; when Vα is less than or equal to 0, if Vβ is less than or equal to 0 and P1 is greater than or equal to P2, then the sector containing the space voltage vector is determined to be the fourth largest sector.

[0033] In one implementation, after determining the sector number of the large sector where the space voltage vector resides, the process includes: Based on the sector number of the large sector where the space voltage vector is located, and the magnitude relationship between P2 and P3, determine the positions of the preset modulation reference signals Vα and Vβ in the three-phase coordinate system, specifically in phases A, B, and C of the three-phase inverter. If the preset modulation reference signal Vα is greater than zero, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase A of the three-phase inverter in the three-phase coordinate system. If the preset modulation reference signal Vα is less than or equal to zero, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase A of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the second or third largest sector, then the preset modulation reference signals Vα and Vβ are determined to be located in the positive half-axis of phase B of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the fifth or sixth sector, or if P2 is less than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase B of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the fourth or fifth sector, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase C of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the first or second largest sector, or -P2 is greater than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase C of the three-phase inverter in the three-phase coordinate system.

[0034] Figure 7 This is a schematic diagram of a method for determining the positive and negative half-axis of phase A according to Embodiment 2 of the present invention. Figure 8 This is a schematic diagram of a B-phase positive and negative half-axis determination method provided in Embodiment 2 of the present invention. Figure 9 This is a schematic diagram of a method for determining the positive and negative half-axis of phase C according to Embodiment 2 of the present invention. (Reference) Figures 7-9 A (B, C) phase positive means that the preset modulation reference signals Vα and Vβ are converted to the three-phase coordinate system and are located on the positive half-axis of the A (B, C) phase of the three-phase inverter. A (B, C) phase negative means that the preset modulation reference signals Vα and Vβ are converted to the three-phase coordinate system and are located on the negative half-axis of the A (B, C) phase of the three-phase inverter. Figures 7-9 The judgment result is equivalent to a symbol, which is used for the positive and negative reversal of the carrier signal.

[0035] Figure 10 This is a schematic diagram of a sector conversion method provided in Embodiment 2 of the present invention. (See reference) Figure 10Based on the symmetry of the sectors, the operations of other sectors can be converted to the first major sector. Let θ be the angle between the second to sixth major sectors and the first major sector. Using the formulas Vα2 = Vα × cosθ + Vβ × sinθ and Vβ2 = -Vα × sinθ + Vβ × cosθ, we can obtain Vα2 and Vβ2 converted to the first major sector. θ = (LS-1) × 60°. When the sum of the squares of the preset modulation reference signals Vα and Vβ is greater than a preset threshold m, Vα is assigned the value Vα1, and Vβ is assigned the value Vβ1. Vα1 = (m × Vα) / [(Vα)] 2 +(Vβ) 2 ], Vβ1=(m×Vβ) / [(Vα) 2 +(Vβ) 2 For example, m is / 2. When the sum of the squares of the preset modulation reference signals Vα and Vβ is less than or equal to a preset threshold, the value of Vα remains unchanged, and the value of Vβ remains unchanged.

[0036] Step 240: Based on sector symmetry and the large sector where the space voltage vector is located, determine the sector number of the small sector where the space voltage vector is located according to the relationship between P2 and P3; P3 = tan30°.

[0037] For example, Figure 11 This is a schematic diagram of a small sector determination method provided in Embodiment 2 of the present invention. (Reference) Figure 11 When the large sector where the space voltage vector is located is the first large sector, if P2 is less than P3, then the small sector where the space voltage vector is located is determined to be the first small sector 11. If P2 is greater than or equal to P3, then the small sector where the space voltage vector is located is determined to be the second small sector 12.

[0038] Step 250: When the space voltage vector is located in the first large sector, determine the functional relationship between T1, T2, and T3 with respect to Vα and Vβ based on the small sector where the space voltage vector is located, and determine T1, T2, and T3 based on the functional relationship.

[0039] The first sub-sector of the first large sector corresponds to basic vectors V1 and V2. The durations of action of basic vectors V1 and V2 in the first sub-sector of the first large sector are T1 = Vα - Vβ × tan60° and T2 = Vβ / sin30° / sin60°, respectively. The second sub-sector of the first large sector corresponds to basic vectors V2 and V3. The durations of action of basic vectors V2 and V3 in the second sub-sector of the first large sector are T2' = (Vα - Vβ × tan30°) × / sin60°, T3=(Vβ- Vα×tan30°)× The action time of the zero vector is T0 = T - T1 - T2 or T0 = T - T2' - T3, where T is the switching period of the pulse width modulation signal.

[0040] Step 260: The difference between the positive bus voltage and the negative bus voltage of the three-phase inverter is calculated. The difference is then processed by input limiting, notch filtering, proportional-integral control and output limiting in sequence to obtain the balanced compensation voltage.

[0041] For example, Figure 12 This is a schematic diagram of a balance compensation provided in Embodiment 2 of the present invention. Figure 13 This is a flowchart of a balance compensation method provided in Embodiment 2 of the present invention. (See reference) Figure 12 and Figure 13 The notch filtering is performed twice, with notch frequencies of f and 3f for the two iterations, respectively, where f is the required frequency. Required frequency f = (F... A +F B +F C ) / 3,F A F B F C Both with F O Related, F O =G×F0+(1-G)×F1+F2, where G is a constant, 0≤G≤1, F0 is the original mains frequency, F1 is the phase-locked loop frequency, and F2 is the compensation frequency. F1 and F2 are known quantities, and F2 can be obtained from a preset table. The preset table records the difference between the frequency value and the measured value, which is the compensation frequency. Furthermore, the input limiting range is [-A, A], indicating that limiting is performed when the absolute value of the difference between the positive bus voltage BP and the negative bus voltage BN is greater than A. A is a preset value, A∈[0, Z], where Z is the difference between the withstand voltage of the switching transistor and k, and k is half of the maximum value of the bus voltage. The voltage difference between the positive and negative buses is eliminated through PI control, i.e., proportional-integral control. The output limiting range is [0, B], where B is the adjustment coefficient of (0, 1). The absolute value of the difference between the positive bus voltage BP and the negative bus voltage BN is processed by two notch filters and then controlled by PI. If the absolute value is still greater than B, the absolute value is limited to B. If the absolute value is less than or equal to B, the absolute value is output after output limiting.

[0042] Furthermore, Figure 14 This is a schematic diagram of a frequency filtering method provided in Embodiment 2 of the present invention. (Reference) Figure 14 The F corresponding to ABC O The output values ​​after filtering are F. A F B F C F new F represents O The current value of F oldF represents O The value after the last filtering, if F new With F old If the absolute value of the difference is greater than X, then F O Take the current value, otherwise F O For F new The product of x1 and F old The product of x1 and 1-x1, where X is the filter threshold and x1 is greater than 0 and less than 1.

[0043] Step 270: Based on the sector symmetry and the action time of the fundamental vector, determine the conduction time T of the switching transistors corresponding to phases A, B, and C of the three-phase inverter. A T B T C When the space voltage vector is located in the first largest sector, T A =T C =T0 / 2, T B = T A +T2 / 2 or T B = T A +T2' / 2.

[0044] Specifically, when the space voltage vector is located in the first small sector of the first large sector, T A =T C =T0 / 2, T B = T A +T2 / 2, when the space voltage vector is located in the second minor sector of the first major sector, T A =T C =T0 / 2, T B = T A +T2' / 2. When the space voltage vector is located in the first small sector of the second largest sector, T B =T C =T0 / 2, T A = T B +T2 / 2, when the space voltage vector is located in the second minor sector of the second largest sector, T B =T C =T0 / 2, T A = T B +T2' / 2. When the space voltage vector is located in the first small sector of the third large sector, T B =T A =T0 / 2, T C = T A +T2 / 2, when the space voltage vector is located in the second smallest sector of the third largest sector, T B =T A =T0 / 2, T C = T A+T2' / 2. The first, second, and third major sectors are symmetrical about zero with respect to the fourth, fifth, and sixth major sectors, respectively. Therefore, the conduction time of each phase switch in the fourth, fifth, and sixth major sectors is the same as that in the first, second, and third major sectors, respectively, and will not be repeated here.

[0045] Step 280: Determine the duty cycle of the pulse width modulation signal based on the balance compensation voltage and the conduction time of the switching transistor. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

[0046] The balance compensation voltage can be converted into time, and by calculating the conduction time of the switching transistor and the switching period, it can be converted into the duty cycle of the pulse width modulation signal, thereby driving the three-level inverter topology circuit through the pulse width modulation signal.

[0047] The pulse width modulation method provided in this embodiment divides the vector space formed by the thirteen basic vectors into large and small sectors, eliminating the need for sector division based on all basic vectors. This results in fewer small sectors, with each large sector divided into only two small sectors. Consequently, the computational load and complexity are reduced when calculating the action time of the basic vectors, the flipping time of the pulse width modulation signal, and the drive configuration. The pulse width modulation process uses the thirteen vectors, including the zero, medium, and large vectors, while omitting the small vectors, thus avoiding the risk of DC midpoint imbalance caused by the small vectors. Furthermore, the bus voltage of the three-phase inverter is balanced through balancing compensation.

[0048] Example 3 Figure 15This is a structural block diagram of a pulse width modulation (PWM) device provided in Embodiment 3 of the present invention. The PWM device is applied to a three-phase inverter, which includes a three-level inverter topology circuit and a controller. The controller is electrically connected to the three-level inverter topology circuit, and the PWM device is integrated into the controller. The PWM device includes: a vector acquisition module 310, a sector division module 320, a sector determination module 330, and a signal modulation module 340. The vector acquisition module 310 is used to acquire the basic vectors of the three-level inverter topology circuit; the basic vectors include thirteen vectors; the sector division module 320 is used to divide the basic vectors into vectors based on the thirteen vectors. The space is divided into large and small sectors; the sector determination module 330 is used to determine the large and small sectors based on the preset modulation reference signal and the symmetry of the sectors, and to determine the sector where the space voltage vector is located; the signal modulation module 340 is used to determine the duration of the basic vector according to the sector where the space voltage vector is located, and to perform balance compensation on the bus voltage of the three-phase inverter to obtain the balance compensation voltage. Based on the symmetry of the sectors, the duration, and the balance compensation voltage, the duty cycle of the pulse width modulation signal is determined. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

[0049] Based on the above implementation method, the sector determination module 330 includes: The large sector determination unit is used to determine the sector number of the large sector where the space voltage vector is located based on the magnitude relationship between the preset modulation reference signals Vα, Vβ and 0, and the magnitude relationship between P1 and P2; P1 = tan60°, P2 = Vβ / Vα; The small sector determination unit is used to determine the sector number of the small sector where the space voltage vector is located based on the sector symmetry and the large sector where the space voltage vector is located, according to the relationship between the magnitudes of P2 and P3; P3 = tan30°.

[0050] Optionally, the signal modulation module 340 includes a first time determination unit. This unit is used to determine the functional relationships of T1, T2, and T3 with respect to Vα and Vβ based on the smaller sector where the space voltage vector is located when the space voltage vector is in the first large sector. The first smaller sector of the first large sector corresponds to basic vectors V1 and V2, and the action times of basic vectors V1 and V2 in the first smaller sector of the first large sector are T1 = Vα - Vβ × tan60° and T2 = Vβ / sin30° / sin60°, respectively. The second smaller sector of the first large sector corresponds to basic vectors V2 and V3, and the action times of basic vectors V2 and V3 in the second smaller sector of the first large sector are T2' = (Vα - Vβ × tan30°) × / sin60°, T3=(Vβ- Vα×tan30°)× The action time of the zero vector is T0 = T - T1 - T2 or T0 = T - T2' - T3, where T is the switching period of the pulse width modulation signal.

[0051] In one embodiment, the signal modulation module 340 is further configured to, before determining the functional relationship between T1, T2, and T3 with respect to Vα and Vβ based on the small sector where the space voltage vector is located, determine the sum of squares of the preset modulation reference signals Vα and Vβ based on the preset modulation reference signals Vα and Vβ; when the sum of squares of the preset modulation reference signals Vα and Vβ is greater than a preset threshold, Vα is assigned the value Vα1, and Vβ is assigned the value Vβ1; Vα1 = (m × Vα) / [(Vα)] 2 +(Vβ) 2 ], Vβ1=(m×Vβ) / [(Vα) 2 +(Vβ) 2 ], where m is a preset threshold. When the sum of the squares of the preset modulation reference signals Vα and Vβ is less than or equal to the preset threshold, the value of Vα remains unchanged, and the value of Vβ remains unchanged, that is, Vα=Vα, Vβ=Vβ.

[0052] Optionally, the signal modulation module 340 includes a balance compensation unit, which is used to calculate the difference between the positive bus voltage and the negative bus voltage of the three-phase inverter. The difference is then processed sequentially through input limiting, notch filtering, proportional-integral control and output limiting to obtain the balance compensation voltage.

[0053] Optionally, the signal modulation module 340 includes a second time determination unit and a duty cycle determination unit; wherein, the second time determination unit is used to determine the on-time T of the switching transistors corresponding to phases A, B, and C of the three-phase inverter based on the sector symmetry and the action time. A T B T C When the space voltage vector is located in the first large sector, T A =T C =T0 / 2, T B = T A +T2 / 2 or T B = T A +T2' / 2; The duty cycle determination unit is used to determine the duty cycle of the pulse width modulation signal based on the balance compensation voltage and the conduction time of the switching transistor.

[0054] Optionally, the pulse width modulation device also includes a position determination module. After the large sector determination unit determines the sector number of the large sector where the space voltage vector is located, the position determination module determines the position of the preset modulation reference signals Vα and Vβ in the three-phase coordinate system, namely, phases A, B, and C of the three-phase inverter, based on the sector number of the large sector where the space voltage vector is located and the relationship between the magnitudes of P2 and P3.

[0055] Optionally, the position determination module is specifically used to determine, if the preset modulation reference signal Vα is greater than zero, that the preset modulation reference signals Vα and Vβ, when converted to the three-phase coordinate system, are located on the positive half-axis of phase A of the three-phase inverter; if the preset modulation reference signal Vα is less than or equal to zero, the preset modulation reference signals Vα and Vβ, when converted to the three-phase coordinate system, are located on the negative half-axis of phase A of the three-phase inverter; if the space voltage vector is located in the second or third largest sector, the preset modulation reference signals Vα and Vβ, when converted to the three-phase coordinate system, are located on the positive half-axis of phase B of the three-phase inverter; if the space voltage vector is located in the second or third largest sector, the preset modulation reference signals Vα and Vβ, when converted to the third largest sector, are located on the positive half-axis of phase B of the three-phase inverter; if the space voltage vector is located in the third largest sector, the preset modulation reference signals Vα and Vβ, when converted to the third largest sector, are located on the positive half-axis of phase B of the three-phase inverter. If the fifth or sixth sector, or if P2 is less than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase B of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the fourth or fifth sector, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase C of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the first or second sector, or if -P2 is greater than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase C of the three-phase inverter in the three-phase coordinate system.

[0056] This embodiment also provides a three-phase inverter, including: a three-level inverter topology circuit and a controller, the controller being electrically connected to the three-level inverter topology circuit, the controller being used to implement the pulse width modulation method as provided in any embodiment of the present invention, so as to output a pulse width modulation signal to the three-level inverter topology circuit.

[0057] The pulse width modulation device and three-phase inverter provided in this embodiment belong to the same inventive concept as the pulse width modulation method provided in any embodiment of the present invention, and have corresponding beneficial effects. For technical details not detailed in this embodiment, please refer to the pulse width modulation method provided in any embodiment of the present invention.

[0058] Example 4 Figure 16 This is a schematic diagram of the structure of an electronic device provided in Embodiment 4 of the present invention. Figure 16 A block diagram is shown of an exemplary electronic device 412 suitable for implementing embodiments of the present invention. Figure 16 The electronic device 412 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of the present invention.

[0059] like Figure 16 As shown, electronic device 412 is represented in the form of a general-purpose device. The components of electronic device 412 may include, but are not limited to: one or more processors 416, storage device 428, and bus 418 connecting different system components (including storage device 428 and processor 416).

[0060] Bus 418 represents one or more of several bus architectures, including a memory device bus or memory device controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. Examples of these architectures include, but are not limited to, the Industry Subversive Alliance (ISA) bus, the Micro Channel Architecture (MAC) bus, the Enhanced ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnect (PCI) bus.

[0061] Electronic device 412 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by electronic device 412, including volatile and non-volatile media, removable and non-removable media.

[0062] Storage device 428 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 430 and / or cache memory 432. Electronic device 412 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 434 may be used to read and write non-removable, non-volatile magnetic media (… Figure 16 Not shown; usually referred to as a "hard drive"). Although Figure 16 As not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disc drive for reading and writing to a removable non-volatile optical disc, such as a Compact Disc Read-Only Memory (CD-ROM), a Digital Video Disc Read-Only Memory (DVD-ROM), or other optical media. In these cases, each drive may be connected to bus 418 via one or more data media interfaces. Storage device 428 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of the present invention.

[0063] A program / utility 440 having a set (at least one) of program modules 442 may be stored in, for example, a storage device 428. Such program modules 442 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program modules 442 typically perform the functions and / or methods described in the embodiments of the present invention.

[0064] Electronic device 412 can also communicate with one or more external devices 414 (e.g., keyboard, pointing terminal, display 424, etc.), and with one or more terminals that enable a user to interact with the electronic device 412, and / or with any terminal that enables the electronic device 412 to communicate with one or more other computing terminals (e.g., network card, modem, etc.). This communication can be performed via input / output (I / O) interface 422. Furthermore, electronic device 412 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 420. Figure 16 As shown, network adapter 420 communicates with other modules of electronic device 412 via bus 418. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with electronic device 412, including but not limited to: microcode, terminal drivers, redundant processors, external disk drive arrays, Redundant Arrays of Independent Disks (RAID) systems, tape drives, and data backup storage systems.

[0065] Processor 416 (which can be considered as the controller in a three-phase inverter) executes various functional applications and data processing by running programs stored in storage device 428. For example, it implements the pulse width modulation method provided in this embodiment of the invention. The pulse width modulation method is applied to a three-phase inverter, which includes a three-level inverter topology circuit. The pulse width modulation method includes: Obtain the basic vectors of a three-level topology circuit; the basic vectors include thirteen vectors. Based on the thirteen basic vectors, the vector space formed by the basic vectors is divided into large sectors and small sectors; Based on the preset modulation reference signal and the symmetry of the sector, large and small sectors are determined to identify the sector where the space voltage vector is located. Based on the sector where the space voltage vector is located, the duration of the basic vector is determined, and the bus voltage of the three-phase inverter is balanced and compensated to obtain the balanced compensation voltage. Based on the symmetry of the sector, the duration of the vector, and the balanced compensation voltage, the duty cycle of the pulse width modulation signal is determined. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

[0066] Example 5 Embodiment 5 of the present invention also provides a computer-readable storage medium storing a computer program thereon. When executed by a processor (which can be considered as a controller in a three-phase inverter), the program implements the pulse width modulation method provided in the embodiments of the present invention. The pulse width modulation method is applied to a three-phase inverter, which includes a three-level inverter topology circuit. The pulse width modulation method includes: Obtain the basic vectors of a three-level topology circuit; the basic vectors include thirteen vectors. Based on the thirteen basic vectors, the vector space formed by the basic vectors is divided into large sectors and small sectors; Based on the preset modulation reference signal and the symmetry of the sector, large and small sectors are determined to identify the sector where the space voltage vector is located. Based on the sector where the space voltage vector is located, the duration of the basic vector is determined, and the bus voltage of the three-phase inverter is balanced and compensated to obtain the balanced compensation voltage. Based on the symmetry of the sector, the duration of the vector, and the balanced compensation voltage, the duty cycle of the pulse width modulation signal is determined. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

[0067] The computer storage medium of this invention can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0068] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0069] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including—but not limited to—wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0070] Computer program code for performing the operations of this invention can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or terminal. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0071] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, rearrangements, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A pulse width modulation method, characterized in that, The pulse width modulation method is applied to a three-phase inverter, which includes a three-level inverter topology circuit. The pulse width modulation method includes: Obtain the basic vectors of the three-level inverter topology circuit; the basic vectors include thirteen vectors; Based on the thirteen basic vectors, the vector space formed by the basic vectors is divided into large sectors and small sectors; Based on the preset modulation reference signal and the symmetry of the sector, the large sector and the small sector are determined to identify the sector where the space voltage vector is located. Based on the sector where the space voltage vector is located, the duration of the basic vector is determined, and the bus voltage of the three-phase inverter is balanced and compensated to obtain a balanced compensation voltage. Based on the symmetry of the sector, the duration of the vector, and the balanced compensation voltage, the duty cycle of the pulse width modulation signal is determined. The pulse width modulation signal is used to drive the three-level inverter topology circuit.

2. The pulse width modulation method according to claim 1, characterized in that, The determination of the large and small sectors based on the preset modulation reference signal and the symmetry of the sectors, and the identification of the sector where the space voltage vector is located, includes: Based on the relationship between the preset modulation reference signals Vα, Vβ and 0, and the relationship between P1 and P2, the sector number of the large sector where the space voltage vector is located is determined; P1 = tan60°, P2 = Vβ / Vα; Based on sector symmetry and the large sector where the space voltage vector is located, the sector number of the small sector where the space voltage vector is located is determined according to the relationship between P2 and P3; P3 = tan30°.

3. The pulse width modulation method according to claim 2, characterized in that, The step of determining the duration of action of the basic vector based on the sector where the space voltage vector is located includes: When the space voltage vector is located in the first large sector, the functional relationship between T1, T2, and T3 with respect to Vα and Vβ is determined according to the small sector where the space voltage vector is located, and T1, T2, and T3 are determined based on the functional relationship. The first sub-sector of the first large sector corresponds to basic vectors V1 and V2, and the durations of action of basic vectors V1 and V2 in the first sub-sector of the first large sector are T1 = Vα - Vβ × tan60° and T2 = Vβ / sin30° / sin60°, respectively. The second sub-sector of the first large sector corresponds to basic vectors V2 and V3, and the durations of action of basic vectors V2 and V3 in the second sub-sector of the first large sector are T2' = (Vα - Vβ × tan30°) × / sin60 °, T3=(Vβ-Vα×tan30°)× The action time of the zero vector is T0 = T - T1 - T2 or T0 = T - T2' - T3, where T is the switching period of the pulse width modulation signal.

4. The pulse width modulation method according to claim 3, characterized in that, Before determining the functional relationship between T1, T2, and T3 with respect to Vα and Vβ based on the small sector where the space voltage vector is located, the process includes: Based on the preset modulation reference signals Vα and Vβ, determine the sum of squares of the preset modulation reference signals Vα and Vβ; When the sum of the squares of the preset modulation reference signals Vα and Vβ is greater than a preset threshold, Vα is assigned the value Vα1, and Vβ is assigned the value Vβ1; Vα1 = (m × Vα) / [(Vα)] 2 +(Vβ) 2 ], Vβ1=(m×Vβ) / [(Vα) 2 +(Vβ) 2 ], where m is the preset threshold.

5. The pulse width modulation method according to claim 1, characterized in that, The step of balancing and compensating the bus voltage of the three-phase inverter to obtain a balanced compensation voltage includes: The difference between the positive bus voltage and the negative bus voltage of the three-phase inverter is calculated, and the difference is sequentially processed by input limiting, notch filtering, proportional-integral control and output limiting before being output to obtain the balanced compensation voltage.

6. The pulse width modulation method according to claim 5, characterized in that, The notch filtering is performed twice, with the notch frequencies for the two consecutive notch filtering operations being f and 3f, respectively, where f = (F... A +F B +F C ) / 3,F A F B F C Both with F O Related, F O =G×F0+(1-G)×F1+F2, where G is a constant, 0≤G≤1, F0 is the original frequency of the mains power, F1 is the phase-locked frequency, and F2 is the compensation frequency.

7. The pulse width modulation method according to claim 4, characterized in that, The determination of the duty cycle of the pulse width modulation signal based on the sector symmetry, the duration of action, and the balance compensation voltage includes: Based on the sector symmetry and the aforementioned operating time, the conduction time T of the switching transistors corresponding to phases A, B, and C of the three-phase inverter is determined. A T B T C When the space voltage vector is located in the first large sector, T A =T C =T0 / 2, T B = T A +T2 / 2 or T B = T A +T2' / 2; The duty cycle of the pulse width modulation signal is determined based on the balance compensation voltage and the conduction time of the switching transistor.

8. The pulse width modulation method according to claim 3, characterized in that, After determining the sector number of the large sector where the space voltage vector is located, the process includes: Based on the sector number of the large sector where the space voltage vector is located, and the relationship between P2 and P3, the positions of the preset modulation reference signals Vα and Vβ in the three-phase coordinate system, located in phases A, B, and C of the three-phase inverter, are determined.

9. The pulse width modulation method according to claim 8, characterized in that, The step of determining the positions of the preset modulation reference signals Vα and Vβ in the three-phase coordinate system, specifically phases A, B, and C of the three-phase inverter, based on the sector number of the large sector where the space voltage vector is located and the magnitude relationship between P2 and P3, includes: If the preset modulation reference signal Vα is greater than zero, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase A of the three-phase inverter when converted to the three-phase coordinate system. If the preset modulation reference signal Vα is less than or equal to zero, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase A of the three-phase inverter in the three-phase coordinate system. If the space voltage vector is located in the second or third largest sector, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase B of the three-phase inverter when converted to the three-phase coordinate system. If the space voltage vector is located in the fifth or sixth sector, or if P2 is less than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase B of the three-phase inverter when converted to the three-phase coordinate system. If the space voltage vector is located in the fourth or fifth sector, then the preset modulation reference signals Vα and Vβ are determined to be located on the positive half-axis of phase C of the three-phase inverter when converted to the three-phase coordinate system. If the space voltage vector is located in the first or second largest sector, or -P2 is greater than or equal to P3, then the preset modulation reference signals Vα and Vβ are determined to be located on the negative half-axis of phase C of the three-phase inverter when converted to the three-phase coordinate system.

10. A three-phase inverter, characterized in that, include: A three-level inverter topology circuit and a controller, wherein the controller is electrically connected to the three-level inverter topology circuit, and the controller is used to implement the pulse width modulation method as described in any one of claims 1-9 to output the pulse width modulation signal to the three-level inverter topology circuit.

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