An ECT / ERT dual-mode switching circuit and control method

Abstract

The present application relates to the technical field of electrical tomography, and discloses an ECT / ERT dual-mode switching circuit and a control method, aiming to solve the problems of low hardware multiplexing degree, poor mode isolation and difficult timing coordination of the existing system. The circuit comprises a sensing electrode array, a channel switching module composed of an SPDT switch array and a multiplexer, parallel ECT and ERT excitation and signal processing links, and a controller. The controller controls the switching of the electrodes among the excitation, measurement and shielding modes by controlling the switch state, and realizes the time-sharing acquisition of the dual modes based on timing coordination. The present application can effectively suppress channel crosstalk and the influence of parasitic parameters, and meets the requirements of capacitive and resistive imaging, has a compact structure, and satisfies the requirements of high-speed real-time switching of industrial process tomography.

Description

Technical Field

[0001] This invention relates to the field of electrical tomography technology, specifically to a switching circuit and control method for a dual-modal fusion system of electrical capacitance tomography (ECT) and electrical resistance tomography (ERT). Background Technology

[0002] Capacitance tomography (ECT) and electrical resistance tomography (ERT) are two process tomography techniques based on electrical sensing mechanisms, which are widely used in the online detection and visualization reconstruction of two-phase / multiphase flow and complex media distribution.

[0003] In terms of physical response mechanism, ECT establishes an alternating electric field within the measured field by applying an AC voltage excitation to the boundary electrodes. The dielectric constant distribution of the medium within the measured region causes spatial variations in the electric field strength, which in turn affects the accumulation of induced charges on the surfaces of adjacent electrodes, ultimately manifesting as a weak coupling capacitance response between the electrodes. Therefore, ECT is typically sensitive to non-conductive phases, low-conductivity phases, and changes in the interfacial morphology of the medium. It is suitable for detection scenarios such as gas-liquid two-phase flow, powder transport, and oil-gas mixed transport, and can effectively reflect the polarization characteristics and phase interface distribution of the medium.

[0004] Conversely, ERT establishes a conductive current field within the measured field by injecting a constant alternating current into the boundary electrodes. According to Ohm's law and the principle of current continuity, the conductivity distribution within the medium directly affects the current conduction path and potential distribution, thus causing a potential difference on the boundary electrode surface. By measuring the voltage response between the boundary electrodes, the conductivity distribution within the field can be retrieved. Therefore, ERT is highly sensitive to the spatial distribution, connectivity, and transport characteristics of the conductive phase, making it suitable for detecting oil-water two-phase flows, ionic solution distributions, and conductive mixed flows.

[0005] Although ECT and ERT are highly complementary in terms of physical mechanisms and applicable objects, and their combined use is expected to reduce the problems of fuzziness, artifacts and misjudgments caused by a single measurement mechanism, the fusion of these two modalities on the same hardware platform faces extremely stringent technical challenges.

[0006] The hardware implementation requirements for the two differ significantly. First, the excitation methods are vastly different: ECT requires high-frequency AC voltage excitation at the hundred kHz level, measuring weak coupling capacitance signals at the pF level between electrodes, making it extremely sensitive to parasitic parameters such as parasitic capacitance and leakage current in the front-end signal conditioning circuit; while ERT uses lower-frequency AC constant current excitation at the ten kHz level, measuring boundary voltage response, with a relatively larger measured signal amplitude, but placing extremely stringent requirements on the on-resistance and consistency of the front-end switching channels. Second, the data acquisition scale differs: taking a 16-electrode system as an example, ECT needs to acquire 120 sets of independent capacitance data, while ERT needs to acquire 104 sets of independent boundary voltage data in adjacent excitation mode.

[0007] In current technologies, to reduce hardware costs, some solutions attempt to construct dual-modal systems by multiplexing electrodes or sampling channels using multiplexers. However, due to the inconsistent operating conditions of ECT and ERT, intermodal coupling and sampling interference are easily generated when multiplexing channels. Specifically: First, the parasitic capacitance of the switching device in the off state is on the same order of magnitude as the pF-level measured coupling capacitance of the ECT, which will cause significant capacitance baseline drift during signal acquisition, resulting in artifacts in the reconstructed image; Second, the charge injection effect generated by the switching device at the moment of switching will cause output jumps at the measurement node, forcing the system to reserve an additional settling time of hundreds of nanoseconds to microseconds after channel switching, which greatly restricts the polling speed of the system; Third, most multiplexers have relatively large on-resistance or poor channel consistency. Under the condition that the electrode contact impedance is usually hundreds to thousands of ohms, it is easy to cause ERT excitation current distribution deviation and boundary voltage measurement error, which seriously affects the reconstruction accuracy.

[0008] More importantly, in dual-mode multi-electrode high-speed polling acquisition, due to the lack of a unified switching topology and precise cross-modal control timing, it is difficult to achieve synchronous coordination of the rapid transitions between the three states of excitation, measurement and shielding of each electrode. This leads to problems such as residual excitation coupling and asynchronous sampling between different modes, which in turn causes a continuous decline in the stability of boundary response data.

[0009] In summary, due to the irreconcilable hardware contradictions between ECT and ERT in terms of physical detection mechanism, excitation signal characteristics, sensitivity to front-end parasitic parameters, and device channel impedance requirements, how to achieve effective isolation, rapid gating, and stable time-division collaborative control of two significantly different links on the same hardware platform has always been a key technical barrier in the design of dual-modal tomography systems and a core bottleneck restricting their industrial online real-time applications. Summary of the Invention

[0010] This invention aims to solve the problems of high hardware repeatability, complex structure, insufficient mode isolation, large channel switching interference, and difficulty in sampling timing coordination in existing ECT / ERT dual-mode systems. It provides an ECT / ERT dual-mode switching circuit and control method that is compact, reconfigurable, easily expandable, and capable of achieving high-speed acquisition and precise timing coordinated control.

[0011] The technical solution adopted by this invention to solve the technical problem is:

[0012] A first aspect of the present invention is to provide an ECT / ERT dual-mode switching circuit, comprising:

[0013] The sensing acquisition module includes a cross-distributed array of independent electrodes for constructing a boundary measurement channel for the measured field.

[0014] The channel switching module includes an SPDT switch array and a multiplexer gating network. The SPDT switch array is connected to the independent electrode array, and the multiplexer gating network is connected between the SPDT switch array and the excitation and signal processing link.

[0015] A dual-modal excitation and signal processing link, including an ECT excitation and signal processing link and an ERT excitation and signal processing link, wherein the two links are configured in parallel and respectively connected to the multiplexer gating network; and

[0016] The controller is connected to the SPDT switch array and multiplexer gating network;

[0017] The controller is configured to: control the switching and gating states of the SPDT switch array and the multiplexer gating network to switch each electrode between excitation state, measurement state and shielding state, and to connect the ECT link and ERT link in a time-division manner based on timing cooperative control, thereby realizing dual-mode multiplexing, electrical isolation and channel reconfiguration of ECT and ERT.

[0018] Furthermore, the independent electrode array is a cylindrical structure, with multiple metal electrodes evenly installed on the inner wall of the cylinder, and a corresponding number of metal measurement electrodes arranged on the outer wall of the cylinder. A grounded shielding sleeve is provided on the outside of the cylinder. During mode isolation: when in ECT measurement mode, the controller controls the electrode and its channel switching network corresponding to ERT mode to enter the shielding state and disconnects the ERT link connection; when in ERT measurement mode, the controller controls the electrode and its channel switching network corresponding to ECT mode to enter the shielding state and disconnects the ECT link connection; the electrodes in the shielding state are shut off from the main measurement link, reducing bypass electromagnetic interference and inter-mode crosstalk.

[0019] Furthermore, the ECT excitation and signal processing link includes a digital-to-analog converter, a low-pass filter circuit, and an AC voltage source circuit connected in sequence; the ECT excitation and signal processing link also includes a programmable amplifier, an anti-aliasing filter circuit, and an analog-to-digital converter connected in sequence.

[0020] In the ECT mode, the control logic of the SPDT switch array is as follows: In the excitation mode, the first switch is switched to the excitation path terminal, the second switch is switched to the conducting terminal, and the third switch is switched to the disconnect detection path terminal; in the measurement mode, the first switch is switched to the disconnect excitation input terminal, the second switch is switched to the disconnect electrode connection terminal, and the third switch is switched to the connect capacitance detection path terminal. The weak capacitance sensing signal on the electrode is sent to the analog-to-digital converter for sampling after passing through the C / V conversion circuit, the programmable amplifier, and the anti-aliasing filter circuit.

[0021] Furthermore, the ERT excitation and signal processing link includes a digital-to-analog converter, a low-pass filter circuit, and a differential current source circuit connected in sequence; the ERT excitation and signal processing link also includes a single-ended converter, a programmable amplifier, an anti-aliasing filter circuit, and an analog-to-digital converter connected in sequence.

[0022] In the ERT mode, the control logic of the SPDT switch array is as follows: In the excitation mode, the first switch is switched to the excitation path terminal, and the second switch is switched to the conducting terminal, so that the differential constant current source is injected into the target electrode pair through the gating network; in the measurement mode, the first switch is switched to the excitation path terminal, and the second switch is switched to the voltage acquisition path terminal, so that the detection electrode is connected to the voltage acquisition circuit, and the boundary voltage signal is sent to the analog-to-digital converter for sampling after single-ended conversion, programmable amplification and anti-aliasing filtering.

[0023] Furthermore, the SPDT switch array includes an ECT front-end switch array and an ERT front-end switch array; the switching devices of the ECT front-end switch array have low parasitic capacitance, low leakage current and low charge injection characteristics to reduce interference to weakly coupled capacitor signals; the switching devices of the ERT front-end switch array have low on-resistance and high channel consistency characteristics to reduce channel voltage drop and injection current error; the operational amplifiers in the SPDT switch array are precision operational amplifiers.

[0024] Furthermore, the multiplexer gating network includes an ECT gating network and an ERT gating network; the ECT gating network includes a multi-channel analog multiplexer configured as a two-port capacitance measurement architecture; the ERT gating network includes a multi-channel analog multiplexer configured as a four-port resistance acquisition architecture; the controller performs channel gating control on the multiplexer gating network by sending address signals and enable signals.

[0025] A second aspect of the present invention is to provide an ECT / ERT dual-mode switching control method, applied to the aforementioned ECT / ERT dual-mode switching circuit, comprising the following steps:

[0026] ECT modal excitation steps: control the ECT link to conduct, select the target electrode as the excitation terminal, and inject an AC voltage excitation signal into the field under test;

[0027] ECT modal measurement steps: Control the SPDT switch array to switch to the measurement path, select the non-excitation electrode to connect to the C / V detection circuit, and obtain the capacitance response data;

[0028] ERT modal excitation steps: control the ERT link to be turned on, select the target electrode pair as the current injection terminal, and inject an AC constant current excitation signal into the field under test.

[0029] ERT modal measurement steps: Control the SPDT switch array to switch to the measurement path, select the non-excitation electrode to connect to the voltage detection link, and obtain boundary voltage response data;

[0030] Shielding step: For electrodes that are not involved in excitation or measurement in the current mode, control the corresponding SPDT switch to ground them and disconnect them from the link, so that they enter the shielding state.

[0031] Furthermore, the timing coordination control includes: in ECT mode and ERT mode, the single-channel switching time depends on the sum of the action time of the SPDT switch and the multiplexer and the set stabilization time required by the excitation signal, in order to adapt to the switching requirements of AC excitation at different frequencies; and after the switching action is completed, a waiting time of a set duration is reserved, and the analog-to-digital converter sampling is started after the charge injection and discharge at the moment of the SPDT switch switching is completed.

[0032] Furthermore, in the shielding step, for the shielding electrode in ECT mode, the corresponding first switch is controlled to be turned on to the disconnect detection branch terminal, the second switch is turned on to the ground terminal, and the third switch is turned on to the shielding structure construction terminal; for the shielding electrode in ERT mode, the corresponding first switch is controlled to be turned on to the disconnect back-end network terminal and the second switch is turned on to the disconnect electrode connection terminal.

[0033] Furthermore, the steps for controlling the switching of each electrode between the excitation state, measurement state, and shielding state include: according to the preset synchronization clock signal and channel address strobe signal, sequentially switching each electrode from the shielding state to the excitation state or measurement state; and reserving the waiting time after the switching action is completed before starting the analog-to-digital converter for sampling.

[0034] The advantages and positive effects of this invention are:

[0035] 1. This invention effectively reduces channel crosstalk, coupling, and sampling errors by integrating an SPDT switch array and a multiplexer gating network on a unified hardware platform, combined with dual-mode independent links and controller timing coordination, while taking into account the advantages of ECT high-sensitivity dielectric detection and ERT conductivity distribution imaging.

[0036] 2. The front-end switching network of this invention can ensure the consistency requirements of ERT current injection and voltage sampling, while minimizing the impact of parasitic capacitance and charge injection when detecting weak capacitance signals in ECT. Through shielding state and precise timing control, it improves the data stability in the multi-electrode polling process, and can meet the requirements of high-speed acquisition and real-time switching in a 16-electrode system. It provides a compact, reconfigurable and easily expandable dual-modal hardware solution for industrial process tomography. Attached Figure Description

[0037] Figure 1 This is a system overall block diagram of the ECT / ERT dual-mode switching circuit in one embodiment of the present invention;

[0038] Figure 2 This is a schematic diagram of the ERT front-end switching circuit in one embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of the ECT front-end switching circuit in one embodiment of the present invention;

[0040] Figure 4 This is a timing diagram of mode switching in one embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of the signal path under ECT excitation mode in one embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram of the signal path under ECT measurement mode in one embodiment of the present invention;

[0043] Figure 7 This is a timing diagram of the switching control of ECT mode in one embodiment of the present invention;

[0044] Figure 8 This is a schematic diagram of the signal path under the ERT excitation mode in one embodiment of the present invention;

[0045] Figure 9 This is a schematic diagram of the signal path under ERT measurement mode in one embodiment of the present invention;

[0046] Figure 10 This is a timing diagram of the switching control of the ERT mode in one embodiment of the present invention;

[0047] Figure 11This is a schematic diagram of the ECT gating network in one embodiment of the present invention;

[0048] Figure 12 This is a schematic diagram of the ERT gating network in one embodiment of the present invention;

[0049] Figure 13 This is a schematic diagram of an ECT state switching array in one embodiment of the present invention;

[0050] Figure 14 This is a schematic diagram of an ECT capacitor detection circuit and channel switching network in one embodiment of the present invention;

[0051] Figure 15 This is a schematic diagram of the ERT state switching array in one embodiment of the present invention;

[0052] Figure 16 This is a schematic diagram of the ERT channel switching network in one embodiment of the present invention. Detailed Implementation

[0053] The present invention will be further described in detail below through specific embodiments. The following embodiments are merely descriptive and not limiting, and should not be used to limit the scope of protection of the present invention.

[0054] I. Overall Hardware Architecture

[0055] Reference Figure 1 The overall system architecture model of the ECT / ERT dual-mode switching circuit of the present invention is as follows: The system uses independently distributed electrodes as sensing front-ends and a channel switching network to realize hardware multiplexing of detection modes. ECT excitation and signal processing links and ERT excitation and signal processing links are integrated on the same hardware platform. Through timing-coordinated control, parallel / time-division detection of dielectric and conductivity parameters of the measured field is completed respectively.

[0056] Figure 1 In the diagram, Vi(t0) and Vi(t1) are the ECT mode electrode voltage signals; Io+(t0) and Io-(t0) are the ERT mode differential excitation current output signals; and Vi+(t1) and Vi-(t1) are the ERT mode electrode differential voltage signals. The channel switching networks (MUX) 1X16X2 and (MUX) 1X16X4 represent the ECT two-port 16-channel multiplexing architecture and the ERT four-port 16-channel multiplexing architecture, respectively.

[0057] The multi-electrode array arranged circumferentially on the left is the sensing and acquisition module. Its main body is a cylindrical structure, with 16 titanium metal electrodes evenly installed on the inner wall and 16 copper metal measuring electrodes arranged on the outer wall. A grounded aluminum shielding sleeve is installed on the outside of the cylinder. This structure constitutes a complete pipeline sensing unit. Three elliptical structures inside the cylindrical pipe serve as simulation models of the measured object field, used to simulate the distribution of different media within the pipeline.

[0058] The middle section consists of a mode switching circuit unit built on an SPDT switch array and a channel switching network built on a multi-channel analog multiplexer. The SPDT array enables macroscopic switching of the detection modes, and the analog multiplexer completes the selection of a single measurement channel.

[0059] The right side of the block diagram shows two independent excitation and signal processing links: ECT and ERT. The ECT link generates an analog AC voltage excitation through a DAC, which is then filtered and output to the electrodes via an AC voltage source. The electrode-induced signal is amplified by a programmable amplifier, filtered against anti-aliasing, and then digitized by an ADC. The ERT link uses a DAC in conjunction with a differential current source to output an alternating excitation current. The electrode-acquired voltage is first converted to a single-ended voltage, then amplified and filtered before being sampled by an ADC.

[0060] II. ECT / ERT Modal Front-End Switching Circuit and Isolation Logic

[0061] Reference Figure 2 , Figure 3 . Figure 2 It includes two electrode paths, A and B, each configured with SPDT switches S1 and S2: the switches include pin 1 and pin 2; Figure 3 It includes SPDT switches S1, S2, and S3; where Cx is the measured coupling capacitor, and Cs1 and Cs2 are parasitic capacitances to ground; the operational amplifier feedback branch includes a feedback resistor Rf and a feedback capacitor Cf, which together form the capacitance detection circuit. Time-division multiplexing isolation between ECT and ERT is achieved through the state switching of the SPDT switch array. The specific logic is as follows:

[0062] When ECT measurement is performed, the ERT electrode and channel switching network enters a shielded state: all electrode control switches S1 and S2 are connected to pin 2 and pin 1, respectively; when ERT measurement is performed, the ECT electrode enters a shielded state: the front-end circuit control switch S1 is connected to pin 2, disconnecting the connection with the capacitance detection branch; switch S2 is connected to pin 2, grounding the electrode plate and electrically disconnecting it from the original ECT path; switch S3 is connected to pin 1, grounding the electrode plate and forming a shielded structure.

[0063] Reference Figure 4 This invention relates to a mode switching timing diagram. Figure 4In this context, MODE is the global mode control signal; R_S1 and R_S2 are the ERT link switch control signals; and C_S1, C_S2, and C_S3 are the ECT link switch control signals.

[0064] The current operating mode is selected by the MODE signal: when MODE is high, the ECT capacitance tomography measurement mode is run; when MODE jumps to low, the system switches to the ERT resistance tomography measurement mode.

[0065] Switching from ECT mode to ERT mode: The MODE signal is pulled low, initiating a mode switching command; after passing through the transition interval... This is used to release parasitic charges in the channel and eliminate residual charge injection and stray capacitance charge from the ECT mode. During this period, ECT path switches C_S1, C_S2, and C_S3 gradually complete their state reset, disconnecting the ECT capacitor excitation and detection path; simultaneously, ERT path switches R_S1 and R_S2 gradually complete the ERT measurement link switch state configuration. After the transition time... After all the switching states stabilized, the ERT mode officially began to perform electrode polling acquisition.

[0066] Switching from ERT mode back to ECT mode: The MODE signal goes high, issuing a command to switch back to ECT; entering the transition interval. Release residual charge accumulated on the electrodes in ERT mode to suppress switching transient noise. During this stage, R_S1 and R_S2 are reset, disconnecting the ERT current excitation and voltage acquisition paths; C_S1, C_S2, and C_S3 reconfigure the ECT electrode paths. After the transition time ends and the switching state stabilizes, the system enters ECT mode and performs capacitance scan measurement.

[0067] This timing sequence enables synchronous control of the aforementioned mode switching.

[0068] III. Specific Implementation of the ECT Excitation and Measurement Model

[0069] Reference Figure 5 (The device and signal labels are defined the same) Figures 1-3 In ECT excitation mode, an alternating high-frequency excitation signal is generated by a digital-to-analog converter (DAC). The signal is filtered by a low-pass filter circuit to suppress quantization noise, and the amplitude adjustment and power matching are completed by a voltage excitation drive circuit.

[0070] The analog multiplexer selects the target electrode as the excitation terminal, and the front-end SPDT switch switches according to a predetermined state: switch S1 switches to pin 2 to connect to the excitation path; switch S2 switches to pin 1, and the excitation signal is connected to the electrode plate; switch S3 switches to pin 1, and the electrode plate remains disconnected from the detection channel. The excitation signal is injected into the measured field through the sensing electrode to form an alternating electric field.

[0071] Reference Figure 6 (The device and signal labels are defined the same) Figures 1-3 In ECT measurement mode, switch S1 switches to pin 1, disconnecting the excitation input path and connecting it to the detection channel; switch S2 switches to pin 2, cutting off the connection between the excitation terminal and the electrode plate, placing the input line in signal isolation; switch S3 switches to pin 2, connecting the electrode plate to the input terminal of the capacitance detection circuit. The weak capacitance-induced signal on the electrode enters the detection channel, is first converted into a voltage signal by a C / V conversion circuit, then its gain is adjusted by a process-controlled amplifier, and noise is suppressed by an anti-aliasing filter circuit. Finally, it is sampled and quantized by an analog-to-digital converter (ADC) to obtain the capacitance measurement data.

[0072] Reference Figure 7 C_CLK is the ECT mode synchronization clock signal, and C_SEL is the ECT electrode channel selection signal, used to select 16 electrodes from C0 to C16. Figure 7 The example only shows the switching timing markers C1_S1, C1_S2, C1_S3, C2_S1, C2_S2, C2_S3, C3_S1, C3_S2, and C3_S3 corresponding to electrodes 1 to 3, which correspond to the control timing of the electrode front-end switching switches S1, S2, and S3, respectively. The control timing logic of the switching switches at the other electrodes is similarly deduced. During measurement mode operation, under the synchronization of the C_CLK clock, the C_SEL signal sequentially selects all 16 electrodes.

[0073] Within the same clock cycle, only the target electrode is selected to be in the Sti excitation state and the Meas measurement state respectively, for capacitance signal excitation and acquisition; all other electrodes not involved in this excitation-measurement are configured in the Mask shielding state, and the electrode time-division multiplexing under the aforementioned electrode shielding mode ECT mode is performed. The capacitance scan measurement of all electrode pairs is completed through the above polling-shielding mechanism.

[0074] IV. Specific Implementation of ERT Incentive and Measurement Model

[0075] Reference Figure 8 In ERT excitation mode, an alternating low-frequency excitation signal is generated by a digital-to-analog converter (DAC). The signal is filtered by a low-pass filter circuit to suppress quantization noise, and then converted into a current excitation signal with stable amplitude through a differential constant current circuit.

[0076] The analog multiplexer selects the target electrode pair as the current injection terminal. The front-end switch array performs the corresponding switching action: switch S1 switches to pin 1, enabling the excitation path; switch S2 switches to pin 2, enabling the constant current source output terminal to connect with the target electrode plate, and the differential current is injected into the measured field through the selected electrode pair, establishing a stable conductive current field in the imaging region.

[0077] Reference Figure 9 In ERT measurement mode, the non-excitation electrodes are sequentially connected to the measurement link as voltage detection terminals under the control of the channel switching network. The front-end switch array performs measurement state switching: switch S1 switches to pin 1; switch S2 switches to pin 2, connecting the detection electrode to the input terminal of the voltage acquisition circuit. The boundary voltage signal is then conditioned and denoised by a single-ended conversion circuit, a programmable amplifier, and an anti-aliasing filter circuit, and sampled and quantized by an analog-to-digital converter (ADC) to obtain the boundary voltage data of the corresponding measurement electrode combination.

[0078] For ERT electrodes that are momentarily in an unexcited, non-measurement state, they remain in a shielded state. Switch S1 connects to pin 2, and switch S2 connects to pin 1, disconnecting the electrode from the back-end switching network to prevent it from participating in the current measurement process and to reduce the effects of crosstalk and parasitic coupling between channels.

[0079] Reference Figure 10 R_CLK is the ERT mode synchronization clock signal, and R_SEL is the ERT electrode channel selection signal; Figure 10 The example only shows the control timing of the switching timing markers R1_S1, R1_S2, R2_S1, R2_S2, R3_S1, R3_S2, R4_S1, R4_S2, R5_S1, and R5_S2 corresponding to the electrode front-end switching switches S1 and S2, respectively. The control timing logic of the other electrode front-end switching switches is similarly deduced. In ERT mode, driven by the R_CLK synchronous clock, R_SEL sequentially selects 16 electrodes; one pair of electrodes is configured with Sti+ and Sti- to complete the excitation current injection of the measured field; another pair of electrodes is configured with MeasA and MeasB to realize the differential voltage pickup of the field; the remaining electrodes are set to the Mask shielding state, and the idle electrodes are grounded and shielded. By switching all electrode combinations through clock polling, all differential voltage measurement data required for ERT resistance tomography are obtained.

[0080] V. Specific Configuration of the Channel Switching Network

[0081] Reference Figure 11 and Figure 12 The electrode channel switching array (gating network) is used to dynamically select each electrode channel under the control of the controller, realize the reconfigurable connection between the electrode and the excitation link and the measurement link, and enable each electrode to switch to excitation electrode, measurement electrode or shielding electrode in different working stages to meet the dual-mode state switching requirements.

[0082] See Figure 11The ECT gating network comprises two 16-channel analog multiplexers; the multiplexer ports include channel outputs S1-S16, address bits A0-A3, enable pin ENA, ground GND, and unused pin NC; the gating network connects the electrode switching array and the FPGA controller, adapting to a two-port capacitance measurement architecture. See Figure 12 The ERT selection network diagram uses four 16-bit analog multiplexers. Each multiplexer port includes S1-S16, addresses A0-A3, and an enable signal ENA. It is managed by an FPGA controller, with a 16-electrode channel switching array connected to the back end, adapting to a four-port resistance acquisition architecture. The controller (such as an FPGA) sends address A0-A3 signals and an enable signal ENA to complete the channel selection control of the multiplexers.

[0083] VI. Specific Implementation Plan and Performance Parameters

[0084] In this solution, the ECT / ERT dual-mode switching and gating network circuit must simultaneously meet the following technical requirements:

[0085] Firstly, ERT mode involves current injection and boundary voltage measurement, requiring switching devices to have low on-resistance to reduce channel voltage drop, injection current error, and measurement distortion.

[0086] Secondly, the ECT mode requires the detection of weak coupling capacitance signals, which requires the switching devices to have low channel capacitance, low leakage current and small charge injection, in order to reduce the impact of parasitic coupling on the capacitance measurement results.

[0087] Third, multi-electrode polling and dynamic process acquisition require switching devices to have fast turn-on / turn-off speeds and good channel consistency.

[0088] Fourth, the front-end precision operational amplifier needs high input impedance, low bias current, high bandwidth and fast sampling rate to meet the requirements of weak signal detection and fast and stable sampling.

[0089] Based on the above requirements, this solution selects ADG1634BRUZ (4-Channel SPDT switch), MAX333ACUP (4-Channel SPDT switch), ADG1606BRUZ (16-Channel multiplexer), and AD8066ARZ (precision amplifier) ​​as the front-end switching and gating network implementation devices. See [link to circuit diagram] for the specific circuit structure. Figures 13-16 .

[0090] See Figure 13The schematic diagram of the ECT state switching array consists of multiple MAX333ACUP chips; SC1_CX, SC2_CX, and SC3_CX are the three-way switch control signals on the ECT side; TP_CX is the external interface of the ECT electrode; CHANX is the internal channel of the switch array; and C_TXX is the interaction path of the gating network.

[0091] The ECT measurement path design differs from that of ERT. The weak capacitance sensitive area is limited to the front end of the charge amplifier from the electrode. After the signal is converted into a voltage measurement quantity by CV, the back-end link is no longer affected by the parasitic capacitance of the switch. Only the amplitude attenuation of the converted signal caused by the on-resistance needs to be considered.

[0092] In the excitation mode, the AC excitation signal is transmitted through Figure 14 The constructed 2x16 Channel electrode gating network selects the excitation end. Figure 14 In this circuit, WBS is the ECT excitation path, and FILTER is the ECT detection output path. The excitation signal enters the ECT electrode switching circuit via the WBS path.

[0093] The three tags SC1_CX, SC2_CX, and SC3_CX jointly select the SPDT switch state, entering ECT excitation mode. The excitation signal flows to the TP_CX electrode interface through the C_TXX and CHANX paths, ultimately triggering the excitation of the field under test. In measurement mode, the three tags C1_CX, SC2_CX, and SC3_CX jointly select the SPDT switch state, entering ECT measurement mode. A weak capacitance signal is triggered from the TP_CX electrode and enters through the C_INX path. Figure 14 The capacitance detection circuit converts the signal into an analog voltage signal, which then returns to the switching circuit via C_OUTX, enters the FILTER path of the gating network via C_TXX, and finally enters the signal processing link. Other non-excitation and non-measurement electrodes are shielded.

[0094] The preamplifier measurement path is connected in series with a MAX333ACUP, whose off-state parasitic capacitance is <5pF, maximum off-state leakage current is <250pA, and charge injection is <2pC. In the on-state, the internal parasitic capacitance of the switching path is reduced by low resistance. In a short circuit, the potentials at both ends of the channel are essentially equal, there is no alternating charging and discharging process, and it does not participate in charge transfer, thus having a very low impact on capacitance measurement. The detection circuit only samples... The charge flowing to the virtual ground of the operational amplifier and the charge generated by the parasitic capacitance in parallel with the switch port to ground are directly discharged to the ground and will not flow into the operational amplifier feedback loop to cause measurement deviation.

[0095] During the switching process, the device gate injects charge into the electrode node, and some of this charge is transferred to ground via parasitic capacitance. Release, residual charge via Injected charge enters the op-amp, causing a transient jump in the output voltage. This requires a wait time of several hundred ns to μs after channel switching to allow the injected charge to pass through. After the discharge is complete, sampling will be restarted to eliminate errors.

[0096] In the off-state, the residual electric field of the electrode and the excitation signal of the adjacent channel will pass through the off-state capacitor. It is coupled to the back-end circuit in series, and the equivalent coupling capacitance is The coupling amount is much lower than that of parallel coupling, and at the same time because and With numerical magnitudes similar, high-power excitation in adjacent channels will still generate a small amount of crosstalk. All electrodes are equipped with grounding shielding layers to suppress this coupling interference.

[0097] With the switch port grounded, the parasitic capacitances of adjacent channels are connected in parallel and superimposed at the measurement node; the series parasitic capacitance of the switch conduction path itself is extremely small and negligible. Low parasitic parameters avoid distortion of weak measured capacitance signals. A typical measured capacitance in industrial ECT is used. Calculations show that the stray capacitance introduced by the switch accounts for less than 5%, which will not produce significant capacitance baseline drift or imaging artifacts. After the weakly coupled capacitor signal is converted by the detection circuit, the subsequent voltage transmission path passes through the secondary SPDT switch and the ADG1606BRUZ multiplexer in sequence, and the amplitude attenuation of the voltage signal is negligible.

[0098] MAX333ACUP On-Time ADG1606BRUZ is For a 400kHz excitation signal, a single excitation triggers a complete 2-cycle signal; the required hold time is... Single channel switching time In 16-electrode mode, ECT requires 120 independent data points, corresponding to 120 acquisition switching times, which can meet the hardware sampling requirement of a maximum frame rate of 1588fps.

[0099] Figure 15 As shown, the ERT single measurement path consists of two stages of SPDT switching devices connected in series. In excitation mode, the AC excitation signal passes through... Figure 16 The constructed 4x16 Channel electrode gating network selects the excitation end. Figure 16 IA_OUT1 and IA_OUT2 are differential excitation output paths; SIGN_IN1 and SIGN_IN2 are differential measurement input paths. Positive and negative differential excitation signals are injected into the electrode switching circuit via IA_OUT1 and IA_OUT2.

[0100] The CO1_RX and CO2_RX tags jointly select the switching state of the corresponding SPDT array of the electrode switching circuit, entering the ERT excitation mode. The excitation signal flows through the R_TXX and SIM_RX paths to the TP_RX electrode interface, ultimately triggering injection into the field under test. In measurement mode, the CO1_RX and CO2_RX tags jointly select the SPDT switching state to enter the ERT measurement mode. The excitation and measurement links are the same, only the flow direction is different. The differential measurement signal starts from the TP_RX electrode, passes through the gating network, and enters the signal processing link through the SIGN_IN1 and SIGN_IN2 paths. During this process, other non-excitation and non-measurement electrodes enter a shielded state.

[0101] Typical on-resistance of ADG1634BRUZ The device features single-channel on-resistance flatness ≤1Ω and high channel impedance consistency; the ADG1606BRUZ multiplexer has a typical on-resistance of ≤1Ω. The difference between channels is <1.1Ω; the total series on-resistance of the channels is: The contact resistance of ERT electrodes in industrial pipelines is typically... The range is determined by the typical load impedance. Calculation error, the proportion of amplitude error introduced by channel internal resistance: The total on-resistance only introduces a 0.90% amplitude error.

[0102] ADG1634BRUZ conduction setup time The ADG1606BRUZ conduction setup time is For a 50kHz excitation signal, a single excitation outputs two complete signal cycles, corresponding to the required hold time. Therefore, the single-channel switching time In 16-electrode operating mode, the ERT needs to collect 104 sets of independent measurement data. After timing calculations for all channel switching, the maximum sampling frame rate of the system hardware can reach 238fps.

[0103] In summary, this solution can meet the real-time requirements of high-speed integrated acquisition and mode switching for ECT / ERT dual-modal operation.

[0104] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the inventive concept, and these all fall within the protection scope of the present invention.

Claims

1. An ECT / ERT dual-mode switching circuit, characterized in that, include: The sensing acquisition module includes a cross-distributed array of independent electrodes for constructing a boundary measurement channel for the measured field. The channel switching module includes an SPDT switch array and a multiplexer gating network. The SPDT switch array is connected to the independent electrode array, and the multiplexer gating network is connected between the SPDT switch array and the excitation and signal processing link. The dual-modal excitation and signal processing link includes an ECT excitation and signal processing link and an ERT excitation and signal processing link. The two links are configured in parallel and are respectively connected to the multiplexer gating network. And the controller, which is connected to the SPDT switch array and multiplexer gating network; The controller is configured to: control the switching and gating states of the SPDT switch array and the multiplexer gating network to switch each electrode between excitation state, measurement state and shielding state, and to connect the ECT link and ERT link in a time-division manner based on timing cooperative control, thereby realizing dual-mode multiplexing, electrical isolation and channel reconfiguration of ECT and ERT.

2. The ECT / ERT dual-mode switching circuit according to claim 1, characterized in that, The independent electrode array is a cylindrical structure with multiple metal electrodes evenly installed on the inner wall of the cylinder and a corresponding number of metal measurement electrodes arranged on the outer wall of the cylinder. A grounded shielding sleeve is provided on the outside of the cylinder. During mode isolation: when in ECT measurement mode, the controller controls the electrode and its channel switching network corresponding to ERT mode to enter the shielding state and disconnects the ERT link connection; when in ERT measurement mode, the controller controls the electrode and its channel switching network corresponding to ECT mode to enter the shielding state and disconnects the ECT link connection; the electrodes in the shielding state are disconnected from the main measurement link, reducing bypass electromagnetic interference and inter-mode crosstalk.

3. The ECT / ERT dual-mode switching circuit according to claim 1, characterized in that, The ECT excitation and signal processing link includes a digital-to-analog converter, a low-pass filter circuit, and an AC voltage source circuit connected in sequence; the ECT excitation and signal processing link also includes a programmable amplifier, an anti-aliasing filter circuit, and an analog-to-digital converter connected in sequence. In ECT mode, the control logic of the SPDT switch array is as follows: In excitation mode, the first switch is switched to the excitation path terminal, the second switch is switched to the conducting terminal, and the third switch is switched to the disconnect detection path terminal; in measurement mode, the first switch is switched to the disconnect excitation input terminal, the second switch is switched to the disconnect electrode connection terminal, and the third switch is switched to the connect capacitance detection path terminal. The weak capacitance sensing signal on the electrode is sent to the analog-to-digital converter for sampling after passing through the C / V conversion circuit, the programmable amplifier, and the anti-aliasing filter circuit.

4. The ECT / ERT dual-mode switching circuit according to claim 1, characterized in that, The ERT excitation and signal processing link includes a digital-to-analog converter, a low-pass filter circuit, and a differential current source circuit connected in sequence; the ERT excitation and signal processing link also includes a single-ended converter, a programmable amplifier, an anti-aliasing filter circuit, and an analog-to-digital converter connected in sequence. In ERT mode, the control logic of the SPDT switch array is as follows: In excitation mode, the first switch is switched to the excitation path terminal and the second switch is switched to the conducting terminal, so that the differential constant current source is injected into the target electrode pair through the gating network; in measurement mode, the first switch is switched to the excitation path terminal and the second switch is switched to the voltage acquisition path terminal, so that the detection electrode is connected to the voltage acquisition circuit, and the boundary voltage signal is sent to the analog-to-digital converter for sampling after single-ended conversion, programmable amplification and anti-aliasing filtering.

5. The ECT / ERT dual-mode switching circuit according to claim 1, characterized in that, The SPDT switch array includes an ECT front-end switch array and an ERT front-end switch array; the switching devices of the ECT front-end switch array have low parasitic capacitance, low leakage current and low charge injection characteristics to reduce interference to weakly coupled capacitor signals; the switching devices of the ERT front-end switch array have low on-resistance and high channel consistency characteristics to reduce channel voltage drop and injection current error; the operational amplifiers in the SPDT switch array are precision operational amplifiers.

6. The ECT / ERT dual-mode switching circuit according to claim 1, characterized in that, The multiplexer gating network includes an ECT gating network and an ERT gating network; the ECT gating network includes a multi-channel analog multiplexer configured as a two-port capacitance measurement architecture; the ERT gating network includes a multi-channel analog multiplexer configured as a four-port resistance acquisition architecture. The controller manages the channel selection of the multiplexer network by sending address and enable signals.

7. A method for controlling ECT / ERT dual-mode switching of an ECT / ERT dual-mode switching circuit according to any one of claims 1 to 6, characterized in that, The following timing coordination control steps are included: ECT modal excitation steps: control the ECT link to conduct, select the target electrode as the excitation terminal, and inject an AC voltage excitation signal into the field under test; ECT modal measurement steps: Control the SPDT switch array to switch to the measurement path, select the non-excitation electrode to connect to the C / V detection circuit, and obtain the capacitance response data; ERT modal excitation steps: control the ERT link to be turned on, select the target electrode pair as the current injection terminal, and inject an AC constant current excitation signal into the field under test. ERT modal measurement steps: Control the SPDT switch array to switch to the measurement path, select the non-excitation electrode to connect to the voltage detection link, and obtain boundary voltage response data; Shielding step: For electrodes that are not involved in excitation or measurement in the current mode, control the corresponding SPDT switch to ground them and disconnect them from the link, so that they enter the shielding state.

8. The ECT / ERT dual-mode switching control method according to claim 7, characterized in that, The timing coordination control includes: in ECT mode and ERT mode, the single-channel switching time depends on the sum of the action time of the SPDT switch and the multiplexer and the set stabilization time required by the excitation signal, in order to adapt to the switching requirements of AC excitation at different frequencies; and after the switching action is completed, a waiting time of a set duration is reserved, and the analog-to-digital converter sampling is started after the charge injection and discharge at the moment of the SPDT switch switching is completed.

9. The ECT / ERT dual-mode switching control method according to claim 7, characterized in that, In the shielding step, for the shielding electrode in ECT mode, the corresponding first switch is controlled to be turned on to the disconnect detection branch, the second switch is turned on to the ground terminal, and the third switch is turned on to the shielding structure construction terminal; for the shielding electrode in ERT mode, the corresponding first switch is controlled to be turned on to the disconnect back-end network terminal and the second switch is turned on to the disconnect electrode connection terminal.

10. The ECT / ERT dual-mode switching control method according to claim 7, characterized in that, The steps for controlling the switching of each electrode between the excitation state, measurement state, and shielding state include: according to the preset synchronous clock signal and channel address strobe signal, sequentially switching each electrode from the shielding state to the excitation state or measurement state; and reserving a waiting time after the switching action is completed before starting the analog-to-digital converter for sampling.

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