Method for processing a shielding slot of a printed circuit board and printed circuit board

Abstract

The application discloses a shielding slot processing method of a printed circuit board and the printed circuit board. The shielding slot processing method of the printed circuit board comprises the following steps: forming a shielding slot through the printed circuit board; sequentially performing copper sinking, electroplating treatment on the shielding slot, and filling the shielding slot; performing laser drilling on the filling in the shielding slot to form a blind hole array, and performing electroplating treatment on the blind hole array. Through the method, the interlayer bonding force between the slot resin and the covering copper can be effectively improved.

Description

Technical Field

[0001] This application relates to the field of printed circuit board manufacturing technology, and in particular to a method for processing shielding grooves in printed circuit boards and a printed circuit board. Background Technology

[0002] As electronic products rapidly evolve towards high integration, miniaturization, and multifunctionality, wiring space is becoming increasingly compact, exacerbating signal leakage and crosstalk problems. To reduce signal loss during transmission, existing technologies typically employ shielding vias for signal isolation. For example, an isolated stripline is surrounded by a row of shielding vias; for multiple parallel striplines, crosstalk between them must be suppressed, thus requiring multiple rows of parallel shielding vias. To further enhance shielding effectiveness, the industry has proposed using shielding grooves instead of shielding vias, constructing a continuous shielding structure by filling the grooves.

[0003] However, in existing shielding via solutions, there are walled areas between adjacent shielding vias, and these walled areas still constitute signal leakage paths, making complete shielding difficult to achieve. Furthermore, due to limitations in materials and manufacturing capabilities, further reduction in the size of the walled areas is extremely difficult, failing to meet the shielding requirements of higher frequency signals. For the plug-in shielding slot solution, the plugging process becomes significantly more difficult as the slot length, width, and depth increase. Moreover, substrates manufactured using conventional plugging processes are prone to interlayer separation between the plug filler and the surface copper layer after multiple laminations or reflow soldering processes, even leading to reliability issues such as board bursting, severely impacting product yield and lifespan. Summary of the Invention

[0004] This application provides a method for processing shielding grooves in printed circuit boards and a printed circuit board in general, to solve the technical problems of interlayer separation and board bursting caused by thermal stress in traditional groove filling processes.

[0005] To address the aforementioned technical problems, this application provides a method for processing a shielding groove on a printed circuit board, comprising: forming a shielding groove through the printed circuit board; sequentially performing copper plating and electroplating on the shielding groove, and filling the shielding groove; laser drilling the filling material in the shielding groove to form a blind via array, and electroplating the blind via array.

[0006] The shielding groove has a length of 1 to 200 mm and a width of 0.4 to 4 mm.

[0007] The steps of sequentially performing copper plating, electroplating, and filling the shielding tank include: forming a copper layer on the sidewall of the shielding tank and the surface of the printed circuit board through a copper plating process; and electroplating the copper layer.

[0008] The steps of sequentially performing copper plating, electroplating, and filling the shielding tank include: completely filling the shielding tank with a low coefficient of thermal expansion resin; wherein the coefficient of thermal expansion of the low coefficient of thermal expansion resin is less than 10 x 10⁻⁶. -6 Every degree Celsius.

[0009] The step of completely filling the shielding groove with low expansion coefficient resin includes: removing excess low expansion coefficient resin so that the low expansion coefficient resin is flush with the copper layer on the surface of the printed circuit board.

[0010] The steps of laser drilling to form a blind hole array in the filling material of the shielding groove and electroplating the blind hole array include: after the filling material is cured, laser drilling is performed on the filling material to form a blind hole array.

[0011] The step of forming a blind via array by laser drilling after the filler has solidified includes: filling the blind vias of the blind via array with copper by electroplating and thickening the printed circuit board.

[0012] The steps of laser drilling to form a blind via array in the filling material of the shielding groove and electroplating the blind via array include: sequentially applying a film, exposing, developing, etching patterns and removing the film on the printed circuit board to form an outer layer circuit pattern on the printed circuit board.

[0013] The steps of sequentially applying film, exposing, developing, etching patterns, and removing film to form the outer layer circuit pattern on the printed circuit board include: laminating the printed circuit board.

[0014] To address the aforementioned problems, this application provides a printed circuit board, which is prepared by the shielding groove processing method of any of the above-mentioned printed circuit boards.

[0015] The beneficial effects of this application are as follows: By forming a shielding groove through the printed circuit board; sequentially performing copper plating and electroplating on the shielding groove, and filling the shielding groove; and laser drilling the filling material in the shielding groove to form a blind via array, and then electroplating the blind via array, the integrity of the filling material can be guaranteed, micro-cracks can be avoided, the dimensional stability and service life of the substrate during multiple lamination or reflow soldering processes can be improved, thereby improving the structural reliability of the substrate, and continuous signal shielding can be achieved, reducing high-frequency signal leakage and crosstalk, and improving signal transmission quality. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating one embodiment of the shielding groove processing method for printed circuit boards provided in this application; Figure 2This is a schematic flowchart of another embodiment of the shielding groove processing method for printed circuit boards provided in this application; Figures 3a-3g yes Figure 2 Structural diagrams corresponding to each step of the preparation method after preparation. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0018] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0019] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0020] Please see Figure 1 , Figure 1 This is a flowchart illustrating one embodiment of the shielding groove processing method for printed circuit boards provided in this application.

[0021] S11: A shielding groove is formed through the printed circuit board.

[0022] The printed circuit board is penetrated by mechanical methods such as milling to form a shielding groove with a depth consistent with the thickness of the printed circuit board. Preferably, the length of the shielding groove is 1 to 200 mm and the width is 0.4 to 4 mm. Specifically, for rigid substrates of conventional thickness, CNC milling is usually used, with a milling cutter matching the groove width directly cutting through the entire board to form a groove cavity with flat edges; or laser cutting is used, with a high-energy laser beam repeatedly ablated along a preset path until it is completely penetrated to form a shielding groove.

[0023] Furthermore, the printed circuit board has already undergone lamination or blanking processes before the shielding groove is formed. Specifically, if the lamination process is completed, the pre-prepared core board, prepreg, copper foil, and other materials are stacked sequentially according to the design requirements. Under heating and pressure, the resin in the prepreg melts, flows, and fully fills the interlayer gaps. After cross-linking and curing, the materials are bonded together to form a multilayer substrate with the required number of layers and copper layer thickness, i.e., a printed circuit board. If the blanking process is completed, a single substrate of a specified size is cut from a large area of ​​copper-clad laminate or insulating substrate according to the processing size requirements, which serves as the printed circuit board.

[0024] S12: Perform copper plating and electroplating on the shielding tank in sequence, and then fill the shielding tank.

[0025] A copper plating layer is deposited on the inner wall of the shielding trench. The thickness of the copper layer is then increased through electroplating to ensure sufficient conductivity and mechanical strength on the sidewalls of the shielding trench. Finally, resin is filled into the shielding trench, making its surface flush with the copper layer on the printed circuit board surface. Preferably, the filling resin has a coefficient of thermal expansion of less than 10 x 10⁻⁶. -6 Low coefficient of thermal expansion resins, such as low CTE (Coefficient of Thermal Expansion) modified epoxy resins and BT (Bismaleimide Triazine) resins, are used. Specifically, the printed circuit board (PCB) after trenching can be pre-treated, such as by cleaning and surface conditioning to remove oil and dust. Then, a copper plating process is performed, uniformly depositing a copper layer on the surface of the substrate and the inner wall of the shielding tank. Next, electroplating is performed, uniformly thickening the copper layer outwards until the required thickness is formed on both the PCB surface and the tank walls, completing the overall metallization of the PCB. Finally, low coefficient of thermal expansion resin is filled into the tank, and resin exceeding the copper layer on the PCB surface is removed to achieve smoothing or insulation. Before filling, the copper surface of the tank walls is usually roughened or oxidized to improve the adhesion between the resin and the copper surface.

[0026] S13: Laser drilling is performed on the filling material in the shielding groove to form a blind hole array, and the blind hole array is electroplated.

[0027] Based on the area of ​​the filling material within the shielding groove, a laser is used to ablate tiny holes on the surface or inside of the cured filling material, forming a blind via array. The blind vias are then filled using electroplating. The blind via array can be arranged in a square grid, hexagonal grid, or randomly distributed. The density can be adjusted according to shielding requirements and process capabilities. Preferably, the spacing between blind vias is 5 to 8 mils. For example, when using a square grid, the blind vias are arranged at equal intervals along the long and short sides of the rectangle, forming a regular row and column matrix, which facilitates processing and positioning and provides a uniform distribution of anchor points between layers. When using a hexagonal grid, adjacent blind vias can be arranged in an equilateral triangle staggered pattern, accommodating more vias in the same area than a square grid, resulting in a larger contact interface area and stronger interlayer bonding. When using a random distribution, the blind vias are scattered irregularly within the rectangular area, avoiding the resonance effect that may occur with periodic arrays.

[0028] Specifically, by controlling parameters such as laser pulse energy, repetition frequency, scanning speed, and defocusing amount, blind holes are formed on the resin surface by point-by-point or galvanometer scanning methods, penetrating to a certain depth without penetrating the substrate. The blind holes can be processed sequentially or simultaneously to form a blind hole array. Before electroplating, the blind holes in the blind hole array can be pretreated, for example by cleaning, roughening, sensitizing, and activating steps, or by chemically plating copper or sputtering a conductive layer to form a continuous and conductive seed layer on the non-conductive resin surface, to ensure that the current can uniformly cover the entire array area during subsequent electroplating. The blind holes in the blind hole array are then electroplated by adjusting the current density, electroplating time, and additive concentration, so that copper gradually fills the hole from the bottom and wall inwards, completely filling the interior of the blind hole. Finally, the substrate to be treated is thickened by electroplating.

[0029] In addition, pattern transfer and lamination processes can be performed on the electroplated printed circuit board. Specifically, a layer of photoresist, such as dry or wet film, is applied to the thickened surface of the electroplated printed circuit board by lamination or coating. Then, a mask with the target circuit pattern is exposed to ultraviolet light and treated with a developer to copy the circuit pattern on the mask onto the photoresist layer, forming circuit areas protected by the photoresist and exposed non-circuit areas. Based on the exposed copper surface, the copper layer not protected by the photoresist is removed by etching to obtain the desired conductive circuit image. In the lamination process, when bonding the printed circuit board with the formed conductive circuit to other dielectric layers or copper foil, a prepreg or thermoplastic resin film can be used as an adhesive layer. The materials are stacked in the designed order and placed in a press for heating and pressing.

[0030] Through the above steps, this embodiment forms an array of blind vias on the shielding groove filler and performs electroplating, allowing the copper layer to penetrate deep into the filler. Utilizing the mechanical interlocking effect between the inner wall of the blind vias and the filler, the interlayer bonding force between the shielding groove and the upper copper layer is significantly enhanced. This effectively solves the problems of interlayer separation and board bursting caused by thermal stress in traditional groove-filling processes, improves the structural reliability of the substrate, and enhances the dimensional stability and service life during multiple lamination or reflow soldering processes. In addition, using shielding grooves can also eliminate the hole walls between traditional shielding vias, making signal shielding more continuous, which is beneficial for reducing high-frequency signal leakage and crosstalk, and improving signal transmission quality.

[0031] Please see Figure 2 as well as Figures 3a-3g , Figure 2 This is a schematic flowchart of another embodiment of the shielding groove processing method for printed circuit boards provided in this application. Figures 3a-3g yes Figure 2 Structural diagrams corresponding to each step of the preparation method after preparation.

[0032] S21: A shielding groove is formed through the printed circuit board.

[0033] This step is the same as step S11 above. Please refer to the relevant description of step S11 for details, which will not be repeated here.

[0034] like Figure 3a As shown, a shielding groove 101 is formed by milling or other mechanical means through the printed circuit board 100. The depth of the shielding groove 101 is the same as the thickness of the printed circuit board 100, and the length of the shielding groove 101 is 1 to 200 mm, and the width is 0.4 to 4 mm.

[0035] S22: A copper layer is formed on the sidewall of the shielding tank and the surface of the printed circuit board through a copper plating process; the copper layer is then electroplated.

[0036] A copper layer is deposited on the inner wall of an insulating shielding tank and the surface of an adjacent printed circuit board using a chemical copper plating process. This copper layer is then electroplated. Based on this copper layer, copper ions in a solution are further deposited on the sidewalls of the shielding tank and the surface of the printed circuit board using an electric current, significantly increasing the thickness of the copper layer. The thickness of the electroplated copper layer can be controlled from several micrometers to tens of micrometers, ensuring sufficient conductivity on the sidewalls of the shielding tank to guide the shielding current, while also providing sufficient mechanical strength to support subsequent filling processes.

[0037] like Figure 3bAs shown, after copper plating and electroplating, a first copper layer 1021 and a second copper layer 1022 are formed on the printed circuit board 100 and the inner wall of the shielding groove 101, respectively, covering the upper and lower surfaces of the printed circuit board 100 and the inner wall of the shielding groove 101. The thickness of the first copper layer 1021 and the second copper layer 1022 can be determined based on process requirements.

[0038] S23: The shielding groove is completely filled with a low coefficient of thermal expansion resin; wherein, the coefficient of thermal expansion of the low coefficient of thermal expansion resin is less than 10 x 10. -6 Every degree Celsius; remove excess low coefficient of expansion resin to make the low coefficient of expansion resin flush with the copper layer on the surface of the printed circuit board.

[0039] Filling the shielding groove with a low coefficient of thermal expansion resin and removing excess resin can reduce the volume expansion of the plugged area when heated. A low coefficient of thermal expansion resin refers to a resin with a low coefficient of thermal expansion (CTE) above its glass transition temperature, i.e., a coefficient of thermal expansion lower than [value missing]. For each degree Celsius, organic polymer materials with a low coefficient of thermal expansion in the Z-axis direction (thickness direction) are preferred. Examples include modified epoxy resin, polyimide resin, or composite resin containing inorganic fillers such as silica or alumina. Specifically, after metallizing the sidewalls of the shielding trench, the low-expansion-coefficient resin is injected or coated, and then cured by baking to completely fill the trench and bond with the copper layer on the sidewalls. After filling and curing the shielding trench, excess resin material protruding above the copper layer plane on the substrate surface is removed through processes such as mechanical grinding, chemical mechanical polishing, or laser ablation until the resin surface is at the same level as the surrounding copper layer.

[0040] like Figure 3c As shown, a low coefficient of expansion resin is injected and fills the entire shielding groove to form a resin plug groove 103. After baking and curing, the excess low coefficient of expansion resin on the surface is removed so that the resin plug groove 103 is flush with the first copper layer 1021 and the second copper layer 1022 on the surface of the printed circuit board 100.

[0041] S24: After the filler has cured, laser drilling is performed on the filler to form a blind hole array.

[0042] After the filling material in the shielding groove has solidified, a blind hole array is formed by laser ablation of the area containing the filling material. This prevents the holes drilled before solidification from closing or deforming during the solidification process, thus ensuring an effective anchoring structure. The blind hole array can be designed to match shielding groove sizes such as square grids, hexagonal grids, or random distributions. The hole spacing can be adjusted according to shielding requirements and process capabilities. Preferably, the hole spacing between blind holes is 5 to 8 mils. For example, the perimeter margin of the array can be set according to the long and short sides of the shielding groove to determine the effective processing range, ensuring a safe distance between the outermost blind holes and the rectangular edge, avoiding damage to the boundary or affecting subsequent processes during processing. Within the effective processing range, the blind holes can be arranged in a two-dimensional matrix with equal spacing, i.e., several columns are evenly distributed along the long side of the shielding groove, and several rows are evenly distributed along the short side, forming a regular row and column grid. The row and column spacing can be adjusted according to the rectangle size and the total number of blind holes. They can be set to equal spacing to form a square grid, or unequal spacing based on the rectangle's aspect ratio to form a rectangular grid, ensuring uniform coverage of the array within the rectangular area. Alternatively, to further enhance interlayer bonding and shielding effectiveness, a staggered arrangement can be used, such as a honeycomb hexagonal arrangement with adjacent rows staggered by half a spacing. Furthermore, depending on actual needs, an edge-density arrangement can be adopted, i.e., reducing the hole spacing or adding additional blind hole rows in the boundary area around the shielding groove to form a high-density local area, while maintaining a standard spacing in the inner area to strengthen the continuity of boundary shielding; or a gradually decreasing spacing arrangement can be used, so that the hole spacing gradually decreases from the center of the shielding groove to the edge, achieving a gradient transition in stress and shielding effectiveness.

[0043] like Figure 3d As shown, laser ablation is performed on the area where the resin plug groove 103 is located on the opposite surface of the printed circuit board 100 to form a blind via array 104. The spacing between the blind vias in the blind via array 104 is preferably 5 to 8 mils.

[0044] S25: Copper is filled into the blind holes of the blind hole array by electroplating, and the printed circuit board is thickened.

[0045] Electroplating is performed on the areas forming the blind via array, allowing copper metal to deposit and fill the blind via array, while simultaneously thickening the printed circuit board. Specifically, copper is filled into the blind vias formed by laser drilling through electroplating, forming metal pillars or anchor structures with specific geometries. By controlling the electroplating time or current density, the thickness of the copper layer on the surface of the printed circuit board is increased, thereby improving the overall mechanical strength and electrical connection performance of the printed circuit board.

[0046] like Figure 3eAs shown, through electroplating, copper is completely filled into the blind holes in the blind hole array 104 within the resin plug groove 103 of the printed circuit board 100, and a first thickened copper layer 1051 and a second thickened copper layer 1052 are formed on the upper and lower surfaces of the printed circuit board 100, respectively, to provide mechanical strength in the subsequent multilayer lamination process.

[0047] S26: The printed circuit board is sequentially subjected to film application, exposure, development, pattern etching and film removal processes to form the outer layer circuit pattern on the printed circuit board.

[0048] A photoresist film is applied to the thickened copper layer of a printed circuit board to protect the underlying structure and serve as a carrier for subsequent pattern transfer. Ultraviolet light is then used to irradiate the photoresist through a photomask, causing a photochemical reaction in the portions of the photoresist that need to be retained or removed. A developer is then used to dissolve the unexposed or exposed photoresist, creating a photoresist pattern on the printed circuit board that matches the target circuit pattern. Subsequently, chemical or physical methods are used to remove the copper layer not protected by the photoresist, forming precise outer conductive lines. Finally, a stripping solution is used to remove any remaining photoresist, exposing the final outer circuit pattern. The exposure process can use ultraviolet laser direct writing or traditional photomask exposure equipment, and the exposure energy and dosage can be adjusted according to the photoresist characteristics. A dilute sodium carbonate solution can be used as the developer. Pattern etching can use acidic or alkaline copper chloride etching solutions, and the etching factor must meet the requirements for fine line processing. The photoresist pattern can include signal lines, power lines, via pads, and various auxiliary patterns.

[0049] like Figure 3f As shown, during pattern etching, the upper surface copper layer of the printed circuit board 100 forms a first etching region 1061 and a second etching region 1062, and the lower surface copper layer forms a third etching region 1063 and a fourth etching region 1064.

[0050] S27: Perform lamination processing on the printed circuit board.

[0051] A printed circuit board (PCB) containing outer circuit patterns, along with other dielectric layers and prepreg, is thermo-cured under specific temperature, pressure, and vacuum conditions. This allows the layers to flow and solidify together to form a robust, integrated structure. The lamination time must be determined based on the resin system and the number of layers to ensure complete stress release and curing. For example, a PCB with completed pattern transfer can be laminated with a prepreg and copper foil, stacked sequentially in the order of copper foil, prepreg, and PCB. The prepreg is placed between the substrate and the copper foil as an insulating adhesive layer. After lamination, the PCB is fed into a press and laminated under heated and pressurized conditions. The resin in the prepreg melts and begins to flow, fully wetting the gaps between circuit lines on the PCB surface and the rough surface of the copper foil. As the temperature rises, the resin undergoes a cross-linking and curing reaction, ultimately bonding the copper foil and PCB together.

[0052] like Figure 3g As shown, after lamination, the first thickened copper layer 1051 of the printed circuit board 100 covers the first prepreg 1071 and the first copper foil 1072, and the second thickened copper layer 1052 covers the second prepreg 1073 and the second copper foil 1074. The first prepreg 1071 fills the first and second etched areas of the upper surface copper layer of the printed circuit board 100, and the second prepreg 1073 fills the third and fourth etched areas of the lower surface copper layer of the printed circuit board 100.

[0053] Through the above steps, this embodiment uses a low coefficient of thermal expansion resin, which significantly reduces the thermal expansion amplitude in the thickness direction of the shielding groove filler when it undergoes high-temperature processes such as reflow soldering or lamination. This helps to prevent interlayer separation and board bursting, improves the structural integrity and reliability of the substrate in high-temperature environments, and the copper-filled blind via array in the shielding groove is enhanced by the mechanical interlocking effect between the blind vias and copper, significantly strengthening the interlayer bonding force between the plugging resin layer and the upper copper covering layer.

[0054] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A method for processing shielding grooves on a printed circuit board, characterized in that, include: A shielding groove is formed through the printed circuit board; The shielding groove is sequentially subjected to copper plating and electroplating, and then filled. The filling material in the shielding groove is laser-drilled to form a blind hole array, and the blind hole array is electroplated.

2. The shielding groove processing method according to claim 1, characterized in that, The shielding groove has a length of 1 to 200 mm and a width of 0.4 to 4 mm.

3. The shielding groove processing method according to claim 1, characterized in that, The steps of sequentially performing copper plating and electroplating on the shielding groove, and then filling the shielding groove, include: A copper layer is formed on the sidewall of the shielding groove and on the surface of the printed circuit board through a copper plating process. The copper layer is then electroplated.

4. The shielding groove processing method according to claim 1, characterized in that, The steps of sequentially performing copper plating and electroplating on the shielding groove, and then filling the shielding groove, include: The shielding groove is completely filled with a low coefficient of thermal expansion resin; wherein the coefficient of thermal expansion of the low coefficient of thermal expansion resin is less than 10 x 10⁻⁶. -6 Every degree Celsius.

5. The shielding groove processing method according to claim 4, characterized in that, The step of completely filling the shielding groove with a low expansion coefficient resin includes: Remove excess of the low coefficient of expansion resin so that the low coefficient of expansion resin is flush with the copper layer on the surface of the printed circuit board.

6. The shielding groove processing method according to claim 1, characterized in that, The step of laser drilling to form a blind hole array in the filling material of the shielding groove, and electroplating the blind hole array, includes: After the filler has solidified, it is laser-drilled to form a blind hole array.

7. The shielding groove processing method according to claim 6, characterized in that, After the filler has cured, the step of laser drilling the filler to form a blind hole array includes: Copper is filled into the blind holes of the blind hole array by electroplating, thereby thickening the printed circuit board.

8. The shielding groove processing method according to claim 1, characterized in that, The step of laser drilling to form a blind hole array in the filling material of the shielding groove, and electroplating the blind hole array, includes: The printed circuit board is subjected to sequential processes of film application, exposure, development, pattern etching, and film removal to form an outer layer circuit pattern on the printed circuit board.

9. The shielding groove processing method according to claim 8, characterized in that, The step of sequentially performing film application, exposure, development, pattern etching, and film removal processes on the printed circuit board to form the outer layer circuit pattern includes: The printed circuit board is then laminated.

10. A printed circuit board, characterized in that, The printed circuit board is prepared by the preparation method according to any one of claims 1 to 9.

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