An all-spectrum natural light chip based on amorphous zinc gallium oxide and a preparation method thereof
Patent Information
- Application Number
- CN202611114139.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-24
- Publication Date
- 2026-11-03
AI Technical Summary
Existing single-chip white light technology cannot achieve full-spectrum continuous natural light, especially in the red light region where the emission intensity is weak, making it difficult to meet the high color rendering requirements of applications such as D65 standard daylight.
Using amorphous zinc gallium oxide as the insertion layer, a triple-through interface is formed through an atomically smooth transition. Combined with the Anderson localized state of the two-dimensional amorphous material, radiative recombination of charge carriers between different energy levels is achieved, outputting a continuous spectrum of 380~780nm.
It achieves uniform and continuous spectrum, color rendering index ≥93, supports multiple standard light sources such as D65 daylight, has adjustable color temperature, response time down to the nanosecond level, long lifespan, high electro-optical conversion efficiency, and is suitable for multi-band coding applications.
Smart Images
Figure CN123035786A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a full-spectrum natural light chip based on amorphous zinc gallium oxide and its fabrication method. Background Technology
[0002] Currently, the main methods for preparing white light-emitting diodes (LEDs) include the following three: (1) RGB three-color chip combination method: combining red, green and blue LED chips and mixing them to obtain white light; this method requires complex control circuits and driving systems, which are costly, and the inconsistent aging rates of the three-color chips can easily lead to color deviation. (2) Phosphor conversion method: using ultraviolet LEDs or blue LEDs to excite phosphors, and mixing the downconversion light emission of the phosphors with the residual light emission of the LEDs to form white light; however, the electro-optical conversion efficiency of phosphors is low, and the poor thermal stability leads to severe light decay at high temperatures, the color temperature changes significantly with the angle, and the spectrum is discontinuous (especially the red light component is generally missing), making it difficult to improve the color rendering index. (3) Organic white OLED: using organic light-emitting materials, but its application in the field of high-power lighting is limited due to the poor stability, short lifespan, and high packaging requirements of organic materials.
[0003] In related technologies, a semiconductor heterojunction chip capable of directly emitting white light employs n-type ZnO as the n-type layer and p-type GaN as the p-type layer, with crystalline Ga2O3 and / or ZrO2 inserted between them as a punch-through barrier layer. Its light-emitting principle is as follows: the energy band of the n-ZnO / p-GaN heterojunction is modulated through the punch-through barrier layer, causing the heterojunction to emit yellow, green, and blue light simultaneously; simultaneously, the intensity of violet light from corresponding band edges, blue-green light from oxygen vacancies, and orange light from zinc-oxygen interstitial sites in n-ZnO is modulated to achieve white light. However, because its white light emission mainly relies on the combination of defect emission and band edge emission from ZnO, there are obvious gaps in the spectrum, especially in the red light region above 600nm, where the emission intensity is weak, making it difficult to meet the high color rendering requirements of applications such as D65 standard daylight.
[0004] Current single-chip white light technology cannot obtain full-spectrum continuous natural light. Therefore, how to achieve the direct emission of full-spectrum continuous natural light from a single semiconductor chip is a technical problem that urgently needs to be solved in this field. Summary of the Invention
[0005] In view of the above problems, the present invention is proposed to provide a full-spectrum natural light chip based on amorphous zinc gallium oxide and a method for its fabrication that overcomes or at least partially solves the above problems. It can solve the technical problem that existing single-chip white light technology cannot obtain full-spectrum continuous natural light, and achieve the purpose of meeting the needs of high-end applications such as D65 standard daylight.
[0006] Specifically, the present invention provides a full-spectrum natural light chip based on amorphous zinc gallium oxide, comprising: p-type semiconductor layer, wherein the p-type semiconductor layer contains gallium element; An n-type semiconductor layer, wherein the n-type semiconductor layer contains oxygen and zinc; and An amorphous insertion layer is disposed between the p-type semiconductor layer and the n-type semiconductor layer; the amorphous insertion layer is made of amorphous zinc gallium oxide; the thickness of the amorphous insertion layer is 0.5 nm to 2 nm. Specifically, the gallium element in the p-type semiconductor layer and the gallium element in the amorphous insertion layer form an atomically smooth transition, enabling cation-through growth; the oxygen element in the amorphous insertion layer and the oxygen element in the n-type semiconductor layer form an atomically smooth transition, enabling anion-through growth; and the zinc element in the amorphous insertion layer and the zinc element in the n-type semiconductor layer form an atomically smooth transition, enabling zinc ion-through growth.
[0007] Optionally, the thickness of the amorphous insertion layer is 0.5 nm to 1 nm.
[0008] Optionally, the thickness of the amorphous insertion layer is 0.5 nm to 0.8 nm.
[0009] Optionally, the amorphous insertion layer is made of intrinsic amorphous zinc gallium oxide.
[0010] Optionally, the amorphous insertion layer is made of amorphous zinc gallium oxide doped with Li or Mg.
[0011] Optionally, the material of the p-type semiconductor layer includes at least one of p-GaN, p-AlGaN, p-InGaN, and p-InGaAlN; The material of the n-type semiconductor layer includes n-type ZnO, or n-type ZnO doped with Si, In, Sn or Al elements.
[0012] Optionally, the full-spectrum natural light chip further includes: p-type electrodes and n-type electrodes, wherein the p-type electrodes and n-type electrodes are located on the same side or opposite sides of the full-spectrum natural light chip; When the p-type electrode and the n-type electrode are located on the same side of the full-spectrum natural light chip, the full-spectrum natural light chip also includes a substrate, which is disposed below the p-type semiconductor layer.
[0013] On the other hand, the present invention also provides a method for preparing a full-spectrum natural light chip, the method being used to prepare a full-spectrum natural light chip as described in any of the above claims; The preparation method includes: The p-type semiconductor layer is grown on the substrate; On the p-type semiconductor layer, an amorphous insertion layer with a thickness of 0.5 nm to 2 nm is grown, so that the amorphous insertion layer and the p-type semiconductor layer share gallium element to achieve cation-through growth; On the amorphous insertion layer, the n-type semiconductor layer is grown, so that the amorphous insertion layer and the n-type semiconductor layer share oxygen element to achieve anion-through growth, and the amorphous insertion layer and the n-type semiconductor layer share zinc element to achieve zinc ion-through growth. Prepare p-type and n-type electrodes.
[0014] Optionally, the amorphous insertion layer is prepared by any one of atomic layer deposition, metal-organic chemical vapor deposition, reactive magnetron sputtering, and pulsed laser deposition; the preparation temperature of the amorphous insertion layer is 200°C to 500°C; and the growth rate of the amorphous insertion layer is 10 nm / h to 2000 nm / h. When the amorphous insertion layer is prepared by atomic layer deposition or metal-organic chemical vapor deposition: the zinc precursor includes diethylzinc, the gallium precursor includes trimethylgallium or triethylgallium, the oxygen source is O2 or H2O or O3, and the flow rate of each precursor is 20 sccm to 300 sccm.
[0015] Optionally, the p-type semiconductor layer is prepared by metal-organic chemical vapor deposition or molecular beam epitaxy at 1000°C to 1100°C. The n-type semiconductor layer is prepared at 400°C to 800°C using metal-organic chemical vapor deposition, molecular beam epitaxy, or atomic layer deposition.
[0016] In the full-spectrum natural light chip of this invention, on the one hand, since the amorphous insertion layer is made of a-ZnGa2O4, the two-dimensional amorphous material (an amorphous material with a two-dimensional confinement effect) breaks the crystal symmetry and emits continuous full-spectrum natural light from 380 to 780 nm by relying on the recombination of carriers in the internal discrete Anderson localized states. The spectrum is uniform and continuous, with a color rendering index ≥93, and can realize various standard light sources such as D65 daylight and equal-energy white light. The color temperature is continuously adjustable, meeting the needs of most lighting applications and avoiding the problems of efficiency saturation and poor thermal stability common in defect-induced light emission. On the other hand, a triple-penetrating atomic-level smooth interface is formed between the p-type semiconductor, the amorphous insertion layer, and the n-type semiconductor, eliminating interface dangling bonds and non-radiative recombination centers. The interface defect density is extremely low, which greatly improves hole injection efficiency and electron mobility, ultimately optimizing the overall electro-optical conversion efficiency of the device. Therefore, the chip of this invention has a long service life (small light decay under high temperature and high humidity conditions) and a response time in the nanosecond range, which is about 1,000 times faster than the microsecond-level response of phosphor-converted LEDs, and supports high-speed modulation applications such as visible light communication (Li-Fi) multi-band coding.
[0017] Furthermore, the amorphous insertion layer is an intrinsic amorphous ZnGa2O4 layer, whose inherent band structure provides abundant luminescent energy levels. Without additional doping, it can generate a large number of discrete Anderson tail states within the band gap, thus simplifying the fabrication process of full-spectrum natural light chips. During fabrication, no doping source or complex doping control equipment is required, eliminating the need for doping uniformity control and significantly expanding the process window. The process is simple, has good repeatability, and is suitable for mass production of 6-inch and larger epitaxial wafers.
[0018] The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments of the invention in conjunction with the accompanying drawings. Attached Figure Description
[0019] The following sections will describe some specific embodiments of the invention in detail by way of example and not limitation, with reference to the accompanying drawings. The same reference numerals in the drawings denote the same or similar parts or portions. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings: Figure 1 This is a schematic structural diagram of a full-spectrum natural light chip according to an embodiment of the present invention; Figure 2 This is a schematic structural diagram of a full-spectrum natural light chip according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the elemental triple-penetration growth strategy of a full-spectrum natural light chip according to an embodiment of the present invention. Figure 4This is a schematic diagram of the band structure of a crystal / amorphous / crystalline heterojunction in a full-spectrum natural light chip according to an embodiment of the present invention; Figure 5 (a) is the electroluminescence curve of the white light chip in Comparative Example 1; Figure 5 (b) is the electroluminescence curve of a full-spectrum natural light chip according to an embodiment of the present invention; Figure 6 (a) is the white light CIE coordinate diagram of the white light chip in Comparative Example 1; Figure 6 (b) is a white light CIE coordinate diagram of a full-spectrum natural light chip according to an embodiment of the present invention.
[0020] Figure label: 1. Substrate; 2. p-type semiconductor layer; 3. Amorphous insertion layer; 4. n-type semiconductor layer; 5. n-type electrode; 6. p-type electrode. Detailed Implementation
[0021] Figure 1 This is a schematic structural diagram of a full-spectrum natural light chip, such as... Figure 1 As shown, and refer to Figures 2 to 4 This invention provides a full-spectrum natural light chip, which includes a p-type semiconductor layer 2, an n-type semiconductor layer 4, and an amorphous insertion layer 3.
[0022] The p-type semiconductor layer 2 contains gallium; the n-type semiconductor layer 4 contains oxygen and zinc. An amorphous insertion layer 3 is disposed between the p-type semiconductor layer 2 and the n-type semiconductor layer 4. The amorphous insertion layer 3 is made of amorphous zinc gallium oxide (a-ZnGa2O4), which is a two-dimensional amorphous material; the thickness of the amorphous insertion layer is 0.5 nm to 2 nm (e.g., 0.5 nm, 0.6 nm, 0.7 nm, 0.9 nm, 1 nm, 1.5 nm, or 2 nm).
[0023] The amorphous intercalation layer has discretized Anderson localized states in the band gap. Charge carriers radiatively recombine between different Anderson localized states, emitting a continuous spectrum covering the visible light region, forming full-spectrum natural light.
[0024] Specifically, gallium elements in the p-type semiconductor layer and the amorphous insertion layer form an atomically smooth transition, enabling cation-through growth; oxygen elements in the amorphous insertion layer and the n-type semiconductor layer form an atomically smooth transition, enabling anion-through growth; and zinc elements in the amorphous insertion layer and the n-type semiconductor layer form an atomically smooth transition, enabling zinc ion-through growth. In other words, an atomically smooth transition interface for gallium-through growth is formed between the p-type semiconductor layer and the amorphous insertion layer; and atomically smooth transition interfaces for oxygen and zinc-through growth are formed between the amorphous insertion layer and the n-type semiconductor layer.
[0025] Specifically, the thickness of the amorphous insertion layer can be selected from 0.5 to 2 nm depending on the specific application scenario. Thicker layers are suitable for scenarios where luminescence intensity is prioritized, while thinner layers are suitable for scenarios where spectral continuity is prioritized.
[0026] like Figure 4 As shown, a p-type crystalline semiconductor layer, an amorphous insertion layer, and an n-type crystalline semiconductor layer constitute a crystalline / amorphous / crystalline heterojunction. The left side of the figure represents the p-type crystalline semiconductor layer, the middle side the amorphous insertion layer, and the right side the n-type crystalline semiconductor layer. hν represents the photon energy, and different colored dashed lines and arrows characterize the carrier transition behavior under photon excitation at different energies.
[0027] Figure 4 This illustrates the difference between the continuous energy bands of a crystal and the discrete localized energy levels of an amorphous Anderson layer: In a crystal, atoms are arranged periodically and completely, forming a continuous energy band with no discrete localized energy levels. The blue hν dashed line represents high-energy photons incident on the crystal, where charge carriers can only directly cross energy bands in a single transition, resulting in a single transition path. In contrast, the disordered atomic arrangement in an amorphous layer leads to a disordered periodic potential field, causing Anderson localization. The electron wavefunction is confined to local defect sites, and the continuous energy band is split into numerous discrete localized energy levels (the black horizontal dashed lines in the figure represent multi-level transition steps for charge carriers). This effect is called Anderson localized state discretization.
[0028] In this embodiment, the amorphous insertion layer serves as a light-emitting / carrier-connecting layer. Its operation is as follows: under forward bias, holes are injected from the p-type semiconductor layer into the amorphous insertion layer, and electrons are injected from the n-type semiconductor layer. Because the amorphous insertion layer has discretized Anderson tail states, the injected carriers undergo multi-channel radiative recombination between these localized states, releasing photons of different energies to form a continuous spectrum covering the visible light region from 380 nm to 780 nm. After superposition, the full-spectrum natural light is output (see [reference]). Figure 5 (b) and Figure 6(b) Therefore, the chip of this invention has a continuous and uniform spectrum, a color rendering index ≥93, and can output full-spectrum natural light close to the solar spectrum. Furthermore, a single chip of this invention can output multiple standard light sources, such as D65 standard daylight and equal-energy white light (CIE coordinates 0.33, 0.33), and the color temperature can be continuously adjusted within the range of warm white light to cool white light, offering a wider adjustable range to meet the needs of different lighting scenarios.
[0029] Simultaneously, Ga is formed between the p-type semiconductor, the amorphous insertion layer, and the n-type semiconductor. 3+ O 2- Zn 2+ A triple-penetrating, atomically smooth interface. (The following is combined with...) Figure 3 Please explain in detail how the triple-interface design is implemented. For example... Figure 3 As shown, when the p-type semiconductor layer 2 is made of p-GaN and the n-type semiconductor layer 4 is made of n-ZnO, the p-type semiconductor layer 2 and the amorphous insertion layer 3 share the Ga element, forming an atomically smooth transition from Ga-N bonds to Ga-O bonds, achieving cation-through growth; at the same time, the amorphous insertion layer 3 and the n-type semiconductor layer 4 share the O element, forming a gradient transition from O-Ga bonds to O-Zn bonds, achieving anion-through growth; in addition, the amorphous insertion layer 3 and the n-type semiconductor layer 4 share the Zn element, and the Zn-O bond network forms an additional gradient transition channel at the interface, further optimizing the interface quality.
[0030] This triple-through growth strategy eliminates dangling bonds and non-radiative recombination centers at the heterojunction. As a result, the hole injection efficiency from the p-type semiconductor layer 2 to the n-type semiconductor layer 4 is significantly improved, electron mobility is enhanced, and electro-optical conversion efficiency is significantly increased.
[0031] Furthermore, since this embodiment is based on the radiative recombination of Anderson localized states in the amorphous layer, it avoids the problems of efficiency saturation and poor thermal stability commonly seen in defect-induced light emission. Simultaneously, the amorphous layer and the crystalline semiconductors on both sides achieve atomic-level matching through a triple-through growth strategy, resulting in extremely low interface defect density. Therefore, the chip of this invention has a long lifespan (low light decay under high temperature and humidity conditions) and a response time on the order of nanoseconds, approximately 1000 times faster than the microsecond-level response of phosphor-converted LEDs, supporting high-speed modulation applications such as multi-band coding in visible light communication (Li-Fi).
[0032] Furthermore, since the chip of this invention directly emits full-spectrum natural light through its own structure, there is no need to add an additional phosphor layer or quantum dot layer, thus avoiding the loss of electro-optical conversion efficiency, thermal stability issues, rare earth resource consumption, and ultraviolet leakage risks associated with phosphor conversion. Therefore, the fabrication process of the chip of this invention is relatively simple, the manufacturing cost is low, and it conforms to the concept of green environmental protection.
[0033] In summary, through the synergistic effect of the triple-through heterojunction structure and the Anderson localized state luminescence mechanism, atomic-level interface matching, full-spectrum continuous natural light emission, significant red light enhancement, high stability, and nanosecond-level response speed are achieved. At the same time, no phosphor conversion is required, and it is significantly superior to related technologies in terms of color rendering index, adjustable color temperature range, luminous efficiency, and environmental friendliness.
[0034] In some embodiments of the present invention, such as Figure 4 As shown, the amorphous insertion layer 3 is made of intrinsic amorphous zinc gallium oxide. The Anderson localized states of the intrinsic a-ZnGa2O4 layer generate continuous broadband light emission, meeting the requirements of most lighting applications.
[0035] Specifically, this embodiment utilizes two-dimensional amorphous materials (amorphous materials with two-dimensional confinement effects) to break crystal symmetry. The inherent band structure of intrinsic amorphous ZnGa2O4 can provide abundant luminescent energy levels without additional doping, generating a large number of discretized Anderson tail states in the band gap, thereby simplifying the fabrication process of full-spectrum natural light chips. During fabrication, no doping source or complex doping control equipment is required, eliminating the doping uniformity control step and significantly expanding the process window; the process is simple, has good repeatability, and is suitable for mass production of 6-inch and larger large-size epitaxial wafers.
[0036] In some embodiments of the present invention, the amorphous insertion layer is made of amorphous zinc gallium oxide doped with Li or Mg. The doping ratio of Li or Mg is from 0.01 at% to 3 at%.
[0037] In this embodiment, doping with Li or Mg can further optimize and adjust the band structure and carrier concentration of the amorphous insertion layer, thereby optimizing the emission wavelength and luminous efficiency to meet specific spectral tuning requirements. Simultaneously, the doped amorphous zinc gallium oxide retains its amorphous structure and Anderson localized state luminescence characteristics, and the triple-penetrating interface between it and the two semiconductor layers remains effective, ensuring that the carrier injection efficiency is unaffected.
[0038] In some embodiments of the present invention, the thickness of the amorphous insertion layer 3 is 0.5 nm to 1 nm, which is a single-layer amorphous thin film. Within this thickness range, the two-dimensional confinement effect is significantly enhanced, the discretization degree of the Anderson local tail state is higher, the luminescent energy level density is greater, and the color rendering index can be improved to over 93.
[0039] More preferably, the thickness of the amorphous insertion layer 3 is 0.5 nm to 0.8 nm. This thickness range is close to the single-atom-layer limit, further enhancing the two-dimensional confinement effect, effectively suppressing non-radiative recombination, and further improving luminous efficiency and spectral continuity.
[0040] The optimal lower limit thickness for this invention is 0.5 nm. At this thickness, the amorphous layer approaches the single-atom-layer limit, the Anderson localized state discretization is at its highest, the luminescent energy levels are most abundant, and the chip can achieve the optimal full-spectrum natural light emission effect.
[0041] Specifically, the thinner the amorphous insertion layer, the stronger the two-dimensional confinement effect, the higher the degree of discretization of the Anderson local tail states, and the more radiative recombination emission channels there are. Experiments show that when the thickness is reduced from 2 nm to 0.5 nm, the density of discrete emission levels increases by about an order of magnitude, and the color rendering index can be increased to over 93.
[0042] In some embodiments of the present invention, the material of the p-type semiconductor layer 2 includes one or more of p-GaN, p-AlGaN, p-InGaN, and p-InGaAlN.
[0043] Specifically, when p-AlGaN is used for the p-type semiconductor layer 2, its bandgap width can be adjusted by regulating the Al composition (e.g., Al content of 10%~30%), thereby further optimizing the bandgap matching with the amorphous insertion layer 3 and obtaining a lower hole injection barrier. When p-InGaN is used for the p-type semiconductor layer 2, the bandgap can be reduced by adjusting the In composition (e.g., In content of 5%~20%), which is beneficial for hole generation and injection. As a quaternary alloy material, p-InGaAlN allows for simultaneous adjustment of the In, Al, and Ga compositions, enabling independent control of the bandgap and lattice constant, making it suitable for applications with special requirements for band structure.
[0044] In this embodiment, the material of the above-mentioned p-type semiconductor layer 2 all contains Ga element, so they can all form an atomic-level smooth transition with the Ga element in the amorphous insertion layer 3, realize cation through growth, thereby eliminating interface dangling bonds and reducing non-radiative recombination centers.
[0045] In some embodiments of the present invention, the n-type semiconductor layer 4 is made of n-type ZnO. Specifically, the thickness of the n-type ZnO layer is not limited, for example, it can be 300 nm to 600 nm. The growth method of n-type ZnO can be molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), magnetron sputtering, thermal evaporation, electron beam evaporation, or atomic layer deposition (ALD), preferably MOCVD or ALD.
[0046] In some embodiments of the present invention, the n-type semiconductor layer 4 is made of n-type ZnO doped with Si, In, Sn or Al. The doping ratio of the doping element (such as Si, In, Sn or Al) is preferably 0.1 at% to 5 at% to adjust the carrier concentration, conductivity and emission wavelength of the n-type semiconductor layer 4.
[0047] like Figure 1As shown, in some embodiments of the present invention, the full-spectrum natural light chip further includes a p-type electrode 6 and an n-type electrode 5. The p-type electrode 6 and the n-type electrode 5 are located on the same side of the full-spectrum natural light chip, which helps to simplify subsequent packaging processes.
[0048] The p-type electrode 6 is a Cr / Au electrode, and the n-type electrode 5 is an AZO (aluminum-doped zinc oxide) or ITO (indium tin oxide) transparent conductive electrode.
[0049] Specifically, in the Cr / Au electrode, the thickness of the Cr layer is 2~10 nm (e.g., 2 nm, 5 nm, 8 nm, or 10 nm), and the thickness of the Au layer is 20~200 nm (e.g., 20 nm, 30 nm, 50 nm, 80 nm, 95 nm, 120 nm, 150 nm, 180 nm, or 200 nm). The Cr layer is used to form an ohmic contact with the p-type semiconductor layer 2, and the Au layer is used to reduce the overall resistance of the electrode. Preferably, the thickness of the Cr layer is 5 nm, and the thickness of the Au layer is 95 nm.
[0050] A stepped surface is formed between the n-type semiconductor layer 4, the amorphous insertion layer 3, and the p-type semiconductor layer 2 using photolithography and wet / dry etching, thereby fabricating the n-type and p-type electrodes on the same side of the chip. Specifically, the n-type electrode is disposed on the side of the n-type semiconductor layer 4 away from the amorphous insertion layer 3, and the p-type electrode is disposed on the exposed surface of the p-type semiconductor layer 2. The electrode fabrication method can employ magnetron sputtering, thermal evaporation, electron beam evaporation, or atomic layer deposition, with magnetron sputtering or electron beam evaporation being preferred.
[0051] The full-spectrum natural light chip also includes a substrate 1, on which a p-type semiconductor layer 2 is disposed. The substrate 1 is a sapphire substrate, a SiC substrate, a GaN self-supporting substrate, or a flexible metal foil, preferably a sapphire substrate 1.
[0052] like Figure 2 As shown, in some embodiments of the present invention, the p-type electrode 6 and the n-type electrode 5 are located on opposite sides of the full-spectrum natural light chip. The p-type electrode 6 is a conductive substrate; the n-type electrode 5 is an AZO or ITO transparent conductive electrode. In this embodiment, the current flows in a vertical direction, which is beneficial for uniform current diffusion and reduces current congestion effects, making it particularly suitable for high-power lighting applications.
[0053] Specifically, the p-type semiconductor layer 2 is peeled off from the growth substrate 1 and transferred to a conductive substrate (such as an aluminum substrate, copper substrate or other metal substrate). The conductive substrate serves as the p-type electrode, eliminating the need for additional metal electrode deposition. At the same time, the conductive substrate supports the p-type semiconductor layer 2. The n-type electrode is disposed on the side of the n-type semiconductor layer 4 away from the amorphous insertion layer 3.
[0054] In some embodiments of the present invention, the full-spectrum natural light chip can be applied in a display device. The display device includes the full-spectrum natural light chip and a quantum dot color conversion layer or a fluorescent color conversion layer disposed above the full-spectrum natural light chip.
[0055] Specifically, the full-spectrum natural light chip emits full-spectrum natural light, and the quantum dot color conversion layer or fluorescent color conversion layer absorbs a portion of the full-spectrum natural light, converting it into narrowband red, green, and blue light, thereby achieving full-color display. Compared to existing solutions that use blue LEDs to excite the color conversion layer, this invention uses a full-spectrum natural light chip as the excitation source, which has a wide and continuous spectrum with sufficient energy in each band. After color conversion, it can obtain three primary colors with higher color purity and better color rendering, and it does not require massive transfer, simplifying the process. The pixel size can be further reduced to the micrometer level, making it suitable for Micro-LED display applications. The full-spectrum natural light chip itself does not contain phosphors, eliminating the risk of blue light leakage. The color conversion layer is only responsible for converting a portion of the spectrum, and the two work together to achieve excellent display effects.
[0056] This invention also provides a method for fabricating a full-spectrum natural light chip, used to fabricate a full-spectrum natural light chip as described in any of the above embodiments. The fabrication method may include the following steps: S100, a p-type semiconductor layer 2 is grown on substrate 1; S200, on the p-type semiconductor layer 2, an amorphous insertion layer 3 with a thickness of 0.5nm~2nm is grown, so that the amorphous insertion layer and the p-type semiconductor layer share gallium element to achieve cation-through growth; S300, an n-type semiconductor layer 4 is grown on the amorphous insertion layer 3, so that the amorphous insertion layer 3 and the n-type semiconductor layer 4 share the O element to achieve anion-through growth, and the amorphous insertion layer 3 and the n-type semiconductor layer 4 share the zinc element to achieve zinc ion-assisted through growth. S400 is used to fabricate p-type and n-type electrodes to obtain a full-spectrum natural light chip.
[0057] Specifically, the thickness of the p-type semiconductor layer is 100nm~300nm, and the thickness of the n-type semiconductor layer is 100nm~300nm.
[0058] In step S400, if a horizontally structured chip is fabricated (e.g.) Figure 1 A step surface is formed between the n-type semiconductor layer, the amorphous insertion layer, and the p-type semiconductor layer using photolithography and etching, and the n-type electrode and p-type electrode are fabricated on the same side of the chip. The n-type electrode is disposed on the upper surface of the n-type semiconductor layer, and the p-type electrode is disposed on the exposed surface of the p-type semiconductor layer. This is used to fabricate vertical structure chips (such as...). Figure 2The p-type semiconductor layer is peeled off from the growth substrate and transferred and bonded to a conductive substrate, which directly serves as the p-type electrode; the n-type electrode is disposed on the upper surface of the n-type semiconductor layer. The peeled growth substrate can be recycled and reused.
[0059] In this embodiment, by using Ga in situ during the growth process... 3+ Through, O 2- Through and Zn 2+ Through-growing eliminates the need for additional interface treatment steps to obtain atomically matched heterogeneous interfaces, thus eliminating interface defects at the fabrication process level.
[0060] In some embodiments of the present invention, the amorphous insertion layer is prepared by any one of atomic layer deposition (ALD), metal-organic chemical vapor deposition (MOCVD), reactive magnetron sputtering, and pulsed laser deposition (PLD). Preferably, the a-ZnGa2O4 amorphous layer is prepared by ALD or MOCVD.
[0061] The amorphous insertion layer can be fabricated at temperatures ranging from 200°C to 500°C (e.g., 200°C, 250°C, 300°C, 400°C, or 500°C) without the need for high-temperature annealing, thus effectively maintaining the amorphous state of the amorphous insertion layer. The growth rate of the amorphous insertion layer ranges from 10 nm / h to 2000 nm / h.
[0062] When the amorphous insertion layer is prepared by atomic layer deposition or metal-organic chemical vapor deposition, the zinc precursor includes diethylzinc (DEZn), and the gallium precursor includes trimethylgallium (TMGa) or triethylgallium (TEGa). The oxygen source is O2, H2O, or O3, and the flow rate of each precursor is from 20 sccm to 300 sccm.
[0063] When the amorphous insertion layer is prepared by reactive magnetron sputtering or pulsed laser deposition, ZnGa2O4 target material is used as the sputtering target material or ablation target material.
[0064] In this embodiment, only two types of precursors are used when preparing the intrinsic amorphous zinc gallium oxide layer. Compared with the doping process in related technologies, the process steps are simplified by more than 30%, and no doping source or complex doping control equipment is required. This is beneficial to reduce manufacturing costs, improve production efficiency and product yield.
[0065] In some embodiments of the present invention, the p-type semiconductor layer is prepared by metal-organic chemical vapor deposition or molecular beam epitaxy at 1000°C to 1100°C; the n-type semiconductor layer is prepared by metal-organic chemical vapor deposition, molecular beam epitaxy or atomic layer deposition at 400°C to 800°C.
[0066] The full-spectrum natural light chip of the present invention will be further described in detail below with reference to specific embodiments.
[0067] Example 1 like Figure 2 As shown, a full-spectrum natural light chip has an epitaxial structure comprising, from bottom to top, a p-type electrode, a p-GaN layer, an intrinsic amorphous zinc gallium oxide layer, an n-ZnO layer, and an n-type electrode. The intrinsic amorphous zinc gallium oxide layer is located between the p-GaN layer and the n-ZnO layer, forming an n-ZnO / a-ZnGa2O4 / p-GaN crystalline / amorphous / crystalline heterojunction. The thickness of the intrinsic amorphous zinc gallium oxide layer is 0.8 nm.
[0068] Comparative Example 1 A method for fabricating a chip, comprising, from bottom to top, a p-type electrode, a p-GaN layer, a punch-through barrier layer, an n-ZnO layer, and an n-type electrode. The punch-through barrier layer is a crystalline Ga2O3 layer with a thickness of 30 nm. The electroluminescence curve of this chip is shown below. Figure 5 As shown in (a), the white light CIE coordinate graph is as follows: Figure 6 As shown in (a), its red light is weak and its color rendering is low.
[0069] By taking, for example Figure 5 (b) and Figure 5 (a) It can be seen that by employing an intrinsic amorphous zinc gallium oxide layer, the blue-green peaks in the electroluminescence curve can be shifted towards the red light direction.
[0070] By taking, for example Figure 6 (b) and Figure 6 (a) It can be seen that by employing an intrinsic amorphous zinc gallium oxide layer, the present invention can shift the CIE coordinates of white light to the upper right, thereby realizing full-spectrum natural light including warm white light.
[0071] Therefore, those skilled in the art should recognize that although numerous exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications conforming to the principles of the present invention can be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the invention. Thus, the scope of the present invention should be understood and construed as covering all such other variations or modifications.
Claims
1. A full-spectrum natural light chip based on amorphous zinc gallium oxide, characterized in that, include: p-type semiconductor layer, wherein the p-type semiconductor layer contains gallium element; An n-type semiconductor layer containing oxygen and zinc elements; as well as An amorphous insertion layer is disposed between the p-type semiconductor layer and the n-type semiconductor layer; the amorphous insertion layer is made of amorphous zinc gallium oxide; the thickness of the amorphous insertion layer is 0.5 nm to 2 nm. Specifically, the gallium element in the p-type semiconductor layer and the gallium element in the amorphous insertion layer form an atomically smooth transition, enabling cation-through growth; the oxygen element in the amorphous insertion layer and the oxygen element in the n-type semiconductor layer form an atomically smooth transition, enabling anion-through growth; and the zinc element in the amorphous insertion layer and the zinc element in the n-type semiconductor layer form an atomically smooth transition, enabling zinc ion-through growth.
2. The full-spectrum natural light chip according to claim 1, characterized in that, The thickness of the amorphous insertion layer is 0.5 nm to 1 nm.
3. The full-spectrum natural light chip according to claim 2, characterized in that, The thickness of the amorphous insertion layer is 0.5 nm to 0.8 nm.
4. The full-spectrum natural light chip according to claim 1, characterized in that, The amorphous insertion layer is made of intrinsic amorphous zinc gallium oxide.
5. The full-spectrum natural light chip according to claim 1, characterized in that, The amorphous insertion layer is made of amorphous zinc gallium oxide doped with Li or Mg.
6. The full-spectrum natural light chip according to claim 1, characterized in that, The material of the p-type semiconductor layer includes at least one of p-GaN, p-AlGaN, p-InGaN, and p-InGaAlN; The material of the n-type semiconductor layer includes n-type ZnO, or n-type ZnO doped with Si, In, Sn or Al elements.
7. The full-spectrum natural light chip according to claim 1, characterized in that, Also includes: p-type electrodes and n-type electrodes, wherein the p-type electrodes and n-type electrodes are located on the same side or opposite sides of the full-spectrum natural light chip; When the p-type electrode and the n-type electrode are located on the same side of the full-spectrum natural light chip, the full-spectrum natural light chip also includes a substrate, which is disposed below the p-type semiconductor layer.
8. A method for fabricating a full-spectrum natural light chip, characterized in that, The preparation method is used to prepare a full-spectrum natural light chip as described in any one of claims 1 to 7; The preparation method includes: The p-type semiconductor layer is grown on the substrate; On the p-type semiconductor layer, an amorphous insertion layer with a thickness of 0.5 nm to 2 nm is grown, so that the amorphous insertion layer and the p-type semiconductor layer share gallium element to achieve cation-through growth; On the amorphous insertion layer, the n-type semiconductor layer is grown, so that the amorphous insertion layer and the n-type semiconductor layer share oxygen element to achieve anion-through growth, and the amorphous insertion layer and the n-type semiconductor layer share zinc element to achieve zinc ion-through growth. Prepare p-type and n-type electrodes.
9. The preparation method according to claim 8, characterized in that, The amorphous insertion layer is prepared by any one of atomic layer deposition, metal-organic chemical vapor deposition, reactive magnetron sputtering, and pulsed laser deposition; the preparation temperature of the amorphous insertion layer is 200℃ to 500℃; and the growth rate of the amorphous insertion layer is 10nm / h to 2000nm / h. When the amorphous insertion layer is prepared by atomic layer deposition or metal-organic chemical vapor deposition: the zinc precursor includes diethylzinc, the gallium precursor includes trimethylgallium or triethylgallium, the oxygen source is O2 or H2O or O3, and the flow rate of each precursor is 20 sccm to 300 sccm.
10. The preparation method according to claim 8, characterized in that, The p-type semiconductor layer is prepared by metal-organic chemical vapor deposition or molecular beam epitaxy at 1000°C to 1100°C. The n-type semiconductor layer is prepared at 400°C to 800°C using metal-organic chemical vapor deposition, molecular beam epitaxy, or atomic layer deposition.