Wafer bonding method and silicon-on-insulator substrate

Abstract

The application provides a wafer bonding method and a silicon-on-insulator substrate. A first wafer substrate and a second wafer substrate are provided, and the first wafer substrate is provided with a first oxide layer on the surface. A pulsed radio frequency source is used to perform plasma activation treatment on the surface of the first oxide layer, so that a hydrophilic activation layer with dangling bonds and hydroxyl groups is formed on the surface of the first oxide layer. The pulsed radio frequency source alternately applies radio frequency power and stops applying radio frequency power according to an on-off period, so that the plasma discharge is periodically turned on and turned off, and the surface of the first wafer substrate is provided with a heat relaxation time during the off period. The pulse duty cycle of the pulsed radio frequency source is set so that the temperature rise of the surface of the first wafer substrate does not exceed 30 DEG C. The surface of the first oxide layer subjected to the plasma activation treatment is contacted and bonded with the surface to be bonded of the second wafer substrate in a bonding cavity to form a bonding interface. The silicon-on-insulator substrate comprises a silicon substrate, an insulating layer and a silicon layer which are sequentially stacked.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a wafer bonding method and a silicon-on-insulator substrate. BACKGROUND

[0002] A silicon-on-insulator (SOI) substrate can be used in the manufacturing of integrated circuits and other semiconductor devices. A silicon-on-insulator substrate generally includes a silicon substrate, an insulating layer, and a silicon layer disposed on the insulating layer, and the insulating layer is used to isolate the silicon layer from the silicon substrate.

[0003] For a silicon-on-insulator substrate formed by wafer bonding, the activation state of the bonding surface affects the contact bonding. The influence of the pre-bonding treatment on the oxide layer and the related interface also affects the bonding quality.

[0004] For a wafer with an oxide layer on the surface, how to obtain the activation state of the bonding surface that meets the bonding requirements while reducing the damage to the oxide layer caused by plasma activation treatment is a technical problem to be solved. SUMMARY

[0005] The present application provides a wafer bonding method. A first wafer substrate and a second wafer substrate are provided, and the first wafer substrate has a first oxide layer on the surface. The surface of the first oxide layer is subjected to plasma activation treatment to form a hydrophilic activation layer with dangling bonds and hydroxyl groups on the surface of the first oxide layer. The surface of the first oxide layer subjected to the plasma activation treatment is contact bonded with a bonding surface of the second wafer substrate in a bonding cavity to form a bonding interface. The plasma activation treatment uses a pulsed radio frequency source to alternately apply radio frequency power and stop applying radio frequency power according to an on-off period, so that the plasma discharge is periodically turned on and off, and the heat relaxation time is provided for the surface of the first wafer substrate during the off period. The pulse duty cycle of the pulsed radio frequency source is set to make the temperature rise of the surface of the first wafer substrate not more than 30℃.

[0006] This application also provides a silicon-on-insulator substrate. The silicon-on-insulator substrate includes a silicon substrate, an insulating layer, and a silicon layer stacked sequentially. The insulating layer includes an oxide layer with a thickness of less than 100 nanometers (nm), and a bonding interface exists between the oxide layer and the silicon substrate. The bonding interface is formed by contact bonding between the surface of the oxide layer, which has undergone plasma activation and hydrophilic treatment, and the surface of the silicon substrate at room temperature, followed by annealing. The processing gas used in the plasma activation treatment includes one or more gases selected from Ar, N2, O2, and H2, and a fluorine-containing gas selected from NF3, CF4, and SF6. During the plasma activation treatment, radio frequency power is alternately applied and stopped according to an on / off cycle, causing the plasma discharge of the processing gas to periodically turn on and off. The ratio of the total void area to the total area of ​​the bonding interface is not greater than 0.5%. The silicon layer is in contact with the oxide layer, and the interface trap state density between the silicon layer and the oxide layer is not greater than 1 × 10¹¹ cm⁻¹. - ²·eV - ¹, where cm represents centimeters and eV represents electron volts.

[0007] The wafer bonding method provided in this application employs a pulsed radio frequency source to periodically turn plasma discharge on and off, activating the surface of the first oxide layer on a first wafer substrate. During the on-time period, the plasma activates the surface of the first oxide layer for bonding; during the off-time period, the continuous plasma action is interrupted, providing time for thermal relaxation and charge release on the surface of the first wafer substrate. By setting the pulse duty cycle, the temperature rise of the first wafer substrate surface is kept below 30°C, which helps to reduce the damage to the first oxide layer caused by continuous ion bombardment, charge accumulation, and heat accumulation while ensuring that the surface to be bonded obtains an activation state that meets the requirements for wafer bonding. Attached Figure Description

[0008] Figure 1 This is a flowchart of a wafer bonding method provided in one embodiment of this application.

[0009] Figure 2 This is a schematic diagram of the structure of a first wafer substrate and a second wafer substrate before bonding, provided in one embodiment of this application.

[0010] Figure 3 This is a schematic diagram of the structure of a second wafer substrate with a second oxide layer provided in one embodiment of this application.

[0011] Figure 4 This is a schematic waveform diagram showing the change of radio frequency power over time during plasma activation processing, provided as an embodiment of this application.

[0012] Figure 5This is a schematic diagram of the structure after a first wafer substrate and a second wafer substrate are contacted at room temperature to form an initial bonding sheet, according to one embodiment of this application.

[0013] Figure 6 This is a schematic diagram of the structure of a silicon-on-insulator substrate provided in one embodiment of this application.

[0014] Figure 7 The graph shows the relationship between the activation factor and the on / off modulation frequency under different treatment pressures. Detailed Implementation

[0015] The embodiments of this application will now be described with reference to the accompanying drawings. A first wafer substrate and a second wafer substrate are respectively used to provide two bonding surfaces that are in contact with each other, and a first oxide layer on the surface of the first wafer substrate participates in the bonding.

[0016] In the process of fabricating silicon-on-insulator substrates using wafer bonding, it is necessary to ensure that the surfaces of the two wafers to be bonded are in a suitable state for contact bonding. For wafers with oxide layers on the bonding side, the surface of the oxide layer can be plasma-activated before wafer bonding, and hydrophilic treatment can be performed after the plasma-activated treatment.

[0017] When plasma continuously acts on the oxide surface, ion bombardment can continue, and charge and heat may accumulate on the oxide surface, potentially leading to surface roughening. For oxide layers less than 100 nm thick, the relative proportion of surface damage or roughening to the oxide layer thickness is larger, and it is more difficult to repair in subsequent processes. Continuous ion bombardment, charge accumulation, heat accumulation, and surface roughening can also increase damage to the oxide layer and the interface between the oxide layer and silicon.

[0018] Damage to the oxide layer and the interface between the oxide layer and silicon can alter the state and interface integrity of the surfaces to be bonded. Continued ionic or electronic interactions can also increase charge accumulation in the thin oxide layer and create interface traps between the oxide layer and silicon. After initial room-temperature bonding, the initially bonded wafers require annealing; damage to the oxide layer and interface formed before bonding may continue to affect the bonding interface state after annealing.

[0019] This application employs a pulsed radio frequency (RF) source to drive plasma discharge. During the on-time period, the plasma acts on the surface of the first oxide layer, forming active sites that participate in hydrophilic bonding. During the off-time period, the RF power is stopped, the continuous discharge is interrupted, and the surface of the first oxide layer gains time for thermal relaxation and charge release. By setting the pulse duty cycle, the temperature rise of the first wafer substrate surface is limited to no more than 30°C, which helps to reduce heat accumulation and damage caused by continuous ion bombardment while maintaining surface activation, and makes the activated bonding surface suitable for contact bonding with the second wafer substrate.

[0020] See Figure 1 , Figure 1 An embodiment including surface treatment, contact bonding, and annealing is shown. The wafer bonding method includes steps S110 to S160, where annealing is used to further strengthen the connection formed after contact bonding.

[0021] In step S110, a first wafer substrate and a second wafer substrate are provided. The first wafer substrate serves as a donor substrate, and the second wafer substrate serves as a support substrate. The first wafer substrate has a first oxide layer with a thickness of less than 100 nm, and the surface of the first oxide layer constitutes the bonding surface of the first wafer substrate. The second wafer substrate has a bonding surface for contacting and bonding with the first wafer substrate. After the first oxide layer is formed on the first wafer substrate, ion implantation may be performed as needed for subsequent fabrication of the silicon-on-insulator substrate.

[0022] Before plasma activation, the surface of the first oxide layer of the first wafer substrate undergoes a hydrophilic cleaning treatment to impart hydroxyl groups to the surface. When the second wafer substrate has a second oxide layer on the side to be bonded, the surface of the second oxide layer can also undergo a hydrophilic cleaning treatment to impart hydroxyl groups to the surface. Cleaning can be performed sequentially using Standard Clean 1 (SC1) and Standard Clean 2 (SC2) solutions, followed by drying. SC1 solution includes NH4OH, H2O2, and H2O, while SC2 solution includes HCl, H2O2, and H2O. Cleaning can be carried out using a tank cleaning system or a single-wafer cleaning system to remove particulate and metallic contaminants from the wafer substrate surface.

[0023] In step S120, a processing gas is provided. The base processing gas is at least one gas selected from Ar, N2, O2, and H2. The processing gas includes the base processing gas and forms a plasma discharge under the action of radio frequency power. When in-situ protection of the oxide layer surface is required, a fluorine-containing gas selected from NF3, CF4, and SF6 can be further added as a passivation gas. The ratio of the volumetric flow rate of the fluorine-containing gas to the total volumetric flow rate of the processing gas can be 0.5% to 2%, and the total volumetric flow rate of the processing gas includes the volumetric flow rates of the base processing gas, the fluorine-containing gas, and any present dilution gas or carrier gas.

[0024] Fluorine radicals generated by fluorine-containing gases can react with the surface of silicon dioxide to form Si-F bonds or extremely thin SiF bonds. x A passivation layer is applied to mitigate the direct bombardment of the oxide layer by high-energy ions. Fluorine-containing gas is added at a low flow rate to protect the oxide layer surface while preserving the activity required for subsequent bonding. NF3, CF4, and SF6 can be selected based on process power, gas flow rate regulation requirements, and pollution control requirements. NF3 is more sensitive to flow rate changes, requiring higher process control; SF6 is relatively insensitive to flow rate changes and has better process stability, but sulfur pollution needs to be considered; CF4's flow rate sensitivity is between NF3 and SF6, and carbon pollution needs to be considered when using it.

[0025] In step S130, plasma activation treatment is performed on the surface of the first oxide layer of the first wafer substrate. A pulsed radio frequency (RF) source alternately applies and stops applying RF power according to an on / off cycle, causing the plasma discharge of the processing gas to periodically turn on and off; the pulse duty cycle of the RF source is set to ensure that the temperature rise of the first wafer substrate surface does not exceed 30°C. The hydrophilic activation layer refers to the hydrophilic surface region on the surface of the first oxide layer that has dangling bonds and hydroxyl groups.

[0026] During the application of radio frequency (RF) power, a plasma discharge occurs in the process gas, and the plasma acts on the bonding surface of the first wafer substrate, activating the bonding surface. During the cessation of RF power application, the plasma discharge enters a shutdown phase, and the continuous plasma action on the bonding surface of the first wafer substrate is interrupted. The bonding surface of the first wafer substrate is cooled and discharged during the shutdown phase, releasing at least a portion of the charge accumulated during the RF power application.

[0027] By repeatedly applying and stopping radio frequency (RF) power, the bonding surface of the first wafer substrate alternately undergoes a plasma activation phase and a shutdown phase. For oxide layers with a thickness less than 100 nm, the shutdown phase provides time for heat and charge release from the oxide surface, thereby reducing the impact of continuous ion bombardment, charge accumulation, and heat accumulation on the oxide layer and helping to mitigate thermal stress damage. The RF power application phase continues to activate the bonding surface, maintaining the bonding surface of the first wafer substrate in the surface state required for subsequent hydrophilic treatment and room temperature initial bonding.

[0028] The bonding surfaces of the second wafer substrate may not require plasma activation treatment, and this embodiment adopts this setting. Depending on the bonding process requirements, plasma activation treatment can also be performed on the bonding surfaces of the second wafer substrate after hydrophilic cleaning treatment, so that the two bonding surfaces obtain a surface state suitable for contact bonding.

[0029] In step S140, the bonding surface of the first wafer substrate, which has undergone plasma activation treatment, is further subjected to a hydrophilic treatment. The hydrophilic treatment uses SC1 cleaning solution or an ammonia solution to further improve or maintain the hydrophilicity of the bonding surface, ensuring that the bonding surface remains in a suitable state for contact bonding. One specific process using an ammonia solution employs a 0.5% concentration of ammonia solution.

[0030] In step S150, the bonding surface of the first wafer substrate, which has undergone hydrophilic treatment, is brought into contact with the bonding surface of the second wafer substrate at room temperature to form an initial bonded sheet. Contact bonding is performed within a bonding cavity equipped with a vacuum function; the cavity pressure can be selected within the range of 0.001 mbar to 1000 mbar according to process requirements. The initial bonding is a pre-bonding before annealing, and the two bonding surfaces are connected by van der Waals forces and hydrogen bonds.

[0031] In step S160, the initial bonded wafer is annealed. The annealing temperature can be greater than 350°C, and the annealing time can be greater than 1 hour (h); in a further selected process, the annealing temperature can be greater than 500°C. The annealing process forms covalent bonds at the bonding interface, further strengthening the connection between the first wafer substrate and the second wafer substrate.

[0032] See Figure 2 , Figure 2The structures of a first wafer substrate 100 and a second wafer substrate 200 before bonding are shown. The first wafer substrate 100 includes a first oxide layer 110, and the surface of the first oxide layer 110 facing away from the interior of the first wafer substrate 100 constitutes the bonding surface 111 of the first wafer substrate 100. The surface of the second wafer substrate 200 facing the first wafer substrate 100 constitutes the bonding surface 201 of the second wafer substrate 200, and the bonding surface 111 is disposed opposite to the bonding surface 201.

[0033] A first oxide layer 110 is disposed on the bonding side of the first wafer substrate 100, with a thickness of less than 100 nm, and serves as the bonding layer for the first wafer substrate 100 to participate in hydrophilic bonding. The bonding surface 111 serves as the processing surface for plasma activation treatment, hydrophilic treatment, and subsequent wafer bonding.

[0034] The first oxide layer can be formed by thermal oxidation or chemical vapor deposition (CVD). In one embodiment, the first oxide layer is formed by furnace tube thermal oxidation. Thermal oxidation is typically performed at high temperatures above 800°C; in this embodiment, the furnace tube thermal oxidation temperature is 900°C to 1100°C. The first oxide layer formed by thermal oxidation has high density, fewer defects, and high purity. It exhibits strong bonding with the silicon material in the first wafer substrate, low interface state density, low intrafilm stress, is less prone to microcracks, and has good long-term stability.

[0035] The first oxide layer can also be formed by chemical vapor deposition (CVD). CVD can be performed using plasma-enhanced chemical vapor deposition (PECVD), with deposition temperatures ranging from 200°C to 400°C. Using PECVD to form the first oxide layer reduces the process temperature and minimizes the impact of high temperatures on temperature-sensitive structures. Compared to first oxide layers formed by thermal oxidation, PECVD-formed first oxide layers may exhibit higher intrafilm stress, a higher risk of microcracks, and potentially lower long-term stability.

[0036] Figure 2 In the embodiment shown, the second oxide layer is not provided on the bonding side of the second wafer substrate 200, and the bonding surface 201 is directly formed on the second wafer substrate 200. During subsequent bonding, the hydrophilic bonding surface 111 and the bonding surface 201 come into contact with each other to form an initial bonded sheet.

[0037] The bonding surface of the first wafer substrate is formed directly on the surface of the first oxide layer with a thickness of less than 100 nm. Figure 1The plasma activation and hydrophilic treatment steps shown are both applied to the same bonding surface, and the surface treated by the plasma activation treatment continues to serve as the surface in contact with the second wafer substrate. Therefore, the plasma activation treatment, hydrophilic treatment, and room temperature initial bonding are sequential processes.

[0038] See Figure 3 A second oxide layer 210 is formed on the side of the second wafer substrate 200 facing the first wafer substrate 100, and the surface of the second oxide layer 210 constitutes the bonding surface 201 of the second wafer substrate 200. The thickness of the second oxide layer 210 can be from 1 nm to 3000 nm, including the native oxide layer. The second oxide layer 210 can be formed by furnace tube thermal oxidation or chemical vapor deposition, and the formation method and thickness are selected according to the bonding process requirements.

[0039] Figure 3 In the illustrated embodiment, the first wafer substrate 100 still has a first oxide layer 110 with a thickness of less than 100 nm, and the surface of the first oxide layer 110 constitutes a bonding surface 111. The bonding surface 111 is disposed opposite to the bonding surface 201. After the first wafer substrate 100 completes plasma activation treatment and hydrophilic treatment, the bonding surface 111 and the bonding surface 201 come into contact at room temperature to form an initial bonded sheet.

[0040] When the second oxide layer 210 is disposed on the bonding side of the second wafer substrate 200, the contact interface between the first wafer substrate 100 and the second wafer substrate 200 is formed between the first oxide layer 110 and the second oxide layer 210. The second oxide layer 210 constitutes the surface structure of the bonding side of the second wafer substrate 200 and participates in subsequent room temperature initial bonding and annealing processes.

[0041] See Figure 4 , Figure 4 The diagram illustrates the waveform of radio frequency power versus time during plasma activation. P represents radio frequency power in watts (W); t represents time in seconds (s). on This indicates the applied radio frequency power during the on-time period, measured in watts (W); t on t represents the duration of applied radio frequency power within one on / off cycle. off This indicates the duration during which radio frequency power is not applied within the same cycle, where T represents the on / off cycle. on t off T uses the same time unit as the on / off modulation frequency; when the on / off modulation frequency is calculated in Hertz (Hz), T is in seconds (s).

[0042] A switching cycle T includes the period during which RF power is applied and the period during which RF power is stopped:

[0043] The on / off modulation frequency of the radio frequency power is denoted as f. p , representing the number of repetitions of the on / off cycle per unit time, expressed in Hz. The relationship between the on / off modulation frequency and the on / off period T is as follows:

[0044] The pulse duty cycle of a pulsed radio frequency source is denoted as D, and is expressed as a percentage representing the proportion of on-time within one on / off cycle. The formula for calculating the pulse duty cycle is:

[0045] In the calculation, a 25% duty cycle corresponds to an on / off time ratio of 0.25. Using f... p Taking 20 Hz and D as an example, T is 0.05 s, or 50 milliseconds (ms); t on It is 12.5 ms, t off The turn-on and turn-off times are 37.5 ms. The turn-on and turn-off times are calculated from the relationship between the on / off period and the pulse duty cycle.

[0046] During the application of RF power, the RF power is P. on The process gas generates plasma discharge. The resulting plasma activates the bonding surface of the first wafer substrate, giving it the surface state required for subsequent hydrophilic treatment and room-temperature initial bonding. By coordinating the turn-on time and turn-on power, the energy provided by a single discharge can be controlled, preventing excessive energy concentration on the oxide layer surface.

[0047] During the RF power shutdown period, RF power is stopped from being supplied to the plasma discharge process, and the plasma discharge enters a shutdown state. The bonding surface of the first wafer substrate gains time for cooling, discharge, and charge release during the RF power shutdown period. Setting an RF power shutdown period between two adjacent RF power application periods can interrupt the continuous effect of plasma on the bonding surface, reducing the continuous accumulation of ion bombardment, charge accumulation, and heat accumulation in multiple on-off cycles.

[0048] When radio frequency power is continuously applied, the bonding surface of the first wafer substrate lacks periodic off-time, limiting the release of surface charge and heat. Ion bombardment, active particle effects, and photon irradiation also continue to accumulate. Periodic power switching causes the surface to alternately undergo activation and relaxation processes, helping to reduce charge accumulation and dielectric charging damage while maintaining activity.

[0049] For oxide layers with a thickness of less than 100 nm, the surface damage depth and surface roughness have a significant impact relative to the total oxide layer thickness. Alternating between the application and cessation of radio frequency power helps control ion energy distribution, ion flux, and surface roughness, thus coordinating surface activation with thin oxide layer damage control.

[0050] In one implementation, the on / off modulation frequency f of the radio frequency power p The frequency range is 10 Hz to 50 Hz, corresponding to a switching period T of 20 ms to 100 ms. See also... Figure 7 Under the corresponding experimental conditions, the surface activation effect was better when the on / off modulation frequency was 20 Hz to 50 Hz. When the on / off modulation frequency was 10 Hz, the surface could still be effectively activated by adjusting the duty cycle. When the on / off modulation frequency was greater than 50 Hz, the on-time was too short, and the activation performance decreased during the off-time, making it difficult to effectively activate the surface. Therefore, the on / off modulation frequency was selected as 10 Hz to 50 Hz, preferably 20 Hz to 50 Hz.

[0051] When the on / off modulation frequency is too high, the on / off period is shortened. With a constant duty cycle, both the turn-on and turn-off times are shortened, which may weaken the activation effect during the turn-on phase and prevent the charge and heat during the turn-off phase from being fully released. When the on / off modulation frequency is too low, the turn-off time is prolonged, the decay of afterglow active species and surface excited states increases, and it may also affect the stability and surface treatment uniformity during restart.

[0052] In one embodiment, the pulse duty cycle D of the pulsed RF source is 15%–25%. The proportion of time during the RF power stop period within a single on / off cycle is correspondingly 75%–85%. The duty cycle determines the time allocation between the RF power application period and the RF power stop period within a single on / off cycle. With the power remaining constant during the RF power application period, a duty cycle of 15%–25% allows the RF power stop period to occupy a larger proportion of a single on / off cycle, thereby limiting the average plasma dose to a lower level. This duty cycle range is determined based on process experience.

[0053] When the duty cycle is too large, the period during which the radio frequency power is stopped is shortened, reducing the time the oxide layer has for cooling, discharging, and releasing charge, and increasing the cumulative effect of continuous ion bombardment. When the duty cycle is too small, the period during which the radio frequency power is applied is shortened, and contaminant removal, hydroxylation, and active site formation may be insufficient, thereby reducing the activation level of the bonded surface.

[0054] On / off modulation frequency f p The duty cycle D and the duty cycle can be adjusted separately, and t can be determined together. on and t offThe degree of surface activation is related to the cumulative plasma dose during multiple on-cycles, and damage is also affected by instantaneous particle flux, charge accumulation, and heat accumulation. On-cycles provide surface activation, while off-cycles provide time for cooling and charge release; the coordination of these two cycles allows for separate regulation of activation and damage control. When the on- and off-cycle timings simultaneously cover the characteristic timescales required for both surface activation and charge / heat release processes, both surface activation and damage control can be balanced. The duty cycle selection must also ensure that the temperature rise of the first wafer substrate surface does not exceed 30°C, with the temperature rise based on the first wafer substrate surface temperature before plasma activation treatment begins. During treatment, the temperature rise of the first wafer substrate surface relative to this reference does not exceed 30°C. The specific temperature rise is related to process conditions such as RF power, on / off modulation frequency, processing gas pressure, and processing time.

[0055] In one embodiment, the radio frequency of the pulsed radio frequency source is 13.56 MHz, and the P frequency during the application of radio frequency power is... on The power output ranges from 20 W to 500 W. 13.56 MHz corresponds to the frequency of the RF power itself, and 10 Hz to 50 Hz corresponds to the on / off modulation frequency for applying and stopping the RF power. These two frequencies describe the RF oscillation characteristics and the on / off repetitive characteristics of the RF power over time, respectively. The processing gas pressure for plasma activation can be less than 100 mbar, and the processing time can be from 20 s to 60 s. The processing time is the total duration of the plasma activation process from start to finish, including the period of RF power application and the period of power cessation.

[0056] Figure 4 The waveforms shown represent the on / off relationship of RF power, not the waveform of the RF oscillation itself. The on-time to off-time ratio in the figure is illustrated as 1:3, corresponding to a 25% duty cycle. In specific processes, a duty cycle of 15% to 25% can be used, so that the off-time occupies 75% to 85% of one on / off cycle, allowing time for the release of heat and charge from the oxide layer surface.

[0057] See Figure 5 , Figure 5 The structure of the initial bonding sheet 400 after the first wafer substrate 100 and the second wafer substrate 200 are brought into contact at room temperature is shown. Figure 5 by Figure 2 The embodiment shown is an example where the second oxide layer is not provided on the bonding side of the second wafer substrate 200. After plasma activation treatment and hydrophilic treatment, the bonding surface of the first wafer substrate 100 and the bonding surface of the second wafer substrate 200 come into contact with each other and form a bonding interface 300 between them, thereby forming an initial bonding sheet 400.

[0058] When the bonding surfaces of the first wafer substrate 100 and the second wafer substrate 200 are in contact at room temperature, an initial bond can be formed between the two bonding surfaces through van der Waals forces and hydrogen bonds. The initial bond keeps the first wafer substrate 100 connected to the second wafer substrate 200 and provides a bonding basis for subsequent annealing.

[0059] The state of the bonding interface 300 affects the bonding quality after annealing. Damage to the first oxide layer 110 and related interfaces can affect the local bonding state of the bonding interface 300. The presence of interface damage or residual gas at the bonding interface 300 increases the risk of bonding voids or localized delamination during annealing. Therefore, controlling the damage to the first oxide layer 110 caused by plasma activation treatment before forming the initial bonded sheet 400 helps reduce the impact of interface damage on the subsequent annealing bonding quality.

[0060] After the initial bonded wafer 400 is formed, it is annealed. In one embodiment, the annealing temperature is greater than 350°C, and the annealing time is greater than 1 hour. During the annealing process, the bonding state between the first wafer substrate 100 and the second wafer substrate 200 changes, and covalent bonding is formed at the bonding interface 300. Before and after the annealing process, the stacking relationship between the first wafer substrate 100, the first oxide layer 110, and the second wafer substrate 200 remains unchanged. Therefore... Figure 5 It is used to represent the stacking relationship of the initial bonded sheet 400 as well as the stacking relationship after annealing.

[0061] By controlling the plasma interaction before bonding, damage to the thin oxide layer and related interfaces can be mitigated. After initial bonding is formed on the hydrophilic treated surface at room temperature, annealing is performed to strengthen the bond, which helps reduce the risk of interface damage and voids or delamination caused by residual gases.

[0062] for Figure 3 The structure shown, with a second oxide layer, can also be achieved through room temperature initial bonding and annealing. After the two oxide layer surfaces come into contact, the bonding interface is located between the two oxide layers; the location of this interface is similar to... Figure 5 The structure shown is different from that of the first oxide layer directly bonded to the exposed silicon surface.

[0063] See Figure 6 , Figure 6 The structure of a silicon-on-insulator (SiI) substrate 500 according to one embodiment of this application is shown. The SiI substrate 500 includes a second wafer substrate 200, a first oxide layer 110 on the second wafer substrate 200, and a silicon layer 510 on the first oxide layer 110. The first oxide layer 110 constitutes an insulating layer of the SiI substrate 500.

[0064] Figure 6 In this structure, a second wafer substrate 200, a first oxide layer 110, and a silicon layer 510 are stacked sequentially, with the first oxide layer 110 located between the second wafer substrate 200 and the silicon layer 510. The second wafer substrate 200 constitutes the silicon substrate of the silicon-on-insulator substrate 500, and the first oxide layer 110 of the first wafer substrate constitutes the oxide layer of the silicon-on-insulator substrate 500. Figure 6 This indicates a single oxide layer insulation structure; in embodiments where a second oxide layer is provided, the two oxide layers together constitute a stacked insulation structure, and the bonding interface is located between the two oxide layers.

[0065] The thickness of the first oxide layer 110 is less than 100 nm. A bonding interface 300 is formed between the surface of the first oxide layer 110 facing the second wafer substrate 200 and the surface of the second wafer substrate 200. The bonding interface 300 corresponds to the interface formed after the bonding surfaces of the first wafer substrate and the second wafer substrate come into contact during the wafer bonding process and undergo annealing treatment.

[0066] The silicon layer is located on the side of the oxide layer facing away from the silicon substrate. The silicon layer is in contact with the oxide layer, forming an interface at the contact point. The bonding interface and the interface between the silicon layer and the oxide layer are located on opposite sides of the oxide layer. The bonding interface reflects the bonding state between the oxide layer and the silicon substrate, while the interface between the silicon layer and the oxide layer reflects the electrical state of the relevant interfaces of the thin oxide layer.

[0067] Before the bonding interface is formed, the oxide layer's bonding surface undergoes plasma activation and hydrophilic treatment. The plasma activation process uses a treatment gas consisting of one or more gases selected from Ar, N2, O2, and H2, and a fluorine-containing gas selected from NF3, CF4, and SF6. The plasma discharge is periodically turned on and off by alternately applying and stopping radio frequency power according to an on / off cycle. After the hydrophilic treatment, the oxide layer's bonding surface contacts the silicon substrate's bonding surface at room temperature to form an initial bond, followed by annealing to form the bonding interface.

[0068] The voids at the bonding interface can be used to characterize the bonding integrity after annealing. In one embodiment, the ratio of the total void area to the total area of ​​the bonding interface is no greater than 0.5%. The total void area at the bonding interface can be determined based on the sum of the areas corresponding to each detected bonding void. For a single oxide layer structure on the bonding side of the second wafer substrate without a second oxide layer, the pulsed radio frequency plasma activation treatment still acts on the bonding surface of the first oxide layer. The activation and damage control mechanism of the first oxide layer is the same as when a second oxide layer is provided. Therefore, based on the mechanism of action, it is expected that the pulsed radio frequency plasma activation treatment also has the effect of improving the bonding integrity of the single oxide layer structure.

[0069] The interface trap state density between the silicon layer and the oxide layer can be used to characterize the electrical states of the interface associated with the thin oxide layer. In one embodiment, the interface trap state density at the silicon-oxide interface is no greater than 1 × 10¹¹ cm⁻¹. - ²·eV - ¹. For oxide layers with a thickness of less than 100 nm, charge accumulation and dielectric charging damage occurring during plasma processing can affect the oxide layer and the interface between the silicon and oxide layers. By setting the RF power stop period to allow for discharge and charge release time between adjacent activation phases, the impact of continuous charge accumulation on the oxide layer and related interfaces can be reduced.

[0070] The void area ratio at the bonding interface and the interface trap state density between the silicon and oxide layers reflect the interface state of the silicon substrate on the insulator from different perspectives. The void area ratio at the bonding interface mainly characterizes the macroscopic bonding defects formed after room temperature initial bonding and annealing, while the interface trap state density mainly characterizes the electrical defects at the interfaces related to the thin oxide layer. Both parameters are related to the plasma activation process of the thin oxide layer and can be used to evaluate the impact of RF power on / off mode on damage control of the thin oxide layer and the subsequent bonding quality.

[0071] See Figure 7 , Figure 7 The horizontal axis below represents the on / off modulation frequency f. p The upper horizontal axis represents the corresponding on / off period T. When f p When T is measured in Hertz (Hz) and T is measured in seconds (s), the two satisfy the following conditions: . Figure 7 The periodic scale on the upper horizontal axis is expressed in milliseconds (ms) and approximated. Figure 7 With η N Represents the activating factor, η. N This represents the ratio of the actual number of active particles generated per unit time to the theoretical number generated, and is a dimensionless parameter. The horizontal dashed line in the figure is located at... The location represents a reference state where the actual number of generated items equals the theoretical number. η N A value greater than 1.0 indicates that the actual generation quantity is higher than the theoretical generation quantity. Square and circular dots correspond to processing pressures of 20 Pa and 40 Pa, respectively. The two sets of data show different responses to changes in the on / off modulation frequency, indicating that the selection of the on / off modulation frequency is also affected by the processing pressure.

[0072] Examples and Comparative Examples The following examples and comparative examples are used to compare the effects of different plasma activation treatment conditions on the thin oxide layer and bonding interface state. The samples consist of a 90 nm thick first oxide layer on a first wafer substrate and a 200 nm thick second oxide layer on a second wafer substrate, forming a dual oxide layer structure. The 90 nm refers to the thickness of the first oxide layer on the first wafer substrate receiving pulse activation, and does not represent the combined thickness of the two oxide layers.

[0073] Table 1 Common Process Conditions

[0074] Table 1 lists the common process conditions, and Table 2 lists the comparative settings for RF operating mode, on / off modulation frequency, duty cycle, and fluorine-containing gas. The correspondence between the conditions in each comparison group is explained in the examples and comparative examples.

[0075] Example Setup Example 1 uses pulsed radio frequency for plasma activation treatment. The on / off modulation frequency is 20 Hz, the duty cycle is 25%, and both the on / off modulation frequency and duty cycle are within the range of 10 Hz to 50 Hz and 15% to 25%, respectively.

[0076] Example 2 uses pulsed radio frequency for plasma activation treatment. The on / off modulation frequency is 30 Hz and the duty cycle is 20%. Example 2 and Example 1 use different combinations of on / off modulation parameters to compare the effects of different time configurations within a defined range on thin oxide layer damage and post-bonding interface state.

[0077] Example 3 uses pulsed radio frequency for plasma activation treatment. The on / off modulation frequency is 50 Hz, and the duty cycle is 15%. Example 3, together with Examples 1 and 2, forms a comparison of different on / off modulation parameters within a defined range.

[0078] Scale settings Comparative Example 1 employed continuous radio frequency (RF) plasma activation treatment. Except for the continuous application of RF power, the other process conditions of Comparative Example 1 were consistent with those of Example 1. Comparative Example 1 was used to compare the effects of continuous plasma treatment and periodically on / off plasma treatment on the thin oxide layer and the interface state after bonding.

[0079] Comparative Example 2 uses pulsed radio frequency for plasma activation treatment with an on / off modulation frequency of 5 Hz and a duty cycle of 25%. Except for the on / off modulation frequency, other process conditions are the same as in Example 1, used to compare the surface and bonding interface states at a lower on / off modulation frequency.

[0080] Comparative Example 3 uses pulsed radio frequency for plasma activation treatment with an on / off modulation frequency of 70 Hz and a duty cycle of 25%. Except for the on / off modulation frequency, the other process conditions are the same as in Example 1, used to compare the surface and bonding interface states at higher on / off modulation frequencies.

[0081] Comparative Example 4 uses pulsed radio frequency for plasma activation treatment, with an on / off modulation frequency of 20 Hz and a duty cycle of 10%. Except for the duty cycle, other process conditions are the same as in Example 1, used to compare the surface and bonding interface states at a lower duty cycle.

[0082] Comparative Example 5 uses pulsed radio frequency for plasma activation treatment, with an on / off modulation frequency of 20 Hz and a duty cycle of 40%. Except for the duty cycle, other process conditions are the same as in Example 1, used to compare the surface and bonding interface states at higher duty cycles.

[0083] Comparative Example 6 uses the same on / off modulation frequency and duty cycle as Example 1, but without adding fluorine-containing gas to the treated gas. Both sets can be used to examine the changes in the interfacial state before and after the addition of fluorine-containing gas.

[0084] Table 2 Key process parameters for the examples and comparative examples

[0085] After plasma activation, the bonding surface of the first wafer substrate was hydrophilicated, and then the bonding surfaces of the first and second wafer substrates were brought into contact at room temperature to form an initial bonded sheet. All samples were annealed under the same annealing conditions.

[0086] Product parameter testing The annealed bonding interface was scanned using a scanning ultrasonic microscope (SAM) to identify bonding void regions. v A represents the sum of the areas of the detected bonded voids. b A represents the total area of ​​the bonding interfaces within the same detection range. v With A b Using the same area unit, and A b Greater than zero. Void area ratio R v Expressed as a percentage, the calculation formula is:

[0087] A smaller void area ratio indicates a lower proportion of the area occupied by bonding voids in the bonding interface. For example, area ratio A v / A b When R is 0.002, v A percentage of 0.2%; an area ratio not exceeding 0.5% corresponds to A.v / A b Not greater than 0.005. Comparisons between different samples use consistent detection methods, void identification criteria, and statistical ranges.

[0088] The density of interface trap states between the silicon layer and the oxide layer is denoted as D. it This represents the number of interface trap states per unit interface area and per unit energy range, expressed in cm². - ²·eV - ¹. The interface trap state density was measured at 9 points on the wafer using a non-contact corona charging tester. The data listed in Table 3 are the corresponding tester outputs. This parameter evaluates the interfacial electrical state between silicon and the oxide layer, which is different from the evaluation object of bonding voids between the two oxide layers in the double oxide layer sample in Table 1.

[0089] Surface roughness (Ra) is measured in nanometers (nm) and can be measured using atomic force microscopy (AFM) to aid in evaluating the morphology of the surface before bonding. Oxide layer damage depth, bonding strength, and peel area can also be used as auxiliary evaluation indicators; Table 4 also lists the methods for testing bonding strength of the cutting blade.

[0090] Table 3. Product test results for the examples and comparative examples.

[0091] Table 4 Product Parameter Test Standards

[0092] For the double oxide layer samples listed in Table 1, the void area ratio of Examples 1 to 3 shown in Table 3 is 0.1% to 0.5%, and the interface trap state density is 5.1 × 10¹. 0 cm - ²·eV - ¹~8.2×10¹ 0 cm - ²·eV - ¹. Comparative Example 1 for continuous radio frequency corresponds to a void area ratio of 1.6% and an interface trap state density of 3.2 × 10¹¹ cm⁻¹. - ²·eV - ¹. Under the process conditions listed in the table, Example 1 has a lower void area ratio and interface trap state density compared to Comparative Example 1, corresponding to the technical effect of mitigating the effects of continuous plasma during pulse turn-off.

[0093] Compared to Comparative Example 6, which did not contain fluorine gas, Example 1 using NF3 had a void area ratio of 0.2% and 0.8%, respectively, and an interface trap state density of 5.1 × 10¹, respectively. 0 cm -²·eV - ¹ and 2.8 × 10¹¹ cm - ²·eV - ¹. Examples 2 and 3, compared to Example 1, simultaneously change the on / off modulation frequency and duty cycle. The comparison results reflect the changes in the interface state after both parameters are adjusted.

[0094] The scope of protection of this application is not limited to the foregoing embodiments. Those skilled in the art can modify the specific embodiments or make equivalent substitutions for some technical features without departing from the technical concept of this application. Where there is no technical contradiction, technical features in different embodiments can be combined with each other. The scope of protection of this application is determined by the claims.

Claims

1. A wafer bonding method, characterized in that, include: A first wafer substrate is provided, wherein a first oxide layer is provided on the surface of the first wafer substrate; Provide a second wafer substrate; The surface of the first oxide layer of the first wafer substrate is subjected to plasma activation treatment to form a hydrophilic activation layer with dangling bonds and hydroxyl groups on the surface of the first oxide layer. The surface of the first oxide layer, which has undergone plasma activation treatment, is brought into contact and bonded with the surface of the second wafer substrate to be bonded within the bonding cavity to form a bonding interface; The plasma activation process employs a pulsed radio frequency source that alternately applies and stops applying radio frequency power according to an on / off cycle, causing the plasma discharge to periodically turn on and off. During the off period, it provides a thermal relaxation time for the surface of the first wafer substrate. The pulse duty cycle of the pulsed radio frequency source is set to ensure that the temperature rise of the surface of the first wafer substrate does not exceed 30°C.

2. The wafer bonding method according to claim 1, characterized in that, After the contact bonding, the first wafer substrate and the second wafer substrate bonded to each other are annealed at a temperature greater than 350°C for a time greater than 1 hour, thereby forming covalent bonds at the bonding interface.

3. The wafer bonding method according to claim 1, characterized in that, Before performing the plasma activation treatment on the surface of the first oxide layer, the surface of the first oxide layer is subjected to a hydrophilic cleaning treatment to give the surface of the first oxide layer hydroxyl groups.

4. The wafer bonding method according to claim 3, characterized in that, The second wafer substrate has a second oxide layer on the side to be bonded, and the surface of the second oxide layer constitutes the bonding surface of the second wafer substrate; before the contact bonding, the surface of the second oxide layer is subjected to a hydrophilic cleaning treatment to make the surface of the second oxide layer have hydroxyl groups.

5. The wafer bonding method according to claim 3, characterized in that, The hydrophilic cleaning treatment performed on the surface of the first oxide layer includes: treating the surface of the first oxide layer with a first cleaning solution and a second cleaning solution in sequence, and drying the first wafer substrate after cleaning. The first cleaning solution includes ammonia, hydrogen peroxide and water, and the second cleaning solution includes hydrochloric acid, hydrogen peroxide and water.

6. The wafer bonding method according to claim 5, characterized in that, Prior to the contact bonding, the bonding surface of the second wafer substrate is subjected to plasma activation treatment.

7. The wafer bonding method according to claim 1, characterized in that, The thickness of the first oxide layer is less than 100 nm.

8. The wafer bonding method according to claim 1, characterized in that, Prior to the contact bonding, a second oxide layer is formed on the bonding side of the second wafer substrate, the surface of the second oxide layer constitutes the bonding surface of the second wafer substrate, and the thickness of the second oxide layer is 1 nm to 3000 nm.

9. The wafer bonding method according to claim 1, characterized in that, The first oxide layer is formed by thermal oxidation or chemical vapor deposition.

10. The wafer bonding method according to claim 9, characterized in that, The first oxide layer is formed by thermal oxidation in a furnace tube at a temperature of 900℃ to 1100℃.

11. The wafer bonding method according to claim 1, characterized in that, The on / off modulation frequency of the radio frequency power is 10 Hz to 50 Hz.

12. The wafer bonding method according to claim 1 or 11, characterized in that, The pulse duty cycle of the pulse radio frequency source is 15% to 25%.

13. The wafer bonding method according to claim 1, characterized in that, The radio frequency of the pulse radio frequency source is 13.56 MHz.

14. The wafer bonding method according to claim 1, characterized in that, During the application of the radio frequency power, the radio frequency power is 20 W to 500 W.

15. The wafer bonding method according to claim 1, characterized in that, The processing gas pressure for plasma activation treatment is less than 100 mbar.

16. The wafer bonding method according to claim 1, characterized in that, The plasma activation process uses at least one gas selected from Ar, N2, O2, and H2.

17. The wafer bonding method according to claim 16, characterized in that, The processing gas also includes a passivating gas, which is selected from NF3, CF4 and SF6; the volumetric flow rate of the passivating gas accounts for 0.5% to 2% of the total volumetric flow rate of the processing gas.

18. The wafer bonding method according to claim 1, characterized in that, The plasma activation treatment takes 20 to 60 seconds.

19. A silicon-on-insulator substrate, characterized in that, It includes a silicon substrate, an insulating layer, and a silicon layer stacked sequentially; The insulating layer includes an oxide layer with a thickness of less than 100 nm, and the oxide layer has a bonding interface with the silicon substrate; The bonding interface is formed by contact bonding between the surface of the oxide layer, which has undergone plasma activation and hydrophilic treatment, and the surface of the silicon substrate at room temperature, followed by annealing. The plasma activation process uses a processing gas selected from one or more gases chosen from Ar, N2, O2, and H2, and a fluorine-containing gas selected from NF3, CF4, and SF6. During the plasma activation process, radio frequency power is applied and stopped alternately according to an on-off cycle, so that the plasma discharge of the processing gas is periodically turned on and off. The ratio of the total void area to the total area of ​​the bonding interface is no greater than 0.5%; The silicon layer is in contact with the oxide layer, and the interface trap state density between the silicon layer and the oxide layer is no greater than 1 × 10¹¹ cm⁻¹. - ²·eV - ¹.

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