A semiconductor module, integrated module, electronic control device, and vehicle

Abstract

The application discloses a semiconductor module, an integrated module, an electric control device and a vehicle, and relates to the technical field of vehicles.The semiconductor module comprises at least two groups of semiconductor units and a connecting terminal, each group of semiconductor units comprises at least one semiconductor device, and the at least two groups of semiconductor units are connected with the connecting terminal.In this way, the at least two groups of semiconductor units share one connecting terminal, the structure is simpler, the integration of the semiconductor module is improved, the at least two groups of semiconductor units transmit signals through the one connecting terminal, the stray inductance can be reduced, and the overall performance of the semiconductor module is improved.

Description

Technical Field

[0001] This application belongs to the field of vehicle technology, specifically relating to a semiconductor module, an integrated module, an electronic control device, and a vehicle. Background Technology

[0002] With the increasing development of new energy vehicles, power modules are widely used in the field of new energy vehicle technology. Currently, power modules have become an important component in motor controllers, inverters, and new energy charging piles in new energy vehicles.

[0003] In related technologies, the complex circuit connection design of multiple chips in a power module extends the response time of the chipset and affects the performance of the power module. Summary of the Invention

[0004] This application aims to provide a semiconductor module, integrated module, electronic control device, and vehicle that can solve the problem in related technologies where the complex circuit connection design of multiple chips in a power module leads to an extended response time of the chipset, affecting the performance of the power module.

[0005] To solve the above-mentioned technical problems, this application is implemented as follows:

[0006] In a first aspect, embodiments of this application propose a semiconductor module, which includes at least two sets of semiconductor units and a connection terminal. Each set of semiconductor units includes at least one semiconductor device, and both sets of semiconductor units are connected to the connection terminal.

[0007] Optionally, the conductive paths from the connection terminal to each group of semiconductor cells are equal.

[0008] Optionally, at least two sets of the semiconductor units are symmetrically arranged.

[0009] Optionally, at least two sets of the semiconductor units are symmetrically arranged with respect to the connection end.

[0010] Optionally, at least two sets of the semiconductor cells are axially symmetrical along a first direction or a second direction, wherein the first direction intersects the second direction.

[0011] Optionally, each group of semiconductor units includes at least two semiconductor devices, and at least two semiconductor devices in the same group are axially symmetrical along a first direction or a second direction.

[0012] Optionally, each group of semiconductor units includes four semiconductor devices, and the four semiconductor devices in the same group are axially symmetrical along a first direction or a second direction.

[0013] Optionally, the semiconductor module further includes a connector electrically connected to the semiconductor unit, the connector having an I-shaped structure.

[0014] Optionally, the semiconductor module further includes a connector having at least two electrical connection terminals, each of which is electrically connected to a group of semiconductor units, the connector being electrically connected to the connection terminals, and the conductive paths from the connection terminals to each of the electrical connection terminals being equal.

[0015] Optionally, the semiconductor module further includes a connector having at least two electrical connection terminals, each of which is electrically connected to a group of semiconductor units, and the connector is electrically connected to the connection terminals, with at least two electrical connection terminals symmetrically arranged.

[0016] Optionally, the connector has a connection area that is electrically connected to the connection end, each group of semiconductor units is connected to the connection area, and the connection area and each group of semiconductor units have the same conductive path.

[0017] Optionally, each of the semiconductor devices is connected to the connection region, and the conductive paths between the connection region and each of the semiconductor devices are equal.

[0018] Optionally, the connector has an axisymmetric structure.

[0019] Optionally, the semiconductor device has a first set of pins, which are electrically connected to the connection terminal; the first set of pins is located on a first side of the semiconductor device, and at least two semiconductor devices in the same group of semiconductor units are arranged opposite to each other on their first sides.

[0020] Optionally, the semiconductor device further has a second set of pins located on a second side of the semiconductor device, which is different from the first side.

[0021] Optionally, the first side and the second side are arranged opposite to each other.

[0022] Optionally, the semiconductor module further includes multiple connectors, multiple insulating layers, and conductive elements; the multiple connectors and multiple insulating layers are alternately stacked along a third direction and are disposed on one side of the semiconductor unit; the semiconductor unit is adjacent to the insulating layer; the conductive elements pass through the insulating layer, and the semiconductor module has the connection end on its outer surface along the third direction, and the connection end is electrically connected to the connectors.

[0023] Optionally, the first set of pins includes a first pin, and the plurality of connectors include a first connector, the first connector being disposed on one side of the semiconductor unit along the third direction; the plurality of insulating layers include a first insulating layer, the first insulating layer being disposed between the semiconductor unit and the first connector; the conductive element includes a first conductive element, the first conductive element being disposed in the first insulating layer along the third direction, one end of the first conductive element being electrically connected to the first pin, and the other end of the first conductive element being electrically connected to the first connector.

[0024] Optionally, the first set of pins further includes a second pin, and the plurality of connectors further includes a second connector, the second connector being disposed on the side of the first connector away from the semiconductor unit; the plurality of insulating layers include a second insulating layer, the second insulating layer being disposed between the first connector and the second connector; the conductive element includes a second conductive element, the second conductive element being disposed in the first insulating layer and the second insulating layer along the third direction, one end of the second conductive element being electrically connected to the second pin, and the other end of the second conductive element being electrically connected to the second connector.

[0025] Optionally, each of the semiconductor devices is provided with a first pin and a second pin, and the semiconductor module further includes a connector, the connector including a first connector and a second connector, the first pin being electrically connected to the first connector, and the second pin being electrically connected to the second connector; the first pin and the second pin are disposed at the same end of the semiconductor device, and the orthographic projection of the second connector along a third direction at least partially coincides with the orthographic projection of the first connector along a third direction.

[0026] Optionally, the connecting end is located on the side of the second connector opposite to the first connector, and the connecting end includes a first connecting end and a second connecting end spaced apart; the plurality of insulating layers also include a third insulating layer, which is located between the second connector and the connecting end;

[0027] The conductive element further includes a third conductive element and a fourth conductive element. The third conductive element passes through the second insulating layer and the third insulating layer in a third direction. One end of the third conductive element is electrically connected to the first connector, and the other end of the third conductive element is electrically connected to the first connection terminal, which is adapted to be connected to the driver. The fourth conductive element passes through the third insulating layer in a third direction. One end of the fourth conductive element is electrically connected to the second connector, and the other end of the fourth conductive element is electrically connected to the second connection terminal, which is adapted to be grounded by the driver.

[0028] Optionally, the semiconductor module further includes a metal component disposed on the side of the semiconductor unit opposite to the connector, and each semiconductor device is electrically connected to the metal component.

[0029] Optionally, the metal part has a first mounting groove on the side facing the semiconductor unit, and each semiconductor device is disposed in the first mounting groove, and the semiconductor device is electrically connected to the bottom of the first mounting groove.

[0030] Optionally, the semiconductor module further includes a detection element. The metal part has a second mounting groove on the side facing the semiconductor unit, and the detection element is disposed in the second mounting groove. The detection element is used to detect the temperature of the semiconductor unit.

[0031] Optionally, the semiconductor module further includes a first insulating member disposed between the wall of the second mounting groove and the detection member.

[0032] Optionally, the outer surface of the semiconductor module with the connection end is further provided with a third connector. The third connector includes a first terminal, and the conductive element further includes a fifth conductive element. The fifth conductive element is disposed in multiple insulating layers along a third direction. One end of the fifth conductive element is electrically connected to the detection element, and the other end of the fifth conductive element is electrically connected to the first terminal.

[0033] Optionally, the semiconductor module further includes a second insulating member, which is disposed on the side of the semiconductor unit away from the connector. The side of the second insulating member facing the semiconductor unit has a third mounting groove, and the metal member is disposed in the third mounting groove.

[0034] Optionally, the semiconductor module further includes a substrate and a third insulating member, the substrate being disposed on one side of the semiconductor unit along a third direction, and the third insulating member being disposed between the substrate and the semiconductor unit;

[0035] The substrate includes an aluminum plate, a thermally conductive insulating layer, and a copper layer stacked along the third direction. The thermally conductive insulating layer is disposed between the aluminum plate and the copper layer, and the copper layer is in contact with the third insulating element.

[0036] Secondly, this application proposes an integrated module comprising two semiconductor modules as described in any one of the preceding claims, the two semiconductor modules being electrically connected.

[0037] Optionally, the two semiconductor modules include a first semiconductor module and a second semiconductor module arranged at intervals along a first direction, wherein the semiconductor devices in the first semiconductor module and the semiconductor devices in the second semiconductor module are symmetrical along a second direction, and the first direction intersects the second direction.

[0038] Optionally, the semiconductor module further includes multiple connectors, multiple insulating layers, and conductive elements; the multiple connectors and multiple insulating layers are alternately stacked along a third direction and are disposed on one side of the semiconductor unit; the semiconductor unit is adjacent to the insulating layer; the conductive elements pass through the insulating layer, and the semiconductor module has the connection end on its outer surface along the third direction, and the connection end is electrically connected to the connector;

[0039] Each of the semiconductor devices is further provided with a third pin, and a metal part is provided at one end of the semiconductor device away from the plurality of connectors, the metal part being electrically connected to each of the semiconductor devices;

[0040] The plurality of connectors further includes a fourth connector disposed on one side of the semiconductor unit along the third direction. The plurality of insulating layers further includes a fourth insulating layer disposed between the semiconductor unit and the fourth connector along the third direction. The conductive elements further include a sixth conductive element and a seventh conductive element. The sixth conductive element passes through the fourth insulating layer along the third direction. One end of the sixth conductive element is electrically connected to the metal component in the second semiconductor module, and the other end of the sixth conductive element is electrically connected to the fourth connector. The seventh conductive element passes through the fourth insulating layer along the third direction. One end of the seventh conductive element is electrically connected to the third pin of the semiconductor device in the first semiconductor module, and the other end of the seventh conductive element is electrically connected to the fourth connector, so that the first semiconductor module and the second semiconductor module are electrically connected.

[0041] Optionally, the outer surface of the semiconductor module with the connection end is further provided with a third connector, the third connector further includes a second terminal, and the conductive element further includes an eighth conductive element. The eighth conductive element is disposed along the third direction, one end of the eighth conductive element is electrically connected to the fourth connector, and the other end of the eighth conductive element is electrically connected to the second terminal. The second terminal is used for inputting or outputting AC power.

[0042] Optionally, the third connector further includes a third terminal, and the conductive element further includes a ninth conductive element. The ninth conductive element is disposed along the third direction, one end of the ninth conductive element is electrically connected to the metal element in the first semiconductor module, and the other end of the ninth conductive element is electrically connected to the third terminal. The third terminal is adapted to be electrically connected to the positive terminal of an external power source.

[0043] Optionally, the plurality of connectors further includes a fifth connector, which is flush with the fourth connector along the third direction. The conductive element further includes a tenth conductive element and an eleventh conductive element disposed along the third direction. The third connector further includes a fourth terminal. One end of the tenth conductive element is electrically connected to the third pin of the semiconductor device in the second semiconductor module, and the other end of the tenth conductive element is electrically connected to the fifth connector. One end of the eleventh conductive element is electrically connected to the fifth connector, and the other end of the eleventh conductive element is electrically connected to the fourth terminal, which is adapted to be electrically connected to the negative terminal of an external power supply.

[0044] Optionally, along the third direction, the plurality of connectors in the first semiconductor module correspond one-to-one with the plurality of connectors in the second semiconductor module; the plurality of insulating layers in the first semiconductor module correspond one-to-one with the plurality of insulating layers in the second semiconductor module.

[0045] Optionally, the third terminal and the fourth terminal are located on the same side of the outer surface of the integrated module.

[0046] Thirdly, this application also proposes an electronic control device, comprising: a semiconductor module as described in any of the preceding claims, or an integrated module as described in any of the preceding claims.

[0047] Fourthly, this application also proposes a vehicle comprising: a semiconductor module as described in any of the preceding claims, or an integrated module as described in any of the preceding claims, or an electronic control device as described in the preceding claims.

[0048] In the embodiments of this application, the semiconductor module includes at least two sets of semiconductor units and a connection terminal. Each set of semiconductor units includes at least one semiconductor device, and both sets of semiconductor units are connected to the connection terminal. This allows at least two sets of semiconductor units to share a single connection terminal, simplifying the structure and improving the integration density of the semiconductor module. Furthermore, the fact that at least two sets of semiconductor units transmit signals through a single connection terminal reduces stray inductance and enhances the overall performance of the semiconductor module.

[0049] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0050] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0051] Figure 1 This is a schematic diagram of a semiconductor module according to an embodiment of this application;

[0052] Figure 2 This is a schematic diagram of another semiconductor module according to an embodiment of this application;

[0053] Figure 3 This is a schematic diagram of the installation of the testing component according to an embodiment of this application;

[0054] Figure 4 This is a schematic diagram of a first type of semiconductor module according to an embodiment of this application;

[0055] Figure 5 This is a schematic diagram of a second type of semiconductor module according to an embodiment of this application;

[0056] Figure 6 This is a schematic diagram of a third type of semiconductor module according to an embodiment of this application;

[0057] Figure 7 This is a schematic diagram of a fourth type of semiconductor module according to an embodiment of this application;

[0058] Figure 8 This is a schematic diagram of a fifth type of semiconductor module according to an embodiment of this application;

[0059] Figure 9 This is a schematic diagram of a sixth type of semiconductor module according to an embodiment of this application;

[0060] Figure 10 This is a schematic diagram of a semiconductor device according to an embodiment of this application;

[0061] Figure 11 This is a schematic diagram of an integrated module according to an embodiment of this application;

[0062] Figure 12 This is an exploded view of the integrated module according to an embodiment of this application;

[0063] Figure 13 This is a cross-sectional view of an integrated module according to an embodiment of this application;

[0064] Figure 14 This is a cross-sectional view of an integrated module according to another embodiment of this application;

[0065] Figure 15 This is an assembly diagram of a semiconductor device according to an embodiment of this application;

[0066] Figure 16 This is an installation diagram of the fourth connector according to an embodiment of this application;

[0067] Figure 17 This is an installation schematic diagram of the first connector according to an embodiment of this application;

[0068] Figure 18This is an installation diagram of the first connector according to another embodiment of this application;

[0069] Figure 19 This is an installation diagram of the second connector according to one embodiment of this application;

[0070] Figure 20 This is an installation diagram of the second connector according to another embodiment of this application;

[0071] Figure 21 This is an installation diagram of the connecting end and the third connecting member according to an embodiment of this application.

[0072] Figure label:

[0073] 1: Semiconductor unit; 11: Semiconductor device; 110: First group of pins; 111: First pin; 112: Second pin; 113: Third pin; 114: Second group of pins; 115: First side; 116: Second side; 2: Connection terminal; 21: First connection terminal; 22: Second connection terminal; 3: Connector; 30: Electrical connection terminal; 31: First connector; 32: Second connector; 33: Third connector; 331: First terminal; 332: Second terminal; 333: Third terminal; 334: Fourth terminal; 34: Fourth connector; 35: Fifth connector; 36: Connection area; 4: Insulating layer; 41: First insulating layer; 42: Second insulating layer; 43: Third insulating layer; 44: Fourth insulating layer; 5: Conductive element; 501: First conductive element Electrical components; 502: Second conductive component; 503: Third conductive component; 504: Fourth conductive component; 505: Fifth conductive component; 506: Sixth conductive component; 507: Seventh conductive component; 508: Eighth conductive component; 509: Ninth conductive component; 510: Tenth conductive component; 511: Eleventh conductive component; 6: Metal component; 61: First mounting slot; 62: Second mounting slot; 7: Detection component; 81: First insulating component; 82: Second insulating component; 821: Third mounting slot; 83: Third insulating component; 9: Substrate; 91: Aluminum plate; 92: Thermally conductive insulating layer; 93: Copper layer; 100: Semiconductor module; 100a: First semiconductor module; 100b: Second semiconductor module; 101: Coating layer; X: First direction; Y: Second direction; Z: Third direction. Detailed Implementation

[0074] The embodiments of this application will now be described in detail. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0075] The terms "first" and "second" in the specification and claims of this application may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise stated, "multiple" means two or more. Furthermore, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0076] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0077] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0078] The following description, in conjunction with the accompanying drawings, details a semiconductor module, integrated module, electronic control device, and vehicle provided in this application through specific embodiments and application scenarios.

[0079] like Figures 1 to 10 As shown, a semiconductor module 100 according to some embodiments of this application includes: at least two sets of semiconductor units 1 and a connection terminal 2, each set of semiconductor units 1 including at least one semiconductor device 11, and at least two sets of semiconductor units 1 are connected to the connection terminal 2.

[0080] In this embodiment, at least two sets of semiconductor units 1 share a common connection terminal 2, which simplifies the structure and improves the integration of the semiconductor module 100. At the same time, at least two sets of semiconductor units 1 transmit signals through a connection terminal 2, which can reduce stray inductance and improve the overall performance of the semiconductor module 100.

[0081] In specific applications, the semiconductor module 100 can be any one of a half-bridge module, a full-bridge module, a three-phase bridge module, a multi-level module, etc. For example, the semiconductor module 100 is a half-bridge module that can be used to switch the power supply; or the semiconductor module 100 is a full-bridge module that can be used in the power module of a vehicle to convert current, etc. Those skilled in the art can choose according to actual needs, and this application does not limit it.

[0082] It should be noted that the semiconductor device 11 can specifically refer to an electronic component that uses the electrical properties of semiconductor materials (such as silicon, silicon carbide, etc.) to achieve a specific function. In this application, the semiconductor device 11 refers to an electronic device having a semiconductor substrate and a trench gate formed on the semiconductor substrate to achieve a certain function, including any one of the following: chip, MOSFET, transistor, thyristor, IGBT (Insulated Gate Bipolar Transistor), etc. Those skilled in the art can set it according to actual needs, and this application does not limit it.

[0083] Preferably, the semiconductor device 11 is a SiC chip, which is smaller in size, faster in response, and more resistant to high temperatures.

[0084] In specific applications, each group of semiconductor units 1 includes at least one semiconductor device 11, which can be any number of 1, 2, 3, 4, 5, 6, 7, 8, etc. Those skilled in the art can set it according to actual needs, and this application does not limit it.

[0085] It should be noted that connection terminal 2 specifically refers to the terminal located on the outer periphery of the semiconductor module that can be connected to external circuits, such as: high-voltage AC terminal, DC positive terminal, DC negative terminal, control signal terminal, etc.

[0086] like Figures 1 to 10 As shown, in some embodiments of this application, the conductive paths from the connection terminal 2 to each group of semiconductor units 1 are equal.

[0087] In this embodiment, by setting the conductive path from the connection terminal 2 to each group of semiconductor units 1 to be equal, the response time of each group of semiconductor units 1 is the same when the connection terminal 2 sends or receives electrical signals from each group of semiconductor units 1, thereby reducing the delay of the semiconductor module 100 and improving the performance of the semiconductor module 100.

[0088] In practical applications, the conductive path from connector 2 to each group of semiconductor units 1 specifically refers to the current flow path between connector 2 and each group of semiconductor units 1. When semiconductor units 1 and connector 2 are on the same layer, the conductive path includes the current flow path within the layer. When semiconductor units 1 and connector 2 are on different layers, the conductive path includes the sum of the current flow path within the layer and the current flow path in the thickness direction of semiconductor module 100; or the conductive path includes the current flow path within the layer, which can be within one layer or multiple layers, depending on the specific circumstances in actual use.

[0089] like Figures 4 to 9 as well as Figures 15 to 20 As shown, in some embodiments of this application, at least two sets of semiconductor units 1 are symmetrically arranged.

[0090] In this embodiment, by symmetrically arranging at least two sets of semiconductor units 1, the conductive paths from the connection terminal 2 to each set of semiconductor units 1 can be made approximately equal, thereby making the response time of each set of semiconductor units 1 approximately the same, reducing the delay of the semiconductor module 100 and improving the performance of the semiconductor module 100; at the same time, the symmetrical arrangement can reduce the current loop inductance of at least two sets of semiconductor units 1.

[0091] In specific applications, at least two sets of semiconductor units 1 are symmetrically arranged. Specifically, at least two sets of semiconductor units 1 can be symmetrically arranged along the length direction of the semiconductor module 100, or at least two sets of semiconductor units 1 can be symmetrically arranged along the width direction of the semiconductor module 100, or at least two sets of semiconductor units 1 can be centrally symmetrically arranged with respect to the geometric center of the semiconductor module 100. Those skilled in the art can make the arrangement according to actual needs, and this application does not limit it.

[0092] In specific applications, at least two semiconductor devices 11 in the same group of semiconductor units 1 are arranged with their pin ends facing each other, thereby making the conductive path between each semiconductor device 11 and the connection terminal 2 shorter and improving the response speed of the semiconductor module 100.

[0093] like Figures 4 to 9 as well as Figures 15 to 20 As shown, in some embodiments of this application, at least two sets of semiconductor units 1 are symmetrically arranged relative to the connection end 2.

[0094] In this embodiment, by symmetrically arranging at least two sets of semiconductor units 1 relative to the connection terminal 2, the conductive paths from the connection terminal 2 to each set of semiconductor units 1 are equal, thereby making the response time of each set of semiconductor units 1 the same, reducing the delay of the semiconductor module 100 and improving the performance of the semiconductor module 100.

[0095] In specific applications, at least two sets of semiconductor units 1 are arranged axially symmetrically or centrally symmetrically with respect to the connection end 2. It should be noted that the at least two sets of semiconductor units 1 can be arranged symmetrically with respect to the connection end 2 itself, or they can be arranged symmetrically with respect to the projection of the connection end 2 in the thickness direction of the semiconductor module 100.

[0096] like Figures 4 to 9 as well as Figures 15 to 20 As shown, in some embodiments of this application, at least two sets of semiconductor units 1 are symmetrical along a first direction X or a second direction Y, and the first direction X intersects the second direction Y.

[0097] In this embodiment, by making the two sets of semiconductor units 1 symmetrical along the first direction X or the second direction Y, the conductive paths from each set of semiconductor units 1 to the connection terminal 2 can be made approximately equal, that is, the response time of each set of semiconductor units 1 is the same, thereby reducing the delay of the semiconductor module 100 and improving the overall performance of the semiconductor module 100.

[0098] In specific applications, such as Figure 4 , Figure 6 , Figure 8 , Figure 9 , Figure 18 and Figure 20 As shown, the area within the dashed box represents a group of semiconductor units 1, and the two groups of semiconductor units 1 are symmetrical along the first direction X; as Figure 5 , Figure 7 , Figure 8 , Figure 9 and Figure 19 As shown, the two sets of semiconductor units 1 are symmetrical along the second direction Y.

[0099] It should be noted that in this application, the first direction X is the length direction of the semiconductor module 100, the second direction Y is the width direction of the semiconductor module 100, and the third direction Z is the thickness direction of the semiconductor module 100, which will not be elaborated further.

[0100] like Figure 6 and Figure 7 As shown, in some embodiments of this application, each group of semiconductor units 1 includes at least two semiconductor devices 11, and at least two semiconductor devices 11 in the same group are symmetrical along the first direction X or the second direction Y axis.

[0101] In this embodiment of the application, by symmetrically arranging two semiconductor devices 11 in the same group along the first direction X or the second direction Y, the paths from the two semiconductor devices 11 in the same group to the connection terminal 2 can be made to be nearly equal, and the response time of each semiconductor device 11 is the same, thereby reducing the delay of the semiconductor module 100 and improving the overall performance of the semiconductor module 100.

[0102] In specific applications, such as Figure 6 As shown, two semiconductor devices 11 in the same group are symmetrically arranged along the second direction Y, such as... Figure 7 As shown, two semiconductor devices 11 in the same group are symmetrically arranged along the first direction.

[0103] It should be noted that, as Figure 17 As shown, multiple semiconductor devices 11 in a semiconductor module 100 (semiconductor module 100b) are symmetrical along a first direction X; multiple semiconductor devices 11 in a semiconductor module 100 (semiconductor module 100a) are symmetrical along a second direction Y, forming two semiconductor units 1 symmetrical along the second direction Y. The two semiconductor devices 11 symmetrically arranged in the same group have one end of their pins facing each other, so that the conductive path from each semiconductor device 11 to the connection terminal 2 is equal and the conductive path is relatively shorter, so that each semiconductor device 11 receives signals faster, that is, the response time is shorter.

[0104] like Figure 8 and Figure 9 As shown, in some embodiments of this application, each group of semiconductor units 1 includes four semiconductor devices 11, and the four semiconductor devices 11 in the same group are symmetrical along the first direction X or the second direction Y axis.

[0105] In this embodiment, by setting the four semiconductor devices 11 in the same group to be symmetrical along the first direction X or the second direction Y, the conductive paths from the four semiconductor devices 11 in the same group to the connection terminal 2 can be made to be nearly equal, thereby making the response time of the four semiconductor devices 11 in the same group the same; at the same time, it can make the local area of ​​the semiconductor device 11 more regular, which is beneficial to subsequent wiring; and reduce the processing time of the semiconductor module 100.

[0106] In specific applications, such as Figure 8 As shown, four semiconductor devices 11 in the same group are symmetrically arranged along the first direction X; as Figure 9 As shown, the four semiconductor devices 11 in the same group are symmetrically arranged along the second direction Y.

[0107] It should be noted that, as Figure 18As shown, multiple semiconductor devices 11 in a semiconductor module 100 (semiconductor module 100b) are symmetrical along the second direction Y to form two semiconductor units 1 symmetrical along the second direction Y; multiple semiconductor devices 11 in a semiconductor module 100 (semiconductor module 100a) are symmetrical along the second direction Y to form two semiconductor units 1 symmetrical along the second direction Y, and the two semiconductor devices 11 symmetrically arranged in the same group have one end of their pins facing each other, so that the conductive path from each semiconductor device 11 to the connection terminal 2 is equal and the conductive path is relatively shorter, so that each semiconductor device 11 receives signals faster, that is, the response time is shorter.

[0108] like Figures 12 to 21 As shown, in some embodiments of this application, the semiconductor module 100 further includes a connector 3, which is electrically connected to the semiconductor unit 1, and the connector 3 has an I-shaped structure.

[0109] In this embodiment of the application, by setting the connector 3, which is electrically connected to the semiconductor unit 1, to have an I-shaped structure, the I-shaped structure can be electrically connected to each semiconductor device 11 in the semiconductor unit 1, thereby making the conductive path of each semiconductor device 11 in the connector 3 equal.

[0110] In specific applications, connector 3 is a layer through which multiple different currents flow along the thickness direction in the packaging structure of a semiconductor module. Connector 3 can be determined according to the specific layout shape of the semiconductor unit 1 in the layer, so that the conductive path of each semiconductor device 11 is equal.

[0111] like Figure 1 , Figure 2 , Figure 3 , Figures 12 to 20 As shown, in some embodiments of this application, the semiconductor module 100 further includes a connector 3, which has at least two electrical connection terminals 30. Each electrical connection terminal 30 is electrically connected to a group of semiconductor units 1. The connector 3 is electrically connected to a connection terminal 2, and the at least two electrical connection terminals 30 are symmetrically arranged.

[0112] In this embodiment, by setting at least two electrical connection ends 30 of the connector 3 that are electrically connected to the connection end 2 to be symmetrical, the conductive path from the connection end 2 to each group of semiconductor units 1 can be set to be the same, so that the response time of each group of semiconductor units 1 is the same, thereby improving the overall performance of the semiconductor module 100; at the same time, it is convenient to lay out the semiconductor devices 11, making the semiconductor module 100 more regular and beautiful.

[0113] It should be noted that, in specific use, connector 3 refers to a metal line or other conductive structure that connects each group of semiconductor units 1 to the connector 2. Connector 3 can form a connection with the semiconductor device 11 in each group of semiconductor units 1 so as to connect each semiconductor device 11 to the outside world.

[0114] Understandably, electrical connection terminal 30 specifically refers to one end connected to each group of semiconductor units 1, and each electrical connection terminal 30 is simultaneously connected to each semiconductor device 11 in a group of semiconductor units 1.

[0115] like Figures 12 to 20 As shown, in some embodiments of this application, the connector 3 has a connection area 36, ​​which is electrically connected to the connection end 2. Each group of semiconductor units 1 is connected to the connection area 36, ​​and the conductive paths of the connection area 36 and each group of semiconductor units 1 are equal.

[0116] In this embodiment, the connector 3 is provided with a connection area 36, ​​which is electrically connected to the connection end 2, thereby forming a conductive path of semiconductor device 11 - electrical connection end 30 - connection area 36 - connection end 2. The connection area 36 is equal to the conductive path of each group of semiconductor units 1, thereby making the response time of each group of semiconductor units 1 the same, which can reduce the delay of semiconductor module 100 and improve the performance of semiconductor module 100.

[0117] It should be noted that the connection area 36 is the common connection area on the connector 3 with each electrical connection terminal 30. The connection area 36 is connected to the connection terminal 2, so that the connection area 36 transmits the current signal transmitted by the connection terminal 2 to each semiconductor device 11 through the electrical connection terminal 30. In actual use, the connection area 36 is the geometric center of the connector 3, such as... Figures 17 to 20 As shown in the connection area 36, ​​in the stacked packaged circuit structure, the connection terminal 2 is the external connection terminal of the semiconductor module 100. The orthographic projection of the connection area 36 and the connection terminal 2 along the thickness direction of the semiconductor module 100 coincides, thereby making the conductive path from each semiconductor device 11 to the connection terminal 2 shorter, and further reducing the response time of the semiconductor module 100.

[0118] like Figures 12 to 20 As shown, in some embodiments of this application, each semiconductor device 11 is connected to the connection region 36, and the conductive paths between the connection region 36 and each semiconductor device 11 are all equal.

[0119] In this embodiment, by setting the conductive path between the connection area 36 and each semiconductor device 11 to be equal, the current signal of each semiconductor device 11 can flow to the connection terminal 2 in the same time, that is, the response time of each semiconductor device 11 is the same. Since there are multiple semiconductor devices 11 in the semiconductor module 100 at the same time, and the response time of each semiconductor device 11 is the same, the overall response speed of the semiconductor module 100 can be improved and the response delay of the semiconductor module 100 can be reduced.

[0120] It should be noted that, as Figure 20 As shown, the connection area 36 can actually be set at the geometric center of the connector 3. The connection area 36 is electrically connected to the connection end 2. Since the two sets of semiconductor units 1 arranged opposite each other on the left and right sides are symmetrically arranged, the conductive path from the connection area 36 to each electrical connection end 30 is the same. At the same time, since the multiple semiconductor devices 11 in each set of semiconductor units 1 are symmetrically arranged, the conductive path from the connection area 36 to each semiconductor device 11 is the same. This makes the path of "semiconductor device 11-electrical connection end 30-connection area 36-connection end 2" of each semiconductor device 11 equal.

[0121] like Figures 12 to 20 As shown, in some embodiments of this application, the connector 3 has an axisymmetric structure.

[0122] In this embodiment of the application, by setting the connector 3 as an axisymmetric structure, the paths between at least two electrical connection ends 30 of the connector 3 and the connection area 36 are the same, thereby making the paths of "semiconductor device 11-electrical connection end 30-connection area 36-connection end 2" nearly equal, and making the response time of each semiconductor device 11 the same.

[0123] For example, such as Figure 18 As shown, the first connector 31 in connector 3 has two opposing I-shaped structures, each I-shaped structure forming an electrical connection terminal 30, thereby connecting each semiconductor device 11 in each group of semiconductor units 1 in parallel and leading it out through a connection terminal 2 to be electrically connected to an external circuit; this makes each semiconductor device 11 have a shorter conductive path while the conductive paths can approach equal, thereby making the signal reception time of each semiconductor device 11 in semiconductor module 100 approach the same, which improves the response speed of semiconductor module 100.

[0124] like Figure 10 , Figures 17 to 21As shown, in some embodiments of this application, a first set of pins 110 is provided, which is electrically connected to the connection terminal 2; the first set of pins 110 is located on the first side 115 of the semiconductor device 11, and the first sides 115 of at least two semiconductor devices 11 in the same group of semiconductor units 1 are arranged opposite to each other.

[0125] In this embodiment, the first set of pins 110 electrically connected to the connection terminal 2 is located on the first side 115 of the semiconductor device 11. The first sides 115 of at least two semiconductor devices 11 in the same group of semiconductor units 1 are arranged opposite to each other, so that the conductive paths between the first set of pins 110 of at least two semiconductor devices 11 and the connection terminal 2 are equal, and the opposite arrangement can make the conductive path shorter.

[0126] It should be explained that at least two semiconductor devices 11 have their first sides 115 arranged opposite each other, specifically as follows: Figure 6 As shown, the two semiconductor devices 11 are closest to each other at the ends where the first set of pins 110 are located, that is, the first sides 115 of the two semiconductor devices 11 are "tightly attached".

[0127] It should be noted that the semiconductor device 11 may have multiple pins, each of which is electrically connected to a different connection terminal 2, thereby forming different connection paths. For example, the semiconductor device 11 may have three pins. For example, the semiconductor device 11 is a field-effect transistor, and the three pins are the gate, the source, and the Kelvin source; or the semiconductor device 11 is an IGBT, and the three pins are the gate, the source, and the drain.

[0128] In specific applications, the first set of pins 110 can include a first pin 111 (gate) and a second pin 112 (Kelvin source), thereby forming two control signal lines with similar paths. This allows the two control signal lines to be set to be parallel to each other, reducing mutual interference and shortening the conductive path of each control signal line.

[0129] It also includes the second set of pins 114, which includes the third pin 113 (source), and can form a different circuit with the signal control circuit.

[0130] like Figure 10 , Figures 15 to 21 As shown, in some embodiments of this application, the semiconductor device 11 also has a second set of pins 114, which are located on a second side 116 of the semiconductor device 11, and the second side 116 is different from the first side 115.

[0131] In some embodiments of this application, by providing a second set of pins 114 on a second side 116 different from the first side 115, the pins on the semiconductor device 11 can be flexibly arranged, while ensuring that the conductive paths of each pin are as equal and short as possible.

[0132] In specific applications, the second side 116 and the first side 115 can be adjacent or opposite each other. Those skilled in the art can make such a setting according to actual needs, and this application does not impose any restrictions on this.

[0133] It should be noted that the first set of pins 110 is specifically used as signal control pins. When they are set on the same side, it is convenient to make the signal control lines the same path to improve the response speed of the semiconductor device 11. At the same time, it is convenient to make the signal control lines parallel to eliminate the noise in the lines.

[0134] like Figure 10 As shown, in some embodiments of this application, the first side 115 and the second side 116 are arranged opposite to each other.

[0135] In this embodiment, by setting the first side 115 and the second side 116 to be opposite each other, it is convenient to lay out the pins of the semiconductor device 11. At the same time, it is convenient to plan the conductive paths corresponding to different functional pins in the semiconductor module 100, reduce stray inductance in the semiconductor module 100, and improve the overall performance of the semiconductor module 100.

[0136] like Figure 1 , Figure 2 , Figure 3 , Figure 11 , Figure 12 , Figure 13 and Figure 14 As shown, in some embodiments of this application, the semiconductor module 100 further includes a plurality of connectors 3, a plurality of insulating layers 4, and conductive elements 5; along the third direction Z, the plurality of connectors 3 and the plurality of insulating layers 4 are alternately stacked and disposed on one side of the semiconductor unit 1; the semiconductor unit 1 is adjacent to the insulating layer 4; the conductive elements 5 are disposed in the insulating layer 4, and the outer surface of the semiconductor module 100 along the third direction Z is provided with a connection end 2, which is electrically connected to the connectors 3.

[0137] In this embodiment, the semiconductor module 100 can form a vertically interconnected or three-dimensionally stacked semiconductor module 100 by multiple connectors 3 and multiple insulating layers 4 and conductive elements 5 stacked along the third direction Z layer. This can shorten the current path and reduce parasitic inductance. At the same time, the insulating layer 4 between two adjacent connectors 3 can reduce parasitic capacitance. It also has a higher degree of integration and a smaller size.

[0138] It should be noted that, as Figure 1 , Figure 2 , Figure 11 , Figure 12 , Figure 13 and Figure 14 As shown, the conductive element 5 is disposed in the insulating layer 4, thereby electrically connecting the semiconductor unit 1 and the connector 3 together, or electrically connecting the connectors 3 on both sides of the insulating layer 4 together, or connecting the connector 2 and the connector 3 together along the third direction Z, or connecting the semiconductor unit 1 and the connector 2 together. In other words, the conductive element 5 can form a conductive path in the third direction Z, thereby making the conductive path of the overall semiconductor module 100 shorter.

[0139] Understandably, the conductive element 5 can be a via, a metal connector, a wire, or other structures that can achieve electrical connection. Those skilled in the art can make the settings according to actual needs, and this application does not impose any restrictions on this.

[0140] Preferably, the conductive element 5 is a via, which makes the entire circuit structure simpler and easier to process, while reducing stray inductance in the semiconductor module 100.

[0141] It's important to note that a "via" refers to a hole drilled in a circuit board to allow the transmission of electrical signals and current between different layers. These holes allow wires to connect to different layers of the circuit board or module, serving to connect internal circuitry. In the specific manufacturing process, a via is formed by laser drilling through the insulating layer and then filling it with copper.

[0142] Vias can take the following forms:

[0143] Through Hole: A hole that runs through the entire thickness of a circuit board or module, allowing connection between all layers of the circuit board. It is commonly used for inserting components and transmitting signals.

[0144] Blind Via: Connects an outer layer to an inner layer without passing through the entire circuit board or module. It is often used in multilayer circuit boards or modules to save space and reduce signal delay.

[0145] Buried Via: A hole that connects two layers without reaching the outer layer. It is mainly used in multilayer boards to help improve wiring density.

[0146] Compared with related technologies, this application replaces the wire bonding process by using laminated packaging and conductive parts 5 in the thickness direction for electrical connection, which not only reduces the volume of the semiconductor module 100, but also increases the power density of the semiconductor module 100.

[0147] like Figure 1 , Figure 2 , Figure 13 and Figure 14As shown, in some embodiments of this application, the first set of pins 110 includes a first pin 111, the plurality of connectors 3 include a first connector 31, the first connector 31 is disposed on one side of the semiconductor unit 1 along the third direction Z; the plurality of insulating layers 4 include a first insulating layer 41, the first insulating layer 41 is disposed between the semiconductor unit 1 and the first connector 31; the conductive element 5 includes a first conductive element 501, the first conductive element 501 is disposed in the first insulating layer 41 along the third direction Z, one end of the first conductive element 501 is electrically connected to the first pin 111, and the other end of the first conductive element 501 is electrically connected to the first connector 31.

[0148] In this embodiment, one end of the first conductive element 501 is electrically connected to the first pin 111, and the other end of the first conductive element 501 is electrically connected to the first connector 31, thereby connecting the first pin 111 to the circuit. The first pins 111 of multiple semiconductor devices 11 are electrically connected by stacking, which facilitates internal wiring, reduces the size of the semiconductor module 100, and reduces stray inductance in the circuit.

[0149] In specific applications, the first connector 31 is specifically a copper layer, which reduces the size while enabling electrical connection. It should be noted that the first connector 31 is used in the signal circuit, mainly to transmit the signal from the first pin 111 of the semiconductor device 11 to the connection terminal 2, and then to the external circuit.

[0150] It should be noted that when semiconductor device 11 is a field-effect transistor (FET) or IGBT, the first pin 111 specifically refers to the gate, which is the port that controls the chip's on and off states. In MOSFETs and IGBTs, the gate controls the conduction between the source and drain by applying a voltage. The level of the gate voltage determines the state of semiconductor device 11. The gate current is relatively small, so a low-power signal can be used to control a high-power current.

[0151] like Figure 1 , Figure 2 , Figure 13 and Figure 14 As shown, in some embodiments of this application, the first set of pins 110 further includes a second pin 112, and the plurality of connectors 3 further includes a second connector 32, which is disposed on the side of the first connector 31 away from the semiconductor unit 1; the plurality of insulating layers 4 include a second insulating layer 42, which is disposed between the first connector 31 and the second connector 32; the conductive element 5 includes a second conductive element 502, which is disposed in the first insulating layer 41 and the second insulating layer 42 along a third direction Z, one end of the second conductive element 502 is electrically connected to the second pin 112, and the other end of the second conductive element 502 is electrically connected to the second connector 32.

[0152] In this embodiment, one end of the second conductive element 502 is electrically connected to the second pin 112, and the other end of the second conductive element 502 is electrically connected to the second connector 32, thereby connecting the second pin 112 to the circuit. The second pins 112 of multiple semiconductor devices 11 are electrically connected by stacking, which facilitates internal wiring, reduces the size of the semiconductor module 100, and reduces stray inductance in the circuit.

[0153] In specific applications, the second connector 32 is a copper layer, which reduces the size while enabling electrical connection. It should be noted that the second connector 32 is used in the signal loop, mainly to transmit the signal from the second pin 112 of the semiconductor device 11 to the connection terminal 2, and then to the external circuit.

[0154] It should be noted that when semiconductor device 11 is a field-effect transistor (FET) or IGBT, the second pin 112 specifically refers to the Kelvin source or drain. A Kelvin source is a special source connection method that typically uses separate leads to reduce the impact of test or drive current on chip performance. In applications requiring high-precision measurement or high frequency, Kelvin connections can reduce noise introduced by ground resistance and current loops, playing a crucial role in improving system accuracy and response speed.

[0155] like Figures 16 to 20 As shown in some embodiments of this application, each semiconductor device 11 is provided with a first pin 111 and a second pin 112. The semiconductor module 100 also includes a connector 3, which includes a first connector 31 and a second connector 32. The first pin 111 is electrically connected to the first connector 31, and the second pin 112 is electrically connected to the second connector 32. The first pin 111 and the second pin 112 are disposed at the same end of the semiconductor device 11. The orthographic projection of the second connector 32 along the third direction Z at least partially overlaps with the orthographic projection of the first connector 31 along the third direction Z.

[0156] In this embodiment, by setting the orthographic projection of the second connector 32 along the third direction Z to at least partially overlap with the orthographic projection of the first connector 31 along the third direction Z, it is possible to reduce mutual signal interference and stray inductance.

[0157] It should be explained that the first pin 111 and the second pin 112 are located at the same end of the semiconductor device 11, so that the conductive paths formed by the first pin 111 and the second pin 112 of multiple semiconductor devices 11 are nearly identical. This allows the first connector 31 and the second connector 32 to be made similar. Thus, when the first connector 31 and the second connector 32 are placed on different layers, the connection requirements are met on the one hand, and mutual signal interference and stray inductance are reduced on the other hand.

[0158] In practical applications, the third direction Z specifically refers to the stacking direction of each layer, that is, the thickness direction of the semiconductor module 100.

[0159] It should be explained that the orthographic projection overlap can be complete or partial. In actual use, the current path in the second connector 32 is parallel to the current path in the first connector 31, which can reduce mutual signal interference and stray inductance.

[0160] like Figure 1 , Figure 2 , Figure 11 , Figure 12 , Figure 13 , Figure 14 and Figure 21 As shown, in some embodiments of this application, the connecting end 2 is disposed on the side of the second connector 32 away from the first connector 31, and the connecting end 2 includes a first connecting end 21 and a second connecting end 22 disposed at intervals; the plurality of insulating layers 4 also include a third insulating layer 43, which is disposed between the second connector 32 and the connecting end 2;

[0161] The conductive element 5 also includes a third conductive element 503 and a fourth conductive element 504. The third conductive element 503 is disposed in the second insulating layer 42 and the third insulating layer 43 along the third direction Z. One end of the third conductive element 503 is electrically connected to the first connector 31, and the other end of the third conductive element 503 is electrically connected to the first connection terminal 21, which is adapted to be connected to the driver. The fourth conductive element 504 is disposed in the third insulating layer 43 along the third direction Z. One end of the fourth conductive element 504 is electrically connected to the second connector 32, and the other end of the fourth conductive element 504 is electrically connected to the second connection terminal 22, which is adapted to be grounded to the driver.

[0162] In this embodiment, the first pin 111 of the semiconductor device 11 is electrically connected to the first connection terminal 21 via the first conductive element 501, the first connector 31, and the third conductive element 503, and then connected to the driver. In this way, the driver can send a drive current signal to the semiconductor device 11 through the above-mentioned conductive path, thereby controlling the operation of the semiconductor module 100. The second pin 112 of the semiconductor device 11 is electrically connected to the first connection terminal 21 via the second conductive element 502, the second connector 32, and the fourth conductive element 504, and then connected to the ground of the driver. This can reduce the noise introduced by the ground resistance and current echo when the driver controls the semiconductor module 100, and improve the accuracy and response speed of the semiconductor module 100. At the same time, it can shorten the conductive path, thereby reducing the delay of the semiconductor module 100.

[0163] like Figure 1 , Figure 2 , Figure 12 , Figure 13 and Figure 14 As shown, in some embodiments of this application, the semiconductor module 100 further includes a metal element 6, which is disposed on the side of the semiconductor unit 1 away from the first connector 31, and each semiconductor device 11 is electrically connected to the metal element 6.

[0164] In this embodiment, the heat from the semiconductor unit 1 can be transferred to the metal component 6, thereby improving the heat dissipation capability of the semiconductor module.

[0165] It should be explained that the metal part 6 is specifically a copper block with a certain thickness (e.g., 0.5mm to 1.5mm), which increases the specific heat capacity of the semiconductor module 100, can quickly conduct the heat generated by the semiconductor unit 1 to the copper block, reduce the temperature of the semiconductor unit 1, and improve the reliability and service life of the integrated module.

[0166] like Figure 2 and Figure 14 As shown, in some embodiments of this application, the metal part 6 is provided with a first mounting groove 61 on the side facing the semiconductor unit 1, and each semiconductor device 11 is disposed in the first mounting groove 61, and the semiconductor device 11 is electrically connected to the bottom of the first mounting groove 61.

[0167] In some embodiments of this application, the metal part 6 is provided with a first mounting groove 61 on the side facing the semiconductor unit 1, the semiconductor unit 1 is disposed in the first mounting groove 61, and one side surface of the semiconductor device 11 is flush with the groove opening of the first mounting groove 61. This ensures that the semiconductor unit 1 will not be directly subjected to force in the subsequent lamination process, thus ensuring that the quality of the semiconductor device 11 is not affected by the processing and improving the reliability of the semiconductor module 100.

[0168] In a specific application, one side surface of the semiconductor device 11 is flush with the opening of the first mounting groove 61. In other words, the thickness of the semiconductor device 11 is less than or equal to the depth of the first mounting groove 61, so that when the semiconductor device 11 is installed in the first mounting groove 61, it will not be exposed to the metal part 6.

[0169] like Figure 3 As shown, in some embodiments of this application, the semiconductor module 100 further includes a detection element 7. A second mounting groove 62 is provided on the side of the metal part 6 facing the semiconductor unit 1. The detection element 7 is disposed in the second mounting groove 62 and is used to detect the temperature of the semiconductor unit 1.

[0170] In this embodiment of the application, by setting a detection element 7 in the second mounting groove 62 of the metal part 6, the temperature of the semiconductor unit 1 can be monitored in real time, thereby determining the working status of the semiconductor unit 1 and improving the safety of the semiconductor module 100.

[0171] In specific applications, the detection element 7 can be at least one of thermistors, optocouplers, and gas sensing components. Those skilled in the art can configure it according to actual needs, and this application does not impose any restrictions on it.

[0172] Preferably, the detection element 7 is a thermistor, so that the temperature of the semiconductor unit 1 can be detected more accurately.

[0173] Specifically, the thickness of the test piece 7 is less than or equal to the depth of the second mounting groove 62, thereby preventing the test piece 7 from being damaged by external forces during the subsequent lamination process.

[0174] like Figure 3 As shown, in some embodiments of this application, the semiconductor module 100 further includes a first insulating member 81, which is disposed between the wall of the second mounting groove 62 and the detection member 7.

[0175] In this embodiment, the detection element 7 is installed in the second mounting groove 62 and abuts or is fixedly connected to the bottom of the second mounting groove 62. The first insulating element 81 provides insulation between the detection element 7 and the second mounting groove 62.

[0176] Understandably, the material of the first insulating element 81 can be: insulating varnish, insulating adhesive; fiber products; rubber, plastics and their products; glass, ceramic products; mica, asbestos and their products, etc. Those skilled in the art can make such settings according to actual needs, and this application does not impose any restrictions on them.

[0177] like Figure 3 , Figure 11 , Figures 15 to 21 As shown, in some embodiments of this application, the outer surface of the semiconductor module 100 with the connection terminal 2 is also provided with a third connector 33. The third connector 33 includes a first terminal 331. The conductive element 5 also includes a fifth conductive element 505. The fifth conductive element 505 is disposed in multiple insulating layers 4 along the third direction Z. One end of the fifth conductive element 505 is electrically connected to the detection element 7, and the other end of the fifth conductive element 505 is electrically connected to the first terminal 331.

[0178] In the embodiments of this application, the detection element 7 is connected to the outer surface of the semiconductor module 100 in sequence through the fifth conductive element 505 and the first terminal 331 of the third connector 33, so that it can be connected to the external circuit through the first terminal 331, thereby transmitting the detection signal to the external circuit to monitor the temperature of the semiconductor module 100.

[0179] like Figure 1 , Figure 2 , Figures 12 to 21 As shown, in some embodiments of this application, the semiconductor module 100 further includes a second insulating member 82, which is disposed on the side of the semiconductor unit 1 away from the connector 3. The side of the second insulating member 82 facing the semiconductor unit 1 is provided with a third mounting groove 821, and the metal member 6 is disposed in the third mounting groove 821.

[0180] In this embodiment, a third mounting groove 821 is provided at a distance from the side of the second insulating member 82 away from the substrate 9. The third mounting groove 821 is provided corresponding to the semiconductor unit 1. The metal member 6 is embedded in the third mounting groove 821, which improves the stability of the installation.

[0181] It should be noted that the thickness of the metal part 6 is equal to the depth of the third mounting groove 821, which ensures uniform stress distribution in subsequent lamination processes and a more regular overall layout.

[0182] like Figure 1 , Figure 2 , Figure 3 , Figure 13 and Figure 14 As shown, in some embodiments of this application, the semiconductor module 100 further includes a substrate 9 and a third insulating member 83. The substrate 9 is disposed on one side of the semiconductor unit 1 along the third direction Z, and the third insulating member 83 is disposed between the substrate 9 and the semiconductor unit 1.

[0183] The substrate 9 includes an aluminum plate 91, a thermally conductive insulating layer 92, and a copper layer 93 stacked along the third direction Z. The thermally conductive insulating layer 92 is disposed between the aluminum plate 91 and the copper layer 93, and the copper layer 93 is in contact with the third insulating member 83.

[0184] In this embodiment, the third insulating member 83 provided between the substrate 9 and the metal member 6 can both bond and insulate the two, while also allowing for heat conduction between them.

[0185] In specific applications, the third insulating element 83 contains a prepreg material with adhesive properties, such as FR4 or BT, which facilitates the connection of the substrate 9 to the second insulating element 82.

[0186] In the actual processing, the substrate 9, the third insulating component 83, the second insulating component 82, the metal component 6, and the semiconductor unit 1 are first fused together into a whole through a lamination process, which facilitates subsequent processing.

[0187] In this embodiment, the substrate 9 is an aluminum-based copper-clad laminate, which avoids the risk of cracking of the ceramic copper-clad laminate during the high-temperature and high-pressure lamination process, thereby improving the reliability and service life of the power module.

[0188] In a specific application, the substrate 9 includes an aluminum plate 91, a thermally conductive insulating layer 92, and a copper layer 93 stacked together, with the thermally conductive insulating layer 92 disposed between the aluminum plate 91 and the copper layer 93. The thermally conductive insulating layer 92 is mainly composed of an adhesive organic resin and a highly thermally conductive inorganic filler. The organic resin includes epoxy resin, phenolic resin, polyimide, and polyphenylene ether, etc., while the inorganic filler includes alumina, silicon nitride, aluminum nitride, and magnesium oxide, etc.

[0189] In some embodiments of this application, the semiconductor module 100 further includes a coating layer 101, which is disposed on the outer surface of the semiconductor module 100 to protect the semiconductor module 100.

[0190] In specific applications, coating layer 101 is specifically solder resist ink.

[0191] like Figures 11 to 21 As shown, in some embodiments of this application, an integrated module is also proposed, including two semiconductor modules 100 as described in any of the above embodiments, the two semiconductor modules 100 being electrically connected.

[0192] In this embodiment of the application, the integrated module includes two electrically connected semiconductor modules 100. Since at least two semiconductor units 1 in the semiconductor module 100 share a common connection terminal 2, the structure of the integrated module is simpler, the integration degree of the integrated module is improved, signal delay is reduced, and the overall performance of the integrated module is improved.

[0193] In specific applications, the integrated module can be any of the following: power integrated module (IGBT module), motor drive module, etc. Those skilled in the art can configure it according to actual needs, and this application does not impose any restrictions on it.

[0194] like Figures 11-21 As shown, in some embodiments of this application, the two semiconductor modules 100 include a first semiconductor module 100a and a second semiconductor module 100b arranged at intervals along a first direction X. The semiconductor devices 11 in the first semiconductor module 100a and the semiconductor devices 11 in the second semiconductor module 100b are symmetrical along a second direction Y, and the first direction X intersects the second direction Y.

[0195] In this embodiment, by symmetrically positioning the semiconductor devices 11 in the first semiconductor module 100a and the semiconductor devices 11 in the second semiconductor module 100b along the second direction Y, the circuit within the integrated module becomes more regular, the conductive paths of the signal flow to each semiconductor module 100 are nearly equal, and the conductive paths of each semiconductor module 100 are shorter, thereby achieving nearly equal response times for each semiconductor device 11, thus improving the performance of the integrated module.

[0196] In specific applications, the semiconductor devices 11 in the first semiconductor module 100a and the second semiconductor module 100b can be symmetrical along the first direction X, or symmetrical along the second direction Y, so that the conductive paths of the control signals formed by each group of semiconductor modules 100 are nearly equal and shorter; of course, the semiconductor devices 11 in the first semiconductor module 100a can be symmetrical along the first direction X, and the semiconductor devices 11 in the second semiconductor module 100b can be symmetrical along the second direction Y; or the semiconductor devices 11 in the first semiconductor module 100a can be symmetrical along the second direction Y, and the semiconductor devices 11 in the second semiconductor module 100b can be symmetrical along the first direction X.

[0197] It should be noted that when the semiconductor devices 11 are symmetrically arranged, the end with the signal control pin (i.e., the first side 115) is placed closer to the axis of symmetry, which can further shorten the conductive path of the signal control pin (first pin 111 and second pin 112), making the response speed of each semiconductor device 11 faster.

[0198] like Figures 11 to 21 As shown, in some embodiments of this application, the semiconductor module 100 further includes a plurality of connectors 3, a plurality of insulating layers 4, and conductive elements 5; along the third direction Z, the plurality of connectors 3 and the plurality of insulating layers 4 are alternately stacked and disposed on one side of the semiconductor unit 1; the semiconductor unit 1 is adjacent to the insulating layer 4; the conductive elements 5 pass through the insulating layer 4, and the outer surface of the semiconductor module 100 along the third direction Z is provided with a connection end 2, which is electrically connected to the connectors 3;

[0199] The two semiconductor modules 100 include a first semiconductor module 100a and a second semiconductor module 100b. In each semiconductor module 100, each semiconductor device 11 is also provided with a third pin 113. A metal part 6 is provided at one end of the semiconductor device 11 away from the plurality of connectors 3. The metal part 6 is electrically connected to each semiconductor device 11.

[0200] The plurality of connectors 3 also include a fourth connector 34, which is disposed on one side of the semiconductor unit 1 along the third direction Z. The plurality of insulating layers 4 also include a fourth insulating layer 44, which is disposed between the semiconductor unit 1 and the fourth connector 34 along the third direction Z. The conductive element 5 also includes a sixth conductive element 506 and a seventh conductive element 507. The sixth conductive element 506 passes through the fourth insulating layer 44 along the third direction Z. One end of the sixth conductive element 506 is electrically connected to the metal element 6 in the first semiconductor module 100a, and the other end of the sixth conductive element 506 is electrically connected to the fourth connector 34. The seventh conductive element 507 passes through the fourth insulating layer 44 along the third direction Z. One end of the seventh conductive element 507 is electrically connected to the third pin 113 of the semiconductor device 11 in the second semiconductor module 100b, and the other end of the seventh conductive element 507 is electrically connected to the fourth connector 34, so that the first semiconductor module 100a and the second semiconductor module 100b are electrically connected.

[0201] In this embodiment, the third pin 113 of the semiconductor device 11 in the first semiconductor module 100a is electrically connected to the second semiconductor module 100b via the seventh conductive element 507, the fourth connector 34, the sixth conductive element 506, and the metal element 6 in the second semiconductor module 100b. Thus, the first semiconductor module 100a and the second semiconductor module 100b constitute a bridge circuit for a power converter, primarily used to convert DC power to AC power, or to convert DC power of one voltage level to DC power of another voltage level. The first semiconductor module 100a controls the current flow from the power source to the load. It is located above the circuit and connected to the power source. Its main function is to turn the current on and off, allowing current to flow to the load; when the first semiconductor module 100a is turned on, electrical energy is released through the load. The second semiconductor module 100b is located below the circuit, typically grounded or on one side of the load. It also controls the current, but is primarily grounded, closing the circuit between the first and second semiconductor modules. When the second semiconductor module 100b is turned on, it allows current to return to ground through the load, thus completing the circuit closure.

[0202] It should be noted that the remaining structures of the first semiconductor module 100a and the second semiconductor module 100b are the same as those in the aforementioned embodiments, such as... Figure 1 , Figure 2 , Figure 13 and Figure 14 As shown, further details will not be elaborated here.

[0203] It should be explained that when the semiconductor device 11 is an IGBT or a field-effect transistor (FET), the third pin 113 specifically refers to the source, which is usually connected to the load and acts as the current return path when the semiconductor device 11 is in the on or off state.

[0204] In specific applications, such as Figures 11 to 14 As shown, in specific use, the first connection terminal 21 and the second connection terminal 22 are respectively: the first connection terminal 21a in the first semiconductor module 100a and the second connection terminal 22a in the second semiconductor module 100b; the first connection terminal 21b and the second connection terminal 22b in the second semiconductor module 100b.

[0205] like Figure 18 and Figure 20 As shown, in some embodiments of this application, the semiconductor devices 11 in the first semiconductor module 100a and the semiconductor devices 11 in the second semiconductor module 100b are symmetrically arranged.

[0206] In this embodiment, by symmetrically arranging the semiconductor devices 11 in the first semiconductor module 100a and the second semiconductor module 100b, the circuit of the integrated module is more regular, and the current paths flowing to the first semiconductor module 100a and the second semiconductor module 100b are nearly equal and each path is shorter, thus enabling the semiconductor devices 11 in the integrated module to respond simultaneously.

[0207] like Figures 11 to 21 As shown, in some embodiments of this application, the semiconductor module 100 has a third connector 33 on the outer surface of the connector 2. The third connector 33 also includes a second terminal 332. The conductive element 5 also includes an eighth conductive element 508. The eighth conductive element 508 is arranged along the third direction Z. One end of the eighth conductive element 508 is electrically connected to the fourth connector 34, and the other end of the eighth conductive element 508 is electrically connected to the second terminal 332. The second terminal 332 is used for inputting or outputting AC power.

[0208] In this embodiment, the eighth conductive element 508 leads the fourth connector 34 to the outer surface of the integrated module, so that the external circuit is connected to the third pin 113 of the first semiconductor module 100a and the semiconductor device 11 of the second semiconductor module 100b through the second terminal 332, the eighth conductive element 508 and the fourth connector 34 respectively, thereby enabling AC power to be input or output through the second terminal 332.

[0209] like Figures 11 to 21 As shown, in some embodiments of this application, the third connector 33 further includes a third terminal 333, and the conductive member 5 further includes a ninth conductive member 509. The ninth conductive member 509 is disposed along the third direction Z. One end of the ninth conductive member 509 is electrically connected to the metal member 6 in the first semiconductor module 100a, and the other end of the ninth conductive member 509 is electrically connected to the third terminal 333. The third terminal 333 is adapted to be electrically connected to the positive electrode of an external power supply.

[0210] In this embodiment, the metal component 6 in the first semiconductor module 100a of the integrated module is electrically connected to the third terminal 333 via the ninth conductive component 509, thereby forming a conductive path that can be electrically connected to the positive terminal of an external power supply.

[0211] like Figures 11 to 21 As shown, the plurality of connectors 3 also include a fifth connector 35, which is flush with the fourth connector 34 along the third direction Z. The conductive member 5 also includes a tenth conductive member 510 and an eleventh conductive member 511 disposed along the third direction Z. The third connector 33 also includes a fourth terminal 334. One end of the tenth conductive member 510 is electrically connected to the third pin 113 of the semiconductor device 11 in the second semiconductor module 100b, and the other end of the tenth conductive member 510 is electrically connected to the fifth connector 35. One end of the eleventh conductive member 511 is electrically connected to the fifth connector 35, and the other end of the eleventh conductive member 511 is electrically connected to the fourth terminal 334. The fourth terminal 334 is adapted to be electrically connected to the negative terminal of an external power supply.

[0212] In this embodiment, the third pin 113 of the semiconductor device 11 of the second semiconductor module 100b is sequentially connected to the tenth conductive element 510, the fifth connector 35, and the eleventh conductive element 511, thereby connecting to the fourth terminal 334 exposed on the outer surface of the integrated module, thus forming a conductive path that can be electrically connected to the negative terminal of an external power source.

[0213] It should be explained that the fourth connector 34 and the fifth connector 35, as the power circuit of the integrated module, are placed on the same layer along the third direction, resulting in fewer packaging layers and a smaller overall size of the integrated module. Meanwhile, because the third connector 34 and the fourth connector 35... Figure 16 As shown, all are large-area copper layers, which helps to increase the cross-sectional area of ​​the current path, improve the overcurrent capability of the integrated module, and reduce stray inductance.

[0214] like Figure 13 and Figure 14 As shown, in some embodiments of this application, along the third direction Z, a plurality of connectors 3 in the first semiconductor module 100a correspond one-to-one with a plurality of connectors 3 in the second semiconductor module 100b; a plurality of insulating layers 4 in the first semiconductor module 100a correspond one-to-one with a plurality of insulating layers 4 in the second semiconductor module 100b.

[0215] In this embodiment, by matching the connectors 3 in the two semiconductor modules 100 one-to-one, that is, by arranging the connectors 3 with the same function in the two semiconductor modules 100 at the same height in the third direction Z, stray inductance in the circuit can be reduced on the one hand, and circuit layout can be facilitated on the other hand. At the same time, arranging the insulating layers 4 in the two semiconductor modules 100 at the same height in the third direction Z can make the integrated module more regular and beautiful after packaging, and facilitate the layout of different layers.

[0216] For example, the semiconductor unit 1 of the first semiconductor module 100a and the semiconductor unit 1 of the second semiconductor module 100b are disposed on the same layer, which can reduce the number of layers of the overall package of the integrated module and facilitate the fabrication process.

[0217] like Figure 11 As shown, in some embodiments of this application, the third terminal 333 and the fourth terminal 334 are located on the same side of the outer surface of the integrated module.

[0218] In this embodiment, by placing the third terminal 333 and the fourth terminal 334 on the same side of the outer surface of the integrated module, the current flowing through the third terminal 333 and the first semiconductor module 100a is opposite in direction to the current flowing through the fourth terminal 334 and the fifth connector 35, thereby effectively reducing stray inductance in the circuit of the integrated module.

[0219] In practical applications, the integrated module is a power module. The first semiconductor module 100a is the upper bridge unit, and the second semiconductor module 100b is the lower bridge unit. The third pin 113 (source) of the semiconductor device 11 in the first semiconductor module 100a is electrically connected to the second semiconductor module 100b via the seventh conductive element 507, the fourth connector 34, the sixth conductive element 506, and the metal element 6 in the second semiconductor module 100b, i.e., the electrical connection between the upper and lower bridge units. The first pin 111 (gate) is electrically connected to the first connection terminal 21 via the first conductive element 501, the first connector 31, and the third conductive element 503. The first connection terminal 21 is connected to an external first control circuit on the outer surface of the integrated module. The second pin 112 is electrically connected to the second connection terminal 22 via the second conductive element 502, the second connector 32, and the fourth conductive element 504. The second connection terminal 22 is connected to the second connection terminal 22 on the outer surface of the integrated module. The outer surface is connected to an external second control circuit; wherein, the third pin 113 of the first semiconductor module 100a is electrically connected to the second terminal 332 on the outer surface of the integrated module via the seventh conductive element 507, the fourth connector 34, and the eighth conductive element 508 in sequence, and the second terminal 332 is used as a high-voltage AC terminal; the metal part 6 in the first semiconductor module 100a is electrically connected to the third terminal 333 via the ninth conductive element 509 in sequence, and the third terminal 333 is used as a DC positive terminal; the third pin 113 of the semiconductor device 11 of the second semiconductor module 100b is electrically connected to the fourth terminal 334 via the tenth conductive element 510, the fifth connector 35, and the eleventh conductive element 511 in sequence, and the fourth terminal 334 is used as a DC negative terminal; wherein, the layer where the fourth connector 34 and the fifth connector 35 are located is a power loop layer; the layers where the first connector 31 and the second connector 32 are located are signal loop layers respectively.

[0220] In some embodiments of this application, an electronic control device is also proposed, including a semiconductor module as described in any of the above embodiments, or an integrated module as described in any of the above embodiments.

[0221] By applying the above-mentioned integrated module to the electronic control device, the response speed of the electronic control device can be improved and its performance can be enhanced.

[0222] In specific applications, the electronic control device can be at least one of an inverter, a motor controller, a DC-DC converter, etc. Those skilled in the art can configure it according to actual needs, and this application does not impose any restrictions on it.

[0223] In some embodiments of this application, a vehicle is also proposed, including a semiconductor module as described in any of the above embodiments, or an integrated module as described in any of the above embodiments, or an electronic control device as described in any of the above embodiments.

[0224] In this embodiment, the semiconductor module 100 includes at least two sets of semiconductor units 1 and a connection terminal 2. Each set of semiconductor units 1 includes at least one semiconductor device 11. Both sets of semiconductor units 1 are connected to the connection terminal 2. Thus, at least two sets of semiconductor units 1 share a connection terminal 2, which simplifies the structure, improves the integration of the semiconductor module 100, reduces signal delay, and enhances the overall performance of the semiconductor module 100.

[0225] In specific applications, the vehicle can be a motor vehicle, such as a passenger car, a truck, or a derivative thereof; it can also be a special vehicle, such as a tractor, an excavator, a fire truck, or an ambulance; it can also be a water vehicle, such as an amphibious vehicle; or it can be a rail transit vehicle, such as a train, a subway, or a tram. Those skilled in the art can configure it according to actual needs, and this application does not impose any restrictions on it.

[0226] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0227] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. A semiconductor module, characterized in that, The semiconductor module (100) includes at least two sets of semiconductor units (1) and a connection terminal (2). Each set of semiconductor units (1) includes at least one semiconductor device (11), and at least two sets of semiconductor units (1) are connected to the connection terminal (2).

2. The semiconductor module according to claim 1, characterized in that, The conductive paths from the connection end (2) to each group of semiconductor units (1) are equal.

3. The semiconductor module according to claim 1 or 2, characterized in that, At least two sets of the semiconductor units (1) are symmetrically arranged.

4. The semiconductor module according to any one of claims 1-3, characterized in that, At least two sets of the semiconductor units (1) are symmetrically arranged with respect to the connection end (2).

5. The semiconductor module according to any one of claims 1-4, characterized in that, At least two sets of the semiconductor units (1) are symmetrical about a first direction (X) or a second direction (Y), the first direction (X) intersecting the second direction (Y).

6. The semiconductor module according to any one of claims 1-5, characterized in that, Each group of semiconductor units (1) includes at least two semiconductor devices (11), and at least two semiconductor devices (11) in the same group are symmetrical about a first direction (X) or a second direction (Y).

7. The semiconductor module according to claim 6, characterized in that, Each group of semiconductor units (1) includes four semiconductor devices (11), and the four semiconductor devices (11) in the same group are symmetrical about a first direction (X) or a second direction (Y).

8. The semiconductor module according to any one of claims 1-7, characterized in that, The semiconductor module (100) further includes a connector (3), which is electrically connected to the semiconductor unit (1), and the connector (3) has an I-shaped structure.

9. The semiconductor module according to any one of claims 1-7, characterized in that, The semiconductor module (100) further includes a connector (3) having at least two electrical connection terminals (30), each of the electrical connection terminals (30) being electrically connected to a group of semiconductor units (1), the connector (3) being electrically connected to the connection terminal (2), and the conductive paths from the connection terminal (2) to each of the electrical connection terminals (30) being equal.

10. The semiconductor module according to any one of claims 1-7, characterized in that, The semiconductor module (100) further includes a connector (3), which has at least two electrical connection terminals (30), each of which is electrically connected to a group of semiconductor units (1), and the connector (3) is electrically connected to the connection terminal (2), and the at least two electrical connection terminals (30) are symmetrically arranged.

11. The semiconductor module according to any one of claims 8-10, characterized in that, The connector (3) has a connection area (36) that is electrically connected to the connection end (2). Each group of semiconductor units (1) is connected to the connection area (36), and the connection area (36) and each group of semiconductor units (1) have the same conductive path.

12. The semiconductor module according to claim 11, characterized in that, Each of the semiconductor devices (11) is connected to the connection region (36), and the conductive paths between the connection region (36) and each of the semiconductor devices (11) are equal.

13. The semiconductor module according to claim 11, characterized in that, The connector (3) has an axisymmetric structure.

14. The semiconductor module according to any one of claims 1-13, characterized in that, The semiconductor device (11) has a first set of pins (110), which are electrically connected to the connection terminal (2). The first set of pins (110) is located on the first side (115) of the semiconductor device (11), and the first sides (115) of at least two semiconductor devices (11) in the same group of semiconductor units (1) are arranged opposite to each other.

15. The semiconductor module according to claim 14, characterized in that, The semiconductor device (11) also has a second set of pins (114) located on a second side (116) of the semiconductor device (11), which is different from the first side (115).

16. The semiconductor module according to claim 15, characterized in that, The first side (115) is arranged opposite to the second side (116).

17. The semiconductor module according to any one of claims 1-14, characterized in that, The semiconductor module (100) further includes multiple connectors (3), multiple insulating layers (4), and conductive elements (5); along the third direction (Z), multiple connectors (3) and multiple insulating layers (4) are alternately stacked and disposed on one side of the semiconductor unit (1); the semiconductor unit (1) is adjacent to the insulating layer (4); the conductive element (5) passes through the insulating layer (4), and the semiconductor module (100) has the connection end (2) on its outer surface along the third direction (Z), and the connection end (2) is electrically connected to the connector (11).

18. The semiconductor module according to claim 17, characterized in that, The first set of pins (110) includes a first pin (111), and a plurality of connectors (3) include a first connector (31), the first connector (31) being disposed on one side of the semiconductor unit (1) along the third direction (Z); a plurality of insulating layers (4) include a first insulating layer (41), the first insulating layer (41) being disposed between the semiconductor unit (1) and the first connector (31); the conductive element (5) includes a first conductive element (501), the first conductive element (501) being disposed in the first insulating layer (41) along the third direction (Z), one end of the first conductive element (501) being electrically connected to the first pin (111), and the other end of the first conductive element (501) being electrically connected to the first connector (31).

19. The semiconductor module according to claim 18, characterized in that, The first set of pins (110) further includes a second pin (112), and the plurality of connectors (3) further includes a second connector (32), the second connector (32) being disposed on the side of the first connector (31) away from the semiconductor unit (1); the plurality of insulating layers (4) include a second insulating layer (42), the second insulating layer (42) being disposed between the first connector (31) and the second connector (32); the conductive element (5) includes a second conductive element (502), the second conductive element (502) being disposed in the first insulating layer (41) and the second insulating layer (42) along the third direction (Z), one end of the second conductive element (502) being electrically connected to the second pin (112), and the other end of the second conductive element (502) being electrically connected to the second connector (32).

20. The semiconductor module according to any one of claims 1-19, characterized in that, Each of the semiconductor devices (11) is provided with a first pin (111) and a second pin (112). The semiconductor module (100) further includes a connector (3), which includes a first connector (31) and a second connector (32). The first pin (111) is electrically connected to the first connector (31), and the second pin (112) is electrically connected to the second connector (32). The first pin (111) and the second pin (112) are located at the same end of the semiconductor device (11). The orthographic projection of the second connector (32) along a third direction (Z) at least partially coincides with the orthographic projection of the first connector (31) along a third direction (Z).

21. The semiconductor module according to claim 19 or 20, characterized in that, The connecting end (2) is located on the side of the second connector (32) away from the first connector (31). The connecting end (2) includes a first connecting end (21) and a second connecting end (22) spaced apart. The plurality of insulating layers (4) also include a third insulating layer (43), which is located between the second connector (32) and the connecting end (2). The conductive element (5) further includes a third conductive element (503) and a fourth conductive element (504). The third conductive element (503) is disposed along the third direction (Z) through the second insulating layer (42) and the third insulating layer (43). One end of the third conductive element (503) is electrically connected to the first connector (31), and the other end of the third conductive element (503) is electrically connected to the first connection end (21). The first connection end (21) is adapted to be connected to the driver. The fourth conductive element (504) is disposed along the third direction (Z) through the third insulating layer (43). One end of the fourth conductive element (504) is electrically connected to the second connector (32), and the other end of the fourth conductive element (504) is electrically connected to the second connection end (22). The second connection end (22) is adapted to be connected to the ground of the driver.

22. The semiconductor module according to any one of claims 17-21, characterized in that, The semiconductor module (100) further includes a metal component (6), which is disposed on the side of the semiconductor unit (1) away from the connector (3), and each semiconductor device (11) is electrically connected to the metal component (6).

23. The semiconductor module according to claim 22, characterized in that, The metal part (6) has a first mounting groove (61) on the side facing the semiconductor unit (1), and each semiconductor device (11) is disposed in the first mounting groove (61). The semiconductor device (11) is electrically connected to the bottom of the first mounting groove (61).

24. The semiconductor module according to claim 23, characterized in that, The semiconductor module (100) also includes a detection element (7). The metal part (6) has a second mounting groove (62) on the side facing the semiconductor unit (1). The detection element (7) is disposed in the second mounting groove (62) and is used to detect the temperature of the semiconductor unit (1).

25. The semiconductor module according to claim 24, characterized in that, The semiconductor module (100) further includes a first insulating member (81), which is disposed between the wall of the second mounting groove (62) and the detection member (7).

26. The semiconductor module according to claim 25, characterized in that, The semiconductor module (100) has a third connector (33) on the outer surface of the connection terminal (2). The third connector (33) includes a first terminal (331). The conductive element (5) also includes a fifth conductive element (505). The fifth conductive element (505) is disposed in multiple insulating layers (4) along a third direction (Z). One end of the fifth conductive element (505) is electrically connected to the detection element (7), and the other end of the fifth conductive element (505) is electrically connected to the first terminal (331).

27. The semiconductor module according to any one of claims 17-24, characterized in that, The semiconductor module (100) further includes a second insulating member (82), which is disposed on the side of the semiconductor unit (1) away from the connector (3). The side of the second insulating member (82) facing the semiconductor unit (1) is provided with a third mounting groove (821), and the metal part (6) is disposed in the third mounting groove (821).

28. The semiconductor module according to claim 1, characterized in that, The semiconductor module (100) further includes a substrate (9) and a third insulating member (83). The substrate (9) is disposed on one side of the semiconductor unit (1) along a third direction (Z), and the third insulating member (83) is disposed between the substrate (9) and the semiconductor unit (1). The substrate (9) includes an aluminum plate (91), a thermally conductive insulating layer (92), and a copper layer (93) stacked along the third direction (Z). The thermally conductive insulating layer (92) is disposed between the aluminum plate (91) and the copper layer (93), and the copper layer (93) is in contact with the third insulating member (83).

29. An integrated module, characterized in that, It includes two semiconductor modules (100) as described in any one of claims 1-25, and the two semiconductor modules (100) are electrically connected.

30. The integrated module according to claim 29, characterized in that, The two semiconductor modules (100) include a first semiconductor module (100a) and a second semiconductor module (100b) arranged at intervals along a first direction (X). The semiconductor devices (11) in the first semiconductor module (100a) and the semiconductor devices (11) in the second semiconductor module (100b) are symmetrical along a second direction (Y), and the first direction (X) and the second direction (Y) intersect.

31. The integrated module according to claim 30, characterized in that, The semiconductor module (100) further includes multiple connectors (3), multiple insulating layers (4), and conductive elements (5); along the third direction (Z), multiple connectors (3) and multiple insulating layers (4) are alternately stacked and disposed on one side of the semiconductor unit (1); the semiconductor unit (1) is adjacent to the insulating layer (4); the conductive element (5) passes through the insulating layer (4), and the semiconductor module (100) has a connection end (2) on its outer surface along the third direction (Z), and the connection end (2) is electrically connected to the connector (11); Each of the semiconductor devices (11) is further provided with a third pin (113), and a metal part (6) is provided at one end of the semiconductor device (11) away from the plurality of connectors (3), and the metal part (6) is electrically connected to each of the semiconductor devices (11); The plurality of connectors (3) further include a fourth connector (34), the fourth connector (34) being disposed on one side of the semiconductor unit (1) along the third direction (Z). The plurality of insulating layers (4) further include a fourth insulating layer (44), the fourth insulating layer (44) being disposed between the semiconductor unit (1) and the fourth connector (34) along the third direction (Z). The conductive element (5) further includes a sixth conductive element (506) and a seventh conductive element (507), the sixth conductive element (506) passing through the fourth insulating layer (44) along the third direction (Z), one end of the sixth conductive element (506) being connected to the second semiconductor unit (1). The metal part (6) in the body module (100b) is electrically connected, and the other end of the sixth conductive part (506) is electrically connected to the fourth connector (34); the seventh conductive part (507) is disposed in the fourth insulating layer (44) along the third direction (Z), one end of the seventh conductive part (507) is electrically connected to the third pin (113) of the semiconductor device (11) in the first semiconductor module (100a), and the other end of the seventh conductive part (507) is electrically connected to the fourth connector (34), so that the first semiconductor module (100a) and the second semiconductor module (100b) are electrically connected.

32. The integrated module according to claim 31, characterized in that, The semiconductor module (100) has a third connector (33) on the outer surface of the connection terminal (2). The third connector (33) also includes a second terminal (332). The conductive element (5) also includes an eighth conductive element (508). The eighth conductive element (508) is arranged along the third direction (Z). One end of the eighth conductive element (508) is electrically connected to the fourth connector (34), and the other end of the eighth conductive element (508) is electrically connected to the second terminal (332). The second terminal (332) is used for inputting or outputting AC power.

33. The integrated module according to claim 31 or 32, characterized in that, The third connector (33) further includes a third terminal (333), and the conductive element (5) further includes a ninth conductive element (509). The ninth conductive element (509) is disposed along the third direction (Z). One end of the ninth conductive element (509) is electrically connected to the metal element (6) in the first semiconductor module (100a), and the other end of the ninth conductive element (509) is electrically connected to the third terminal (333). The third terminal (333) is adapted to be electrically connected to the positive terminal of an external power source.

34. The integrated module according to claim 33, characterized in that, The multiple connectors (3) also include a fifth connector (35), which is flush with the fourth connector (34) along the third direction (Z). The conductive element (5) also includes a tenth conductive element (510) and an eleventh conductive element (511) arranged along the third direction (Z). The third connector (3) also includes a fourth terminal (334). One end of the tenth conductive element (510) is electrically connected to the third pin (113) of the semiconductor device (11) in the second semiconductor module (100b), and the other end of the tenth conductive element (510) is electrically connected to the fifth connector (35). One end of the eleventh conductive element (511) is electrically connected to the fifth connector (35), and the other end of the eleventh conductive element (511) is electrically connected to the fourth terminal (334). The fourth terminal (334) is adapted to be electrically connected to the negative terminal of an external power supply.

35. The integrated module according to claim 34, characterized in that, Along the third direction (Z), a plurality of connectors (3) in the first semiconductor module (100a) correspond one-to-one with a plurality of connectors (3) in the second semiconductor module (100b); a plurality of insulating layers (4) in the first semiconductor module (100a) correspond one-to-one with a plurality of insulating layers (4) in the second semiconductor module (100b).

36. The integrated module according to claim 34, characterized in that, The third terminal (333) and the fourth terminal (334) are located on the same side of the outer surface of the integrated module.

37. An electronic control device, characterized in that, include: The semiconductor module (100) as described in any one of claims 1-28, or the integrated module as described in any one of claims 29-36.

38. A vehicle, characterized in that, include: The semiconductor module (100) as described in any one of claims 1-28, or the integrated module as described in any one of claims 29-36, or the electronic control device as described in claim 37.

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