Inverter circuit
The inverter circuit stabilizes power-on shocks by using a power storage circuit and controlled PWM signals to protect MOS tubes, enhancing their lifespan and accommodating different battery voltages.
Patent Information
- Application Number
- CN202420890724.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-26
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2034-04-26
AI Technical Summary
Inverters using high-voltage batteries face significant power-on shock that can damage MOS tubes due to the rapid activation of the power management chip, leading to reduced service life.
An inverter circuit with a power storage circuit, timing resistor and capacitor, and a power management chip configuration that controls the MOS tube through intermittent PWM square wave signals during power-on, using energy storage capacitors and discharge diodes to stabilize voltage and prevent excessive current.
Extends the startup time of the control circuit, reducing MOS tube damage and increasing its service life, while allowing operation with batteries of varying voltages.
Smart Images

Figure CN222192158U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of inverters, and in particular to an inverter circuit. Background Art
[0002] In some remote areas or uninhabited areas, there is no access to mains electricity, so batteries and inverters are needed to charge AC loads. When the battery is connected to the inverter, the inverter can output AC power, which can charge the AC load.
[0003] The inverter circuit mainly includes DC / DC Boost circuit and DC / AC INVERSION circuit. The DC / DC Boost circuit is a DC transformer circuit, and its main function is to transform the DC power of the battery. The DC / AC INVERSION circuit is a DC to AC conversion circuit, and its main function is to transform the transformed DC power into the required AC power, thereby supplying power to the AC load equipment.
[0004] Among them, the voltage transformation of the DC / DC Boost circuit is mainly achieved through the flyback circuit. Specifically, the flyback circuit mainly includes an input circuit, a transformer, an output circuit and a control circuit. The battery supplies power through the input circuit. After passing through the transformer, the DC power flows into the output circuit after voltage transformation. The output circuit outputs the DC power to the DC load; or the output circuit inputs the DC power into the subsequent circuit to convert the DC power into AC power, thereby supplying power to the AC load. A MOS tube is connected in series between the input circuit and the primary coil of the transformer. Therefore, the MOS tube is controlled by the control circuit to continuously open and close, thereby causing a magnetic flux change between the primary coil and the secondary coil of the transformer, thereby realizing the voltage transformation of the DC power.
[0005] The control circuit usually uses UC2843 or UC3842 as the power management chip, which mainly sends out a PWM square wave signal through the OUT pin of the power management chip to control the MOS tube.
[0006] However, when a high-voltage battery is used to supply power, at the beginning of power-on, the power management chip drives the MOS tube to enter a normal working state for a short period of time, and the MOS will be subjected to a large power-on shock, which may cause damage to the MOS tube. Utility Model Content
[0007] The present application provides an inverter circuit, the purpose of which is to reduce the impact on a MOS tube and increase the service life of the MOS tube.
[0008] An inverter circuit provided in this application adopts the following technical solution:
[0009] An inverter circuit comprises: a main circuit, the main circuit comprising a power circuit, a transformer and a load circuit, the output end of the power circuit being electrically connected to the primary coil of the transformer; the input end of the load circuit being electrically connected to the secondary coil of the transformer;
[0010] A control circuit, the control circuit comprising a power management chip, a timing capacitor, a timing resistor and a power storage circuit;
[0011] The power management chip includes an OUT pin, an RC pin and a REF pin;
[0012] The REF pin is used to continuously output a reference voltage after the power management chip is powered on; the first end of the timing resistor is electrically connected to the REF pin, the second end of the timing resistor is electrically connected to the first end of the timing capacitor and the RC pin, and the second end of the timing capacitor is grounded; the RC pin is the timing end of the internal oscillator of the power management chip, and the power management chip generates an oscillation signal driven by the reference voltage and outputs it through the OUT pin; the power circuit includes a MOS tube, and the OUT pin is electrically connected to the gate of the MOS tube, and is used to control the periodic power supply of the power circuit;
[0013] The power storage circuit is electrically connected to the REF pin, and is used for preferentially storing a reference voltage output by the REF pin.
[0014] By adopting the above technical solution, firstly, in the main circuit, the power circuit, transformer and load circuit are set up so that the battery output current can be transformed to supply power to the load; or the transformed current will be input into the subsequent DC-AC conversion circuit of the inverter through the load circuit to realize the output of AC power, and then realize the power supply of AC load. Therefore, the main power supply function of the inverter can be met.
[0015] Secondly, the setting of the MOS tube in the power supply circuit and the setting of the power management chip enable the power management chip to output a PWM square wave signal through the OUT pin, so that after receiving the square wave signal, the gate of the MOS tube can control the on and off of the power supply circuit, thereby generating a magnetic flux change between the primary coil and the secondary coil of the transformer, so that the load circuit can output the transformed current.
[0016] The coordination of the timing resistor and the timing capacitor between the REF pin and the RC pin of the power management chip can set the operating frequency of the internal oscillation period of the power management chip. Therefore, on this basis, a power storage circuit is connected in series with the REF pin so that when the power management chip is powered on, the power storage circuit will be charged. During the charging process, the PWM square wave signal output by the power management chip will switch multiple times, which makes the output of the power management chip intermittent output state. The output of the power management chip will be normal only after the power storage circuit is full. This setting can extend the startup time of the control circuit and reduce the possibility of damage to the MOS tube when the input voltage of the battery is too high.
[0017] Optionally, the energy storage circuit includes an energy storage capacitor, one end of the energy storage capacitor is electrically connected to the REF pin, and the other end of the energy storage capacitor is grounded.
[0018] By adopting the above technical solution, the storage circuit includes a storage capacitor, and the storage capacitor is configured to store electricity.
[0019] Optionally, the energy storage capacitor is an electrolytic capacitor.
[0020] By adopting the above technical solution and selecting the electrolytic capacitor, the storage capacitor has a better energy storage effect and can extend the start-up time of the control circuit.
[0021] Optionally, the energy storage circuit further includes a charging resistor, and the charging resistor is connected in series between the REF pin and the energy storage capacitor.
[0022] By adopting the above technical solution and setting the charging resistor, the charging current of the storage capacitor can be limited to prevent excessive current or excessive charging speed.
[0023] Optionally, the power storage circuit further includes a discharge diode, the discharge diode is connected in series between the REF pin and the power storage capacitor, and the discharge diode is connected in parallel with the charging resistor;
[0024] The anode of the discharge diode is electrically connected to the storage capacitor, and the cathode of the discharge diode is electrically connected to the REF pin.
[0025] By adopting the above technical solution and setting the discharge diode, the storage capacitor can be discharged quickly.
[0026] Optionally, the power management chip further includes a COMP pin and a FB pin;
[0027] The control circuit further includes a power supply circuit and a gain circuit, wherein an input end of the power supply circuit is electrically connected to the main circuit for obtaining a feedback signal generated by the power supply circuit, and an output end of the power supply circuit is electrically connected to the FB pin; the power management chip generates a compensation signal according to the feedback signal and outputs it through the COMP pin; the gain circuit includes a gain resistor and a gain capacitor, and the gain resistor is connected in parallel with the gain capacitor;
[0028] One end of the gain resistor is electrically connected to the COMP pin, and the other end of the gain resistor is electrically connected to the FB pin.
[0029] By adopting the above technical solution, the FB pin of the power management chip is electrically connected to the power supply circuit to ensure that the power management chip can output stably. The setting of the gain circuit can improve the gain and frequency characteristics of the error amplifier inside the power management chip.
[0030] Optionally, the COMP pin is electrically connected to the REF pin, a protection diode is connected in series between the COMP pin and the REF pin, the anode of the protection diode is electrically connected to the COMP pin, and the cathode of the protection diode is electrically connected to the REF pin.
[0031] By adopting the above technical solution, since the COMP pin is electrically connected to the REF pin, on the one hand, when the voltage on the COMP pin is too high, the storage circuit can be charged, thereby preventing the voltage on the COMP from being too high and damaging the power management chip or other circuit components; on the other hand, when the storage capacitor is broken down, the COMP pin can be pulled down in time, thereby stopping the power management chip from working and preventing the power management chip from being damaged. The setting of the protection diode can prevent the power management chip from being affected or the pins of the power management chip from being affected after the storage circuit is fully charged.
[0032] Optionally, a power supply coil is provided in the transformer for providing power to the power management chip; the power supply circuit includes a control switch and a continuous circuit, the input end of the continuous circuit is electrically connected to the power supply coil, the output end of the continuous circuit is electrically connected to the first end of the control switch, and the second end of the control switch is electrically connected to the power management chip.
[0033] By adopting the above technical solution, a power supply coil is provided in the transformer to provide power to the power management chip. The power supply circuit includes a control switch and a continuous circuit. The continuous circuit obtains power from the power supply coil and transmits it to the control switch, and the control switch then transmits the power to the power management chip. This design enables the power management chip to stably obtain the power required for operation without relying on an external power supply or other power supply methods. This helps to simplify the circuit structure and improve the reliability and stability of the circuit.
[0034] In summary, the present application includes at least one of the following beneficial technical effects:
[0035] 1. This application sets up a power storage circuit, and at the beginning of power-on, the power management chip is in an intermittent output state, thereby extending the startup time of the control circuit. Therefore, when the input voltage of the battery is high, the possibility of MOS tube damage can be reduced and the service life of the MOS tube can be increased.
[0036] 2. This application enables the main circuit to be connected to batteries of different voltages by replacing different storage capacitors, thereby facilitating the production of inverter circuits for different batteries. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 It is a circuit structure diagram of the transformer circuit of Example 1 of the present application.
[0038] Figure 2 It is a circuit structure diagram of the transformer circuit of Example 2 of the present application.
[0039] In the figure, 1. main circuit; 11. power supply circuit; 12. transformer; 13. load circuit; 14. MOS tube; 2. control circuit; 21. power management chip; 22. timing capacitor; 23. timing resistor; 24. storage circuit; 241. storage capacitor; 242. charging resistor; 243. discharge diode; 25. power supply circuit; 251. control switch; 252. continuous circuit; 253. power-on circuit; 26. gain circuit; 261. gain capacitor; 262. gain resistor; 27. protection diode. DETAILED DESCRIPTION
[0040] The following is combined with Figure 1 -Attached Figure 2 , further details of this application are given.
[0041] Embodiment 1:
[0042] An inverter circuit, referring to Figure 1, including: a main circuit 1 and a control circuit 2, the main circuit 1 includes a power circuit 11, a transformer 12 and a load circuit 13, the input end of the power circuit 11 is used to be electrically connected to a battery, and the output end of the power circuit 11 is electrically connected to the first end of the primary coil of the transformer 12. The power circuit 11 also includes a MOS tube 14, the second end of the primary coil is electrically connected to the drain of the MOS tube 14, and the source of the MOS tube 14 is grounded, and the gate of the MOS tube 14 is electrically connected to the control circuit 2. The secondary coil of the transformer 12 is electrically connected to the input end of the load circuit 13, and the output end of the load circuit 13 is used to output current. By controlling the on and off of the MOS tube 14, the voltage transformation function can be realized, so that the load circuit 13 outputs the transformed current.
[0043] Reference Figure 1 The control circuit 2 includes a power management chip 21. In this embodiment, the power management chip 21 adopts UC2843 or UC3842. The power management chip 21 has a total of eight pins, from pin 1 to pin 8: COMP pin, which is the output end of the error amplifier inside the power management chip 21. FB pin, which is the reverse input end of the error amplifier inside the power management chip 21. ISENSE pin, which is the current detection input end. RC pin, which is the timing end of the oscillator inside the power management chip 21. GND pin, ground. OUT pin, output end. VCC pin, power supply end. REF pin, reference voltage output end.
[0044] Reference Figure 1 The control circuit 2 further includes a power supply circuit 25, which includes a continuous circuit 252, a power-on circuit 253 and a control switch 251. A power supply coil is provided in the transformer 12, and the power supply coil and the primary coil are mutually inductive, one end of the power supply coil is electrically connected to the input end of the continuous circuit 252, and the other end of the power supply coil is grounded, so during the operation of the main circuit 1, the power supply coil can continuously supply power to the continuous circuit 252.
[0045] Reference Figure 1 The output end of the sustain circuit 252 is electrically connected to the first end of the control switch 251, and the second end of the control switch 251 is electrically connected to the VCC pin. Therefore, when the control switch 251 is closed, the sustain circuit 252 can provide stable power supply to the power management chip 21.
[0046] Reference Figure 1 The input end of the power-on circuit 253 is electrically connected to the power circuit 11, and the output end of the power-on circuit 253 is electrically connected to the first end of the control switch 251. Therefore, when the control switch 251 is closed, the power-on circuit 253 can provide a startup voltage for the power management chip 21.
[0047] Reference Figure 1The control circuit 2 further includes a timing resistor 23 and a timing capacitor 22. The first end of the timing resistor 23 is electrically connected to the REF pin, and the second end is electrically connected to the first end of the timing capacitor 22. The second end of the timing capacitor 22 is grounded. In addition, the RC pin is electrically connected to the first end of the timing capacitor 22. Therefore, the operating frequency of the oscillator inside the power management chip 21 is determined by the timing capacitor 22 and the timing resistor 23.
[0048] Reference Figure 1 , the control circuit 2 also includes a power storage circuit 24, the power storage circuit 24 includes a power storage capacitor 241, a first end of the power storage capacitor 241 is electrically connected to the REF pin, and the other end is grounded. In this embodiment, the power storage capacitor 241 adopts a non-polar ordinary capacitor. When a 12V battery is used for power supply, since the power-on voltage is small, the power storage capacitor 241 can smooth the voltage fluctuation when charging, and reduce the impact on the MOS tube 14 at the initial power-on stage. When the power storage capacitor 241 is fully charged, the power management chip 21 outputs normally. Reducing voltage fluctuations and extending the startup time of the flyback circuit can reduce the impact on the MOS tube 14 at the initial power-on stage.
[0049] Reference Figure 1 The OUT pin of the power management chip 21 is electrically connected to the gate of the MOS tube 14. Therefore, the OUT pin outputs a PWM square wave signal, which can realize the control of the MOS tube 14.
[0050] Reference Figure 1 , the ISENSE pin of the power management chip 21 is electrically connected to the source of the MOS tube 14. A sampling resistor is connected in series to the source of the MOS tube 14 to convert the current of the pulse transformer 12 into a voltage, which is sent to the ISENSE pin to control the pulse width of the PWM square wave signal. In addition, when the power supply voltage is abnormal, the current of the power switch tube increases. When the voltage on the sampling resistor exceeds 1V, the power management chip 21 stops outputting, effectively protecting the power switch tube.
[0051] Reference Figure 1 The FB pin of the power management chip 21 is electrically connected to the output end of the sustaining circuit 252, so that the output voltage is stable.
[0052] Reference Figure 1 The control circuit 2 further includes a gain circuit 26, which includes a gain capacitor 261 and a gain resistor 262. The gain capacitor 261 is connected in parallel with the gain resistor 262, and one end of the gain circuit 26 is electrically connected to the FB pin, and the other end is electrically connected to the COMP pin. The gain circuit 26 is used to improve the gain and frequency characteristics of the error amplifier inside the power management chip 21.
[0053] The implementation principle of the embodiment of the present application is: the PWM square wave signal is output through the power management chip 21 to realize the control of the MOS tube 14, and then in the process of continuous switching of the MOS tube 14, the voltage output by the battery is output after being transformed by the transformer 12, which can power subsequent circuits or other loads.
[0054] Embodiment 2:
[0055] An inverter circuit, the difference between this embodiment and embodiment 1 is: Figure 2 The power storage circuit 24 includes a power storage capacitor 241, a charging resistor 242 and a discharge diode 243. In this embodiment, the power storage capacitor 241 is a polar large-capacity electrolytic capacitor.
[0056] Reference Figure 2 The first end of the charging resistor 242 is electrically connected to the REF pin, the second end of the charging resistor 242 is electrically connected to the positive electrode of the storage capacitor 241, and the negative electrode of the storage capacitor 241 is grounded. Therefore, the REF pin charges the storage capacitor 241 through the charging resistor 242.
[0057] Reference Figure 2 The positive electrode of the discharge diode 243 is electrically connected to the second end of the charging resistor 242, and the negative electrode of the discharge diode 243 is electrically connected to the first end of the charging resistor 242, so the discharge diode 243 is connected in parallel with the charging resistor 242, and the storage capacitor 241 can be discharged through the discharge diode 243.
[0058] When a 24V or 48V battery is used for power supply, at the initial stage of power-on, the REF pin will charge the storage capacitor 241 through the charging resistor 242, so it will affect the signal of the RC pin, and then make the OUT pin of the power management chip 21 in an intermittent output state. Until the storage capacitor 241 is fully charged, the PWM square wave signal output by the OUT pin will be in a normal state.
[0059] This arrangement prolongs the start-up time of the flyback circuit, and performs multiple switching PWM square wave signals of the MOS tube before the storage capacitor 241 is fully charged. Therefore, in the early stage of power-on when powered by a high-voltage battery, the MOS tube may be damaged if the impact is too great in a short time.
[0060] Reference Figure 2The control circuit 2 also includes a protection diode 27, the positive electrode of the protection diode 27 is electrically connected to the COMP pin, and the negative electrode of the protection diode 27 is electrically connected to the positive electrode of the storage capacitor 241. On the one hand, the protection diode 27 has the characteristics of forward conduction and reverse cutoff, which protects the power management chip 21 from being damaged or affecting the normal operation of other pins after the storage capacitor 241 is fully charged. On the other hand, when the storage capacitor 241 is broken down or damaged, the voltage of the COMP pin is pulled down, so that the power management chip 21 can stop working directly, thereby protecting the power management chip 21.
[0061] In addition, the control circuit 2 can be used in a scenario where the power management chip 21 is used to drive the MOS tube 14 and the initial power-on impact is too large.
[0062] The implementation principle of the embodiment of the present application is: a large-capacity electrolytic capacitor is used as the storage capacitor 241. At the initial stage of power-on, the power management chip 21 will charge the storage capacitor 241 through the charging resistor 242, so that before the storage capacitor 241 is fully charged, the power management chip 21 is in an intermittent output state, so that the PWM square wave signal received by the MOS tube 14 will be switched on and off multiple times. After the storage capacitor 241 is fully charged, the MOS tube 14 works normally. This setting can reduce the impact of the MOS tube 14 at the initial stage of power-on, thereby reducing the possibility of damage to the MOS tube 14.
[0063] The embodiments of this specific implementation are all preferred embodiments of the present application, and are not intended to limit the protection scope of the present application. The same components are represented by the same figure marks. Therefore, any equivalent changes made based on the structure, shape, and principle of the present application should be included in the protection scope of the present application.
Claims
1. An inverter circuit, characterized in that: include: A main circuit (1), the main circuit (1) comprising a power circuit (11), a transformer (12) and a load circuit (13), the output end of the power circuit (11) being electrically connected to the primary coil of the transformer (12); the input end of the load circuit (13) being electrically connected to the secondary coil of the transformer (12); A control circuit (2), the control circuit (2) comprising a power management chip (21), a timing capacitor (22), a timing resistor (23) and a power storage circuit (24); The power management chip (21) comprises an OUT pin, an RC pin and a REF pin; The REF pin is used to continuously output a reference voltage after the power management chip (21) is powered on; the first end of the timing resistor (23) is electrically connected to the REF pin, the second end of the timing resistor (23) is electrically connected to the first end of the timing capacitor (22) and the RC pin, and the second end of the timing capacitor (22) is grounded; the RC pin is the timing end of the internal oscillator of the power management chip (21); the power management chip (21) generates an oscillation signal driven by the reference voltage and outputs it through the OUT pin; the power circuit (11) comprises a MOS tube (14); the OUT pin is electrically connected to the gate of the MOS tube (14) and is used to control the periodic power supply of the power circuit (11); The power storage circuit (24) is electrically connected to the REF pin, and the power storage circuit (24) is used to preferentially store a reference voltage output by the REF pin.
2. The inverter circuit according to claim 1, characterized in that: The power storage circuit (24) comprises a power storage capacitor (241), one end of the power storage capacitor (241) is electrically connected to the REF pin, and the other end of the power storage capacitor (241) is grounded.
3. The inverter circuit according to claim 2, characterized in that: The power storage capacitor (241) is an electrolytic capacitor.
4. The inverter circuit according to claim 2, characterized in that: The power storage circuit (24) further comprises a charging resistor (242), wherein the charging resistor (242) is connected in series between the REF pin and the power storage capacitor (241).
5. The inverter circuit according to claim 4, characterized in that: The power storage circuit (24) further comprises a discharge diode (243), wherein the discharge diode (243) is connected in series between the REF pin and the power storage capacitor (241), and the discharge diode (243) is connected in parallel with the charging resistor (242); The positive electrode of the discharge diode (243) is electrically connected to the storage capacitor (241), and the negative electrode of the discharge diode (243) is electrically connected to the REF pin.
6. The inverter circuit according to claim 1, characterized in that: The power management chip (21) further comprises a COMP pin and a FB pin; The control circuit (2) further comprises a power supply circuit (25) and a gain circuit (26); an input end of the power supply circuit (25) is electrically connected to the main circuit (1) for obtaining a feedback signal generated by the power supply circuit (11); an output end of the power supply circuit (25) is electrically connected to the FB pin; the power management chip (21) generates a compensation signal according to the feedback signal and outputs the compensation signal through the COMP pin; the gain circuit (26) comprises a gain resistor (262) and a gain capacitor (261), and the gain resistor (262) is connected in parallel with the gain capacitor (261); One end of the gain resistor (262) is electrically connected to the COMP pin, and the other end of the gain resistor (262) is electrically connected to the FB pin.
7. The inverter circuit according to claim 6, characterized in that: The COMP pin is electrically connected to the REF pin, a protection diode (27) is connected in series between the COMP pin and the REF pin, an anode of the protection diode (27) is electrically connected to the COMP pin, and a cathode of the protection diode (27) is electrically connected to the REF pin.
8. The inverter circuit according to claim 6, characterized in that: A power supply coil is provided in the transformer (12) for providing power to the power management chip (21); the power supply circuit (25) comprises a control switch (251) and a continuous circuit (252); an input end of the continuous circuit (252) is electrically connected to the power supply coil, an output end of the continuous circuit (252) is electrically connected to a first end of the control switch (251), and a second end of the control switch (251) is electrically connected to the power management chip (21).
