Capacitor and electronic equipment

By designing an alternating stacking structure of electrode layers in ceramic capacitors, providing edge support, solving the problems of dielectric layer sinking and stress concentration, and improving the quality and durability of the capacitor.

CN222213953UActive Publication Date: 2024-12-20XINWEI ELECTRONIC TECH (YIYANG) CO LTD
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Patent Information

Application Number
CN202420907636.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-28
Publication Date
2024-12-20
Estimated Expiration
2034-04-28

AI Technical Summary

Technical Problem

When ceramic capacitors increase the number of dielectric layers stacking, the edge area of ​​the electrode layer sinks and causes stress concentration, which is prone to microcracks, affecting the quality of the capacitor.

Method used

The length of the electrode layer in the third direction is designed to be larger than the length of the other electrode layers, forming an alternating stacking structure that provides edge area support and reduces recesses and stress concentration.

Benefits of technology

It effectively reduces the possibility of depression and microcracks in the dielectric layer, and improves the quality and service life of the capacitor.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the utility model relates to the field of capacitors, and particularly discloses a capacitor and electronic equipment, and the capacitor comprises a dielectric substrate which comprises a plurality of dielectric layers, the plurality of dielectric layers are superposed along a first direction, and the dielectric substrate comprises a first end and a second end along a second direction; the electrode layer comprises a plurality of first electrodes and a plurality of second electrodes, the first electrodes and the second electrodes are alternately arranged in the first direction, one dielectric layer is located between one first electrode and one second electrode, one end of each first electrode extends out of the first end of the dielectric substrate, one end of each second electrode extends out of the second end of the dielectric substrate, and the first electrode and the second electrode are alternately arranged in the first direction. The length of at least part of the first electrode along the third direction is greater than that of the second electrode along the third direction, and the first direction, the second direction and the third direction are mutually vertical pairwise. Through the above mode, the embodiment of the utility model can reduce the concentration of the internal stress of the capacitor, optimize the stress distribution, and improve the structural strength of the capacitor through the concave buffer section formed by the first electrode and the second electrode.
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Description

Technical Field

[0001] The embodiments of the utility model relate to the technical field of capacitors, and in particular to a capacitor and an electronic device. Background Art

[0002] Multilayer ceramic capacitor (MLCC) is a new type of electronic component. During the manufacturing process, the electrode layer is screen-printed onto the dielectric diaphragm, the dielectric diaphragms are stacked in an offset manner, and a one-time high-temperature sintering is performed to form a dielectric matrix, which is then completed through subsequent end packaging. Because the structure of the finished product is a monolithic structure, it is also called a monolithic capacitor, in which the stacked electrode layers are consistent in shape and size.

[0003] The inventor of the utility model found in the process of realizing the utility model that: at present, the ceramic capacitor includes an electrode layer, a dielectric diaphragm and an external terminal electrode, the electrode layer is printed on the dielectric diaphragm, the dielectric diaphragm is stacked in multiple layers to form a dielectric matrix, and the external terminal electrode encapsulates the two ends of the dielectric matrix. In order to increase the capacity of the capacitor, the number of stacked layers of the dielectric diaphragm printed with the electrode layer is increased while ensuring that the volume of the multilayer ceramic capacitor remains unchanged. As the number of stacked layers increases, the edge area of ​​the unprinted electrode layer sinks during the stacking and pressing process due to the lack of support from the electrode layer. The more the number of stacked layers, the greater the total sinking depth formed in the edge area. The sinking depth between every two dielectric diaphragms is the end difference. The existence of the end difference causes the stress of the capacitor after pressure sintering to be concentrated at the junction of the sinking area and the non-sinking area. The more the number of stacked layers, the greater the total end difference distance, and the more obvious the stress concentration, which causes the capacitor to easily have microcracks at the junction, affecting the quality of the capacitor. Utility Model Content

[0004] The main technical problem solved by the embodiments of the utility model is to provide a capacitor, which can reduce the depression of the dielectric layer of the capacitor during the stacking process and reduce the possibility of micro cracks.

[0005] In order to solve the above technical problems, a technical solution adopted by the utility model is: to provide a capacitor, comprising: a dielectric substrate comprising a plurality of dielectric layers, the plurality of dielectric layers are stacked along a first direction, the dielectric substrate comprises a first end and a second end along a second direction; an electrode layer, comprising a plurality of first electrodes and a plurality of second electrodes, the first electrodes and the second electrodes are alternately arranged along the first direction, and one of the dielectric layers is located between a first electrode and a second electrode, one end of the plurality of first electrodes extends out of the first end of the dielectric substrate, one end of the plurality of second electrodes extends out of the second end of the dielectric substrate, the length of at least part of the first electrode along the third direction is greater than the length of the second electrode along the third direction, and the first direction, the second direction and the third direction are perpendicular to each other; a first external electrode terminal is arranged at the first end of the dielectric substrate, and the first external electrode terminal is connected to the plurality of first electrodes; a second external electrode terminal is arranged at the second end of the dielectric substrate, and the second external electrode terminal is connected to the plurality of second electrodes.

[0006] Optionally, the first electrode includes an electrode portion and an extension portion, one end of the electrode portion is connected to one end of the extension portion, and the other end of the extension portion extends out of the first end of the dielectric substrate, the length of the electrode portion along the third direction is greater than the length of the second electrode along the third direction, and the length of the extension portion along the third direction is equal to the length of the second electrode along the third direction.

[0007] Optionally, a step is formed at the position where the electrode portion and the extension portion are connected; and / or the projections of the electrode portion and the extension portion along the first direction are both rectangular, and the projection of the second electrode portion along the first direction is a rectangle.

[0008] Optionally, the distances between the other ends of the multiple first electrodes and the end face of the second end of the dielectric substrate are the same, and the distances between the other ends of the multiple second electrodes and the end face of the first end of the dielectric substrate are the same; the distance between the other end of the first electrode and the end face of the second end of the dielectric substrate, and the distance between the other end of the second electrode and the end face of the first end of the dielectric substrate are the same.

[0009] Optionally, the center line of the dielectric substrate, the center line of the first electrode and the center line of the second electrode coincide with each other.

[0010] Optionally, along the third direction, neither the first electrode nor the second electrode extends out of the dielectric matrix, and along the third direction, both ends of the first electrode protrude out of the second electrode.

[0011] Optionally, along the third direction, a protrusion length of each end of the first electrode from the second electrode is 10 μm to 100 μm.

[0012] Optionally, along the third direction, the distance between each end of the second electrode and the side wall of the dielectric substrate is 25 μm to 150 μm.

[0013] Optionally, the first external electrode terminal wraps around an end surface of a first end of the dielectric substrate, and the second external electrode terminal wraps around an end surface of a second end of the dielectric substrate.

[0014] In order to solve the above technical problem, another technical solution adopted by the utility model is: to provide an electronic device, characterized in that it includes the above capacitor.

[0015] The beneficial effects of the embodiments of the utility model are as follows: Different from the prior art, the embodiments of the utility model provide a capacitor and an electronic device, the capacitor comprising a dielectric substrate, comprising a plurality of dielectric layers, the plurality of dielectric layers are stacked along a first direction, the dielectric substrate comprises a first end and a second end along a second direction; an electrode layer, comprising a plurality of first electrodes and a plurality of second electrodes, the first electrodes and the second electrodes are alternately arranged along the first direction, and one of the dielectric layers is located between a first electrode and a second electrode, one end of the plurality of first electrodes extends out of the first end of the dielectric substrate, one end of the plurality of second electrodes extends out of the second end of the dielectric substrate, the length of at least part of the first electrode along the third direction is greater than the length of the second electrode along the third direction, and the first direction, the second direction and the third direction are perpendicular to each other; a first external electrode terminal is arranged at the first end of the dielectric substrate, and the first external electrode terminal is connected to the plurality of first electrodes; a second external electrode terminal is arranged at the second end of the dielectric substrate, and the second external electrode terminal is connected to the plurality of second electrodes. In the above manner, when the lengths of the first electrode and the second electrode along the third direction are originally equal, when the dielectric layers printed with the first electrode and the second electrode are stacked, the edge area of ​​the unprinted electrode layer will be recessed along the third direction due to the lack of support from the electrode layer, and the more the number of stacked layers, the greater the degree of recess; in the capacitor provided by the utility model, along the third direction, the length of at least part of the first electrode along the third direction is greater than the length of the second electrode along the third direction, and when the dielectric layer printed with the first electrode and the dielectric layer printed with the second electrode are alternately stacked, the length of the first electrode along the third direction is greater than the length of the second electrode along the third direction, so that the first electrode provides a support area of ​​a certain length for the edge area of ​​the dielectric layer during the stacking process, and the support area constitutes a buffer area. As the number of stacked layers increases, the recessed area from the edge of the dielectric substrate to the center of the dielectric substrate after stacking is significantly reduced due to the existence of the buffer area, so that the stress at the junction of the area where the first electrode or the second electrode is not printed and the area where the first electrode or the second electrode is printed is significantly reduced, thereby reducing the possibility of microcracks in the dielectric substrate after the dielectric layers are stacked and sintered. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments of the utility model will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on the drawings without paying creative work.

[0017] Figure 1 It is a schematic diagram of a capacitor provided by an embodiment of the utility model;

[0018] Figure 2 It is a cross-sectional view of a dielectric substrate including an electrode layer provided by an embodiment of the utility model in a second direction;

[0019] Figure 3 It is a cross-sectional view of a dielectric substrate including an electrode layer provided by an embodiment of the utility model in a third direction;

[0020] Figure 4 It is a schematic diagram of an electrode layer provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0021] In order to facilitate the understanding of the utility model, the utility model is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on the other element, or there can be one or more centered elements therebetween. When an element is described as "connected to" another element, it can be directly connected to the other element, or there can be one or more centered elements therebetween. The terms "vertical", "horizontal", "left", "right" and similar expressions used in this specification are for illustrative purposes only.

[0022] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by technicians in the technical field of the present invention. The terms used in this specification are only for the purpose of describing specific embodiments and are not used to limit the present invention. The term "and / or" used in this specification includes any and all combinations of one or more related listed items.

[0023] See also Figure 1A capacitor 1000 includes a dielectric substrate 1, an electrode layer 2, a first external electrode terminal 3 and a second external electrode terminal 4, wherein the electrode layer 2 is arranged in the dielectric substrate 1, the first external electrode terminal 3 is arranged at the first end S1 of the dielectric substrate 1; the second external electrode terminal 4 is arranged at the second end S2 of the dielectric substrate 1, and the first external electrode terminal 3 and the second external electrode terminal 4 are arranged at intervals, and the first external electrode terminal 3 and the second external electrode terminal 4 are arranged at intervals for easy installation to an external device.

[0024] For the above medium matrix 1, please refer to Figure 1 Combined with Figure 2 The dielectric substrate 1 includes a plurality of dielectric layers 11, and the plurality of dielectric layers 11 are stacked along a first direction. The dielectric substrate 1 includes a first end S1 and a second end S2 along a second direction.

[0025] It can be understood that the center line of the dielectric matrix 1, the center line of the first electrode 21 and the center line of the second electrode 22 coincide with each other, so that the dielectric matrix 1 formed by stacking the dielectric matrix 1, the first electrode 21 and the second electrode 22 presents a symmetrical structure. The symmetrical structure of the dielectric matrix 1 is convenient for mass production and also makes the internal utilization rate of the dielectric matrix 1 of the capacitor 1000 higher.

[0026] It is worth noting that the first end S1 and the second end S2 of the dielectric substrate 1 are used to connect the first external electrode terminal 3 and the second external electrode terminal 4 to the electrode layer 2, respectively. The specific orientation may be described differently due to different observation angles. This embodiment is only used as an example. The first end S1 and the second end S2 of the dielectric substrate 1 specifically refer to which two parts of the dielectric substrate 1 need to be specified according to actual needs and in combination with the structure of the capacitor 1000. In this embodiment of the utility model, Figure 1 S1 in the figure is the first end of the dielectric substrate 1. Figure 1 S2 in the figure is the second end of the medium matrix 1.

[0027] In some embodiments, the edges of the dielectric substrate 1 are provided with rounded corners, and the radius of the rounded corners of the dielectric substrate 1 can be set according to actual needs, and the maximum radius of the rounded corners of the dielectric substrate 1 does not exceed half of the minimum value of the length, width, and height of the dielectric substrate 1. The setting of the rounded corners helps the capacitor 1000 to withstand greater pressure when subjected to external loads, and the dielectric substrate 1, such as a ceramic material, during the processing process, the setting of the rounded corners makes the stress distribution at the edge of the dielectric substrate 1 more uniform during the sintering process, thereby improving the service life of the capacitor 1000, further reducing the difficulty of processing and manufacturing the capacitor 1000, and improving the yield rate of the capacitor 1000, which is conducive to industrial mass production.

[0028] In some embodiments, the material of the dielectric matrix 1 includes but is not limited to ceramics and organic polymers, such as aluminum oxide, barium titanate, polyacrylate or polyimide. The capacitor 1000 made of a ceramic dielectric matrix 1 has high high voltage resistance and stability, and is suitable for high frequency and high temperature environments. The capacitor 1000 made of an organic polymer dielectric matrix 1 has high capacitance density and low loss, and is suitable for low frequency and low temperature environments.

[0029] For the electrode layer 2 mentioned above, please refer to Figure 2 Combined with Figure 3 , comprising a plurality of first electrodes 21 and a plurality of second electrodes 22, the first electrodes 21 and the second electrodes 22 are alternately arranged along a first direction, and a dielectric layer 11 is located between a first electrode 21 and a second electrode 22, one end of the plurality of first electrodes 21 extends out of a first end S1 of the dielectric substrate 1, one end of the plurality of second electrodes 22 extends out of a second end S2 of the dielectric substrate 1, the length of at least part of the first electrode 21 along a third direction is greater than the length of the second electrode 22 along the third direction, and the first direction, the second direction and the third direction are mutually perpendicular. Along the third direction, neither the first electrode 21 nor the second electrode 22 extends out of the dielectric substrate 1, and along the third direction, both ends of the first electrode 21 protrude from the second electrode 22. In the prior art, when the lengths of the first electrode 21 and the second electrode 22 are the same along the third direction, during the stacking process of the first electrode 21, the dielectric layer 11 and the second electrode 22, there is an area between two adjacent dielectric layers 11 that is not covered by the electrode layer 2. During the pressing process, the area not covered by the electrode layer 2 is not supported by the electrode layer 2, so that the dielectric layer 11 will be recessed downward along the third direction, and as the number of stacked layers increases, each two adjacent dielectric layers 11 are recessed, and the dielectric matrix 1 formed has a step in appearance, and the junction between the recessed area and the non-recessed area will generate a large stress due to the recessed deformation, resulting in microcracks in the dielectric matrix 1. In this embodiment, both ends of the first electrode 21 protrude relative to the second electrode 22, so that during the stacking process of the first electrode 21, the dielectric layer 11 and the second electrode 22, the protruding parts constitute a buffer area. Compared with the prior art, the presence of the buffer area significantly reduces the degree of depression between two adjacent dielectric layers 11, and the steps on the appearance of the stacked dielectric substrate 1 are improved. Moreover, with the increase of the protruding parts, the first electrode 21, the dielectric layer 11 and the second electrode 22 are subjected to the same pressing force as that in the prior art, and the stress at the junction of the depressed area and the non-depressed area is also improved because the depression degree is improved.

[0030] Wherein, along the third direction, the protrusion length of each end of the first electrode 21 from the second electrode 22 is 10 μm to 100 μm, and along the third direction, the distance between each end of the second electrode 22 and the side wall of the dielectric substrate 1 is 25 μm to 150 μm.

[0031] It is worth noting that the first direction, the second direction and the third direction in this embodiment refer to corresponding directions in the coordinate system, and the first direction is designated as the X-axis direction, the second direction is designated as the Y-axis direction, and the third direction is designated as the Z-axis direction.

[0032] It can be understood that the protruding length of each end of the first electrode 21 from the second electrode 22 can be selected within the above range according to actual needs. In this embodiment, the preferred protruding length of each end of the first electrode 21 from the second electrode 22 is 50 μm; along the third direction, the distance between each end of the second electrode 22 and the side wall of the dielectric substrate 1 is selected within the above range according to actual needs. In this embodiment, the preferred distance between each end of the second electrode 22 and the side wall of the dielectric substrate 1 is 100 μm.

[0033] For the first electrode 21 mentioned above, please refer to Figure 4 The first electrode 21 includes an electrode portion 211 and an extension portion 212, one end of the electrode portion 211 is connected to one end of the extension portion 212, and the other end of the extension portion 212 extends from the first end S1 of the dielectric substrate 1, the length of the electrode portion 211 along the third direction is greater than the length of the second electrode 22 along the third direction, and the length of the extension portion 212 along the third direction is equal to the length of the second electrode 22 along the third direction.

[0034] In some embodiments, a step is formed at the position where the electrode portion 211 and the extension portion 212 are connected; the projections of the electrode portion 211 and the extension portion 212 along the first direction are both rectangular, and the projection of the second electrode 22 along the first direction is a rectangle. The rectangular electrode portion 211, the extension portion 212 and the second electrode 22 are convenient for cutting and other processing techniques during the processing of the capacitor 1000.

[0035] In some embodiments, Figure 2 As shown, the other ends of the multiple first electrodes 21 are at the same distance from the end surface of the second end S2 of the dielectric substrate 1, and the other ends of the multiple second electrodes 22 are at the same distance from the end surface of the first end S1 of the dielectric substrate 1; the distance between the other end of the first electrode 21 and the end surface of the second end S2 of the dielectric substrate 1, and the distance between the other end of the second electrode 22 and the end surface of the first end S1 of the dielectric substrate 1 are the same.

[0036] In some embodiments, the distance between the other end of the first electrode 21 and the end surface of the second end S2 of the dielectric substrate 1 ranges from 25 μm to 150 μm, and the distance between the other end of the first electrode 21 and the end surface of the second end S2 of the dielectric substrate 1 is set according to actual needs. In this embodiment, the distance between the other end of the first electrode 21 and the end surface of the second end S2 of the dielectric substrate 1 is preferably 100 μm. The distance between the other end of the second electrode 22 and the end surface of the first end S1 of the dielectric substrate 1 ranges from 25 μm to 150 μm, and the distance between the other end of the second electrode 22 and the end surface of the first end S1 of the dielectric substrate 1 is set according to actual needs. In this embodiment, the distance between the other end of the second electrode 22 and the end surface of the first end S1 of the dielectric substrate 1 is preferably 100 μm.

[0037] It can be understood that the distance between the other end of the first electrode 21 and the end surface of the second end S2 of the dielectric substrate 1 is set to distinguish whether the first electrode 21 is connected to the second external electrode terminal 4. The distance between the other end of the second electrode 22 and the end surface of the first end S1 of the dielectric substrate 1 is set to distinguish whether the second electrode 22 is connected to the first external electrode terminal 3. By intuitively distinguishing the first electrode 21 and the second electrode 22 by the connection state without destroying the dielectric substrate 1, it is convenient for the packaging of the dielectric substrate 1 in the later stage.

[0038] In some embodiments, the first external electrode terminal 3 is a positive terminal, the first electrode 21 connected to the first external electrode is a positive electrode, the second external electrode terminal 4 is a negative terminal, and the second electrode 22 connected to the second external electrode terminal 4 is a negative electrode, or the first external electrode terminal 3 is a negative terminal, the first electrode 21 connected to the first external electrode is a negative electrode, the second external electrode terminal 4 is a positive terminal, and the second electrode 22 connected to the second external electrode terminal 4 is a positive electrode.

[0039] For the first external electrode terminal 3 and the second external electrode terminal 4, please refer to Figure 1 The first external electrode terminal 3 is connected to the multiple first electrodes 21; the second external electrode terminal 4 is connected to the multiple second electrodes 22, and the first external electrode terminal 3 wraps the end surface of the first end S1 of the dielectric substrate 1, the first external electrode terminal 3 is connected to each first electrode 21 exposed from the dielectric substrate 1 close to the inner surface of the dielectric substrate 1, and the second external electrode terminal 4 wraps the end surface of the second end S2 of the dielectric substrate 1, and the second external electrode terminal 4 is connected to each second electrode 22 exposed from the dielectric substrate 1 close to the inner surface of the dielectric substrate 1.

[0040] It can be understood that the way in which the first external electrode terminal 3 is connected to the first electrode 21 includes but is not limited to: welding, one-piece molding, adhesive packaging, etc. For example, welding is used to make the connection between the first external electrode terminal 3 and the first electrode 21 more stable and reliable, and the one-piece molding processing method is conducive to industrial mass production. Examples are not given one by one here. Similarly, the way in which the second external electrode terminal 4 is connected to the second electrode 22 is the same as the way in which the first external electrode terminal 3 is connected to the first electrode 21, and can be selected according to actual needs.

[0041] It can be understood that the first external electrode terminal 3 and the second external electrode terminal 4 are formed by immersion sealing and sintering in the processing technology of the capacitor 1000, and the shapes are different. Therefore, the shapes of the first external electrode terminal 3 and the second external electrode terminal 4 are only used as a schematic reference in this embodiment, and are not limited to the following. Figure 1 Shape shown.

[0042] In the embodiment of the utility model, the capacitor 1000 includes a dielectric substrate 1, the dielectric substrate 1 includes a plurality of dielectric layers 11, the plurality of dielectric layers 11 are stacked along a first direction, the dielectric substrate 1 includes a first end S1 and a second end S2 along a second direction; an electrode layer 2 includes a plurality of first electrodes 21 and a plurality of second electrodes 22, the first electrodes 21 and the second electrodes 22 are alternately arranged along the first direction, and one of the dielectric layers 11 is located between a first electrode 21 and a second electrode 22, one end of the plurality of first electrodes 21 extends out of the first end S1 of the dielectric substrate 1, One ends of the multiple second electrodes 22 extend out of the second end S2 of the dielectric substrate 1, the length of the first electrode 21 at least partially along the third direction is greater than the length of the second electrode 22 along the third direction, and the first direction, the second direction and the third direction are perpendicular to each other; the first external electrode terminal 3 is arranged at the first end S1 of the dielectric substrate 1, and the first external electrode terminal 3 is connected to the multiple first electrodes 21; the second external electrode terminal 4 is arranged at the second end S2 of the dielectric substrate 1, and the second external electrode terminal 4 is connected to the multiple second electrodes 22. By the above method, when the lengths of the first electrode 21 and the second electrode 22 along the third direction are originally equal, when the dielectric layer 11 printed with the first electrode 21 and the second electrode 22 are stacked, the edge area of ​​the unprinted electrode layer 2 will be recessed along the third direction due to the lack of support from the electrode layer 2, and the more stacked layers there are, the greater the degree of recessing. In the capacitor 1000 provided by the utility model, along the third direction, the length of at least part of the first electrode 21 along the third direction is greater than the length of the second electrode 22 along the third direction, and when the dielectric layer 11 printed with the first electrode 21 and the dielectric layer 11 printed with the second electrode 22 are alternately stacked, the first electrode 21 The length along the third direction is greater than the length of the second electrode 22 along the third direction, so that the first electrode 21 provides a support area of ​​a certain length for the edge area of ​​the dielectric layer 11 during the stacking process, and the support area constitutes a buffer area. As the number of stacked layers increases, the recessed area after stacking is significantly less recessed from the edge of the dielectric substrate 1 toward the center of the dielectric substrate 1 due to the existence of the buffer area, thereby significantly reducing the stress at the junction of the area where the first electrode 21 or the second electrode 22 is not printed and the area where the first electrode 21 or the second electrode 22 is printed, thereby reducing the possibility of microcracks in the dielectric substrate 1 after the dielectric layer 11 is stacked and sintered.

[0043] The utility model further provides an electronic device embodiment, the electronic device includes the above-mentioned capacitor 1000, the structure and function of the capacitor 1000 can refer to the above-mentioned embodiment, and will not be described in detail here.

[0044] It should be noted that the preferred embodiments of the utility model are given in the specification and drawings of the utility model, but the utility model can be implemented in many different forms and is not limited to the embodiments described in the specification. These embodiments are not used as additional restrictions on the content of the utility model. The purpose of providing these embodiments is to make the understanding of the disclosure of the utility model more thorough and comprehensive. In addition, the above-mentioned technical features continue to be combined with each other to form various embodiments not listed above, which are all regarded as the scope of the description of the utility model; further, for ordinary technicians in this field, they can be improved or transformed according to the above description, and all these improvements and transformations should belong to the scope of protection of the claims attached to the utility model.

Claims

1. A capacitor, It is characterized in that include A dielectric substrate, comprising a plurality of dielectric layers, the plurality of dielectric layers are stacked along a first direction, and the dielectric substrate comprises a first end and a second end along a second direction; The electrode layer comprises a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes and the second electrodes are alternately arranged along a first direction, and the dielectric layer is located between the first electrode and the second electrode, one end of the plurality of first electrodes extends out of the first end of the dielectric substrate, and one end of the plurality of second electrodes extends out of the second end of the dielectric substrate, the length of at least part of the first electrode along the third direction is greater than the length of the second electrode along the third direction, and the first direction, the second direction and the third direction are perpendicular to each other; A first external electrode terminal is disposed at a first end of the dielectric substrate, and the first external electrode terminal is connected to the plurality of first electrodes; The second external electrode terminal is arranged at the second end of the dielectric substrate, and the second external electrode terminal is connected to the plurality of second electrodes.

2. The capacitor according to claim 1, It is characterized in that The first electrode includes an electrode portion and an extension portion, one end of the electrode portion is connected to one end of the extension portion, and the other end of the extension portion extends out of the first end of the dielectric substrate, the length of the electrode portion along the third direction is greater than the length of the second electrode along the third direction, and the length of the extension portion along the third direction is equal to the length of the second electrode along the third direction.

3. The capacitor according to claim 2, It is characterized in that A step is formed at a position where the electrode portion is connected to the extension portion; and / or, Projections of the electrode portion and the extension portion along the first direction are both rectangular, and the projection of the second electrode portion along the first direction is a rectangle.

4. The capacitor according to claim 1, It is characterized in that The other ends of the plurality of first electrodes are at the same distance from the end surface of the second end of the dielectric substrate, and the other ends of the plurality of second electrodes are at the same distance from the end surface of the first end of the dielectric substrate; The distance between the other end of the first electrode and the end surface of the second end of the dielectric substrate is the same as the distance between the other end of the second electrode and the end surface of the first end of the dielectric substrate.

5. The capacitor according to claim 1, It is characterized in that The center line of the dielectric substrate, the center line of the first electrode and the center line of the second electrode coincide with each other.

6. The capacitor according to claim 1, It is characterized in that Along the third direction, neither the first electrode nor the second electrode extends out of the dielectric substrate, and along the third direction, both ends of the first electrode protrude out of the second electrode.

7. The capacitor according to claim 6, It is characterized in that Along the third direction, a protrusion length of each end of the first electrode protruding from the second electrode is 10 μm to 100 μm.

8. The capacitor according to claim 6, It is characterized in that Along the third direction, a distance between each end of the second electrode and a side wall of the dielectric substrate is 25 μm to 150 μm.

9. The capacitor according to any one of claims 1 to 8, It is characterized in that The first external electrode terminal wraps around an end surface of the first end of the dielectric substrate, and the second external electrode terminal wraps around an end surface of the second end of the dielectric substrate.

10. An electronic device, It is characterized in that Comprising a capacitor as claimed in any one of claims 1 to 9.

Citation Information

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