Power supply anti-backflow circuit, power supply anti-backflow system and automobile

Abstract

The utility model provides a power supply anti-backflow circuit, a system and an automobile, in the circuit, when an input power supply disappears or is reduced, because an electrolytic capacitor stores a certain charge, the voltage at the right end of a PMOS tube is greater than the voltage at the left end, the reverse input of a comparator is greater than the forward input, the comparator outputs a low level, and an NMOS tube is cut off; at the moment, the grid voltage of the PMOS tube is equal to the source voltage, and the PMOS tube is cut off, so that the voltage of the electrolytic capacitor does not flow to other external equipment, and the voltage of the internal circuit does not flow back to other external equipment, the aim of preventing the power supply from flowing back is fulfilled, and meanwhile, the voltage input into the internal circuit is ensured to have no voltage drop; and mutual influence among a plurality of electric devices (internal circuits and other external devices) is avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of circuit design, in particular to a power backflow prevention circuit, system and automobile. Background Art

[0002] In automotive applications, multiple devices often use the same power supply. If there is no backflow prevention design, the power supplies of various power-consuming devices will affect each other.

[0003] In summary, how to design a power backflow prevention circuit has become a technical problem that urgently needs to be solved. Utility Model Content

[0004] In view of this, an object of the present invention is to provide a power backflow prevention circuit, system and automobile to alleviate the technical problem that the prior art cannot realize the design of the power backflow prevention circuit.

[0005] In a first aspect, an embodiment of the utility model provides a power backflow prevention circuit, comprising: a comparator, an NMOS tube, a PMOS tube, a first resistor, a second resistor, a third resistor and an electrolytic capacitor;

[0006] The positive input end of the comparator is respectively connected to one end of the first resistor, a power supply, and other external devices, the negative input end of the comparator is respectively connected to one end of the third resistor and the source of the PMOS tube, and the output end of the comparator is respectively connected to the other end of the first resistor and the gate of the NMOS tube;

[0007] The gate of the NMOS tube is connected to one end of the second resistor, the source of the NMOS tube is connected to the other end of the second resistor and the ground, and the drain of the NMOS tube is connected to the gate of the PMOS tube and the other end of the third resistor;

[0008] The drain of the PMOS tube is respectively connected to the positive input terminal of the comparator and the power supply, and the source of the PMOS tube is respectively connected to one end of the third resistor, the positive electrode of the electrolytic capacitor, and the internal circuit;

[0009] The negative electrode of the electrolytic capacitor is grounded.

[0010] Furthermore, it also includes: a fourth resistor and a fifth resistor;

[0011] One end of the fourth resistor is connected to the power supply, and the other end of the fourth resistor is connected to the positive input terminal of the comparator;

[0012] One end of the fifth resistor is connected to the inverting input end of the comparator, and the other end of the fifth resistor is connected to the source of the PMOS tube.

[0013] Furthermore, it also includes: a sixth resistor;

[0014] One end of the sixth resistor is connected to the output end of the comparator, and the other end of the sixth resistor is connected to the gate of the NMOS tube.

[0015] Furthermore, it also includes: a seventh resistor;

[0016] One end of the seventh resistor is connected to the drain of the NMOS tube, and the other end of the seventh resistor is connected to the gate of the PMOS tube.

[0017] Further, it also includes: a diode;

[0018] The anode of the diode is grounded, and the cathode of the diode is connected to the power supply.

[0019] Furthermore, the number of the electrolytic capacitors is 2, wherein the positive electrodes of the two electrolytic capacitors are connected, and the negative electrodes of the two electrolytic capacitors are grounded.

[0020] In a second aspect, an embodiment of the utility model further provides a power backflow prevention system, comprising the power backflow prevention circuit as described in any one of the above-mentioned first aspects, and further comprising: the internal circuit and the other external devices.

[0021] Furthermore, the internal circuit includes: a BMS, and the other external devices include: a vehicle computer.

[0022] In a second aspect, an embodiment of the utility model further provides a car, wherein the car comprises the power backflow prevention system described in any one of the second aspects above.

[0023] In an embodiment of the utility model, a power backflow prevention circuit is provided, including: a comparator, an NMOS tube, a PMOS tube, a first resistor, a second resistor, a third resistor and an electrolytic capacitor; the positive input end of the comparator is respectively connected to one end of the first resistor, a power supply, and other external devices, the reverse input end of the comparator is respectively connected to one end of the third resistor and the source of the PMOS tube, and the output end of the comparator is respectively connected to the other end of the first resistor and the gate of the NMOS tube; the gate of the NMOS tube is connected to one end of the second resistor, the source of the NMOS tube is respectively connected to the other end of the second resistor and the ground, and the drain of the NMOS tube is respectively connected to the gate of the PMOS tube and the other end of the third resistor; the drain of the PMOS tube is respectively connected to the positive input end of the comparator and the power supply, and the source of the PMOS tube is respectively connected to one end of the third resistor, the positive electrode of the electrolytic capacitor, and the internal circuit; the negative electrode of the electrolytic capacitor is grounded. From the above description, it can be known that in the power supply backflow prevention circuit of the utility model, when there is input power, the voltage flows to the internal circuit through the body diode of the PMOS tube. Because the body diode has a voltage drop, at this time, the voltage at the left end of the PMOS tube is greater than the voltage at the right end, the positive input of the comparator is greater than the reverse input, the comparator outputs a high level, the NMOS tube is turned on and grounded, and after the NMOS tube is turned on, the gate voltage of the PMOS tube is less than the source voltage due to the third resistor voltage divider, so that the PMOS tube is turned on, and the internal circuit works normally, and after the PMOS tube is turned on, the voltage input to the internal circuit is still the voltage of the power supply, without a voltage drop; when the input power disappears or decreases, due to the electrolytic capacitor A certain amount of charge is stored. At this time, the voltage at the right end of the PMOS tube is greater than the voltage at the left end, the reverse input of the comparator is greater than the forward input, the comparator outputs a low level, and the NMOS tube is cut off. At this time, the gate voltage of the PMOS tube is equal to the source voltage, and the PMOS tube is cut off, so that the voltage of the electrolytic capacitor will not flow to other external devices, and the voltage of the internal circuit will not flow back to other external devices. While achieving the purpose of power backflow prevention, it also ensures that the voltage input to the internal circuit has no voltage drop, avoids mutual influence between multiple electrical devices (internal circuits and other external devices), and alleviates the technical problem that the prior art cannot realize the design of power backflow prevention circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the specific implementation methods of the utility model or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 A schematic diagram of the structure of a power supply backflow prevention circuit provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0026] The technical solution of the utility model will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0027] Traditional technology cannot realize the design of power backflow protection circuit.

[0028] Based on this, in the power supply backflow prevention circuit of the utility model, when there is input power, the voltage flows to the internal circuit through the body diode of the PMOS tube. Because the body diode has a voltage drop, at this time, the voltage at the left end of the PMOS tube is greater than the voltage at the right end, the positive input of the comparator is greater than the reverse input, the comparator outputs a high level, the NMOS tube is turned on and grounded, and after the NMOS tube is turned on, the gate voltage of the PMOS tube is less than the source voltage due to the third resistor voltage divider, so that the PMOS tube is turned on, and the internal circuit works normally, and after the PMOS tube is turned on, the voltage input to the internal circuit is still the voltage of the power supply, without a voltage drop; when the input power disappears Or when it decreases, since the electrolytic capacitor stores a certain amount of charge, the voltage at the right end of the PMOS tube is greater than the voltage at the left end, the reverse input of the comparator is greater than the forward input, the comparator outputs a low level, and the NMOS tube is cut off. At this time, the gate voltage of the PMOS tube is equal to the source voltage, and the PMOS tube is cut off, so that the voltage of the electrolytic capacitor will not flow to other external devices, and the voltage of the internal circuit will not be backflowed to other external devices. While achieving the purpose of power backflow prevention, it also ensures that the voltage input to the internal circuit has no voltage drop, avoiding mutual influence between multiple electrical devices (internal circuits and other external devices).

[0029] To facilitate understanding of this embodiment, a power backflow prevention circuit disclosed in an embodiment of the utility model is first introduced in detail.

[0030] Embodiment 1:

[0031] Figure 1 is a schematic diagram of a power backflow prevention circuit according to an embodiment of the utility model. Figure 1 As shown, the power backflow prevention circuit includes: a comparator, an NMOS tube, a PMOS tube, a first resistor, a second resistor, a third resistor and an electrolytic capacitor;

[0032] The positive input end of the comparator is respectively connected to one end of the first resistor, a power supply, and other external devices, the negative input end of the comparator is respectively connected to one end of the third resistor and the source of the PMOS tube, and the output end of the comparator is respectively connected to the other end of the first resistor and the gate of the NMOS tube;

[0033] The gate of the NMOS tube is connected to one end of the second resistor, the source of the NMOS tube is connected to the other end of the second resistor and the ground respectively, and the drain of the NMOS tube is connected to the gate of the PMOS tube and the other end of the third resistor respectively;

[0034] The drain of the PMOS tube is connected to the positive input terminal of the comparator and the power supply respectively, and the source of the PMOS tube is connected to one end of the third resistor, the positive electrode of the electrolytic capacitor, and the internal circuit respectively;

[0035] The negative terminal of the electrolytic capacitor is grounded.

[0036] In the embodiment of the present utility model, Figure 1 As shown, V1 is the input power supply, V2 is the power supply after being controlled by the PMOS tube switch, Q2 is a PMOS tube, which is the control switch of the power supply, Q1 is an NMOS tube, which is used to control the PMOS tube Q2, the third resistor R3 provides a driving voltage for Q2, U1A is a comparator, which is used to compare the sizes of V1 and V2, the positive input is connected to V1, the reverse input is V2, the first resistor R1 provides a high level for U1A output, and the second resistor R2 is used to stabilize the low level of Q1.

[0037] If there is no backflow prevention design, when the power is disconnected or reduced, the current will flow from V2 to V1, causing other external devices to be abnormally energized when the power is off. At the same time, the power of the internal circuit (referring to the power stored in the electrolytic capacitor) will be consumed quickly and cannot maintain normal operation.

[0038] The working principle of the circuit of the utility model is introduced below:

[0039] When there is input power V1, the voltage flows to V2 through the body diode of the PMOS tube Q2. Because the body diode has a voltage drop, at this time V1>V2, the positive input of the comparator is greater than the negative input, the comparator outputs a high level, the NMOS tube Q1 is turned on and grounded, and after the NMOS tube Q1 is turned on, the gate voltage of the PMOS tube Q2 is less than the source voltage due to the voltage division of the third resistor R3, so that the PMOS tube Q2 is turned on, and the product works normally. Since the PMOS tube Q2 is a MOS tube, there is no voltage drop after it is turned on, so the voltage input to the internal circuit is still the voltage of the power supply, that is, there is no voltage drop.

[0040] When the power supply V1 disappears or decreases, since the electrolytic capacitor stores a certain amount of charge, V2>V1 at this time, the negative input of the comparator is greater than the positive input, the comparator outputs a low level, the NMOS tube Q1 is cut off, and the gate voltage of the PMOS tube Q2 is equal to the source voltage, and the PMOS tube Q2 is cut off, so that the voltage of V2 will not flow to V1, so that the voltage of the internal circuit will not flow back to other external devices, and the charge of the electrolytic capacitors C1 and C2 will not be extracted, ensuring that the product (referring to the internal circuit) can maintain normal operation (voltage provided by the electrolytic capacitor) at the moment of abnormal power failure.

[0041] In an embodiment of the utility model, a power backflow prevention circuit is provided, including: a comparator, an NMOS tube, a PMOS tube, a first resistor, a second resistor, a third resistor and an electrolytic capacitor; the positive input end of the comparator is respectively connected to one end of the first resistor, a power supply, and other external devices, the reverse input end of the comparator is respectively connected to one end of the third resistor and the source of the PMOS tube, and the output end of the comparator is respectively connected to the other end of the first resistor and the gate of the NMOS tube; the gate of the NMOS tube is connected to one end of the second resistor, the source of the NMOS tube is respectively connected to the other end of the second resistor and the ground, and the drain of the NMOS tube is respectively connected to the gate of the PMOS tube and the other end of the third resistor; the drain of the PMOS tube is respectively connected to the positive input end of the comparator and the power supply, and the source of the PMOS tube is respectively connected to one end of the third resistor, the positive electrode of the electrolytic capacitor, and the internal circuit; the negative electrode of the electrolytic capacitor is grounded. From the above description, it can be known that in the power supply backflow prevention circuit of the utility model, when there is input power, the voltage flows to the internal circuit through the body diode of the PMOS tube. Because the body diode has a voltage drop, at this time, the voltage at the left end of the PMOS tube is greater than the voltage at the right end, the positive input of the comparator is greater than the reverse input, the comparator outputs a high level, the NMOS tube is turned on and grounded, and after the NMOS tube is turned on, the gate voltage of the PMOS tube is less than the source voltage due to the third resistor voltage divider, so that the PMOS tube is turned on, and the internal circuit works normally, and after the PMOS tube is turned on, the voltage input to the internal circuit is still the voltage of the power supply, without a voltage drop; when the input power disappears or decreases, due to the electrolytic capacitor A certain amount of charge is stored. At this time, the voltage at the right end of the PMOS tube is greater than the voltage at the left end, the reverse input of the comparator is greater than the forward input, the comparator outputs a low level, and the NMOS tube is cut off. At this time, the gate voltage of the PMOS tube is equal to the source voltage, and the PMOS tube is cut off, so that the voltage of the electrolytic capacitor will not flow to other external devices, and the voltage of the internal circuit will not flow back to other external devices. While achieving the purpose of power backflow prevention, it also ensures that the voltage input to the internal circuit has no voltage drop, avoids mutual influence between multiple electrical devices (internal circuits and other external devices), and alleviates the technical problem that the prior art cannot realize the design of power backflow prevention circuit.

[0042] The above content briefly introduces the power backflow prevention circuit of the present utility model, and the specific contents involved therein are described in detail below.

[0043] In an optional embodiment of the present invention, Figure 1 As shown, it also includes: a fourth resistor and a fifth resistor;

[0044] One end of the fourth resistor is connected to the power supply, and the other end of the fourth resistor is connected to the positive input terminal of the comparator;

[0045] One end of the fifth resistor is connected to the inverting input end of the comparator, and the other end of the fifth resistor is connected to the source of the PMOS tube.

[0046] Specifically, the fourth resistor R4 and the fifth resistor R5 are input series protection resistors of the comparator U1A.

[0047] In an optional embodiment of the present invention, Figure 1 As shown, it also includes: a sixth resistor;

[0048] One end of the sixth resistor is connected to the output end of the comparator, and the other end of the sixth resistor is connected to the gate of the NMOS tube.

[0049] Specifically, the sixth resistor is denoted by R6.

[0050] In an optional embodiment of the present invention, Figure 1 As shown, it also includes: a seventh resistor;

[0051] One end of the seventh resistor is connected to the drain of the NMOS tube, and the other end of the seventh resistor is connected to the gate of the PMOS tube.

[0052] Specifically, the seventh resistor R7 provides a driving voltage for the PMOS tube Q2. When the input power supply is working, the third resistor R3 and the seventh resistor R7 divide the voltage so that the gate voltage of the PMOS tube Q2 is less than the source voltage, so that Q2 is turned on.

[0053] In an optional embodiment of the present invention, Figure 1 As shown, it also includes: a diode;

[0054] The anode of the diode is connected to the ground, and the cathode of the diode is connected to the power supply.

[0055] Specifically, the diode D1 may be a transient voltage suppressor diode (TVS) for ingress protection.

[0056] In an optional embodiment of the present invention, Figure 1As shown, the number of electrolytic capacitors is 2, wherein the positive electrodes of the two electrolytic capacitors are connected, and the negative electrodes of the two electrolytic capacitors are grounded.

[0057] Specifically, the electrolytic capacitors C1 and C2 are support capacitors of the internal circuit.

[0058] The power backflow prevention circuit of the utility model adds a backflow prevention design at the power input to prevent mutual influence between various electrical devices; and uses MOS tubes and comparators to control the input power to achieve the purpose of power backflow prevention.

[0059] The power backflow prevention circuit of the utility model has the following advantages:

[0060] 1. The power supply is protected against backflow, and the input power supply of the internal circuit has no voltage drop;

[0061] 2. Avoid mutual influence between multiple electrical equipment;

[0062] 3. In the event of a momentary power outage, ensure that the internal charge of the product (i.e. the internal circuit) is not consumed by other devices (i.e. other external devices), and can maintain normal operation for a period of time.

[0063] Embodiment 2:

[0064] The embodiment of the utility model further provides a power backflow prevention system, which includes the power backflow prevention circuit in the above-mentioned embodiment 1, and also includes: an internal circuit and other external devices.

[0065] Specifically, the internal circuit includes: BMS, and other external devices include: vehicle computer.

[0066] Of course, the embodiments of the present invention do not impose any specific restrictions on the above-mentioned internal circuits and other external devices, and other devices may also be used.

[0067] Embodiment three:

[0068] The embodiment of the utility model further provides a car, comprising the power backflow prevention system in the above-mentioned embodiment 2.

[0069] In addition, in the description of the embodiments of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0070] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0071] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model, rather than to limit it. Although the utility model has been described in detail with reference to the aforementioned embodiments, ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solution of the embodiments of the utility model.

Claims

1. A power backflow prevention circuit, characterized in that: include: A comparator, an NMOS tube, a PMOS tube, a first resistor, a second resistor, a third resistor and an electrolytic capacitor; The positive input end of the comparator is respectively connected to one end of the first resistor, a power supply, and other external devices, the negative input end of the comparator is respectively connected to one end of the third resistor and the source of the PMOS tube, and the output end of the comparator is respectively connected to the other end of the first resistor and the gate of the NMOS tube; The gate of the NMOS tube is connected to one end of the second resistor, the source of the NMOS tube is connected to the other end of the second resistor and the ground, and the drain of the NMOS tube is connected to the gate of the PMOS tube and the other end of the third resistor; The drain of the PMOS tube is respectively connected to the positive input terminal of the comparator and the power supply, and the source of the PMOS tube is respectively connected to one end of the third resistor, the positive electrode of the electrolytic capacitor, and the internal circuit; The negative electrode of the electrolytic capacitor is grounded.

2. The circuit according to claim 1, characterized in that Also includes: a fourth resistor and a fifth resistor; One end of the fourth resistor is connected to the power supply, and the other end of the fourth resistor is connected to the positive input terminal of the comparator; One end of the fifth resistor is connected to the inverting input end of the comparator, and the other end of the fifth resistor is connected to the source of the PMOS tube.

3. The circuit according to claim 1, characterized in that Also includes: a sixth resistor; One end of the sixth resistor is connected to the output end of the comparator, and the other end of the sixth resistor is connected to the gate of the NMOS tube.

4. The circuit according to claim 1, characterized in that Also includes: The seventh resistor; One end of the seventh resistor is connected to the drain of the NMOS tube, and the other end of the seventh resistor is connected to the gate of the PMOS tube.

5. The circuit according to claim 1, characterized in that Also includes: diode; The anode of the diode is grounded, and the cathode of the diode is connected to the power supply.

6. The circuit according to claim 1, characterized in that The number of the electrolytic capacitors is 2, wherein the positive electrodes of the two electrolytic capacitors are connected, and the negative electrodes of the two electrolytic capacitors are grounded.

7. A power backflow prevention system, characterized in that: The power backflow prevention circuit comprises the power backflow prevention circuit according to any one of claims 1 to 6, and further comprises: the internal circuit and the other external devices.

8. The system according to claim 7, characterized in that The internal circuit includes: BMS, and the other external devices include: vehicle computer.

9. A car, characterized in that: The vehicle comprises the power backflow prevention system according to any one of claims 7 to 8.

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