Electromagnetic compatibility filter circuit and inverter
By introducing an electromagnetic compatibility filter circuit into the boost circuit, the common mode and differential mode filter units are used to suppress electromagnetic interference, the electromagnetic interference problem of the boost circuit to the power supply and the environment is solved, and the EMC certification pass rate and rectification efficiency are improved.
Patent Information
- Application Number
- CN202420947370.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-30
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2034-04-30
AI Technical Summary
The existing boost circuit has serious electromagnetic radiation problems due to the operation of switching devices, which causes electromagnetic interference to the power supply and the environment. The rectification effect of the existing technology is limited, the rectification period is long and the efficiency is low, and it is difficult to pass the standard EMC certification.
Design an electromagnetic compatibility filter circuit, including a common mode choke, a common mode filter unit, and a differential mode filter unit. By combining the filter capacitor group and a resistor, it is connected to the boost circuit to suppress common mode interference and differential mode interfere and improve crosstalk generated by mutual coupling.
It effectively reduces the electromagnetic interference caused by the boost circuit to the power supply and the environment, improves the EMC conduction certification pass rate, shortens the rectification cycle and improves the rectification efficiency.
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Figure CN222215518U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of power electronics technology, and in particular to an electromagnetic compatibility filter circuit and an inverter. Background Art
[0002] The development of power electronics technology has led to an increase in the operating frequency of switching devices, which has brought certain benefits to the real-time and efficient transmission and conversion of electric energy: improving the utilization rate of electric energy while reducing environmental pollution and energy waste. However, for fully controlled devices, whether it is an insulated gate bipolar transistor (IGBT) or a metal-oxide semiconductor field effect transistor (MOSFET), the increase in its switching frequency will inevitably lead to excessively high di / dt or dv / dt, which will cause serious electromagnetic compatibility (EMC) problems. For the boost circuit (also known as the BOOST circuit) with fully controlled devices as the core power conversion device, because of its simple circuit topology, it can flexibly control the output voltage by controlling the duty cycle, and is widely used in power converters, photovoltaic inverters and other products. However, the boost circuit has serious electromagnetic radiation problems (for example, electromagnetic interference to the power supply and the environment) due to the operation of its switching devices, and it increases with the increase of boost current / voltage, which makes it difficult for products using boost circuits to pass standard EMC certification. In the conduction certification of EMC, the existing technologies are mostly based on tentative rectification measures for products, which have limited rectification effects, relatively long rectification cycles and low efficiency, seriously affecting the normal certification and launch of products. In addition, during the rectification process, the crosstalk generated by the mutual coupling of differential mode and common mode interference brings new problems to the conduction in EMC.
[0003] With regard to the problem that the boost circuit in the prior art easily causes electromagnetic interference to the power supply and the environment, no effective solution has been proposed yet. Utility Model Content
[0004] The embodiments of the present application provide an electromagnetic compatibility filter circuit and an inverter to at least solve the technical problem in the prior art that the boost circuit easily causes electromagnetic interference to the power supply and the environment.
[0005] According to one aspect of an embodiment of the present application, an electromagnetic compatibility filtering circuit is provided, comprising: a first magnetic ring, a common mode choke, a common mode filtering unit, a second magnetic ring, a first differential mode filtering unit, a second differential mode filtering unit, and a third differential mode filtering unit; wherein: the first end of the common mode choke is used to connect to the positive pole of a power supply, the second end of the common mode choke is used to connect to the negative pole of a power supply, and the third end and the fourth end of the common mode choke are respectively used to connect to a boost component; the common mode filtering unit is connected between the first end and the second end of the common mode choke, and the first magnetic ring and the second magnetic ring are sequentially connected to the line of the common mode filtering unit connected to the power supply; the first differential mode filtering unit is connected between the first end and the second end of the common mode choke; the second differential mode filtering unit is connected between the third end and the fourth end of the common mode choke; the first end of the third differential mode filtering unit is connected to the fourth end of the common mode choke, and the second end of the third differential mode filtering unit is used to connect to the boost component.
[0006] Optionally, the common-mode filtering unit includes a first filter capacitor group and a second filter capacitor group; wherein: the first filter capacitor group and the second filter capacitor group are both dual capacitors connected in parallel; one end of the dual capacitors of the first filter capacitor group after being connected in parallel serves as the first end of the common-mode filtering unit, and the other end is used for grounding; one end of the dual capacitors of the second filter capacitor group after being connected in parallel serves as the second end of the common-mode filtering unit, and the other end is used for grounding.
[0007] Optionally, the dual capacitors of the first filter capacitor group and the dual capacitors of the second filter capacitor group have a symmetrical structure in circuit layout; wherein: the capacitance value of the dual capacitors of the first filter capacitor group corresponds one-to-one to the capacitance value of the dual capacitors of the second filter capacitor group; and the capacitance values of the dual capacitors in different filter capacitor groups are different.
[0008] Optionally, the dual capacitors of the first filter capacitor group and the dual capacitors of the second filter capacitor group are both Y capacitors.
[0009] Optionally, the first differential mode filtering unit and the third differential mode filtering unit are respectively X capacitors.
[0010] Optionally, the second differential mode filtering unit includes an X capacitor and a second resistor; wherein: a first end of the X capacitor of the second differential mode filtering unit and a first end of the second resistor are respectively connected to a third end of the common mode choke; a second end of the X capacitor of the second differential mode filtering unit and a second end of the second resistor are respectively connected to a fourth end of the common mode choke.
[0011] Optionally, the first magnetic ring is a common mode magnetic ring, and the second magnetic ring is a differential mode magnetic ring.
[0012] Optionally, when the frequency band of the interference signal is below 1 MHz, the core material of the first magnetic ring is amorphous material; when the frequency band of the interference signal is 1 to 30 MHz, the core material of the first magnetic ring is manganese-zinc ferrite material, and the core material of the second magnetic ring is sendust material.
[0013] According to one aspect of an embodiment of the present application, an inverter is provided, the inverter comprising a boost circuit and a filter circuit connected to the boost circuit, wherein the filter circuit is the electromagnetic compatibility filter circuit described above.
[0014] Optionally, the boost circuit includes a boost component, which includes an inductor, a diode, a switch tube, an electrolytic capacitor, and a first resistor; wherein: the first end of the inductor is respectively connected to the third end of the common mode choke and the first end of the second differential mode filter unit; the second end of the inductor is respectively connected to the positive electrode of the diode and the first end of the switch tube; the negative electrode of the diode is respectively connected to the second end of the third differential mode filter unit, the positive electrode of the electrolytic capacitor and the first end of the first resistor; after the second end of the switch tube, the negative electrode of the electrolytic capacitor and the second end of the first resistor are connected, they are respectively connected to the fourth end of the common mode choke, the second end of the second differential mode filter unit and the first end of the third differential mode filter unit.
[0015] In the embodiment of the present application, the electromagnetic compatibility filter circuit is added to the typical boost circuit, which can simultaneously suppress the common-mode interference and differential-mode interference generated by the boost circuit, improve the crosstalk caused by the mutual coupling of differential-mode and common-mode interference, and thus solve the technical problem in the prior art that the boost circuit easily causes electromagnetic interference to the power supply and the environment, thereby achieving the technical effect of effectively reducing the electromagnetic interference caused by the boost circuit to the power supply and the environment. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0017] Figure 1 A schematic diagram of a boost circuit provided in an embodiment of the present application;
[0018] Figure 2 A schematic diagram of an electromagnetic compatibility filter circuit provided in an embodiment of the present application;
[0019] Figure 3 A schematic diagram of another electromagnetic compatibility filter circuit provided in an embodiment of the present application;
[0020] Figure 4 A schematic diagram of a conduction test system for an inverter provided in an embodiment of the present application;
[0021] Figure 5 A schematic diagram of common-mode interference generated when the boost circuit provided in an embodiment of the present application is not provided with an electromagnetic compatibility filter circuit;
[0022] Figure 6 A schematic diagram of differential mode interference generated when the boost circuit provided in an embodiment of the present application is not provided with an electromagnetic compatibility filter circuit;
[0023] Figure 7 A schematic diagram of common-mode interference generated when an electromagnetic compatibility filter circuit is added to the boost circuit provided in an embodiment of the present application;
[0024] Figure 8 A schematic diagram of differential mode interference generated when an electromagnetic compatibility filter circuit is added to the boost circuit provided in an embodiment of the present application.
[0025] The above drawings include the following reference numerals:
[0026] Vdc, power supply; L1, inductor; L2, common mode choke; D, diode; Q, switch tube; R1, first resistor; R2, second resistor; C1, electrolytic capacitor; CM, first magnetic ring; DM, second magnetic ring; CY1, first Y capacitor; CY2, second Y capacitor; CY3, third Y capacitor; CY4, fourth Y capacitor; CX1, first X capacitor; CX2, second X capacitor; CX3, third X capacitor. DETAILED DESCRIPTION
[0027] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0028] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.
[0029] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, methods and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.
[0030] Figure 1 A schematic diagram of a boost circuit provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the boost circuit includes: a power supply and a boost component, wherein the boost component includes an inductor L1, a diode D, a switch tube Q, an electrolytic capacitor C1, and a first resistor R1; wherein:
[0031] The first end of the inductor L1 is used to connect the positive electrode of the power supply, and the second end of the inductor L1 is respectively connected to the positive electrode of the diode D and the first end of the switch tube Q; the negative electrode of the diode D is respectively connected to the positive electrode of the electrolytic capacitor C1 and the first end of the first resistor R1; the second end of the switch tube Q, the negative electrode of the electrolytic capacitor C1 and the second end of the first resistor R1 are connected and then used to connect the negative electrode of the power supply.
[0032] The switch tube Q is a fully controlled device, including but not limited to an insulated gate bipolar transistor, a metal-oxide semiconductor field effect transistor, and a thyristor. Optionally, when the switch tube Q is a MOS tube, the source electrode (also called the S electrode) of the MOS tube serves as the first end of the switch tube Q, the drain electrode (also called the D electrode) of the MOS tube serves as the second end of the switch tube Q, and the gate electrode (also called the G electrode) of the MOS tube serves as the third end of the switch tube Q.
[0033] Fully controlled devices can achieve forward and reverse current flow without the need for additional components such as diodes or anti-parallel thyristors for freewheeling or reverse blocking.
[0034] Fully controlled devices have independent control terminals (gates or gate electrodes), which can be turned on and off by applying appropriate control signals without relying on external circuits (such as trigger pulses or zero-crossing detection) to control their states.
[0035] When the device is in the on state, by changing the amplitude, frequency or duty cycle of the control signal, the injection speed and number of carriers inside the device can be continuously adjusted, thereby adjusting the phase angle between its current and voltage, so that the fully controlled device can realize power factor correction, harmonic suppression, soft start and other functions, as well as precise voltage and current waveform control in the PWM (pulse width modulation) inverter.
[0036] Furthermore, a common-mode interference filter circuit is added to the above-mentioned boost circuit to form an electromagnetic compatibility filter circuit, thereby effectively suppressing the common-mode interference generated by the boost circuit.
[0037] Figure 2 A schematic diagram of an electromagnetic compatibility filter circuit provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the electromagnetic compatibility filter circuit includes: a first magnetic ring CM, a common mode choke coil L2, and a common mode filter unit mainly composed of a first Y capacitor CY1, a second Y capacitor CY2, a third Y capacitor CY3 and a fourth Y capacitor CY4; wherein:
[0038] The common mode choke L2 is connected in series to the boost circuit, wherein the first end of the common mode choke L2 is used to connect to the positive electrode of the power supply, the second end of the common mode choke L2 is used to connect to the negative electrode of the power supply, and the third end and the fourth end of the common mode choke L2 are respectively used to connect to the boost component;
[0039] A common-mode filtering unit mainly composed of a first Y capacitor CY1, a second Y capacitor CY2, a third Y capacitor CY3 and a fourth Y capacitor CY4 is connected between the first end and the second end of the common-mode choke L2. A first magnetic ring CM is connected in series on a line connected to the power supply Vdc.
[0040] Optionally, the first end of the common mode choke L2 is the starting pin of the first winding, the second end of the common mode choke L2 is the starting pin of the second winding, the third end of the common mode choke L2 is the end pin of the first winding, and the second end of the common mode choke L2 is the end pin of the second winding.
[0041] Optionally, the common mode choke L2 is usually composed of one or more pairs of coils wound on the same magnetic core, with the coils wound in the same direction, forming a differential mode open circuit and common mode short circuit structure. When there is common mode interference in the circuit (i.e., interference with the same current phase and consistent direction on the two wires), the common mode choke can provide a higher impedance and effectively suppress the passage of such interference; while for differential mode signals (normal working signals, the current phases on the two wires are opposite or 180° apart), the common mode choke has almost no effect on its transmission.
[0042] Furthermore, the differential mode interference filter circuit can be superimposed on the common mode interference filter circuit to form an electromagnetic compatibility filter circuit, thereby effectively suppressing the differential mode interference and common mode interference generated by the boost circuit, as well as the crosstalk generated by the mutual coupling of differential mode and common mode interference.
[0043] Figure 3 A schematic diagram of another electromagnetic compatibility filter circuit provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the electromagnetic compatibility filter circuit includes: a first magnetic ring CM, a common mode choke coil L2, a common mode filter unit mainly composed of a first Y capacitor CY1, a second Y capacitor CY2, a third Y capacitor CY3 and a fourth Y capacitor CY4, a second magnetic ring DM, a first differential mode filter unit mainly composed of a first X capacitor CX1, a second differential mode filter unit mainly composed of a second X capacitor CX2 and a second resistor R2, and a third differential mode filter unit mainly composed of a third X capacitor CX3; wherein:
[0044] The first end of the common mode choke L2 is used to connect to the positive electrode of the power supply, the second end of the common mode choke L2 is used to connect to the negative electrode of the power supply, and the third end and the fourth end of the common mode choke L2 are respectively used to connect to the boost component;
[0045] A common mode filter unit mainly composed of a first Y capacitor CY1, a second Y capacitor CY2, a third Y capacitor CY3 and a fourth Y capacitor CY4 is connected between the first end and the second end of the common mode choke L2, and a line connected to a power supply Vdc to which a first magnetic ring CM and a second magnetic ring DM are sequentially connected;
[0046] The first differential mode filter unit CX1 is connected between the first end and the second end of the common mode choke coil L2;
[0047] A second differential mode filter unit mainly composed of a second X capacitor CX2 and a second resistor R2 is connected between the third end and the fourth end of the common mode choke coil L2;
[0048] A first end of the third differential mode filter unit CX3 is connected to the fourth end of the common mode choke coil L2, and a second end of the third differential mode filter unit CX3 is used to connect to the boost component.
[0049] In the embodiment of the present application, the electromagnetic compatibility filter circuit is added to the typical boost circuit, which can simultaneously suppress the common-mode interference and differential-mode interference generated by the boost circuit, improve the crosstalk caused by the mutual coupling of differential-mode and common-mode interference, and thus solve the technical problem in the prior art that the boost circuit easily causes electromagnetic interference to the power supply and the environment, thereby achieving the technical effect of effectively reducing the electromagnetic interference caused by the boost circuit to the power supply and the environment.
[0050] It should be noted that the electromagnetic compatibility filter circuit is clearly divided and relatively simple; the electromagnetic compatibility filter circuit has no restrictions on the specifications of components and can be adjusted according to the power size, input and output characteristics of the actual circuit, and has better flexibility; the electromagnetic compatibility filter circuit can be applied to products using BOOST circuits (such as power converters, photovoltaic inverters, etc.), and has a wide range of applications and good application prospects.
[0051] As an optional embodiment, the common-mode filtering unit includes a first filter capacitor group mainly composed of a first Y capacitor CY1 and a second Y capacitor CY2, and a second filter capacitor group mainly composed of a third Y capacitor CY3 and a fourth Y capacitor CY4; the first filter capacitor group and the second filter capacitor group are both double capacitors in parallel; for example, the first filter capacitor group is mainly composed of a first Y capacitor CY1 and a second Y capacitor CY2 in parallel; the second filter capacitor group is mainly composed of a third Y capacitor CY3 and a fourth Y capacitor CY4 in parallel.
[0052] Furthermore, one end of the dual capacitors of the first filter capacitor group connected in parallel serves as the first end of the common-mode filter unit, and the other end is used for grounding; one end of the dual capacitors of the second filter capacitor group connected in parallel serves as the second end of the common-mode filter unit, and the other end is used for grounding.
[0053] As an optional embodiment, the dual capacitors of the first filter capacitor group and the dual capacitors of the second filter capacitor group have a symmetrical structure in circuit layout; wherein: the capacitance value of the dual capacitors of the first filter capacitor group corresponds one-to-one to the capacitance value of the dual capacitors of the second filter capacitor group; and the capacitance values of the dual capacitors in different filter capacitor groups are different.
[0054] The first Y capacitor CY1 and the second Y capacitor CY2 are connected in parallel and placed between the positive pole of the power supply and the ground. The third Y capacitor CY3 and the fourth Y capacitor CY4 are connected in parallel and placed between the negative pole of the power supply and the ground. The layout presents a symmetrical structure, that is, the first Y capacitor CY1 and the third Y capacitor CY3 have the same specifications, and the second Y capacitor CY2 and the fourth Y capacitor CY4 have the same specifications. In addition, the positions of the first Y capacitor CY1 and the second Y capacitor CY2, and the positions of the third Y capacitor CY3 and the fourth Y capacitor CY4 can be interchanged.
[0055] As an optional embodiment, the dual capacitors of the first filter capacitor group and the dual capacitors of the second filter capacitor group are both Y capacitors.
[0056] As an optional embodiment, the first end of the second X capacitor CX2 of the second differential mode filtering unit and the first end of the second resistor R2 are respectively connected to the third end of the common mode choke L2; the second end of the second X capacitor CX2 of the second differential mode filtering unit and the second end of the second resistor R2 are respectively connected to the fourth end of the common mode choke L2.
[0057] In the embodiment of the present application, both X capacitors and Y capacitors are safety capacitors, which are used for power supply filtering, electromagnetic interference (EMI) suppression and ensuring electromagnetic compatibility (EMC) of equipment. The main difference between the two lies in their connection method, application location, function and capacitance value.
[0058] For example, an X capacitor usually refers to a capacitor installed between the live wire (L) and the neutral wire (N) at the input end of the AC power supply to suppress differential mode interference. In the circuit, the X capacitor is connected across the non-grounded AC power line pair and is not directly connected to the ground wire. The X capacitor is mainly used to filter out differential mode interference on the power line, that is, the noise caused by the voltage fluctuation between the live wire and the neutral wire. For switching power supplies or other electronic devices, X capacitors help improve power quality and reduce electromagnetic interference to the power grid and other equipment. The capacitance value of the X capacitor is usually large, at the microfarad (uF) level, because differential mode interference usually requires a larger capacitor for effective filtering.
[0059] For another example, the Y capacitor is installed between the live wire (L) or neutral wire (N) and the protective earth (PE) at the input end of the AC power supply, or one is placed between the live wire and the neutral wire and the ground respectively; the Y capacitor is connected between the possibly energized part (live wire, neutral wire) and the ground to form a capacitive bridge to the ground; the Y capacitor is mainly responsible for filtering out common-mode interference, that is, the voltage fluctuation and noise between the power line and the ground, preventing the electromagnetic interference inside the equipment from being transmitted to the ground through the power line, and also preventing external electromagnetic interference from entering the equipment through the ground line, thereby ensuring the safety of the equipment and the user; the capacitance value of the Y capacitor is relatively small, usually at the nanofarad (nF) level, because common-mode interference usually requires a smaller capacitor to achieve effective filtering.
[0060] As an optional embodiment, the first magnetic ring CM is a common mode magnetic ring, and the second magnetic ring DM is a differential mode magnetic ring.
[0061] Optionally, the common-mode magnetic ring adopts a double-winding structure, with two sets of coils having the same winding direction and respectively connected to two wires to form a short-circuit path for the common-mode current, thereby providing high impedance to the common-mode current.
[0062] Optionally, the differential mode magnetic ring adopts a single winding structure, the two ends of the coil are respectively connected to two wires, and the positive and negative wires pass through the differential mode magnetic ring in opposite directions to provide inductive reactance for the differential mode current.
[0063] As an optional embodiment, the core material of the first magnetic ring CM can be amorphous material, which can suppress the low-frequency interference of 150KHz to 1MHz, and can also reduce the actual peak and mean curves in the conduction test as a whole. When the frequency band of the interference signal is 1 to 30MHz, the core material of the first magnetic ring CM can be manganese-zinc ferrite material; for the second magnetic ring DM, its core material can be sendust material, and the size of the magnetic ring with matching inductance can be selected in combination with the impedance curve of the magnetic ring and the resonance peak in the differential mode interference test curve.
[0064] According to one aspect of an embodiment of the present application, an inverter is provided, the inverter comprising a boost circuit and a filter circuit connected to the boost circuit, wherein the filter circuit is the electromagnetic compatibility filter circuit in the embodiment of the present application. Therefore, the inverter includes all the technical effects of the above-mentioned electromagnetic compatibility filter circuit. Since the technical effects of the electromagnetic compatibility filter circuit have been described in detail above, they will not be repeated here.
[0065] As an optional embodiment, the boost circuit includes a boost component, which includes an inductor L1, a diode D, a switch tube Q, an electrolytic capacitor C1, and a first resistor R1; wherein:
[0066] The first end of the inductor L1 is connected to the third end of the common mode choke L2 and the first end of the second differential mode filter unit respectively;
[0067] The second end of the inductor L1 is connected to the anode of the diode D and the first end of the switch tube Q respectively;
[0068] The cathode of the diode D is respectively connected to the second end of the third differential mode filter unit, the anode of the electrolytic capacitor C1 and the first end of the first resistor R1;
[0069] The second end of the switch tube Q, the cathode of the electrolytic capacitor C1 and the second end of the first resistor R1 are connected and then respectively connected to the fourth end of the common mode choke L2, the second end of the second differential mode filter unit and the first end of the third differential mode filter unit.
[0070] According to the conduction test standard, the frequency band is divided. Since the EMC conduction test frequency is 150KHz~30MHz. The 150KHz~1MHz frequency band is divided into a low frequency band, 1MHz~10MHz is a medium frequency band, and 10MHz~30MHz is a high frequency band. Different filter units suppress noise in different frequency bands. For the common mode interference filter circuit, the common mode choke L2 is mainly used to suppress the common mode noise in the medium and low frequency bands. The Y capacitor involved in the common mode filter unit is mainly used to filter out high-frequency and low-frequency noise. The first magnetic ring selects appropriate specifications according to needs to reduce the interference amplitude of a certain frequency band. For the differential mode interference filter circuit, the third X capacitor CX3 is mainly used to filter out the medium and high frequency noise generated by the output side to the BOOST boost circuit, the second X capacitor CX2 is used to filter out low-frequency noise, and the first X capacitor CX1 is used to filter out the noise corresponding to the medium frequency resonance. Similarly, the second magnetic ring is used to reduce the amplitude of a certain frequency band. The parameters of components such as X capacitors, Y capacitors, and common mode chokes are selected according to the actual interference frequency band distribution, and the number and specifications of the first magnetic ring and the second magnetic ring are selected according to actual needs.
[0071] In the EMC conduction test, the test standard stipulates that the noise interference generated by the power port of the device under test to the environment is measured, and the common-mode interference of the boost circuit is mainly from the switch tube Q, which will generate parasitic capacitance to the ground due to its internal structure, working state and heat dissipation factors, thereby forming a loop to generate common-mode current. Therefore, in the process of rectifying the conduction of the boost circuit, the electromagnetic compatibility filter circuit is designed with the switch tube Q as the main interference source. In the actual conduction test, since the boost module of the inverter uses a boost circuit, the conduction test is carried out using the inverter as an example.
[0072] Figure 4 A schematic diagram of a conduction test system for an inverter provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the conduction test system includes: an inverter, an artificial power network (LISN) device, a power filter (EMIfilter), a power supply (Power supply) device, a power grid (Power Grid), an EMI receiver (EMI receiver) and an EMC system test software (EMC test software) device; wherein the artificial power network device is respectively connected to the inverter, the power filter and the EMI receiver; the power supply device is respectively connected to the power filter and the power grid; and the EMC system test software device is connected to the EMI receiver.
[0073] First, use the second common-mode filter unit that is closer to the gate Q: the common-mode choke L2 to suppress the noise in the medium and low frequency bands. Since the winding method of the common-mode choke has the function of passing the differential mode to suppress the common-mode interference, when the common-mode signal flows through the choke, it will generate a large impedance, thereby suppressing the propagation of the common-mode noise. Generally, according to the filter frequency band of 500KHz~5MHz, the appropriate magnetic core and winding turns are selected, and the minimum inductance can be calculated according to the following expression:
[0074]
[0075] Calculate the minimum inductance L, where X is the impedance value at frequency f. After the common-mode choke is determined, the noise in the low and medium frequency bands can be suppressed. Therefore, the first filtering unit is used to suppress the noise in the low and high frequency bands. The Y capacitor is connected between the power line and the ground. When a common-mode signal flows in the power line, it provides a loop for common-mode interference. Since the common-mode filtering unit adopts a dual-capacitor parallel connection method, the larger the capacitance, the better the filtering effect of the capacitor on the low frequency band, but the greater the influence of its parasitic parameters. Therefore, the relatively small capacitance of the parallel capacitor suppresses the high-frequency noise it generates. The selection of its capacitance C can be calculated according to the following expression:
[0076]
[0077] As above, X is the impedance value when the frequency is f. For the first magnetic ring CM, its main function is to reduce the interference amplitude of a certain frequency band as a whole. In practical applications, different specifications and magnetic cores can be selected according to needs. For common mode interference in the frequency band below 1MHz, amorphous materials are selected as the magnetic core material, and for common mode interference in the frequency band of 1MHz to 30MHz, manganese-zinc ferrite materials are selected as the magnetic core material.
[0078] Differential mode noise interference exists between loops. For a boost circuit, it exists in the loop formed by its positive and negative lines. Since the output end of the boost circuit will be connected to an external circuit, the third differential mode filter unit is mainly used to suppress the interference generated by the external circuit to the boost circuit. This is generally high-frequency interference. The selected capacitance value is small. The capacitance value of the differential mode capacitor CX3 can be calculated according to expression (2); and the second X capacitor CX2 in the second filter unit is used to filter out low-frequency differential mode noise. Its capacitance value is relatively large. Therefore, the first resistor R1 is connected in parallel to release the residual charge of the capacitor CX2 after power failure, filtering out low-frequency differential mode noise while meeting the load safety requirements to protect personal safety. The first differential mode filter unit is mainly used to filter out differential mode noise generated in the mid-frequency band. Its value is selected according to the actual noise point. For the second magnetic ring, the magnetic core can be selected according to the method of the first magnetic ring as needed. Its main function is to reduce the amplitude of differential mode interference in a certain frequency band. Compared with the first magnetic ring, the main difference is that the connection method in the circuit is different. The differential mode magnetic ring should be connected in series in the circuit according to the winding method of the differential mode choke.
[0079] The electromagnetic compatibility filter circuit in the embodiment of the present application is applied to a photovoltaic inverter, and the parameter values of each component in the electromagnetic compatibility filter circuit are as follows:
[0080] Common mode filtering unit: first Y capacitor CY1, third Y capacitor CY3: 10nF; second Y capacitor CY2, fourth Y capacitor CY4: 100pF; common mode choke L2: equivalent inductance 4.5mH; first magnetic ring CM: amorphous magnetic ring, equivalent inductance 96.8uH.
[0081] The first X capacitor CX1: 1uF; the second X capacitor CX2: 15uF; the third X capacitor CX3: 2.2nF; the second magnetic ring: amorphous magnetic ring, equivalent inductance 66.6uH.
[0082] Among them, V is the voltage unit volt, uF, nF, pF are the capacitive reactance units microfarad, nanofarad, picofarad, mH, uH are the inductive reactance units millihenry, microhenry.
[0083] Furthermore, the conduction test results of the boost circuit without adding the electromagnetic compatibility filter circuit are as follows: Figure 5 and Figure 6 As shown in the figure, the test results of adding electromagnetic compatibility filter circuit to the boost circuit are as follows Figure 7 and Figure 8 As shown, compared Figure 5 and Figure 7 It can be seen that the electromagnetic compatibility filter circuit provided in the embodiment of the present application effectively suppresses the common mode interference flowing into the LISN. Figure 6 and Figure 8It can be seen that the electromagnetic compatibility filtering circuit provided in the embodiment of the present application effectively suppresses the differential mode interference flowing into the LISN; therefore, the electromagnetic compatibility filtering circuit provided in the embodiment of the present application can effectively reduce the electromagnetic interference generated by the boost circuit to the environment.
[0084] It should be noted that in Figures 5 to 8 In the figure, the line pointed by Limit1 is the peak value standard of the conduction standard EN 55032, and the line pointed by Limit2 is the average value standard of the conduction standard EN 55032; the curve pointed by QP is the actual peak value test curve, and the curve pointed by CAVG is the actual average value test curve.
[0085] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.
[0086] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of this application.
[0087] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. An electromagnetic compatibility filter circuit, It is characterized in that include: A first magnetic ring, a common mode choke, a common mode filter unit, a second magnetic ring, a first differential mode filter unit, a second differential mode filter unit, and a third differential mode filter unit; wherein: The first end of the common mode choke is used to connect to the positive electrode of the power supply, the second end of the common mode choke is used to connect to the negative electrode of the power supply, and the third end and the fourth end of the common mode choke are respectively used to connect to the boost component; The common mode filter unit is connected between the first end and the second end of the common mode choke coil, and the line of the common mode filter unit connected to the power supply is connected to the first magnetic ring and the second magnetic ring in sequence; The first differential mode filter unit is connected between the first end and the second end of the common mode choke coil; The second differential mode filtering unit is connected between the third end and the fourth end of the common mode choke coil; The first end of the third differential mode filter unit is connected to the fourth end of the common mode choke coil, and the second end of the third differential mode filter unit is used to connect to the boost component.
2. The electromagnetic compatibility filter circuit according to claim 1, It is characterized in that The common mode filtering unit comprises a first filtering capacitor group and a second filtering capacitor group; wherein: The first filter capacitor group and the second filter capacitor group are both double capacitors connected in parallel; One end of the two capacitors of the first filter capacitor group connected in parallel is used as the first end of the common mode filter unit, and the other end is used for grounding; One end of the two capacitors of the second filtering capacitor group connected in parallel serves as the second end of the common-mode filtering unit, and the other end is used for grounding.
3. The electromagnetic compatibility filter circuit according to claim 2, It is characterized in that The dual capacitors of the first filter capacitor group and the dual capacitors of the second filter capacitor group are symmetrical in circuit layout; wherein: The capacitance values of the dual capacitors of the first filter capacitor group correspond one-to-one to the capacitance values of the dual capacitors of the second filter capacitor group; The capacitance values of the dual capacitors in different filter capacitor groups are different.
4. The electromagnetic compatibility filter circuit according to claim 2, It is characterized in that The double capacitors of the first filter capacitor group and the double capacitors of the second filter capacitor group are both Y capacitors.
5. The electromagnetic compatibility filter circuit according to claim 1, It is characterized in that The first differential mode filter unit and the third differential mode filter unit are respectively X capacitors.
6. The electromagnetic compatibility filter circuit according to claim 1, It is characterized in that The second differential mode filtering unit comprises an X capacitor and a second resistor; wherein: The first end of the X capacitor of the second differential mode filtering unit and the first end of the second resistor are respectively connected to the third end of the common mode choke coil; The second end of the X capacitor of the second differential mode filtering unit and the second end of the second resistor are respectively connected to the fourth end of the common mode choke coil.
7. The electromagnetic compatibility filter circuit according to claim 1, It is characterized in that The first magnetic ring is a common mode magnetic ring, and the second magnetic ring is a differential mode magnetic ring.
8. The electromagnetic compatibility filter circuit according to claim 1, It is characterized in that When the frequency band of the interference signal is below 1 MHz, the magnetic core of the first magnetic ring is made of amorphous material; When the frequency band of the interference signal is 1-30 MHz, the magnetic core material of the first magnetic ring is manganese-zinc ferrite material, and the magnetic core material of the second magnetic ring is sendust material.
9. An inverter, It is characterized in that The inverter comprises a boost circuit and a filter circuit connected to the boost circuit, wherein the filter circuit is the electromagnetic compatibility filter circuit according to any one of claims 1 to 8.
10. The inverter according to claim 9, It is characterized in that The boost circuit includes a boost component, and the boost component includes an inductor, a diode, a switch tube, an electrolytic capacitor, and a first resistor; wherein: The first end of the inductor is connected to the third end of the common mode choke coil and the first end of the second differential mode filter unit respectively; The second end of the inductor is connected to the anode of the diode and the first end of the switch tube respectively; The cathode of the diode is respectively connected to the second end of the third differential mode filter unit, the anode of the electrolytic capacitor and the first end of the first resistor; After the second end of the switch tube, the negative electrode of the electrolytic capacitor and the second end of the first resistor are connected, they are respectively connected to the fourth end of the common mode choke, the second end of the second differential mode filter unit and the first end of the third differential mode filter unit.
