Detector driving circuit

Abstract

The utility model discloses a detector drive circuit, which comprises a front-stage square wave generating circuit, a rear-stage drive circuit and two triodes, the front-stage square wave generating circuit comprises an operational amplifier U1, the output end of the operational amplifier U1 is connected with the base electrode of a triode Q2, and the collector electrode of the triode Q2 is connected with the base electrode of a triode Q1; the rear-stage driving circuit comprises an operational amplifier U2 and an LC frequency-selecting network, one end of the LC frequency-selecting network is grounded, and the other end of the LC frequency-selecting network is connected with the output end of the operational amplifier U2; a detector Y1 is arranged between the output end of the operational amplifier U2 and the negative electrode input of the operational amplifier U2, and the negative electrode input of the operational amplifier U2 is grounded. According to the utility model, an LC frequency selection network is adopted, and compared with an RC network, the Q value is better. According to the utility model, the driving circuit is built by adopting basic separated components, the replaceability is strong, each component can be adjusted and observed, and the analysis and simulation are easy.

Description

Technical Field

[0001] The utility model relates to a detector driving circuit, belonging to the technical field of device detection. Background Art

[0002] As the demand for radar increases, due to cost constraints, the combination of chips and detectors is sometimes not good, and clutter caused by aftershock bifurcation is prone to occur. At present, the integration of dedicated detector driver chips is high, and the component packaging is small. It is difficult to fully understand the working principle of the chip direct drive. When a problem occurs, it is difficult to identify the cause and determine the direction of rectification; in addition, this type of chip needs to be driven by a program, and has many internal parameters, which has certain requirements for personnel programming and parameter understanding. Utility Model Content

[0003] The utility model aims to provide a detector driving circuit, which adopts basic discrete components to build the driving circuit, has its own oscillator and does not require programming.

[0004] In order to achieve the above purpose, the technical solution adopted by the utility model is as follows:

[0005] The utility model provides a detector driving circuit, comprising: a front-stage square wave generating circuit, a rear-stage driving circuit and two triodes.

[0006] The front-stage square wave generating circuit includes an operational amplifier U1, the positive input of the operational amplifier U1 is connected to a power supply, and the negative input of the operational amplifier U1 is grounded through a capacitor C3; the output end of the operational amplifier U1 is connected to the base of the transistor Q2 through a diode D1;

[0007] The emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected to the base of the transistor Q1;

[0008] The post-stage driving circuit includes an operational amplifier U2 and an LC frequency selection network, and the LC frequency selection network includes a capacitor C1, an inductor L1, a capacitor C2 and an inductor L2; the capacitor C1 and the inductor L1 constitute an LC oscillation circuit;

[0009] One end of the LC oscillator circuit is grounded, and the other end is divided into two branches, one branch is connected to the positive input of the operational amplifier U2, and the other branch is connected to the inductor L2, the capacitor C2, and the output end of the operational amplifier U2;

[0010] A detector Y1 is provided between the output end of the operational amplifier U2 and the negative input of the operational amplifier U2; the negative input of the operational amplifier U2 is grounded;

[0011] The emitter of the transistor Q1 is connected to a power supply, and the collector of the transistor Q1 is connected to a positive power supply of the operational amplifier U2.

[0012] Furthermore, the collector of the transistor Q2 is connected to the base of the transistor Q1 via a current limiting resistor R4.

[0013] Furthermore, a current limiting resistor R5 is provided between the diode D1 and the base of the transistor Q2.

[0014] Furthermore, the positive input of the operational amplifier U1 is connected to a 12V power supply through a bias resistor R1 on one hand, and is grounded through a bias resistor R2 on the other hand.

[0015] Furthermore, the output end of the operational amplifier U1 is connected to the positive input of the operational amplifier U1 through a resistor R3, and is connected to the negative input of the operational amplifier U1 through a resistor R9.

[0016] Furthermore, the operational amplifier U1 is powered by a single power supply, and the operational amplifier U2 is powered by a dual power supply, and the operational amplifier U2 is powered by ±12VD.

[0017] Furthermore, the transistor Q1 is a PNP transistor, and the transistor Q2 is an NPN transistor.

[0018] Furthermore, the negative input of the operational amplifier U2 is grounded through a resistor R7, and a resistor R8 is further provided between the output end of U2 and the negative input of the operational amplifier U2;

[0019] The resistor R7 and the resistor R8 are used to adjust the amplification factor.

[0020] Furthermore, a resistor R6 is connected in series in the LC frequency selection network, and the resistor R6 is used to adjust the Q value.

[0021] The beneficial effects of the utility model are:

[0022] (1) The utility model uses basic discrete components to build a driving circuit, the driving voltage can be in a wide range, and the adjustable discrete components are highly replaceable. Each device can be adjusted and observed, which is easy to analyze and simulate;

[0023] (2) The utility model has its own oscillator and does not require programming. It can be driven as long as it is powered;

[0024] (3) The utility model adopts an LC frequency selection network, which has a better Q value than the RC network and has less effect of gain on frequency selection. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of a detector driving circuit provided by an embodiment of the utility model. DETAILED DESCRIPTION

[0026] The utility model is further described below. The following embodiments are only used to more clearly illustrate the technical solution of the utility model, and cannot be used to limit the protection scope of the utility model.

[0027] An embodiment of the utility model provides a detector driving circuit, comprising: a front-stage square wave generating circuit, a rear-stage driving circuit and two triodes,

[0028] For details, see Figure 1 , the front-stage square wave generating circuit includes an operational amplifier U1, the positive input of the operational amplifier U1 is connected to a 12V power supply, and the negative input is grounded through a capacitor C3;

[0029] The output of the operational amplifier U1 is connected to the base of the transistor Q2 through the diode D1 and the resistor R5. It should be noted that the output of the operational amplifier U1 is connected to the positive electrode of the diode D1. The diode D1 is unidirectionally conducted, and the BE conduction voltage drop of the transistor is very small, which can increase the conduction threshold and protect the transistor Q2 from the reverse voltage breakdown of BE. The role of the resistor R5 is a current limiting resistor, which makes the transistor Q2 saturated and turned on.

[0030] When the amplifier U1 is initially powered on, the voltage at the positive terminal is greater than the voltage at the negative terminal. The amplifier outputs 12V, and the voltage at the positive terminal of the amplifier U1 is 4V. When the capacitor C3 is charged to more than 4V, the output becomes 0V, and a periodic square wave signal is generated. The function of C3 is to compare the voltage after charging and discharging with the positive terminal of U1 to output a square wave signal.

[0031] In this embodiment, the front-stage square wave generating circuit is a rail-to-rail output operational amplifier, which can effectively prevent Q2 from being mis-conducted.

[0032] The emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected to the base of the transistor Q1 via a current limiting resistor R4.

[0033] The emitter of transistor Q1 is connected to a 12V power supply, and the collector of transistor Q1 is connected to a positive power supply +12VD of op amp U2.

[0034] In this embodiment, transistors Q1 and Q2 are used to control the positive power supply of the operational amplifier U2. When the operational amplifier U1 outputs 12V, Q2 is turned on, thereby turning on Q1 and the operational amplifier U2 is powered.

[0035] The post-stage driving circuit includes an operational amplifier U2. The positive input of the operational amplifier U2 is grounded through an LC oscillation circuit. The LC oscillation circuit is composed of a capacitor C1 and an inductor L1 connected in parallel. The negative input of the operational amplifier U2 is grounded through a resistor R7.

[0036] One end of the LC oscillation circuit is grounded, and the other end is divided into two branches, one branch is connected to the positive input of the operational amplifier U2, and the other branch is connected to the resistor R6, the inductor L2, the capacitor C2 in sequence, and connected to the output end of the operational amplifier U2.

[0037] Capacitor C1, inductor L1, capacitor C2 and inductor L2 form an LC frequency selection network, and resistor R6 is used to adjust the Q value.

[0038] The detector Y1 and the resistor R8 are connected between the output terminal and the negative input of the operational amplifier U2. The center frequency of the detector Y1 is 55.5KHZ.

[0039] The post-stage driving principle is as follows:

[0040] f = 1 / (2π√(LC)),

[0041] Among them, f is the resonant frequency, L is the inductance value, C is the capacitance value, L1, L2, C1, C2 form a frequency selection network of about 55.5K, R6 is used to adjust the Q value. If the Q value is small, many frequencies near 55.5K will be mixed in. A large Q value will make the amplitude of the center frequency large, and the two sides will decay rapidly. R7 and R8 determine the amplification factor, which can be adjusted according to actual application. The amplification factor is: A=1+R8 / R7.

[0042] In this embodiment, the operational amplifier U1 is powered by a single power supply, and the operational amplifier U2 is powered by a dual power supply. The operational amplifier U2 is powered by ±12VD.

[0043] It should be noted that the transistor Q1 is a PNP transistor, and the transistor Q2 is an NPN transistor.

[0044] Furthermore, the positive input of the operational amplifier U1 is connected to a 12V power supply through a bias resistor R1 on one hand, and is grounded through a bias resistor R2 on the other hand.

[0045] Furthermore, the output end of the operational amplifier U1 is also connected to the positive input of the operational amplifier U1 through the resistor R3, and connected to the negative input of the operational amplifier U1 through the resistor R9. The function of the resistor R3 is to change the comparison voltage of the positive end of the operational amplifier U1, and the resistor R9 is to limit the current of the capacitor C3 and adjust the driving frequency.

[0046] In one embodiment, both the op amp U1 and the op amp U2 are TLV9361.

[0047] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A detector driving circuit, characterized in that: include: The front stage square wave generating circuit, the rear stage driving circuit and two triodes, The front-stage square wave generating circuit includes an operational amplifier U1, the positive input of the operational amplifier U1 is connected to a power supply, and the negative input of the operational amplifier U1 is grounded through a capacitor C3; the output end of the operational amplifier U1 is connected to the base of the transistor Q2 through a diode D1; The emitter of the transistor Q2 is grounded, and the collector of the transistor Q2 is connected to the base of the transistor Q1; The post-stage driving circuit includes an operational amplifier U2 and an LC frequency selection network, and the LC frequency selection network includes a capacitor C1, an inductor L1, a capacitor C2 and an inductor L2; the capacitor C1 and the inductor L1 constitute an LC oscillation circuit; One end of the LC oscillator circuit is grounded, and the other end is divided into two branches, one branch is connected to the positive input of the operational amplifier U2, and the other branch is connected to the inductor L2, the capacitor C2, and the output end of the operational amplifier U2; A detector Y1 is provided between the output end of the operational amplifier U2 and the negative input of the operational amplifier U2; the negative input of the operational amplifier U2 is grounded; The emitter of the transistor Q1 is connected to a power supply, and the collector of the transistor Q1 is connected to a positive power supply of the operational amplifier U2.

2. A detector driving circuit according to claim 1, characterized in that: The collector of the transistor Q2 is connected to the base of the transistor Q1 via a current limiting resistor R4.

3. A detector driving circuit according to claim 1, characterized in that: A current limiting resistor R5 is provided between the diode D1 and the base of the transistor Q2.

4. A detector driving circuit according to claim 1, characterized in that: The positive input of the operational amplifier U1 is connected to a 12V power supply through a bias resistor R1 on one hand, and is grounded through a bias resistor R2 on the other hand.

5. A detector driving circuit according to claim 1, characterized in that: The output end of the operational amplifier U1 is also connected to the positive input of the operational amplifier U1 through a resistor R3, and is connected to the negative input of the operational amplifier U1 through a resistor R9.

6. A detector driving circuit according to claim 4, characterized in that: The operational amplifier U1 is powered by a single power supply, and the operational amplifier U2 is powered by a dual power supply. The operational amplifier U2 is powered by ±12VD.

7. A detector driving circuit according to claim 6, characterized in that: The transistor Q1 is a PNP transistor, and the transistor Q2 is an NPN transistor.

8. A detector driving circuit according to claim 1, characterized in that: The negative input of the operational amplifier U2 is grounded through a resistor R7, and a resistor R8 is further provided between the output end of U2 and the negative input of the operational amplifier U2; The resistor R7 and the resistor R8 are used to adjust the amplification factor.

9. A detector driving circuit according to claim 1, characterized in that: A resistor R6 is also connected in series in the LC frequency selection network, and the resistor R6 is used to adjust the Q value.

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