Cancellation circuit and device for suppressing pop sound of loudspeaker during power-on
A circuit and device using transistors and resistors control the power amplifier IC's enable pin to keep the speaker off during power-on, addressing pop noise issues in digital amplifiers by managing transistor switches with external IO and power supply control.
Patent Information
- Application Number
- CN202421458602.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-25
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2034-06-25
AI Technical Summary
Digital power amplifiers generate undesirable pop noise when turned on or off due to transient current injections causing sudden changes in the speaker load, which is exacerbated by the switching nature of their output tubes.
A circuit and device that control the switches of transistors Q1, Q2, and Q3 in conjunction with an external IO and power supply to keep the speaker in a closed state during power-on, using PNP and NPN transistors to manage the enable pin of the power amplifier IC, thereby suppressing pop noise.
Effectively suppresses pop noise during the power-on process by ensuring the speaker remains off until the system is fully powered, utilizing a combination of transistors and resistors to manage the enable pin of the power amplifier IC.
Smart Images

Figure CN222215948U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power amplifier circuit management, in particular to a circuit and a device for eliminating pop sound of a loudspeaker when power is on. Background Art
[0002] At present, audio amplifiers are widely used in various household appliances and mobile devices. Digital amplifiers, such as Class D amplifiers, are popular due to their small size and high efficiency. However, due to the large distortion of digital amplifiers and the need for LC circuit filtering, there is a problem that cannot be avoided in actual use, which is the pop noise problem when turning on and off.
[0003] The reason for the pop sound is that when the power is turned on, a transient current injection will generate a transient pulse, which will discharge through the coil load of the speaker, thus causing undesirable pop noise, which makes the human ear feel uncomfortable. When the power is turned on, the power amplifier chip will establish the working point in a short time. Since the establishment time is very short, the driver tube suddenly turns on, and current appears on the load, thus generating noise; when the power is turned off, the output driver tube suddenly loses power, which will also generate similar noise. For digital power amplifiers, since their output tubes are in a switching state, this impact is even greater.
[0004] Therefore, it is necessary to provide a cancellation circuit to eliminate the pop noise generated when the speaker is powered on. Summary of the invention
[0005] In view of this, it is necessary to provide a circuit and device for suppressing the pop sound of the speaker during power-on, which can combine the control of external IO and power supply during the boot process to keep the speaker in a closed state during the boot process, thereby suppressing the pop sound that may occur during the boot process.
[0006] In order to achieve the above-mentioned object, the utility model provides a circuit for suppressing the pop sound of a speaker when power is turned on, which is applied to a power amplifier IC, and the circuit applied to the power amplifier IC includes a power interface pin, an enable pin and a ground pin;
[0007] The elimination circuit includes transistors Q1, Q2 and Q3, resistors R1, R2, R3, R4, R5, R6, R7 and R8;
[0008] The emitter of the transistor Q1 is connected to an external power supply and to an external IO control pin through the resistor R1, the base of the transistor Q1 is connected to the external IO control pin through the resistor R2, the collector of the transistor Q1 is connected to a common end of the resistor R3 and the resistor R4, and one end of the resistor R3 is grounded;
[0009] The base of the transistor Q2 is connected to one end of the resistor R4, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the common end of the resistor R5 and the resistor R6, and one end of the resistor R5 is connected to the internal working power supply;
[0010] The base of the transistor Q3 is connected to the common end of the resistor R6 and the resistor R7, one end of the resistor R7 is grounded, the emitter of the transistor Q3 is grounded, the collector of the transistor Q3 is connected to the enable pin of the power amplifier IC, the collector of the transistor Q3 is also connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the internal working power supply;
[0011] The power interface pin of the power amplifier IC is connected to the internal working power supply, and the ground pin of the power amplifier IC is grounded.
[0012] In some possible implementations, when the power amplifier IC is powered on, the external IO control pin is preferentially set to a high level before the external power supply is turned on, the base of the transistor Q1 is not conducting, the base of the transistor Q2 is not conducting, the base of the transistor Q3 is conducting, the collector is at a low level, the enable pin of the power amplifier IC is at a low level, and the speaker turns off the output.
[0013] In some possible implementations, after the power amplifier IC is powered on and the external power supply is turned on, the external IO control pin is preferentially set to a low level, the base of the transistor Q1 is turned on, the base of the transistor Q2 is turned on, the base of the transistor Q3 is not turned on, the collector is at a high level, the enable pin of the power amplifier IC is at a high level, and the speaker starts outputting.
[0014] In some possible implementations, the transistor Q1 is a PNP transistor, and the transistors Q2 and Q3 are NPN transistors.
[0015] In some possible implementations, the voltage of the external power supply is 3.3V.
[0016] In some possible implementations, the voltage of the internal working power supply is 5V.
[0017] In some possible implementations, the resistance of the resistor R1 is 10KΩ, the resistance of the resistor R2 is 10KΩ, the resistance of the resistor R3 is 4.7KΩ, the resistance of the resistor R4 is 2KΩ, the resistance of the resistor R5 is 10KΩ, the resistance of the resistor R6 is 20KΩ, the resistance of the resistor R7 is 10KΩ, and the resistance of the resistor R8 is 100KΩ.
[0018] In some possible implementations, the external IO control pin is connected to an IO control pin of an external CPU.
[0019] In some possible implementations, the model of the power amplifier IC is Zhipuxin CS8528S.
[0020] In order to achieve the above object, the utility model also provides a device for suppressing speaker pop sound when power is turned on, comprising the above-mentioned circuit for suppressing speaker pop sound when power is turned on and a power amplifier IC.
[0021] The beneficial effects of adopting the above implementation are:
[0022] The utility model controls the switch of transistor Q1 through an external controllable IO, combines with a controllable external power supply, controls the switch of transistor Q2, and further controls the switch of transistor Q3, so that the enable pin of the power amplifier IC controls the speaker to be turned off when the machine is powered on, thereby suppressing the pop sound that may occur during the booting process. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0024] Figure 1 The present invention is a circuit diagram of an embodiment of a circuit for eliminating speaker pop sound when power is turned on, provided by the present invention. DETAILED DESCRIPTION
[0025] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.
[0026] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.
[0027] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0028] The utility model provides a circuit and a device for eliminating the pop sound of a speaker when power is turned on, which are respectively described below.
[0029] In the embodiment of the utility model, a circuit for suppressing the pop sound of the speaker when powering on is provided, which is applied to the power amplifier IC, please refer to Figure 1 , the power amplifier IC includes a power interface pin PWR, an enable pin EN and a ground pin GND;
[0030] The elimination circuit includes transistors Q1, Q2 and Q3, resistors R1, R2, R3, R4, R5, R6, R7 and R8;
[0031] The emitter of the transistor Q1 is connected to the external power supply (VCC_3V3_EXT) and the external IO control pin (SPK_CTL) through the resistor R1, the base of the transistor Q1 is connected to the external IO control pin (SPK_CTL) through the resistor R2, the collector of the transistor Q1 is connected to the common end of the resistor R3 and the resistor R4, and one end of the resistor R3 is grounded;
[0032] The base of the transistor Q2 is connected to one end of the resistor R4, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the common end of the resistor R5 and the resistor R6, and one end of the resistor R5 is connected to the internal working power supply (VDD_5V_SYS);
[0033] The base of the transistor Q3 is connected to the common end of the resistor R6 and the resistor R7, one end of the resistor R7 is grounded, the emitter of the transistor Q3 is grounded, the collector of the transistor Q3 is connected to the enable pin EN of the power amplifier IC, the collector of the transistor Q3 is also connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the internal working power supply (VDD_5V_SYS);
[0034] A power interface pin PWR of the power amplifier IC is connected to the internal working power supply (VDD_5V_SYS), and a ground pin GND of the power amplifier IC is grounded.
[0035] In some possible implementations, when the power amplifier IC is powered on, the external IO control pin (SPK_CTL) is preferentially set to a high level before the external power supply (VCC_3V3_EXT) is turned on, the base of the transistor Q1 is not conducting, the base of the transistor Q2 is not conducting, the base of the transistor Q3 is conducting, the collector is at a low level, the enable pin EN of the power amplifier IC is at a low level, and the speaker turns off the output.
[0036] In some possible implementations, after the power amplifier IC is powered on and the external power supply (VCC_3V3_EXT) is turned on, the external IO control pin (SPK_CTL) is preferentially set to a low level, the base of the transistor Q1 is turned on, the base of the transistor Q2 is turned on, the base of the transistor Q3 is not turned on, the collector is at a high level, the enable pin EN of the power amplifier IC is at a high level, and the speaker starts outputting.
[0037] In some possible implementations, the transistor Q1 is a PNP transistor, and the transistors Q2 and Q3 are NPN transistors.
[0038] In some possible implementations, the voltage of the external power supply is 3.3V.
[0039] In some possible implementations, the voltage of the internal working power supply is 5V.
[0040] In some possible implementations, the resistance of the resistor R1 is 10KΩ, the resistance of the resistor R2 is 10KΩ, the resistance of the resistor R3 is 4.7KΩ, the resistance of the resistor R4 is 2KΩ, the resistance of the resistor R5 is 10KΩ, the resistance of the resistor R6 is 20KΩ, the resistance of the resistor R7 is 10KΩ, and the resistance of the resistor R8 is 100KΩ.
[0041] In some possible implementations, the external IO control pin is connected to an IO control pin of an external CPU.
[0042] In some possible implementations, the model of the power amplifier IC is Zhipuxin CS8528S.
[0043] In order to further describe the working principle of the utility model, the overall situation before and after power-on is further explained:
[0044] Taking the power amplifier IC Zhipuxin CS8528S as an example, the operating voltage is 5V, the enable pin EN is turned off when the low level is low, and the output is turned on when the high level is high. Figure 1 Among them, VDD_5V_SYS is the system normal power 5V, VCC_3V3_EXT is the controlled delayed opening peripheral 3.3V, and SPK_CTL is CPU_IO, which is used to control the opening or closing of the power amplifier.
[0045] 1. When the system is just powered on, the peripheral 3.3V power supply (VCC_3V3_EXT) is not turned on yet, so the base of the PNP transistor Q1 will not be turned on, so the base of the NPN transistor Q2 is not turned on, and the base of the NPN transistor Q3 is turned on, the collector is low, the EN level of the power amplifier IC is low, and the speaker turns off the output;
[0046] 2. During the boot process, as long as the IO control pin (SPK_CTL) is set high before the peripheral 3.3V power supply (VCC_3V3_EXT) is turned on, the base of the PNP transistor Q1 will not be turned on, so the base of the NPN transistor Q2 will not be turned on, and the base of the NPN transistor Q3 will be turned on, the collector will be low, the EN level of the power amplifier IC will be low, and the speaker will turn off the output;
[0047] 3. After the power-on is completed, the peripheral 3.3V power supply (VCC_3V3_EXT) is turned on. When the speaker output is required, the IO control pin (SPK_CTL) is set low, which can make the base of the PNP transistor Q1 conductive, so the collector pin2 of the PNP transistor Q1 is high, so that the base of the NPN transistor Q2 is also conductive. In this way, the base of the NPN transistor Q3 is low and not conductive, so the EN level of the power amplifier IC is high, and the speaker starts to output.
[0048] The elimination circuit provided by the utility model can keep the speaker closed during the first and second processes of the startup, thereby suppressing the pop sound that may occur during the startup process.
[0049] In summary, the utility model controls the switch of transistor Q1 through an external controllable IO, and combines with a controllable external power supply to control the switch of transistor Q2, and then controls the switch of transistor Q3, so that the enable pin of the power amplifier IC controls the speaker to be turned off when the power is turned on, thereby suppressing the pop sound that may occur during the startup process.
[0050] In order to achieve the above object, the utility model also provides a device for suppressing speaker pop sound when power is turned on, comprising the above-mentioned circuit for suppressing speaker pop sound when power is turned on and a power amplifier IC.
[0051] It should be noted that the device for eliminating speaker pop sound during power-on provided in the above embodiment can implement the technical solutions described in the above elimination circuit embodiments. The specific implementation principles of the above modules or units can be found in the corresponding contents of the above method embodiments, which will not be repeated here.
[0052] The above is a detailed introduction to the circuit and device for eliminating the pop sound of the speaker when power is turned on provided by the utility model. Specific examples are used in this article to illustrate the principle and implementation mode of the utility model. The description of the above embodiments is only used to help understand the core idea of the circuit and device for eliminating the pop sound of the speaker when power is turned on of the utility model; at the same time, for technical personnel in this field, according to the idea of the utility model, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the utility model.
Claims
1. A circuit for suppressing speaker pop sound when powering on, applied to a power amplifier IC, the power amplifier IC comprising a power interface pin, an enable pin and a ground pin, characterized in that: The elimination circuit includes transistors Q1, Q2 and Q3, resistors R1, R2, R3, R4, R5, R6, R7 and R8; The emitter of the transistor Q1 is connected to an external power supply and to an external IO control pin through the resistor R1, the base of the transistor Q1 is connected to the external IO control pin through the resistor R2, the collector of the transistor Q1 is connected to a common end of the resistor R3 and the resistor R4, and one end of the resistor R3 is grounded; The base of the transistor Q2 is connected to one end of the resistor R4, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the common end of the resistor R5 and the resistor R6, and one end of the resistor R5 is connected to the internal working power supply; The base of the transistor Q3 is connected to the common end of the resistor R6 and the resistor R7, one end of the resistor R7 is grounded, the emitter of the transistor Q3 is grounded, the collector of the transistor Q3 is connected to the enable pin of the power amplifier IC, the collector of the transistor Q3 is also connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the internal working power supply; The power interface pin of the power amplifier IC is connected to the internal working power supply, and the ground pin of the power amplifier IC is grounded.
2. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: When the power amplifier IC is powered on, the external IO control pin is set to a high level before the external power supply is turned on. The base of the transistor Q1 is not conducting, the base of the transistor Q2 is not conducting, the base of the transistor Q3 is conducting, the collector is at a low level, the enable pin of the power amplifier IC is at a low level, and the speaker turns off the output.
3. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: When the power amplifier IC is powered on and the external power supply is turned on, the external IO control pin is set to a low level first, the base of the transistor Q1 is turned on, the base of the transistor Q2 is turned on, the base of the transistor Q3 is not turned on, the collector is at a high level, the enable pin of the power amplifier IC is at a high level, and the speaker starts outputting.
4. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: The transistor Q1 is a PNP transistor, and the transistors Q2 and Q3 are NPN transistors.
5. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: The voltage of the external power supply is 3.3V.
6. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: The voltage of the internal working power supply is 5V.
7. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: The resistance value of the resistor R1 is 10KΩ, the resistance value of the resistor R2 is 10KΩ, the resistance value of the resistor R3 is 4.7KΩ, the resistance value of the resistor R4 is 2KΩ, the resistance value of the resistor R5 is 10KΩ, the resistance value of the resistor R6 is 20KΩ, the resistance value of the resistor R7 is 10KΩ, and the resistance value of the resistor R8 is 100KΩ.
8. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: The external IO control pin is connected to the IO control pin of the external CPU.
9. The circuit for suppressing speaker pop noise when powering on according to claim 1, characterized in that: The model of the power amplifier IC is Zhipuxin CS8528S.
10. A device for suppressing speaker pop noise when powering on, characterized in that: The invention comprises a circuit for eliminating speaker pop sound when power is turned on and a power amplifier IC as described in any one of claims 1 to 9.
