Power factor correction circuit and dimming driver
By introducing output sampling, PWM sampling and comparison feedback circuits into the power factor correction circuit, the problem of PWM signal self-excitation oscillation when the LED light source is low brightness is solved, and the stability of power output and user experience are improved.
Patent Information
- Application Number
- CN202420769008.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-12
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-04-12
AI Technical Summary
When the LED light source is adjusted to a lower brightness, the power factor correction circuit may cause the PWM signal to self-excite, generate ripple voltage and flicker, affecting the user experience.
A power factor correction circuit is designed, including an output sampling circuit, a PWM sampling circuit and a comparison feedback circuit. By collecting and comparing the PWM signal and voltage signals output by the circuit, the PWM signal duty cycle of the PFC controller is adjusted to prevent self-excitation vibration. .
It effectively avoids flickering and noise from LED light sources at low brightness, and improves the stability and user experience of power output.
Smart Images
Figure CN222262486U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power supply, in particular to a power factor correction circuit and a dimming driver. Background Art
[0002] With the development of science and technology, LED light sources have become the first choice for users in indoor and outdoor lighting scenarios. Users have higher and higher requirements for LED light sources, requiring LED light sources to have a wider dimming range from 0.079% to 100% power. When the brightness is adjusted to a lower brightness, the power supply is lightly loaded, and the power factor correction circuit (PFC) in the power supply will work in transition mode (also called critical mode) to obtain a higher power factor and reduce total harmonic distortion. However, when the load driven by the power supply is too light, the voltage signal fed back to the PFC controller will be low, causing the PWM signal output by the PFC controller to produce self-excited oscillation, resulting in a large ripple voltage at the output, causing users to feel the flickering of the light source, and the noise that can be heard by the human ear due to the frequent operation of components affects the customer's experience. Utility Model Content
[0003] In order to overcome the shortcomings of the prior art, the purpose of the utility model is to provide a power factor correction circuit, which can stabilize the PWM signal output when the power supply drives a lighter load, avoid self-excited oscillation of the PWM signal output when the power supply drives a lighter load, avoid output ripple, and avoid flickering and noise when the light source is adjusted to a lower brightness.
[0004] To solve the above problems, the technical solution adopted by the utility model is as follows: a power factor correction circuit, comprising: a PFC controller and its peripheral circuits; an output sampling circuit, whose input end is connected to the COMP pin of the PFC controller, and is used to collect the output voltage feedback signal fed back to the COMP pin; a PWM sampling circuit, whose input end is connected to the GATE pin of the PFC controller, and is used to convert the PWM signal output by the PFC controller into a corresponding PWM equivalent voltage signal; a comparison feedback circuit, whose two input ends are respectively connected to the output end of the output sampling circuit and the output end of the PWM sampling circuit, and whose output end is connected to the ZCS pin of the PFC controller, and is used to compare the output voltage feedback signal with the PWM equivalent voltage signal, and feed back the comparison result to the PFC controller, so that when the value of the output voltage feedback signal is too low and the PWM signal output by the PFC controller self-oscillates, the duty cycle of the PWM signal output by the PFC controller is increased.
[0005] Compared with the prior art, the utility model has the beneficial effect that the PWM signal and the output voltage of the entire circuit can be collected through the output sampling circuit and the PWM sampling circuit, and the two can be compared, and the parameters of the output sampling circuit and the PWM sampling circuit can be adjusted. When it is detected that the voltage output by the circuit is low and the duty cycle of the PWM signal is also low, the comparison feedback circuit feeds back a signal to the ZCS (zero current detection) pin of the PFC controller, thereby turning on the transistor controlled by the PFC controller in advance, and increasing the duty cycle of the PWM signal output by the PFC controller, thereby preventing the PWM signal output by the PFC controller from self-excited oscillation and avoiding the generation of ripple voltage at the power supply output.
[0006] In the above power factor correction circuit, the output sampling circuit is a voltage divider circuit composed of a plurality of voltage divider resistors.
[0007] In the above-mentioned power factor correction circuit, the comparison feedback circuit includes an operational amplifier, the inverting input terminal of the operational amplifier is connected to the output terminal of the output sampling circuit, the non-inverting input terminal of the operational amplifier is connected to the output terminal of the PWM sampling circuit, and the output terminal of the operational amplifier is connected to the ZCS pin of the PFC controller.
[0008] In the above-mentioned power factor correction circuit, the output sampling circuit includes a first voltage-dividing resistor and a second voltage-dividing resistor, the inverting input terminal of the operational amplifier is connected to the COMP pin of the PFC controller through the first voltage-dividing resistor, and the inverting input terminal of the operational amplifier is grounded through the second voltage-dividing resistor.
[0009] In the above power factor correction circuit, the inverting input terminal of the operational amplifier is grounded via a capacitor.
[0010] In the above-mentioned power factor correction circuit, the PWM sampling circuit includes a rectifier circuit, the input end of the rectifier circuit is connected to the GATE pin of the PFC controller, and the output end of the rectifier circuit is connected to the input end of the comparison feedback circuit.
[0011] The above-mentioned power factor correction circuit, the PWM sampling circuit includes a half-bridge rectifier circuit, the input end of the half-bridge rectifier circuit is connected to the GATE pin of the PFC controller, the output end of the half-bridge rectifier circuit is connected to the in-phase input end of the operational amplifier, and resistors are connected in series on both bridge arms of the half-bridge rectifier circuit.
[0012] In the above-mentioned power factor correction circuit, the non-inverting input terminal of the operational amplifier is grounded through a voltage-stabilizing diode, the non-inverting input terminal of the operational amplifier is connected to the cathode of the voltage-stabilizing diode, and capacitors are connected in parallel at both ends of the voltage-stabilizing diode.
[0013] In the above power factor correction circuit, the output end of the operational amplifier is connected to the ZCS pin of the PFC controller via a forward diode.
[0014] A dimming driver, a switching power supply includes the above-mentioned power factor correction circuit.
[0015] The utility model is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 The figure is a schematic diagram of a power factor correction circuit according to an embodiment of the utility model. DETAILED DESCRIPTION
[0017] The embodiments of the present invention are described in detail below. Figure 1 The embodiment of the utility model provides a power factor correction circuit, including a PFC controller U1 and its peripheral circuits, an output sampling circuit, a PWM sampling circuit and a comparison feedback circuit. Among them, the input end of the output sampling circuit is connected to the COMP pin of the PFC controller U1, and the output end is connected to the first input end of the comparison feedback circuit, which is used to collect the output voltage feedback signal fed back to the COMP pin. The input end of the PWM sampling circuit is connected to the GATE pin of the PFC controller U1, and the output end is connected to the second input end of the comparison feedback circuit, which is used to convert the PWM signal output by the PFC controller U1 to the control tube into a corresponding PWM equivalent voltage signal. The output end of the comparison feedback circuit is connected to the ZCS pin of the PFC controller U1, and is used to compare the values of the PWM equivalent voltage signal and the output voltage feedback signal, and feed back the comparison result to the ZCS pin of the PFC controller U1, so that when the power supply drives a very light load and the output PWM signal is about to self-oscillate due to a low duty cycle, the zero-crossing detection is generally triggered in advance to adjust the duty cycle of the output PWM signal, so that the output PWM signal remains stable, and ripple noise is avoided in the power supply output, which causes the driven light source to flicker or generate noise.
[0018] It can be understood that the output sampling circuit is generally a voltage-dividing circuit composed of multiple voltage-dividing resistors, and the PWM sampling circuit generally adopts a rectifier circuit or a PWM driving circuit. By reasonably setting the parameters of the voltage-dividing circuit and the rectifier circuit, when the voltage value of the power supply output is low and the duty cycle of the PWM signal output by the PFC controller U1 is very low, when self-excited oscillation is about to occur, the PWM equivalent voltage signal output by the PWM sampling circuit is less than or greater than the voltage feedback signal output by the output sampling circuit, so that the output of the comparison feedback circuit generates a rising edge or falling edge signal, thereby triggering the zero-crossing detection of the PFC control U1, thereby increasing the duty cycle of the output PWM signal, and keeping the output PWM signal stable. The peripheral circuit structure of the PFC controller U1 can be designed according to actual needs, and the specific structure of the peripheral circuit is not further described here.
[0019] Reference Figure 1 In this embodiment, the comparison feedback circuit includes an operational amplifier U2, the output sampling circuit includes a voltage-dividing resistor R12 and a voltage-dividing resistor R13, and the PWM sampling circuit includes a half-bridge rectifier circuit. The inverting input terminal of the operational amplifier U2 is grounded through the voltage-dividing resistor R13, and is connected to the COMP pin of the PFC controller U1 through the voltage-dividing resistor R12. The non-inverting input terminal of the operational amplifier U2 is connected to the output terminal of the half-bridge rectifier circuit, the input terminal of the half-bridge rectifier circuit is connected to the GATE pin of the PFC controller U2, and the output terminal of the operational amplifier U2 is connected to the ZCS pin of the PFC controller U2. In this embodiment, the PFC controller U1 uses a controller of model MP44014. When the ZCS pin detects a falling edge, the transistor is controlled to turn on through the GATE pin. Therefore, in this embodiment, when the power supply drives a very light load, when the PWM signal output by the PFC controller U1 is about to generate self-excited oscillation, the value of the PWM equivalent voltage signal converted by the PWM sampling circuit will decrease and be lower than the PWM equivalent voltage signal output by the output sampling circuit, so that the level output by the operational amplifier U1 changes from a high level to a low level, so that the PFC controller U1 detects a falling edge signal, and the PFC controller U1 controls the control tube Q1 to conduct through the GATE pin, so that the output PWM signal remains stable, thereby ensuring the stability of the power supply output, and avoiding the situation that when the driven LED light source is dimmed at a low level, the load driven by the power supply is very light, and the output PWM signal self-excites and causes the LED light source to flicker and generate noise. The two bridge arms of the half-bridge rectifier circuit are respectively provided with resistors R14 and R15. By setting the resistance values of resistors R14 and R15, the output of the half-bridge rectifier circuit is adjusted so that the value of the output electrical signal is within the acceptable range of the operational amplifier U2, and when the PWM signal is about to self-excite, the value of the output PWM signal equivalent voltage signal is less than the output voltage feedback signal.
[0020] Reference Figure 1 In this embodiment, in order to ensure that the output voltage feedback signal and the PWM equivalent voltage signal input by the operational amplifier U2 are stable and avoid misjudgment of the comparison feedback circuit, the in-phase input terminal of the operational amplifier U2 is grounded through the capacitor C10, and the inverting input terminal is grounded through the capacitor C9 to filter the output of the PWM sampling circuit and the output sampling circuit. The in-phase input terminal of the operational amplifier U2 is also grounded through the voltage regulator diode D6, and the in-phase input terminal is connected to the cathode of the voltage regulator diode D6. The voltage regulator diode D6 is used to clamp the output of the PWM sampling circuit to prevent the operational amplifier U2 from being damaged by the high voltage output by the PWM sampling circuit. In this embodiment, the output terminal of the operational amplifier U2 is also connected to VCC through the resistor R16, so that the high-level voltage value output by the operational amplifier U2 can be recognized by the ZCS pin of the PFC controller U2. The output terminal of the operational amplifier U2 is connected to the ZCS pin of the PFC controller U2 through a forward diode D7 to prevent the normal zero-crossing detection signal from flowing back into the output terminal of the operational amplifier U2 and causing damage to the operational amplifier U2.
[0021] The dimming driver of the embodiment of the utility model includes a switching power supply and a dimming control unit, etc., wherein the switching power supply includes the above-mentioned power factor correction circuit. When the brightness of the driven LED light source is reduced, resulting in a very light load driven by the switching power supply, the duty cycle of the output of the power supply and the PWM signal output by the PFC controller can be compared through a comparison feedback circuit, and the comparison result is fed back to the ZCS pin of the PFC controller to correct the PWM signal output by the PFC controller, so as to avoid the self-excited oscillation of the output PWM signal due to the low duty cycle when the power supply drives a light load, thereby avoiding flickering or noise when the LED light source is adjusted to a lower power, thereby improving the user experience. When the dimming driver drives a high-power LED light source, even if the LED light source is adjusted to the lowest brightness, the power required by the LED light source is not a relatively light load for the switching power supply, so at this time, it is not necessary to correct the PWM signal output by the PFC controller at low brightness, and only the output end of the comparison feedback circuit needs to be connected to a high level to shield the correction function of the power factor correction circuit, so as to avoid the correction function affecting the normal dimming of the LED light source by the dimming driver.
[0022] It should be noted that in the description of the present invention, if there are any orientation descriptions, such as up, down, front, back, left, right, etc., the orientations or positional relationships indicated are all based on the orientations or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed or operated in a specific orientation, and cannot be understood as a limitation on the present invention.
[0023] In the description of the present utility model, "several" means one or more, "more" means two or more, "greater than", "less than", "exceed" etc. are understood to exclude the number itself, and "above", "below", "within" etc. are understood to include the number itself. If there is a description of "first" or "second", it is only used to distinguish the technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.
[0024] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.
[0025] The above-mentioned implementation modes are only preferred implementation modes of the present invention, and cannot be used to limit the protection scope of the present invention. Any non-substantial changes and substitutions made by technicians in this field on the basis of the present invention shall fall within the scope of protection required by the present invention.
Claims
1. A power factor correction circuit, characterized in that: include: PFC controller and its peripheral circuits; An output sampling circuit, whose input end is connected to the COMP pin of the PFC controller, and is used to collect an output voltage feedback signal fed back to the COMP pin; A PWM sampling circuit, whose input end is connected to the GATE pin of the PFC controller, and is used to convert the PWM signal output by the PFC controller into a corresponding PWM equivalent voltage signal; A comparison feedback circuit, wherein two input ends are respectively connected to the output end of the output sampling circuit and the output end of the PWM sampling circuit, and the output end is connected to the ZCS pin of the PFC controller, and is used for comparing the output voltage feedback signal with the PWM equivalent voltage signal, and feeding back the comparison result to the PFC controller, so that when the value of the output voltage feedback signal is too low and the PWM signal output by the PFC controller self-oscillates, the duty cycle of the PWM signal output by the PFC controller is increased.
2. The power factor correction circuit according to claim 1, characterized in that: The output sampling circuit is a voltage dividing circuit composed of a plurality of voltage dividing resistors.
3. The power factor correction circuit according to claim 1, characterized in that: The comparison feedback circuit includes an operational amplifier, an inverting input terminal of the operational amplifier is connected to the output terminal of the output sampling circuit, a non-inverting input terminal of the operational amplifier is connected to the output terminal of the PWM sampling circuit, and the output terminal of the operational amplifier is connected to the ZCS pin of the PFC controller.
4. The power factor correction circuit according to claim 3, characterized in that: The output sampling circuit includes a first voltage-dividing resistor and a second voltage-dividing resistor. The inverting input terminal of the operational amplifier is connected to the COMP pin of the PFC controller through the first voltage-dividing resistor, and the inverting input terminal of the operational amplifier is grounded through the second voltage-dividing resistor.
5. The power factor correction circuit according to claim 4, characterized in that: The inverting input terminal of the operational amplifier is grounded through a capacitor.
6. The power factor correction circuit according to claim 1, characterized in that: The PWM sampling circuit comprises a rectifier circuit, an input end of the rectifier circuit is connected to a GATE pin of the PFC controller, and an output end of the rectifier circuit is connected to an input end of the comparison feedback circuit.
7. The power factor correction circuit according to claim 3, characterized in that: The PWM sampling circuit includes a half-bridge rectifier circuit, the input end of the half-bridge rectifier circuit is connected to the GATE pin of the PFC controller, the output end of the half-bridge rectifier circuit is connected to the in-phase input end of the operational amplifier, and resistors are connected in series on both bridge arms of the half-bridge rectifier circuit.
8. The power factor correction circuit according to claim 7, characterized in that: The non-inverting input terminal of the operational amplifier is grounded through a voltage stabilizing diode, the non-inverting input terminal of the operational amplifier is connected to the cathode of the voltage stabilizing diode, and capacitors are connected in parallel at both ends of the voltage stabilizing diode.
9. The power factor correction circuit according to claim 3, characterized in that: The output end of the operational amplifier is connected to the ZCS pin of the PFC controller through a forward diode.
10. A dimming driver, characterized in that: The switching power supply comprises a power factor correction circuit according to any one of claims 1 to 9.