MEMS device and electronic device

Abstract

The utility model provides an MEMS device and an electronic device. The MEMS device comprises: a substrate; the first oxide layer is located on the substrate; the conductive layer is located on the first oxide layer; the first barrier layer is located on the conductive layer and exposes part of the surface of the conductive layer; the dielectric layer is located on the first barrier layer and exposes a part of the surface of the first barrier layer and a part of the surface of the conductive layer; the second oxide layer covers the exposed surface of the first barrier layer and exposes part of the surface of the conductive layer; and the metal layer covers the exposed surface of the conductive layer, the second oxide layer and the dielectric layer. The first barrier layer in the scheme can avoid direct contact between the second oxide layer and the conductive layer, so that the conductive layer can be prevented from being damaged in the process of etching the second oxide layer, and the device performance and the product yield are further improved; meanwhile, the first barrier layer can enhance the strength of the backboard structure, and can improve the blowing performance.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, in particular to a MEMS device and an electronic device. Background Art

[0002] With the continuous development of semiconductor technology, in the market of sensor products, smart phones, integrated CMOS and micro-electromechanical systems (MEMS) devices are becoming the most mainstream and advanced technologies, and with the update of technology, they are developing in the direction of small size, high performance and low power consumption.

[0003] Among them, MEMS microphones made based on the micro-electromechanical system (MEMS) process are widely used because of their advantages over traditional microphones, such as small size, low cost and stable performance. However, when preparing the metal layer of the conductive layer in the electrically connected backplane structure, the MEMS microphones of the related art are prone to damage the conductive layer, which in turn causes a short circuit in the device, resulting in a degradation of device performance and a reduction in product yield. Utility Model Content

[0004] A series of simplified concepts are introduced in the utility model content section, which will be further described in detail in the detailed implementation section. The utility model content section of the utility model does not mean to attempt to define the key features and essential technical features of the technical solution claimed for protection, nor does it mean to attempt to determine the scope of protection of the technical solution claimed for protection.

[0005] In order to at least partially solve the above technical problems, the utility model provides a MEMS device, including:

[0006] substrate;

[0007] A first oxide layer, located on the substrate;

[0008] A conductive layer, located on the first oxide layer;

[0009] A first barrier layer, located on the conductive layer and exposing a portion of the surface of the conductive layer;

[0010] a dielectric layer, located on the first barrier layer and exposing a portion of the surface of the first barrier layer and a portion of the surface of the conductive layer;

[0011] a second oxide layer covering the exposed surface of the first barrier layer and exposing a portion of the surface of the conductive layer;

[0012] A metal layer covers the exposed surface of the conductive layer, the second oxide layer and the dielectric layer.

[0013] Exemplarily, the material of the first barrier layer includes low-stress silicon nitride.

[0014] Exemplarily, a second barrier layer is further included, wherein the second barrier layer is located between the first oxide layer and the conductive layer.

[0015] Exemplarily, the material of the second barrier layer includes low-stress silicon nitride.

[0016] Exemplarily, the second oxide layer has an inclined sidewall morphology.

[0017] Exemplarily, the material of the conductive layer includes doped polysilicon.

[0018] Exemplarily, the material of the dielectric layer includes silicon nitride.

[0019] Exemplarily, the material of the metal layer includes gold, chromium or a combination thereof.

[0020] Exemplarily, the MEMS device includes a MEMS microphone.

[0021] Another aspect of the present invention provides an electronic device, wherein the electronic device comprises the above-mentioned MEMS device.

[0022] The MEMS device and electronic apparatus of the utility model form a first barrier layer between the conductive layer and the second oxide layer, which can avoid direct contact between the second oxide layer and the conductive layer, thereby avoiding damage to the conductive layer during etching of the second oxide layer, thereby improving device performance and product yield; at the same time, the first barrier layer can enhance the strength of the backplane structure and improve the blowing performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The following drawings of the present invention are used as a part of the present invention for understanding the present invention. The drawings show the embodiments of the present invention and their descriptions, and are used to explain the principle of the present invention.

[0024] In the attached figure:

[0025] Figure 1 A cross-sectional schematic diagram of a MEMS device of related art is shown;

[0026] Figure 2A-2G The cross-sectional schematic diagram of a MEMS device obtained by sequentially implementing a method for preparing a MEMS device according to a specific embodiment of the utility model is shown. DETAILED DESCRIPTION

[0027] Next, the utility model will be described more completely in conjunction with the accompanying drawings, in which embodiments of the utility model are shown. However, the utility model can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and fully convey the scope of the utility model to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0028] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0029] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0030] Embodiments of the utility model are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the utility model. In this way, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the utility model should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the utility model.

[0031] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by ordinary technicians in the field of the utility model. It will also be understood that terms such as those defined in commonly used dictionaries should be understood to have the same meaning as they have in the context of the relevant field and / or this specification, and should not be interpreted in an ideal or overly formal sense unless expressly defined herein.

[0032] In related technologies, such as Figure 1 As shown, the MEMS microphone includes a substrate 100, a first oxide layer 101, a conductive layer 102, a dielectric layer 103, a second oxide layer 104 and a metal layer 105, wherein the conductive layer 102 and the dielectric layer 103 together constitute a back plate structure of the MEMS microphone. It is worth noting that Figure 1 A partial area of ​​the back plate structure of the MEMS microphone is shown. The MEMS microphone may also include structures such as a diaphragm, a cavity, and a back cavity.

[0033] The inventor of the present application found that in the related art, after forming the second oxide layer 104, the second oxide layer 104 is generally etched by a wet etching process, for example, a buffered oxide etchant (BOE) is used to etch the second oxide layer 104 to obtain Figure 1 The second oxide layer 104 is of the shape shown. However, during the process of etching the second oxide layer 104, after the second oxide layer 104 located above the conductive layer 102 is etched, the exposed conductive layer 102 will continue to be etched, resulting in damage to the conductive layer 102, which in turn causes a short circuit in the device, resulting in a degradation of device performance and a reduction in product yield.

[0034] Therefore, in view of the existence of the above technical problems, the utility model proposes a MEMS device, including:

[0035] substrate;

[0036] A first oxide layer, located on the substrate;

[0037] A conductive layer, located on the first oxide layer;

[0038] A first barrier layer, located on the conductive layer and exposing a portion of the surface of the conductive layer;

[0039] a dielectric layer, located on the first barrier layer and exposing a portion of the surface of the first barrier layer and a portion of the surface of the conductive layer;

[0040] a second oxide layer covering the exposed surface of the first barrier layer and exposing a portion of the surface of the conductive layer;

[0041] A metal layer covers the exposed surface of the conductive layer, the second oxide layer and the dielectric layer.

[0042] The MEMS device of the utility model has a first barrier layer formed between the conductive layer and the second oxide layer, which can avoid direct contact between the second oxide layer and the conductive layer, thereby avoiding damage to the conductive layer during etching of the second oxide layer, thereby improving device performance and product yield; at the same time, the first barrier layer can enhance the strength of the backplane structure and improve the blowing performance.

[0043] Embodiment 1

[0044] Below, reference Figure 2G The MEMS device in the embodiment of the present application is described.

[0045] The MEMS device may be any suitable device known to those skilled in the art. In this embodiment, the technical solution of the utility model is mainly explained and illustrated by taking the case where the MEMS device is a MEMS microphone as an example.

[0046] In one example, if Figure 2G As shown, the MEMS device of the present application includes a substrate 200, a first oxide layer 201, a conductive layer 202, a first barrier layer 203, a dielectric layer 204, a second oxide layer 205 and a metal layer 206, wherein: the first oxide layer 201 is located on the substrate 200; the conductive layer 202 is located on the first oxide layer 201; the first barrier layer 203 is located on the conductive layer 202 and exposes a portion of the surface of the conductive layer 202; the dielectric layer 204 is located on the first barrier layer 203 and exposes a portion of the surface of the first barrier layer 203 and a portion of the surface of the conductive layer 202; the second oxide layer 205 covers the exposed surface of the first barrier layer 203 and exposes a portion of the surface of the conductive layer 202; the metal layer covers the exposed surface of the conductive layer 202, the second oxide layer 205 and the dielectric layer 204.

[0047] In one example, if Figure 2G As shown, the substrate 200 may include at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, InGaAs or other III / V compound semiconductors, or the substrate 200 may also include silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) or germanium on insulator (GeOI), etc. Although several examples of materials that can form the substrate 200 are described herein, any material that can be used as the substrate 200 falls within the spirit and scope of the present invention.

[0048] In one example, if Figure 2G As shown, the first oxide layer 201 is made of materials such as silicon oxide and carbon-doped silicon oxide (SiOC), but is not limited to the above examples.

[0049] In one example, if Figure 2G As shown, the material of the conductive layer 202 includes doped polysilicon, such as polysilicon doped with N-type ions such as phosphorus or polysilicon doped with P-type ions such as boron, etc., and is not limited to a certain type. Exemplarily, the conductive layer 202 and the diaphragm (not shown) are electrically different and carry electric charges, thereby forming a capacitor structure, and an internal electric field is formed between the conductive layer 202 and the diaphragm. When the external sound pressure acts on the MEMS microphone, it will cause the conductive layer 202 to vibrate, so that the distance between the conductive layer 202 and the diaphragm changes, thereby generating a change in capacitance, and using the capacitance change to perform calculations and work to complete the conversion of sound signals and electrical signals.

[0050] In one example, if Figure 2G As shown, the material of the dielectric layer 204 includes silicon nitride. In other embodiments, the material of the dielectric layer 204 may also include an inorganic insulating layer such as silicon oxide or silicon oxynitride, or an organic insulating layer such as polyvinyl phenol, polyimide or siloxane.

[0051] In one example, if Figure 2G As shown, the second oxide layer 205 is made of materials such as silicon oxide and carbon-doped silicon oxide (SiOC), but is not limited to the above examples.

[0052] In one example, after the second oxide layer 205 is formed, the second oxide layer 205 is etched by a wet etching process, for example, a buffered oxide etchant is used to etch the second oxide layer 205. At this time, due to the presence of the first barrier layer 203, direct contact between the second oxide layer 205 and the conductive layer 202 can be avoided, thereby avoiding damage to the conductive layer 202 during the etching process of the second oxide layer 205, thereby improving device performance and product yield.

[0053] In one example, the material of the first barrier layer 203 includes silicon nitride. Preferably, the material of the first barrier layer 203 includes low-stress silicon nitride, and the low-stress material has excellent mechanical properties, such as high strength, strong fracture resistance, etc., and helps to relieve stress inside the device. Optionally, the stress of the low-stress silicon nitride layer is less than or equal to 1GPa, or it can also be other suitable low-stress numerical ranges. In other embodiments, the material of the first barrier layer 203 can also be any other suitable material, as long as the first barrier layer 203 is not easily etched during the etching of the second oxide layer 205 to ensure that the conductive layer 202 is not exposed. For example, when a buffered oxide etchant is used to etch the second oxide layer 205, the first barrier layer 203 can be selected from any suitable material that is resistant to etching by the buffered oxide etchant, that is, compared with the second oxide layer 205, the first barrier layer 203 has a lower etching selectivity. Exemplarily, the first barrier layer 203 , the conductive layer 202 , and the dielectric layer 204 together constitute the back plate structure of the MEMS microphone of the present application. The first barrier layer 203 can enhance the strength of the back plate structure and improve the blowing performance.

[0054] In one example, if Figure 2G As shown, the second oxide layer 205 has an inclined sidewall morphology. Compared with a vertical sidewall morphology, the inclined sidewall morphology can greatly relieve the stress at the corners and sidewalls of the metal layer 206, thereby increasing the adhesion ability of the metal layer 206.

[0055] In one example, if Figure 2G As shown, the MEMS device of the present application further includes a second barrier layer 207, and the second barrier layer 207 is located between the first oxide layer 201 and the conductive layer 202. Exemplarily, the second barrier layer 207 can avoid direct contact between the first oxide layer 201 and the conductive layer 202, thereby avoiding damage to the conductive layer 202 when the first oxide layer 201 is released.

[0056] In one example, the material of the second barrier layer 207 includes silicon nitride. Preferably, the material of the second barrier layer 207 includes low-stress silicon nitride. The low-stress material has excellent mechanical properties, such as high strength, strong fracture resistance, etc., and helps to relieve stress inside the device. Optionally, the stress of the low-stress silicon nitride layer is less than or equal to 1GPa, or it can also be other suitable low-stress numerical ranges. Exemplarily, the second barrier layer 207 and the conductive layer 202, the first barrier layer 203 and the dielectric layer 204 together constitute the backplate structure of the MEMS microphone of the present application. The second barrier layer 207 can further enhance the strength of the backplate structure and can further improve the blowing performance.

[0057] In one example, if Figure 2GAs shown, the metal layer 206 is electrically connected to the conductive layer 202 to lead out the conductive layer 202 so as to connect the conductive layer 202 to an external circuit. Exemplarily, the material of the metal layer 206 includes gold, chromium or a combination thereof.

[0058] So far, the introduction to the structure of the MEMS device of the present invention has been completed. A complete device may also include other component structures, such as a diaphragm, a cavity, etc., which will not be described one by one here.

[0059] In summary, the MEMS device of the utility model has a first barrier layer formed between the conductive layer and the second oxide layer, which can avoid direct contact between the second oxide layer and the conductive layer, thereby avoiding damage to the conductive layer during etching of the second oxide layer, thereby improving device performance and product yield; at the same time, the first barrier layer can enhance the strength of the back plate structure and improve the blowing performance. Furthermore, a second barrier layer is formed between the first oxide layer and the conductive layer, and the second barrier layer can avoid direct contact between the first oxide layer and the conductive layer, thereby avoiding damage to the conductive layer when releasing the first oxide layer, and can further enhance the strength of the back plate structure and improve the blowing performance.

[0060] Embodiment 2

[0061] Refer to the following Figure 2A-2G To describe the preparation method of the MEMS device of the present application.

[0062] The MEMS device may be any suitable device known to those skilled in the art. In this embodiment, the technical solution of the utility model is mainly explained and illustrated by taking the case where the MEMS device is a MEMS microphone as an example.

[0063] First, if Figure 2A As shown, a substrate 200 is provided, and a first oxide layer 201 and a second barrier layer 207 are sequentially formed on the substrate 200. Exemplarily, the substrate 200 may include at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, InGaAs or other III / V compound semiconductors, or the substrate 200 may also include silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) or germanium on insulator (GeOI), etc. Although several examples of materials that can form the substrate 200 are described herein, any material that can be used as the substrate 200 falls within the spirit and scope of the present invention.

[0064] In one example, the first oxide layer 201 and the second barrier layer 207 may be formed by various deposition methods commonly used in the art, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD).

[0065] Then, if Figure 2B As shown, a conductive layer 202 is formed on the second barrier layer 207. Exemplarily, the conductive layer 202 may be formed by various deposition methods commonly used in the art, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), etc. Alternatively, the conductive layer 202 may be formed by one of low pressure chemical vapor deposition (LPCVD), laser ablation deposition (LAD), and selective epitaxial growth (SEG).

[0066] Then, if Figure 2C As shown, a first barrier layer 203 is formed on the conductive layer 202. For example, the first barrier layer 203 may be formed by various deposition methods commonly used in the art, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD).

[0067] Then, if Figure 2D As shown, a patterned dielectric layer 204 is formed on the first barrier layer 203, and the dielectric layer 204 exposes a portion of the surface of the first barrier layer 203. Exemplarily, the dielectric layer 204 can be formed by various deposition methods commonly used in the art, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD).

[0068] Then, if Figure 2E As shown, a patterned second oxide layer 205 is formed, and the second oxide layer 205 covers a portion of the surface of the exposed first barrier layer 203. By way of example, the second oxide layer 205 can be formed by various deposition methods commonly used in the art, for example, it can be formed by a chemical vapor deposition (CVD) method, a physical vapor deposition (PVD) method, or an atomic layer deposition (ALD) method. By way of example, the second oxide layer 205 can be patterned by a wet etching process, for example, a buffered oxide etching solution can be used to pattern the second oxide layer 205.

[0069] Then, if Figure 2F As shown, the exposed first barrier layer 203 is etched to expose the conductive layer 202. For example, the exposed first barrier layer 203 may be removed by using an etching process commonly used in the art.

[0070] Finally, if Figure 2GAs shown, a metal layer 206 is formed, and the metal layer 206 covers the exposed surface of the conductive layer 202 and the second oxide layer 205 and the dielectric layer 204. For example, the metal layer 206 can be formed by various deposition methods commonly used in the art, for example, by electroplating process.

[0071] So far, the description of the key steps of the method for manufacturing the MEMS device of the present application has been completed. The manufacturing of a complete MEMS device may also include other steps, which will not be described one by one here. It is worth mentioning that the order of the above steps can be adjusted without conflict.

[0072] Embodiment 3

[0073] Another embodiment of the present invention provides an electronic device, including the above-mentioned MEMS device.

[0074] The electronic device of this embodiment can be any electronic product or device such as a mobile phone, a tablet computer, a laptop computer, a netbook, a game console, a television, a VCD, a DVD, a navigator, a camera, a video camera, a voice recorder, an MP3, an MP4, a PSP, etc., or any intermediate product including the MEMS device. The electronic device of this embodiment of the utility model has better performance due to the use of the above-mentioned MEMS device.

[0075] Although multiple embodiments are described herein, it should be understood that a variety of other modifications and embodiments may be conceived by those skilled in the art, all of which will fall within the spirit and scope of the concepts disclosed in the present utility model. More particularly, within the scope of the present utility model disclosure, the accompanying drawings, and the appended claims, various modifications and changes may be made in the arrangement and / or components of the combined arrangement of the subject matter. In addition to modifications and changes to the components and / or arrangements, the use of alternatives is also an obvious choice for those skilled in the art.

Claims

1. A MEMS device, characterized in that: include: substrate; A first oxide layer, located on the substrate; A conductive layer, located on the first oxide layer; A first barrier layer, located on the conductive layer and exposing a portion of the surface of the conductive layer; a dielectric layer, located on the first barrier layer and exposing a portion of the surface of the first barrier layer and a portion of the surface of the conductive layer; a second oxide layer covering the exposed surface of the first barrier layer and exposing a portion of the surface of the conductive layer; A metal layer covers the exposed surface of the conductive layer, the second oxide layer and the dielectric layer.

2. The MEMS device according to claim 1, characterized in that: The material of the first barrier layer includes low-stress silicon nitride.

3. The MEMS device according to claim 1, characterized in that: The invention also includes a second barrier layer, wherein the second barrier layer is located between the first oxide layer and the conductive layer.

4. The MEMS device according to claim 3, characterized in that: The material of the second barrier layer includes low-stress silicon nitride.

5. The MEMS device according to claim 1, characterized in that: The second oxide layer has an inclined sidewall morphology.

6. The MEMS device according to claim 1, characterized in that: The material of the conductive layer includes doped polysilicon.

7. The MEMS device according to claim 1, characterized in that: The material of the dielectric layer includes silicon nitride.

8. The MEMS device according to claim 1, characterized in that: The material of the metal layer includes gold, chromium or a combination thereof.

9. The MEMS device according to claim 1, characterized in that: The MEMS device includes a MEMS microphone.

10. An electronic device, characterized in that: The electronic device comprises the MEMS device according to any one of claims 1 to 9.

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