Resistance voltage division circuit
By introducing a bias unit and a capacitor voltage divider string into the resistor voltage divider circuit, the parasitic capacitance of the voltage divider resistor changes with the input voltage, solving the problem of increasing delay of the resistor voltage divider circuit in the integrated circuit and improving the signal transmission speed and system performance.
Patent Information
- Application Number
- CN202420844869.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-22
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2034-04-22
AI Technical Summary
In integrated circuits, the resistance voltage divider circuit increases delay caused by parasitic capacitance, resulting in a slow signal transmission speed, which cannot meet the needs of high performance and low power consumption.
A resistive voltage divider circuit structure is adopted including a first voltage divider unit, a second voltage divider unit and a biasing unit, wherein the biasing unit provides a substrate voltage following the change in the input voltage through a capacitor voltage divider string, so that the parasitic capacitance of the voltage divider resistor is made Changes with the input voltage, thereby reducing transmission delay.
It greatly reduces the transmission delay of the resistive voltage divider circuit, improves signal transmission speed and the performance of electronic systems, including speed, accuracy, stability and power consumption.
Smart Images
Figure CN222337253U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of integrated circuits, and more specifically, to a resistor voltage divider circuit. Background Art
[0002] Resistor voltage divider circuits are widely used in various circuit structures due to their high precision and simple structure. For example, the common methods in voltage test circuits include: firstly dividing the voltage to be detected by using voltage divider resistors to make its voltage value within a reasonable ADC (Analog-to-Digital Converter) input range, and then converting the divided voltage into a digital quantity by using the ADC. For high-precision detection requirements, not only a high-precision ADC is required, but also a high linearity requirement for the voltage divider resistor, that is, to ensure that the voltage divider ratio does not change with the detection voltage.
[0003] In integrated circuits, poly resistor models are often used for simulation. The resistor model and layout are as follows: Figure 1a and Figure 1b As shown, n1 and n2 represent the ports at both ends of the resistor, respectively, and SUB represents the resistor substrate. When drawing the layout of the poly resistor, it is generally necessary to place the poly resistor in a P-type ring of a specified potential. The P-type ring potential is the substrate SUB potential of the resistor, while there is no requirement for a ring around the two-end resistor. Whether it is a two-end resistor or a poly resistor, there is parasitic capacitance between the resistor and the underlying P-type layer. During front-end simulation, the poly resistor model can be used to directly simulate the parasitic capacitance between the resistor and the P-type layer, while the two-end resistor model ignores the influence of this inter-layer parasitic capacitance. However, in circuits that are sensitive to AC effects or have large resistor values, the voltage division ratio of the inter-layer parasitic capacitance to the resistor string is more obvious. If the two-end resistor model is used for simulation, it is easy for the front-end simulation to differ greatly from the actual situation. Therefore, compared with the two-end resistor model, the poly resistor model can obtain a more accurate voltage division ratio in these application scenarios.
[0004] However, in the circuit using the voltage-divider resistor string, since an RC delay structure is formed between the resistor string itself and the parasitic capacitor, and the time constant of the delay structure is equal to the product of the resistance value of the resistor string and the capacitance value of the parasitic capacitor, when the resistance value of the resistor string is large, the capacitance value of the parasitic capacitor between layers will also increase accordingly, which will eventually lead to an increase in the delay of the resistor string, making the signal establishment speed of the voltage-divider resistor string too slow, thereby reducing the response speed of the circuit.
[0005] like Figure 2The schematic diagram of the structure of the resistor voltage divider circuit according to the prior art is shown, which uses a poly resistor model to more accurately simulate the influence of interlayer parasitic capacitance. The resistor voltage divider circuit includes voltage divider resistors R1 and R2 connected in series between the input voltage Vin and the ground, and the middle node of the voltage divider resistors R1 and R2 is the output node of the voltage divider signal Vout. The resistor voltage divider circuit of the prior art connects the substrate SUB of the voltage divider resistors R1 and R2 to the ground, which will cause the parasitic capacitance of the resistor to the ground in the circuit, and then cause the delay of the resistor voltage divider circuit to increase.
[0006] At present, in order to solve the problem of increased delay caused by the parasitic capacitance of the voltage-divider resistor string, the existing technology often adopts a method of reducing the parasitic capacitance of the resistor by reducing the resistance value or area of the resistor. Although this method can reduce the delay of the voltage-divider resistor string, due to the reduction in the resistance value of the resistor, the current flowing through the resistor string under the same voltage conditions increases, thereby increasing the static power consumption of the circuit. For some circuits with high power consumption requirements, this is not a feasible solution. Utility Model Content
[0007] In view of the above problems, the purpose of the present invention is to provide a resistor voltage divider circuit, which greatly reduces the transmission delay of the resistor voltage divider circuit, allows the signal to pass through the circuit faster, and then improves the performance of the electronic system in many aspects.
[0008] According to one aspect of the utility model, a resistor voltage divider circuit is provided, comprising: a first voltage divider unit, comprising at least one first voltage divider resistor, a first end of the first voltage divider unit is connected to an input voltage, and a second end of the first voltage divider unit is connected to a voltage divider signal output end; a second voltage divider unit, comprising at least one second voltage divider resistor, a first end of the second voltage divider unit is connected to the voltage divider signal output end, and a second end of the second voltage divider unit is connected to a ground potential; and a bias unit, a first end of the bias unit is connected to the input voltage, and a second end of the bias unit is connected to the ground potential, wherein the bias unit also has an output end connected to the substrate of the at least one first voltage divider resistor and the second voltage divider resistor to provide them with a substrate voltage that changes following the input voltage.
[0009] Optionally, the bias unit includes a capacitor voltage divider string consisting of at least a first capacitor and a second capacitor, wherein the first capacitor and the second capacitor are connected in series between the input voltage and the ground potential, and an intermediate node between the first capacitor and the second capacitor serves as an output end of the capacitor voltage divider string to provide the substrate voltage.
[0010] Optionally, a voltage division ratio of the capacitor voltage division string is consistent with a voltage division ratio of the first voltage division unit and the second voltage division unit.
[0011] Optionally, the bias unit further includes: a bias resistor, a first end of the bias resistor is connected to the bias voltage, a second end of the bias resistor is connected to the output end of the capacitor voltage divider string, and a substrate of the bias resistor is connected to the ground potential.
[0012] Optionally, the at least one first voltage-dividing resistor, the at least one second voltage-dividing resistor and the bias resistor are poly resistors.
[0013] In summary, the utility model provides a new resistor voltage divider circuit, including a first voltage divider unit, a second voltage divider unit and a bias unit, wherein the first voltage divider unit and the second voltage divider unit are connected in series between the input voltage and the ground potential, and the intermediate node between the two is used to provide a voltage divider signal, and the bias unit is connected between the input voltage and the ground potential. Among them, the bias unit also has an output end connected to the substrate of the voltage divider resistors of the first voltage divider unit and the second voltage divider unit to provide a substrate voltage that changes with the input voltage, so that the parasitic capacitance of the voltage divider resistor can also change with the input voltage, which greatly reduces the transmission delay of the resistor voltage divider circuit, and can make the signal pass through the circuit faster, thereby improving the performance of the electronic system in many aspects, including speed, accuracy, stability and power consumption, which is crucial for designing high-performance and high-reliability electronic circuits. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The above and other purposes, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
[0015] Figure 1a FIG. 4 is a schematic diagram showing a resistance model of a poly resistor in the prior art.
[0016] Figure 1b FIG. 4 is a schematic diagram showing a layout of a poly resistor in the prior art.
[0017] Figure 2 The figure shows a schematic structural diagram of a resistor voltage divider circuit according to the prior art.
[0018] Figure 3 The figure shows a schematic structural diagram of a resistor voltage divider circuit according to an embodiment of the utility model.
[0019] Figure 4 A transmission delay comparison diagram of the resistor voltage divider circuit according to the embodiment of the utility model and the resistor voltage divider circuit in the prior art is shown. DETAILED DESCRIPTION
[0020] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.
[0021] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuit, a programmable circuit, a state machine circuit and / or an element that can store instructions executed by a programmable circuit. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.
[0022] The utility model is further described below in conjunction with the accompanying drawings and embodiments.
[0023] Figure 3 FIG. 2 shows a schematic diagram of a resistor voltage divider circuit according to an embodiment of the present utility model. Figure 3 As shown, the embodiment of the utility model discloses a resistor voltage divider circuit 10, which can improve the problem of excessive circuit delay caused by excessive parasitic capacitance of a large resistor voltage divider string, and the resistor voltage divider circuit includes a first voltage divider unit 11, a second voltage divider unit 12 and a bias unit 13. Among them, the first end of the first voltage divider unit 11 is connected to the input voltage Vin, the second end of the first voltage divider unit 11 is connected to the output end of the voltage divider signal Vout, the first end of the second voltage divider unit 12 is connected to the output end of the voltage divider signal Vout, and the second end of the second voltage divider unit 12 is connected to the ground potential.
[0024] The first voltage-dividing unit 11 includes a plurality of first voltage-dividing resistors R11 to R1m, wherein m is an integer greater than or equal to 1, and the plurality of first voltage-dividing resistors R11 to R1m are sequentially connected in series and / or in parallel between the input voltage Vin and the voltage-dividing signal output terminal Vout. The second voltage-dividing unit 12 includes a plurality of second voltage-dividing resistors R21 to R2n, wherein n is an integer greater than or equal to 1, and the plurality of second voltage-dividing resistors R21 to R2n are sequentially connected in series and / or in parallel between the voltage-dividing signal output terminal Vout and the ground potential.
[0025] The plurality of first voltage-dividing resistors R11 to R1m and the plurality of second voltage-dividing resistors R21 to R2n are three-terminal resistors, such as poly resistors or N-well resistors, and the substrate SUB of the plurality of first voltage-dividing resistors R11 to R1m and the plurality of second voltage-dividing resistors R21 to R2n are connected to the bias unit 13. The bias unit 13 is connected between the input voltage Vin and the ground potential, and the output end of the bias unit 13 is connected to the substrate SUB of the plurality of first voltage-dividing resistors R11 to R1m and the plurality of second voltage-dividing resistors R21 to R2n to provide them with a substrate voltage R_SUB that changes with the input voltage Vin.
[0026] It should be noted that, although two voltage-dividing units are used as an example to illustrate the resistor voltage-dividing circuit of the present invention in the above embodiment, the present invention is not limited thereto, and those skilled in the art can use three or more voltage-dividing units in the resistor voltage-dividing circuit as needed to provide more voltage-dividing signal output terminals in the resistor voltage-dividing string. Similarly, as mentioned above, since the capacitor voltage-dividing string and the resistor voltage-dividing string in the bias unit 13 have the same voltage-dividing ratio, when the number of voltage-dividing signal output nodes of the resistor voltage-dividing string increases, it is only necessary to provide a corresponding number of capacitors in the capacitor voltage-dividing string to obtain a corresponding number of voltage-dividing signal output nodes.
[0027] Furthermore, the bias unit 13 includes a capacitor voltage divider string composed of capacitors C1 and C2 connected in series between the input voltage Vin and the ground potential, and the intermediate node of the capacitors C1 and C2 is used as the output end of the capacitor voltage divider string to provide the substrate voltage R_SUB. Furthermore, the voltage division ratio of the capacitor voltage divider string composed of the capacitors C1 and C2 is substantially consistent with the voltage division ratio of the resistor voltage divider string composed of the first voltage divider unit 11 and the second voltage divider unit 12, and the voltage division ratio of the capacitor voltage divider string can be adjusted according to factors such as the signal transmission delay requirement of the resistor voltage divider string or the parasitic capacitance area.
[0028] In this way, when the input voltage Vin changes, the substrate potentials of the plurality of first voltage-dividing resistors R11 to R1m and the plurality of second voltage-dividing resistors R21 to R2n will change with the input voltage Vin, and then the parasitic capacitance of the voltage-dividing resistors can also change with the input voltage Vin, thereby reducing the transmission delay introduced by the parasitic capacitance. In addition, the capacitor voltage-dividing string formed by the capacitors C1 and C2 will not consume additional current, so it will not increase the static power consumption of the circuit, and the capacitors C1 and C2 will not affect the voltage-dividing ratio of the resistor voltage-dividing string, so it will not affect the voltage-dividing result after the circuit is stabilized.
[0029] Furthermore, the bias unit 13 of the present embodiment also includes a bias resistor R3, a first end of the bias resistor R3 is connected to a bias voltage Vbias, a second end of the bias resistor R3 is connected to the output end of the substrate voltage R_SUB, and the substrate of the bias resistor R3 is connected to the ground potential. When the circuit is stable, the substrate potentials of multiple first voltage-dividing resistors R11~R1m and multiple second voltage-dividing resistors R21~R2n are controlled by the bias voltage Vbias, so there will be no floating phenomenon, and when the input voltage Vin undershoots too fast, the substrate potentials of multiple first voltage-dividing resistors R11~R1m and multiple second voltage-dividing resistors R21~R2n may be pulled to a negative value, and the existence of the bias voltage Vbias can ensure that the substrate potentials of multiple first voltage-dividing resistors R11~R1m and multiple second voltage-dividing resistors R21~R2n will not be pulled too low by the input voltage Vin, thereby ensuring the normal function of the entire circuit.
[0030] Figure 4 The figure shows a transmission delay comparison diagram of the resistor voltage divider circuit according to the embodiment of the utility model and the resistor voltage divider circuit of the prior art. The dotted line represents the transmission delay of the resistor voltage divider circuit of the prior art, and the solid line represents the transmission delay of the resistor voltage divider circuit of the utility model. Figure 4 As shown, compared with the resistor voltage divider circuit in the prior art, the resistor voltage divider circuit provided by the utility model can greatly reduce the delay caused by the parasitic capacitance of the resistor voltage divider string, and improve the signal transmission speed and performance of the circuit.
[0031] In summary, the utility model provides a new resistor voltage divider circuit, including a first voltage divider unit, a second voltage divider unit and a bias unit, wherein the first voltage divider unit and the second voltage divider unit are connected in series between the input voltage and the ground potential, and the intermediate node between the two is used to provide a voltage divider signal, and the bias unit is connected between the input voltage and the ground potential. Among them, the bias unit also has an output end connected to the substrate of the voltage divider resistors of the first voltage divider unit and the second voltage divider unit to provide a substrate voltage that changes with the input voltage, so that the parasitic capacitance of the voltage divider resistor can also change with the input voltage, which greatly reduces the transmission delay of the resistor voltage divider circuit, and can make the signal pass through the circuit faster, thereby improving the performance of the electronic system in many aspects, including speed, accuracy, stability and power consumption, which is crucial for designing high-performance and high-reliability electronic circuits.
[0032] It should be noted that the relational terms such as first and second, etc. in this article are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.
[0033] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the present invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and describes these embodiments in detail in order to better explain the principles and practical applications of the present invention, so that technicians in the relevant technical field can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.
Claims
1. A resistor voltage divider circuit, characterized in that: include: A first voltage dividing unit, comprising at least one first voltage dividing resistor, wherein a first end of the first voltage dividing unit is connected to an input voltage, and a second end of the first voltage dividing unit is connected to a voltage dividing signal output end; A second voltage dividing unit, comprising at least one second voltage dividing resistor, wherein a first end of the second voltage dividing unit is connected to the voltage dividing signal output end, and a second end of the second voltage dividing unit is connected to a ground potential; as well as a bias unit, wherein a first end of the bias unit is connected to the input voltage, and a second end of the bias unit is connected to the ground potential, The bias unit further has an output terminal connected to the substrate of the at least one first voltage-dividing resistor and the second voltage-dividing resistor to provide them with a substrate voltage that changes following the input voltage.
2. The resistor voltage divider circuit according to claim 1, characterized in that: The bias unit includes a capacitor voltage divider string consisting of at least a first capacitor and a second capacitor, The first capacitor and the second capacitor are connected in series between the input voltage and the ground potential, and the middle node between the first capacitor and the second capacitor serves as the output end of the capacitor voltage divider string to provide the substrate voltage.
3. The resistor voltage divider circuit according to claim 2, characterized in that: The voltage division ratio of the capacitor voltage division string is consistent with the voltage division ratio of the first voltage division unit and the second voltage division unit.
4. The resistor voltage divider circuit according to claim 2, characterized in that: The bias unit further comprises: A bias resistor, wherein a first end of the bias resistor is connected to a bias voltage, a second end of the bias resistor is connected to an output end of the capacitor voltage divider string, and a substrate of the bias resistor is connected to the ground potential.
5. The resistor voltage divider circuit according to claim 4, characterized in that: The at least one first voltage-dividing resistor, the at least one second voltage-dividing resistor, and the bias resistor are poly resistors.