Relay power supply interlocking control circuit with time delay function

Abstract

The utility model provides a relay power supply interlocking control circuit with a time delay function. The relay power supply interlocking control circuit comprises a power supply module, a logic output module, a power switching module, a DI feedback module and an MCU controller. The logic output module, the power supply switching module, the DI feedback module and the MCU controller are connected in sequence, and the logic output module and the power supply switching module are both connected with the power supply module; the power supply module comprises a power supply unit, a first conversion unit and a second conversion unit; the input end of the first conversion unit is connected with the power supply unit, and the output end is connected with the input end of the second conversion unit. The relay power supply interlocking control circuit with the time delay function can effectively solve the problems of temperature rise and power consumption of a relay, has the advantages of being stable, efficient and low in cost, and has wide application prospects and high application value.

Description

Technical Field

[0001] The utility model belongs to the technical field of relay control, in particular to a relay power supply interlocking control circuit with a time delay function. Background Art

[0002] Existing power electronic products such as small power inverters, SVG, and power supplies mostly use power relays as main circuit switching devices. However, when the power relay works at the rated voltage for a long time, there will be problems such as high power consumption and large device temperature rise, which may directly burn the relay. To this end, some solutions adopt measures such as improving product structure, adjusting the heat dissipation duct, and increasing copper heat dissipation. Although another part of the solution adopts power switching control, it requires software to participate in the control. In addition, it lacks the function of power interlocking and cannot ensure the successful establishment of two power supplies. Therefore, in order to solve the above problems, with the power relay of rated working voltage as the use background, it is necessary to design a relay power supply interlocking control circuit with a delay function to solve the temperature rise and power consumption problems of the relay. Utility Model Content

[0003] In view of this, the utility model aims to provide a relay power supply interlock control circuit with a delay function to solve the temperature rise and power consumption problems of the relay in the prior art.

[0004] In order to achieve the above object, the technical solution of the utility model is implemented as follows:

[0005] A relay power supply interlock control circuit with a delay function comprises a power supply module, a logic output module, a power switching module, a DI feedback module, and an MCU controller; the logic output module, the power switching module, the DI feedback module, and the MCU controller are connected in sequence, and the logic output module and the power switching module are both connected to the power supply module;

[0006] A power supply module, comprising a power supply unit, a first conversion unit and a second conversion unit; an input end of the first conversion unit is connected to the power supply unit, and an output end is connected to an input end of the second conversion unit;

[0007] A logic output module, comprising a logic judgment unit and a timer unit connected to the logic judgment unit; power supply ends of the logic judgment unit and the timer unit are both connected to the output end of the second conversion unit; the input end of the logic judgment unit is used to receive a driving signal of the relay;

[0008] A power switching module, comprising a first output unit, a second output unit, and a switching control unit, wherein the input end of the first output unit is connected to the output end of the first conversion unit, and the output end is connected to the output end of the second output unit; the input end of the second output unit is connected to the power supply unit through the switching control unit, and the control end of the switching control unit is connected to the output end of the logic judgment unit;

[0009] The DI feedback module comprises a voltage stabilizing unit and an isolation unit, wherein the input end of the voltage stabilizing unit is connected to the output end of the second output unit, the output end is connected to the input end of the isolation unit, and the output end of the isolation unit is connected to the MCU controller.

[0010] Furthermore, the first conversion unit includes a DC / DC converter U2, a capacitor C12, a capacitor C2, a capacitor C3, and a capacitor C4, the input end of the DC / DC converter U2 is connected to the power supply unit, one end of the capacitor C12 and the capacitor C2 are connected to the ground end of the DC / DC converter U2, and the other end is connected to the input end of the DC / DC converter U2; one end of the capacitor C3 and the capacitor C4 are connected to the ground end of the DC / DC converter U2, and the other end is connected to the output end of the DC / DC converter U2.

[0011] Furthermore, the DC / DC converter U2 adopts K7812-1000R3.

[0012] Furthermore, the second conversion unit includes a linear regulator U3, a capacitor C5, a capacitor C6, a capacitor C7, and a capacitor C8, the input end of the linear regulator U3 is connected to the output end of the DC / DC converter U2; one end of the capacitor C5 and the capacitor C6 are connected to the input end of the linear regulator U3, and the other end is connected to the ground end of the linear regulator U3; one end of the capacitor C7 and the capacitor C8 are connected to the output end of the linear regulator U3, and the other end is connected to the ground end of the linear regulator U3.

[0013] Furthermore, the linear regulator U3 adopts 78L05.

[0014] Furthermore, the logic judgment unit includes a NAND gate U1, a NAND gate U5, a diode D3, a resistor R6, a resistor R8, a resistor R9, a resistor R10, a resistor R11, and a resistor R12; an input terminal A of the NAND gate U1 receives a relay drive signal RLY1 through resistors R8 and R6 connected in series, and an input terminal B of the NAND gate U1 receives a relay drive signal RLY2 through resistors R11 and R10 connected in series; one end of the resistor R9 is connected to an input terminal A of the NAND gate U1, and the other end is connected to a working ground; one end of the resistor R12 is connected to an input terminal B of the NAND gate U1, and the other end is connected to a working ground; both input terminals A and B of the NAND gate U5 are connected to an output terminal of the NAND gate U1 through a diode D3, and the output terminal of the NAND gate U5 serves as an output terminal of the logic judgment unit, and a positive electrode of the diode D3 is connected to the output terminal of the NAND gate U1.

[0015] Furthermore, the NAND gate U1 and the NAND gate U5 both adopt SN74LVC1G00DBVR.

[0016] Furthermore, the timer unit includes a timer U4, a resistor R3, a diode D2, and a capacitor C14; the timer U4 adopts TLC555IDR, the TRIG end of the timer U4 is connected to the resistor R3, one end of the capacitor C14 is connected to the TRIG end of the timer U4, and the other end is connected to the positive electrode of the diode D3; the input end A and the input end B of the NAND gate U5 are both connected to the output end of the timer U4 through the diode D2, and the positive electrode of the diode D2 is connected to the output end of the timer U4.

[0017] Furthermore, the first output unit includes a diode D1, wherein the anode of the diode D1 is the input terminal and the cathode is the output terminal;

[0018] The second output unit includes a diode D4, wherein the anode of the diode D4 is an input terminal and the cathode is an output terminal;

[0019] The switching control unit includes a MOS transistor Q1, a MOS transistor Q2, a MOS transistor Q3, a resistor R1, a resistor R2, a resistor R13, a resistor R5, a resistor R14, and a resistor R15. The MOS transistor Q1 adopts AO4485, and the MOS transistors Q2 and Q3 both adopt BSS138. The S pole of the MOS transistor Q1 is connected to the power supply unit, the D pole is connected to the positive pole of the diode D4, and the G pole is connected to the S pole through the resistor R1. The D pole of the MOS transistor Q2 is connected to the G pole of the MOS transistor Q1 through the resistor R2, the S pole is connected to the working ground, and the G pole is connected to the output end of the first conversion unit through the resistor R5. One end of the resistor R13 is connected to the G pole of the MOS transistor Q2, and the other end is connected to the working ground. The D pole of the MOS transistor Q3 is connected to the G pole of the MOS transistor Q2, the S pole is connected to the working ground, and the G pole is connected to the output end of the logic judgment unit through the resistor R14. One end of the resistor R15 is connected to the G pole of the MOS transistor Q3, and the other end is connected to the working ground.

[0020] Further, the voltage stabilizing unit includes a voltage stabilizing diode D5, a resistor R17, a capacitor C16, a resistor R18, and a resistor R19, the cathode of the voltage stabilizing diode D5 is connected to the output end of the second output unit through the resistor R17; one end of the capacitor C16 and the resistor R18 are connected to the cathode of the voltage stabilizing diode D5, and the other end is connected to the working ground through the resistor R19;

[0021] The isolation unit includes an optical coupler OC1, a resistor R16, and a capacitor C15; the anode of the optical coupler OC1 is connected to the positive electrode of the voltage-stabilizing diode D5, the cathode is connected to the working ground through the resistor R19, the collector serves as the output end of the isolation unit, and the emitter is connected to the control digital ground; the resistor R16 is connected to the collector of the optical coupler OC1; one end of the capacitor C15 is connected to the collector of the optical coupler OC1, and the other end is connected to the control digital ground.

[0022] Compared with the prior art, the relay power supply interlock control circuit with a delay function described in the utility model has the following advantages:

[0023] The utility model discloses a relay power supply interlocking control circuit with a delay function, which can effectively solve the temperature rise and power consumption problems of the relay, has the advantages of stability, high efficiency and low cost, and has broad application prospects and great application value. This control circuit delays the power supply switching through a 555 timer, which can not only make the relay reliably attracted, but also switch the power supply after the relay is reliably attracted to reduce the power consumption of the relay coil. Among them, the first conversion unit and the power supply unit also have a power supply interlocking function, which ensures that the power supply unit outputs after the output voltage of the first conversion unit is successfully established, thereby ensuring that the power supply switching can be successfully performed. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The illustrative embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation on the present invention. In the accompanying drawings:

[0025] Figure 1 This is a schematic diagram of the structure of a relay power supply interlock control circuit with a delay function according to an embodiment of the utility model;

[0026] Figure 2 This is a schematic diagram of a circuit structure in which a first conversion unit is connected to a power supply unit in a relay power supply interlock control circuit with a delay function according to an embodiment of the utility model;

[0027] Figure 3 A circuit diagram of a second conversion unit in a relay power supply interlock control circuit with a delay function according to an embodiment of the utility model;

[0028] Figure 4 A circuit diagram of a logic output module in a relay power supply interlock control circuit with a delay function according to an embodiment of the utility model;

[0029] Figure 5 A circuit diagram of a power switching module in a relay power supply interlock control circuit with a delay function according to an embodiment of the utility model;

[0030] Figure 6 It is a circuit diagram of a DI feedback module in a relay power supply interlock control circuit with a delay function described in an embodiment of the utility model.

[0031] Description of reference numerals:

[0032] 1. Power supply module; 2. Logic output module; 3. Power switching module; 4. DI feedback module; 5. MCU controller; 6. Power supply unit; 7. First conversion unit. DETAILED DESCRIPTION

[0033] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0034] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present utility model, unless otherwise specified, "multiple" means two or more.

[0035] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0036] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments.

[0037] A relay power supply interlock control circuit with a delay function, such as Figures 1 to 6 As shown, it includes a power supply module 1, a logic output module 2, a power switching module 3, a DI feedback module 4, and an MCU controller 5; the logic output module 2, the power switching module 3, the DI feedback module 4, and the MCU controller 5 are connected in sequence, and the logic output module 2 and the power switching module 3 are both connected to the power supply module 1.

[0038] The power supply module 1 comprises a power supply unit 6, a first conversion unit 7 and a second conversion unit; the input end of the first conversion unit 7 is connected to the power supply unit 6, and the output end is connected to the input end of the second conversion unit.

[0039] The above-mentioned logic output module 2 includes a logic judgment unit and a timer unit connected to the logic judgment unit; the power supply ends of the logic judgment unit and the timer unit are both connected to the output end of the second conversion unit; the input end of the logic judgment unit is used to receive the driving signal of the relay.

[0040] The above-mentioned power switching module 3 includes a first output unit, a second output unit, and a switching control unit. The input end of the first output unit is connected to the output end of the first conversion unit 7, and the output end is connected to the output end of the second output unit; the input end of the second output unit is connected to the power supply unit 6 through the switching control unit, and the control end of the switching control unit is connected to the output end of the logic judgment unit.

[0041] The DI feedback module 4 includes a voltage stabilizing unit and an isolation unit. The input end of the voltage stabilizing unit is connected to the output end of the second output unit, the output end is connected to the input end of the isolation unit, and the output end of the isolation unit is connected to the MCU controller 5.

[0042] The following embodiment uses a power relay with a rated working voltage of 24V as an example to illustrate the present solution. Those skilled in the art can also adjust the modules according to actual needs for power relays with other rated working voltages, especially adjust the voltage of the power supply module 1, to meet the needs of power relays with different rated working voltages, which will not be repeated here. Among them, for a power relay with a rated working voltage of 24V, the working ground is the ground of the relay coil, expressed as GNDP24V. The control digital ground is the ground of the control side signal of the MCU controller, expressed as GND.

[0043] Optionally, the first conversion unit 7 includes a DC / DC converter U2, a capacitor C12, a capacitor C2, a capacitor C3, and a capacitor C4, the input end of the DC / DC converter U2 is connected to the power supply unit 6, one end of the capacitor C12 and the capacitor C2 are connected to the ground end of the DC / DC converter U2, and the other end is connected to the input end of the DC / DC converter U2; one end of the capacitor C3 and the capacitor C4 are connected to the ground end of the DC / DC converter U2, and the other end is connected to the output end of the DC / DC converter U2.

[0044] Exemplarily, the DC / DC converter U2 adopts K7812-1000R3. The power supply unit 6 adopts VCC_+24VP for power supply, and the output end of the first conversion unit 7 is VCC_+12VP.

[0045] In actual application, the pin 1 of the DC / DC converter U2 is the input pin of VCC_+24VP, and a capacitor C12 with a capacitance of 0.1uF and a withstand voltage of 50V and a capacitor C2 with a capacitance of 10uF and a withstand voltage of 50V are connected in parallel between pin 1 and pin 2; the pin 3 is the output end of VCC_+12VP, and a capacitor C3 with a capacitance of 0.1uF and a withstand voltage of 50V and a capacitor C4 with a capacitance of 22uF and a withstand voltage of 25V are connected in parallel between pin 3 and pin 2. Among them, the pin 2 of the DC / DC converter U2 is connected to GNDP24V.

[0046] Optionally, the second conversion unit includes a linear regulator U3, a capacitor C5, a capacitor C6, a capacitor C7, and a capacitor C8, wherein the input end of the linear regulator U3 is connected to the output end of the DC / DC converter U2; one end of the capacitor C5 and the capacitor C6 are connected to the input end of the linear regulator U3, and the other end is connected to the ground end of the linear regulator U3; one end of the capacitor C7 and the capacitor C8 are connected to the output end of the linear regulator U3, and the other end is connected to the ground end of the linear regulator U3.

[0047] Exemplarily, the linear regulator U3 is 78L05. The output terminal of the second conversion unit is VCC_+5VP.

[0048] In actual application, pin 3 of linear voltage regulator U3 is the input of VCC_+12VP, and a capacitor C6 with a capacitance of 0.1uF and a withstand voltage of 50V and a capacitor C5 with a capacitance of 10uF and a withstand voltage of 50V are connected in parallel between pin 3 and pin 2. Pin 1 of linear voltage regulator U3 is the output of VCC_+5VP, and a capacitor C8 with a capacitance of 0.1uF and a withstand voltage of 50V and a capacitor C7 with a capacitance of 10uF and a withstand voltage of 50V are connected in parallel between pin 1 and pin 2. Among them, pin 2 of linear voltage regulator U3 is connected to GNDP24V.

[0049] Optionally, the logic judgment unit includes a NAND gate U1, a NAND gate U5, a diode D3, a resistor R6, a resistor R8, a resistor R9, a resistor R10, a resistor R11, and a resistor R12; the input terminal A of the NAND gate U1 receives the relay drive signal RLY1 through the resistors R8 and R6 connected in series, and the input terminal B of the NAND gate U1 receives the relay drive signal RLY2 through the resistors R11 and R10 connected in series; one end of the resistor R9 is connected to the input terminal A of the NAND gate U1, and the other end is connected to the working ground; one end of the resistor R12 is connected to the input terminal B of the NAND gate U1, and the other end is connected to the working ground; the input terminals A and B of the NAND gate U5 are both connected to the output terminal of the NAND gate U1 through the diode D3, the output terminal of the NAND gate U5 serves as the output terminal of the logic judgment unit, and the positive electrode of the diode D3 is connected to the output terminal of the NAND gate U1.

[0050] Exemplarily, both the NAND gate U1 and the NAND gate U5 use SN74LVC1G00DBVR.

[0051] In actual application, resistors R6, R8, R10, and R11 are all 20K resistors with an accuracy of 1%. Resistors R9 and R12 are all 10K resistors with an accuracy of 1%. Among them, the middle potential of resistors R8 and R9 is connected to pin 1 of NAND gate U1, the middle potential of resistors R11 and R12 is connected to pin 2 of NAND gate U1, pin 3 of NAND gate U1 is connected to GNDP24V, pin 4 of NAND gate U1 is connected to the positive electrode of diode D3 (i.e. pin 2 of diode D3) as the output terminal, and pin 5 of NAND gate is connected to VCC_+5VP for power supply. In addition, pin 4 of NAND gate U1 can also be connected to GNDP24V through a capacitor with a capacitance of 0.1uF and a withstand voltage of 50V to improve the stability of power supply.

[0052] Optionally, the timer unit includes a timer U4, a resistor R3, a diode D2, and a capacitor C14; the timer U4 adopts TLC555IDR, the TRIG end of the timer U4 is connected to the resistor R3, one end of the capacitor C14 is connected to the TRIG end of the timer U4, and the other end is connected to the positive electrode of the diode D3; the input terminal A and the input terminal B of the NAND gate U5 are both connected to the output terminal of the timer U4 through the diode D2, and the positive electrode of the diode D2 is connected to the output terminal of the timer U4.

[0053] In actual application, the VCC_+5VP output by the second conversion unit supplies power to pin 8 of the timer U4 through a capacitor with a capacitance of 0.1uF and a withstand voltage of 50V; pins 6 and 7 of the timer U4 are pulled up to VCC_+5VP through a resistor R4 with a resistance of 49.9K and an accuracy of 1%, and a capacitor C9 with a capacitance of 10uF and a withstand voltage of 50V is connected to GNDP24V.

[0054] In addition, pin 5 of timer U4 is connected to GNDP24V through a capacitor C10 with a capacitance of 0.01uF and a withstand voltage of 50V; pin 4 is pulled up to VCC_+5VP through a resistor R7 with a resistance of 10K and an accuracy of 1%; pin 3 is connected to pin 2 of diode D2; pin 2 is pulled up to VCC_+5VP through a resistor R3 with a resistance of 10K and an accuracy of 1%, and a capacitor C14 with a capacitance of 1nF and a withstand voltage of 50V is connected to pin 2 of diode D3; pin 1 is connected to GNDP24V.

[0055] Optionally, the first output unit includes a diode D1, wherein the anode of the diode D1 is the input terminal and the cathode is the output terminal; the second output unit includes a diode D4, wherein the anode of the diode D4 is the input terminal and the cathode is the output terminal.

[0056] Exemplarily, the diode D2 and the diode D3 have their 1st and 2nd pins connected to the NAND gate U5. The 3rd pin of the NAND gate U5 is connected to GNDP24V. The VCC_+5VP power supply output by the second conversion unit supplies power to the 5th pin of the NAND gate U5 through a capacitor C13 with a capacitance of 0.1uF and a withstand voltage of 50V. The 4th pin of the NAND gate U5 is used as a power switching signal output (DO_relay) and is connected to the control end of the switching control unit.

[0057] Optionally, the switching control unit includes a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a resistor R1, a resistor R2, a resistor R13, a resistor R5, a resistor R14, and a resistor R15, wherein the MOS tube Q1 adopts AO4485, and the MOS tube Q2 and the MOS tube Q3 both adopt BSS138; the S pole of the MOS tube Q1 is connected to the power supply unit, the D pole is connected to the positive pole of the diode D4, and the G pole is connected to the S pole through the resistor R1; the D pole of the MOS tube Q2 is connected to the G pole of the MOS tube Q1 through the resistor R2, the S pole is connected to the working ground, and the G pole is connected to the output end of the first conversion unit through the resistor R5; one end of the resistor R13 is connected to the G pole of the MOS tube Q2, and the other end is connected to the working ground; the D pole of the MOS tube Q3 is connected to the G pole of the MOS tube Q2, the S pole is connected to the working ground, and the G pole is connected to the output end of the logic judgment unit through the resistor R14; one end of the resistor R15 is connected to the G pole of the MOS tube Q3, and the other end is connected to the working ground.

[0058] In actual application, the power switching signal (DO_relay) output by the NAND gate U5 is connected to the gate (i.e., G pole) of the MOS tube Q3 through a resistor R14 with a resistance value of 330R and a precision of 1%, and the gate of the MOS tube Q3 is connected to GNDP24V through a resistor R15 with a resistance value of 20K and a precision of 1%. The VCC_+12VP power supply output by the first conversion unit is connected to the drain (i.e., S pole) of the MOS tube Q3 through a resistor R5 with a resistance value of 10K and a precision of 1%, and is connected to the gate of the MOS tube Q2, and the gate of Q2 is connected to GNDP24V through a resistor R15 with a resistance value of 20K and a precision of 1%.

[0059] In addition, the source electrodes (i.e., D electrodes) of MOS tubes Q2 and Q3 are both connected to GNDP24V. VCC_+24VP is connected to the source electrode of MOS tube Q1, and VCC_+24VP is connected to the gate electrode of MOS tube Q1 through a resistor R1 with a resistance value of 10K and an accuracy of 1%. The gate electrode of MOS tube Q1 is also connected to the drain electrode of MOS tube Q2 through a resistor R2 with a resistance value of 20K and an accuracy of 1%. The drain electrode of MOS tube Q1 is connected to the positive electrode of diode D4, VCC_+12VP is connected to the positive electrode of diode D1, and the negative electrodes of diode D1 and diode D2 are short-circuited to power the relay coil, that is, as the output terminal VOUT of the power switching module.

[0060] Optionally, the voltage stabilizing unit includes a voltage stabilizing diode D5, a resistor R17, a capacitor C16, a resistor R18, and a resistor R19, wherein the cathode of the voltage stabilizing diode D5 is connected to the output end of the second output unit through the resistor R17; the capacitor C16 and the resistor R18 are both connected to the cathode of the voltage stabilizing diode D5 at one end, and the other end is connected to the working ground through the resistor R19. Exemplarily, the voltage stabilizing diode D5 adopts EL357N(C)(TA)-G.

[0061] Optionally, the isolation unit includes an optical coupler OC1, a resistor R16, and a capacitor C15; the anode of the optical coupler OC1 is connected to the positive electrode of the voltage-stabilizing diode D5, the cathode is connected to the working ground through the resistor R19, the collector is used as the output end of the isolation unit, and the emitter is connected to the control digital ground; the resistor R16 is connected to the collector of the optical coupler OC1; one end of the capacitor C15 is connected to the collector of the optical coupler OC1, and the other end is connected to the control digital ground. Exemplarily, the optical coupler OC1 adopts EL357N(C)(TA)-G, and the voltage-stabilizing diode D5 adopts MMSZ5231.

[0062] In actual application, the output terminals VOUT and GNDP24V of the power switching module are respectively connected to the two ends of a resistor R18 with a resistance value of 4.7K and an accuracy of 1% through a resistor with a resistance value of 2.2K and an accuracy of 1% (resistor R17, resistor R19), and the resistor R18 is connected in parallel with a capacitor C16 with a capacitance value of 1uF and a withstand voltage of 50V.

[0063] Specifically, one end of the resistor R18 is connected to the 2nd pin (i.e. cathode) of the optocoupler OC1, and the other end is connected to the negative electrode of the MMSZ5231, and the positive electrode of the MMSZ5231 is connected to the 1st pin (i.e. anode) of the optocoupler OC1. Among them, the 3rd pin of the optocoupler OC1 is connected to GND, and the 4th pin of the optocoupler OC1 is pulled up to VCC_+3.3V through a resistor R16 with a resistance value of 4.7K and an accuracy of 1%, and the 4th pin is also connected to GND through a capacitor C15 with a capacitance value of 0.1uF and a withstand voltage of 50V. In addition, the 4th pin is also connected to the MCU controller as the output of the DI feedback unit.

[0064] The control principle of the control circuit described in this embodiment is explained below in combination with the actual control steps of the relay:

[0065] Before the MCU controller controls the relay to close, VCC_+24VP outputs VCC_+12VP through U2, and VCC_+12VP outputs VCC_+5VP through U3 to power the entire system. RLY1 and RLY2 are 24V relay control signals. At this time, RLY1 and RLY2 are both low level, U1 outputs high level, and U4's 2nd pin is high level. At this time, U4 does not delay, and U4's 3rd pin outputs low level. After the OR gate logic formed by diodes D2 and D3, the 1st and 2nd pins of U5 are both high level, and the output of U5 is low level, so the gate of Q3 is low level, and Q3 is not turned on. At this time, since VCC_+12VP has been established, the gate of Q2 is high level, and Q2 is turned on, and then the gate of Q1 is low level, Q1 is also turned on, the positive voltage of D4 is 24V, and the positive voltage of D1 is 12V. Due to the conduction characteristics of the diode, the output voltage of VOUT at this time is 24V.

[0066] At this time, after the 24V is divided by R17, R18, and R19, it can still break through the voltage-stabilizing diode D5 to make the primary side of OC1 turned on, thereby turning on the secondary side of OC1, and VOUT_DI outputs a low level. The MCU controller obtains the level state of VOUT at this time by detecting the low level of VOUT_DI.

[0067] After the MCU controller controls the relay to close, RLY1 and RLY2 are high level 24V, U1 outputs low level, U4's 2nd pin is low level, U4 delays for nearly 500ms, U4's 3rd pin outputs high level, and through the OR gate logic formed by diodes D2 and D3, U5's 1st and 2nd pin inputs are both high level, U5's output is low level, so Q3's gate is low level, Q3 is not conducting. At this time, because VCC_+12VP has been established, Q2's gate is high level, Q2 is conducting, and then Q1's gate is low level, Q1 is also conducting, the positive voltage of D4 is 24V, and the positive voltage of D1's positive pole is 12V. Due to the conduction characteristics of the diode, the output voltage of VOUT at this time is 24V. During the delay of 500ms, the power relay works at the rated working voltage and achieves reliable closing.

[0068] After 500ms, the 3rd pin of U4 outputs a low level, and after the OR gate logic formed by diodes D2 and D3, the 1st and 2nd pins of U5 are both low level inputs. At this time, the output of U5 is high level, so the gate of Q3 is high level, so Q3 is turned on. Since Q3 is turned on and connected to the working ground, the gate of Q2 is low level, so Q2 is turned off, and then the gate of Q1 is high level, and Q1 is not turned on. Due to the conduction characteristics of the diode, D4 ​​is reverse cutoff, the positive voltage of the positive pole of D1 is 12V, and the output voltage of VOUT is 12V. At this time, the switching of the power supply voltage between 24V and 12V is completed, and the power relay continues to maintain reliable attraction by maintaining the voltage.

[0069] At this time, after being divided by R17, R18, and R19, VOUT cannot break through the Zener diode D5, so that the primary side of OC1 is disconnected, and the secondary side of OC1 is disconnected. VOUT_DI outputs a 3.3V level through the pull-up resistor, and the MCU controller obtains the level state of VOUT at this time by detecting the high level of VOUT_DI.

[0070] The utility model discloses a relay power supply interlocking control circuit with a delay function, which can effectively solve the temperature rise and power consumption problems of the relay, has the advantages of stability, high efficiency and low cost, and has broad application prospects and great application value. This control circuit delays the power supply switching through a 555 timer, which can not only make the relay reliably attracted, but also switch the power supply after the relay is reliably attracted to reduce the power consumption of the relay coil. Among them, the first conversion unit and the power supply unit also have a power supply interlocking function, which ensures that the power supply unit outputs after the output voltage of the first conversion unit is successfully established, thereby ensuring that the power supply switching can be successfully performed.

[0071] In addition, the relay power supply interlock control circuit with delay function described in the utility model not only solves many shortcomings of the existing solutions and has higher cost advantages, but also helps to avoid software engineers configuring multiple timer triggers, reduces the amount of code, and makes work more efficient.

[0072] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A relay power supply interlock control circuit with a delay function, characterized in that: It includes a power supply module, a logic output module, a power switching module, a DI feedback module, and an MCU controller; the logic output module, the power switching module, the DI feedback module, and the MCU controller are connected in sequence, and the logic output module and the power switching module are both connected to the power supply module; A power supply module, comprising a power supply unit, a first conversion unit and a second conversion unit; an input end of the first conversion unit is connected to the power supply unit, and an output end is connected to an input end of the second conversion unit; A logic output module, comprising a logic judgment unit and a timer unit connected to the logic judgment unit; power supply ends of the logic judgment unit and the timer unit are both connected to the output end of the second conversion unit; the input end of the logic judgment unit is used to receive a driving signal of the relay; A power switching module, comprising a first output unit, a second output unit, and a switching control unit, wherein the input end of the first output unit is connected to the output end of the first conversion unit, and the output end is connected to the output end of the second output unit; the input end of the second output unit is connected to the power supply unit through the switching control unit, and the control end of the switching control unit is connected to the output end of the logic judgment unit; The DI feedback module comprises a voltage stabilizing unit and an isolation unit, wherein the input end of the voltage stabilizing unit is connected to the output end of the second output unit, the output end is connected to the input end of the isolation unit, and the output end of the isolation unit is connected to the MCU controller.

2. A relay power supply interlock control circuit with a delay function according to claim 1, characterized in that: The first conversion unit includes a DC / DC converter U2, a capacitor C12, a capacitor C2, a capacitor C3, and a capacitor C4. The input end of the DC / DC converter U2 is connected to the power supply unit. One end of the capacitor C12 and the capacitor C2 are connected to the ground end of the DC / DC converter U2, and the other end is connected to the input end of the DC / DC converter U2; one end of the capacitor C3 and the capacitor C4 are connected to the ground end of the DC / DC converter U2, and the other end is connected to the output end of the DC / DC converter U2.

3. A relay power supply interlock control circuit with a delay function according to claim 2, characterized in that: The DC / DC converter U2 adopts K7812-1000R3.

4. The relay power supply interlock control circuit with delay function according to claim 1, characterized in that: The second conversion unit includes a linear regulator U3, a capacitor C5, a capacitor C6, a capacitor C7, and a capacitor C8. The input end of the linear regulator U3 is connected to the output end of the DC / DC converter U2; one end of the capacitor C5 and the capacitor C6 are connected to the input end of the linear regulator U3, and the other end is connected to the ground end of the linear regulator U3; one end of the capacitor C7 and the capacitor C8 are connected to the output end of the linear regulator U3, and the other end is connected to the ground end of the linear regulator U3.

5. The relay power supply interlock control circuit with delay function according to claim 4, characterized in that: The linear regulator U3 adopts 78L05.

6. The relay power supply interlock control circuit with delay function according to claim 1, characterized in that: The logic judgment unit includes a NAND gate U1, a NAND gate U5, a diode D3, a resistor R6, a resistor R8, a resistor R9, a resistor R10, a resistor R11, and a resistor R12; an input terminal A of the NAND gate U1 receives a relay drive signal RLY1 through resistors R8 and R6 connected in series, and an input terminal B of the NAND gate U1 receives a relay drive signal RLY2 through resistors R11 and R10 connected in series; one end of the resistor R9 is connected to the input terminal A of the NAND gate U1, and the other end is connected to the working ground; one end of the resistor R12 is connected to the input terminal B of the NAND gate U1, and the other end is connected to the working ground; both the input terminal A and the input terminal B of the NAND gate U5 are connected to the output terminal of the NAND gate U1 through the diode D3, the output terminal of the NAND gate U5 serves as the output terminal of the logic judgment unit, and the positive electrode of the diode D3 is connected to the output terminal of the NAND gate U1.

7. A relay power supply interlock control circuit with a delay function according to claim 6, characterized in that: The NAND gate U1 and the NAND gate U5 both adopt SN74LVC1G00DBVR.

8. A relay power supply interlock control circuit with a delay function according to claim 6 or 7, characterized in that: The timer unit includes a timer U4, a resistor R3, a diode D2, and a capacitor C14; the timer U4 adopts TLC555IDR, the TRIG end of the timer U4 is connected to the resistor R3, one end of the capacitor C14 is connected to the TRIG end of the timer U4, and the other end is connected to the positive electrode of the diode D3; the input end A and the input end B of the NAND gate U5 are both connected to the output end of the timer U4 through the diode D2, and the positive electrode of the diode D2 is connected to the output end of the timer U4.

9. The relay power supply interlock control circuit with delay function according to claim 1, characterized in that: The first output unit includes a diode D1, the anode of the diode D1 is an input terminal, and the cathode is an output terminal; the second output unit includes a diode D4, the anode of the diode D4 is an input terminal, and the cathode is an output terminal; The switching control unit includes a MOS transistor Q1, a MOS transistor Q2, a MOS transistor Q3, a resistor R1, a resistor R2, a resistor R13, a resistor R5, a resistor R14, and a resistor R15. The MOS transistor Q1 adopts AO4485, and the MOS transistors Q2 and Q3 both adopt BSS138. The S pole of the MOS transistor Q1 is connected to the power supply unit, the D pole is connected to the positive pole of the diode D4, and the G pole is connected to the S pole through the resistor R1. The D pole of the MOS transistor Q2 is connected to the G pole of the MOS transistor Q1 through the resistor R2, the S pole is connected to the working ground, and the G pole is connected to the output end of the first conversion unit through the resistor R5. One end of the resistor R13 is connected to the G pole of the MOS transistor Q2, and the other end is connected to the working ground. The D pole of the MOS transistor Q3 is connected to the G pole of the MOS transistor Q2, the S pole is connected to the working ground, and the G pole is connected to the output end of the logic judgment unit through the resistor R14. One end of the resistor R15 is connected to the G pole of the MOS transistor Q3, and the other end is connected to the working ground.

10. The relay power supply interlock control circuit with delay function according to claim 1, characterized in that: The voltage stabilizing unit includes a voltage stabilizing diode D5, a resistor R17, a capacitor C16, a resistor R18, and a resistor R19. The cathode of the voltage stabilizing diode D5 is connected to the output end of the second output unit through the resistor R17; one end of the capacitor C16 and the resistor R18 are connected to the cathode of the voltage stabilizing diode D5, and the other end is connected to the working ground through the resistor R19; The isolation unit includes an optical coupler OC1, a resistor R16, and a capacitor C15; the anode of the optical coupler OC1 is connected to the positive electrode of the voltage-stabilizing diode D5, the cathode is connected to the working ground through the resistor R19, the collector serves as the output end of the isolation unit, and the emitter is connected to the control digital ground; the resistor R16 is connected to the collector of the optical coupler OC1; one end of the capacitor C15 is connected to the collector of the optical coupler OC1, and the other end is connected to the control digital ground.

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