Anti-static tray for DIP packaging structure chip

Abstract

The utility model belongs to the related technical field of chip storage equipment, and discloses an anti-static tray for a DIP packaging structure chip, which comprises a tray body integrally made of anti-static materials, a plurality of bearing steps and a plurality of limiting pin through holes, the multiple rows of parallel convex structures are arranged on the bottom surface of the tray body and are respectively used for placing integrated circuit chips with DIP (Dual In-line Package) structures; and the limiting pin through holes are correspondingly formed in the two horizontal sides of each bearing step and are used for allowing pins of the integrated circuit chip to pass through so as to realize chip limiting. According to the utility model, the storage and bearing transportation of the chip can be better executed, the damage risk caused by bending or breaking of the chip pin in the storage and transportation process is reduced, and the rejection rate in the transportation process is reduced; in addition, the design of the limiting through holes can also detect whether the chip pins are deformed and staggered or not; in the using process, chips stored in the tray are convenient to take and place, and the working efficiency is remarkably improved.

Description

Technical Field

[0001] The utility model belongs to the technical field related to chip storage equipment, and more specifically, relates to an anti-static tray for a DIP packaging structure chip. Background Art

[0002] At present, chips with DIP package structure are generally packaged and stored in tubes. However, in the field of component inspection, the tube packaging operation is very time-consuming in the entire screening process of chips. The ordinary anti-static box packaging method can easily cause the chip pins to be entangled with each other, and the sharp pins can easily scratch the surface of the device. In addition, since the chip pins of the DIP package structure are thin and long, during the transportation process, shaking and vibration can cause the pins to bend and deform easily, resulting in chip scrapping.

[0003] Accordingly, the art is in urgent need of further improvement or enhancement to better meet the comprehensive requirements of chip storage. Utility Model Content

[0004] In view of the above defects or needs of the prior art, the purpose of the utility model is to provide an anti-static tray for DIP package structure chips, wherein targeted improvements are made to the specific structural composition and setting method of the storage tray by fully combining the structural characteristics and storage requirements of the DIP package structure chips, which can make it more convenient for operators to take and place the DIP package structure chips, save time, and improve work efficiency; this design can not only check whether the chip pins are deformed or misaligned, but also reduce the risk of damage caused by bending or breaking of the chip pins during storage and transportation, thereby reducing the scrap rate during transportation.

[0005] To achieve the above-mentioned purpose, according to the utility model, an anti-static tray for a DIP package structure chip is provided, characterized in that the anti-static tray comprises a tray body made of an anti-static material as a whole, a bearing step and a limiting pin through hole, wherein:

[0006] There are multiple bearing steps, which are arranged on the bottom surface of the tray body and are in multiple rows of parallel protrusion structures, and are respectively used to place integrated circuit chips of DIP packaging structure;

[0007] The limiting pin through holes are correspondingly arranged on both sides of each of the bearing steps and located on the bottom surface of the tray body, and are used for the pins of the integrated circuit chip to pass through to achieve chip limiting.

[0008] Further preferably, the tray body, the bearing step and the limiting pin through hole are all made of polyphenylene oxide (PPE) material.

[0009] Further preferably, the intervals between adjacent bearing steps are equal.

[0010] Further preferably, the spacing between the limit pin through holes in each row is the same and is adapted to the pins of the integrated circuit chip.

[0011] Further preferably, the tray body, the bearing step and the limiting pin through hole are all integrally formed structures.

[0012] Further preferably, the tray body, the bearing step and the limiting pin through hole are all modular structures.

[0013] In general, the above technical solutions conceived by the utility model have the following technical advantages compared with the prior art:

[0014] 1. The tray provides more convenient storage and transportation of DIP package structure chips, effectively reducing the risk of damage caused by bending or breaking of chip pins during storage and transportation, and reducing the scrap rate during transportation;

[0015] 2. In addition, the design of the limit through hole can also check whether the chip pins are deformed or misaligned. During use, the tray is more convenient for storing chips, which significantly improves work efficiency;

[0016] 3. The tray of the utility model has a compact overall structure and is easy to operate and manufacture. Compared with existing similar products, it reduces the phenomenon of chip pins being entangled with each other and prevents problems such as bending and deformation of chip pins. Therefore, it has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a three-dimensional structural schematic diagram of the anti-static tray according to the utility model;

[0018] Figure 2 It is a top view of the structure of the anti-static tray according to the utility model;

[0019] Figure 3 It is a schematic diagram for demonstratively showing an anti-static tray carrying a chip with a DIP package structure;

[0020] Throughout the drawings, the same reference numerals are used to denote the same elements or structures, wherein:

[0021] 1-tray body; 2-carrying step; 3-limiting pin through hole; 4-integrated circuit chip. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiment of the utility model clearer, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0023] Figure 1 This is a three-dimensional structural schematic diagram of an anti-static tray according to the utility model. Figure 2 1 is a top view of the structure of the anti-static tray according to the utility model. Figure 1 and Figure 2 As shown, the anti-static tray according to the utility model mainly includes components such as a tray body 1 made of anti-static material as a whole, a bearing step 2 and a limiting pin through hole 3, which will be described in detail one by one below.

[0024] There are multiple carrying steps 2, which are arranged on the bottom surface of the tray body 1 and are in multiple rows of parallel protrusion structures, and are respectively used to place integrated circuit chips of DIP packaging structure;

[0025] The limiting pin through holes 3 are correspondingly arranged on both sides of each of the bearing steps 2 and located on the bottom surface of the tray body 1, and are used for the pins of the integrated circuit chip to pass through to achieve chip limiting.

[0026] According to a preferred embodiment of the present invention, the tray body 1, the bearing step 2 and the limit pin through hole 3 are all made of polyphenylene oxide (PPE) material. Accordingly, it can have the characteristics of good dimensional stability, low water absorption, high heat resistance, etc., and meet the anti-static requirements.

[0027] According to another preferred embodiment of the utility model, the spacing between adjacent bearing steps 2 is equal. In addition, the spacing between each row of limiting pin through holes 3 is the same and is adapted to the pins of the integrated circuit chip.

[0028] According to another preferred embodiment of the present invention, the tray body 1, the bearing step 2 and the limiting pin through hole 3 are all integrally formed structures.

[0029] Through the above design, you can refer to Figure 3 In actual use, the chip pins of the DIP packaging structure face downward, the chip pins are facing the limiting pin through holes at the bottom of the tray, and the limiting pin through holes are inserted to limit the chip, and the bearing step bears the chip housing.

[0030] In summary, the anti-static tray according to the utility model can more conveniently provide storage and carrying transportation of DIP package structure chips, effectively reduce the risk of damage caused by bending or breaking of chip pins during storage and transportation, and reduce the scrap rate during transportation; the overall structure of this tray is compact, easy to operate and process, and compared with existing similar products, it reduces the phenomenon of chip pins being entangled with each other, and at the same time prevents problems such as bending and deformation of chip pins, and therefore has broad application prospects.

[0031] It is easy for those skilled in the art to understand that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An anti-static tray for a DIP package structure chip, characterized in that: The anti-static tray comprises a tray body (1) made entirely of anti-static material, a bearing step (2) and a limiting pin through hole (3), wherein: The number of the bearing steps (2) is multiple, and they are arranged on the bottom surface of the tray body (1) and are in the form of multiple rows of parallel protrusion structures, and are respectively used to place integrated circuit chips (4) of a DIP package structure; The limiting pin through holes (3) are correspondingly arranged on both horizontal sides of each of the bearing steps (2) and located on the bottom surface of the tray body (1), and are used for allowing the pins of the integrated circuit chip (4) to pass through to achieve chip limiting.

2. The anti-static tray according to claim 1, characterized in that: The tray body (1), the bearing step (2) and the limiting pin through hole (3) are all made of polyphenylene oxide material.

3. The anti-static tray according to claim 1 or 2, characterized in that: The spacing between adjacent bearing steps (2) is equal.

4. The anti-static tray according to claim 3, characterized in that: The spacing between the limit pin through holes (3) in each row is the same and is adapted to the pins of the integrated circuit chip (4).

5. The anti-static tray according to claim 3, characterized in that: The tray body (1), the bearing step (2) and the limiting pin through hole (3) are all integrally formed structures.

6. The anti-static tray according to claim 3, characterized in that: The tray body (1), the bearing step (2) and the limiting pin through hole (3) are all modular structures.

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