Chip package
By using an optical fiber component composed of an optical fiber carrier plate, a cover plate and an optical fiber in the chip packaging, combined with the structure of the substrate and photonic integrated circuit chip, the problems of insufficient coupling efficiency, stability and reliability between optical fibers and silicon optical chips are solved. Efficient and stable optical coupling is achieved.
Patent Information
- Application Number
- CN202421256171.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-03
- Publication Date
- 2025-01-21
- Estimated Expiration
- 2034-06-03
AI Technical Summary
The prior art is difficult to accurately align and connect optical fibers to the chip, resulting in insufficient coupling efficiency, stability and reliability between the optical fibers and silicon optical chips.
A chip packaging structure including a substrate, a photonic integrated circuit chip and an optical fiber component is adopted. The optical fiber component is composed of an optical fiber carrier plate, a cover plate and an optical fiber. The optical fiber is coupled to the photonic integrated circuit chip. The end face of the substrate faces the end face of the optical fiber carrier plate of the optical fiber assembly. , to optimize the packaging between optical fiber and photonic integrated circuit chips.
By accurately aligning and fixing optical fibers and photonic integrated circuit chips, the accuracy and stability of optical coupling are improved, the chip packaging structure is simplified, and manufacturing costs are reduced.
Smart Images
Figure CN222379919U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductor packaging, in particular to a chip packaging. Background Art
[0002] Photonic integrated circuit chips can use light as an information carrier to process and transmit information. Photonic integrated circuit chips can be coupled with optical fibers, for example, to input or output optical signals. Utility Model Content
[0003] In order to overcome the shortcomings of the prior art, the purpose of the utility model is to provide a chip package and optical fiber assembly to solve the problem of accurately aligning the optical fiber to connect to the chip, and improve the coupling efficiency, stability and reliability between the optical fiber and the silicon photonic chip.
[0004] The purpose of the utility model is achieved by the following technical solutions:
[0005] According to one aspect of the present invention, a chip package is provided, comprising:
[0006] A chip package, characterized by comprising:
[0007] substrate;
[0008] A photonic integrated circuit chip, comprising a first surface and a second surface opposite to the first surface, wherein the second surface is used for fixed connection with the substrate;
[0009] An optical fiber assembly, the optical fiber assembly comprising an optical fiber carrier plate and a cover plate, and an optical fiber located between the optical fiber carrier plate and the cover plate;
[0010] The optical fiber in the optical fiber assembly is coupled to the photonic integrated circuit chip;
[0011] The end surface of the substrate faces the end surface of the optical fiber carrier plate of the optical fiber assembly.
[0012] In some embodiments, the optical fiber carrier plate has a limiting groove for accommodating the optical fiber, and the optical fiber is disposed in the corresponding limiting groove.
[0013] In some embodiments, an electronic integrated circuit chip is further included, and the electronic integrated circuit chip is electrically connected to the photonic integrated circuit chip.
[0014] In some embodiments, the electronic integrated circuit chip is located between the photonic integrated circuit chip and the substrate, and two sides of the electronic integrated circuit chip are fixedly connected to the second surface and the substrate respectively.
[0015] In some embodiments, the electronic integrated circuit chip is located on the first surface of the photonic integrated circuit chip.
[0016] In some embodiments, the photonic integrated circuit chip includes a substrate and a semiconductor structure, the semiconductor structure includes an edge coupler; and the substrate is located between the semiconductor structure and the base plate.
[0017] In some embodiments, the semiconductor structure has an end face that is indented into the substrate, the end face of the semiconductor structure that is indented into the substrate and the end face of the substrate constitute a indented area of the photonic integrated circuit chip, and the optical fiber extends into the indented area of the photonic integrated circuit chip.
[0018] In some embodiments, the chip package includes a fixing block, which connects the optical fiber assembly and the photonic integrated circuit chip.
[0019] In some embodiments, the fixing block is connected to the cover plate in the optical fiber assembly and the first surface of the photonic integrated circuit chip.
[0020] In some embodiments, the cover plate is located between the fixing block and the optical fiber carrier plate.
[0021] In some embodiments, a gap is provided between an end surface of the substrate and an end surface of an optical fiber carrier plate of the optical fiber assembly.
[0022] Compared with the prior art, the technical solution of the utility model has many beneficial effects:
[0023] The packaging or fixation between the optical fiber and the photonic integrated circuit chip can be optimized, the deformation of the substrate on which the photonic integrated circuit chip is mounted can be avoided due to the assembly or use process, the relative displacement between the optical fiber and the photonic integrated circuit chip can be reduced, and the accuracy of optical coupling can be improved. In addition, the chip packaging structure can be simplified to couple the optical fiber in the optical fiber assembly to the photonic integrated circuit chip, saving the process steps and costs of chip packaging manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other implementation methods can be obtained based on these drawings without paying any creative work.
[0025] Figure 1 It is a schematic diagram of a side view structure of a chip package provided according to an embodiment of the present application.
[0026] Figure 2 It is a side view structural schematic diagram of another chip package provided according to an embodiment of the present application.
[0027] Figure 3 It is a schematic diagram of the side view structure of another chip package provided according to an embodiment of the present application.
[0028] The main reference numerals in the drawings of the utility model specification are described as follows:
[0029] 10. Substrate;
[0030] 20. Photonic integrated circuit chip; 21. Substrate; 22. Semiconductor structure; 23. Edge coupler; 25. Indentation region; 201. First surface; 202. Second surface;
[0031] 30. Optical fiber assembly; 31. Optical fiber carrier plate; 32. Optical fiber; 33. Cover plate; 311. First area; 312. Second area;
[0032] 40. Electronic integrated circuit chip; 50. Fixing block. DETAILED DESCRIPTION
[0033] The above description is only an overview of the technical solution of the utility model. In order to more clearly understand the technical means of the utility model, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the utility model more obvious and easy to understand, the following specifically cites the preferred embodiments and describes them in detail with the accompanying drawings.
[0034] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. The meaning of chip in this article may include bare chips. When it comes to method steps, the sequence illustrated in this article represents an exemplary scheme, but does not represent a limitation on the sequence. For ordinary technicians in this field, the specific meanings of the above terms in this utility model can be understood according to specific circumstances.
[0035] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0036] In one aspect of the present application, a chip package is provided.
[0037] Specifically, see Figure 1As shown, the chip package includes:
[0038] substrate 10;
[0039] The photonic integrated circuit chip 20 has a first surface 201 and a second surface 202 opposite to the first surface 201, and the second surface 202 is used for fixed connection with the substrate 10;
[0040] The optical fiber assembly 30 includes an optical fiber carrier plate 31 and a cover plate 33, and an optical fiber 32 located between the optical fiber carrier plate 31 and the cover plate 33;
[0041] The optical fiber 32 in the optical fiber assembly 30 is coupled to the photonic integrated circuit chip 20;
[0042] The end surface of the substrate 10 faces the end surface of the optical fiber support plate 31 of the optical fiber assembly 30 .
[0043] For example, in the embodiment of the present application, the photonic integrated circuit chip 20 can use photons as information carriers to process and transmit information, and it can be a silicon-based photonic integrated circuit chip 20, and the photonic integrated circuit chip 20 has an external end face coupled to the outside world. That is, an external end face coupled to the external optical fiber 32 is provided on the side of the photonic integrated circuit chip 20.
[0044] Exemplarily, the substrate 10 is a PCB (Printed Circuit Board). The PCB is a support for electronic components (such as a photonic integrated circuit chip 20), and is also a carrier for the electrical connection of electronic components. For example, a copper layout is performed on the PCB substrate 10 to serve as a connecting wire. The substrate 10 is based on a multi-layer copper layout design as a circuit board for connecting wires, for example, it may include a base material layer, a metal layer, and a solder mask layer. In addition, according to actual needs, discrete devices such as capacitors, resistors, and inductors may be additionally mounted or integrated on the substrate 10. The substrate 10 may also be referred to as a packaging substrate.
[0045] The optical fiber assembly 30 includes an optical fiber carrier plate 31 and a cover plate 33, and an optical fiber 32 located between the optical fiber carrier plate 31 and the cover plate 33. Among them, the optical fiber carrier plate 31 can be used as a bottom plate for supporting and fixing the optical fiber 32, providing a support and fixing position for the optical fiber 32, and the cover plate 33 covers the top of the optical fiber carrier plate 31 to protect the optical fiber. At the same time, the end face of the optical fiber carrier plate 31 extends a distance from the end face of the cover plate 33. Since the end face of the optical fiber carrier plate 31 extends from the end face of the cover plate 33, when the optical fiber 32 needs to be connected, the optical fiber 32 can be appropriately exposed and installed in a specific space, making the operation more convenient and efficient. It is worth noting that the number of optical fibers 32 involved in the embodiment of the present application can be multiple, and can be an optical fiber array, and the optical fiber array includes multiple optical fibers 32 arranged at intervals. The number of multiple optical fibers 32 may be 4, 8, 16 or more. Among them, each optical fiber 32 includes an optical fiber core and an optical fiber cladding covering the optical fiber core.
[0046] For example, in the embodiment of the present application, the optical fiber carrier plate 31 has a limiting groove for accommodating the optical fiber 32, and the optical fiber 32 is arranged in the corresponding limiting groove. Specifically, the cross-sectional shape of the limiting groove can be V-shaped, U-shaped or semicircular, and the embodiment of the present application does not limit this.
[0047] Exemplarily, the thickness of the optical fiber carrier plate 31 is greater than the thickness of the cover plate 33. The greater thickness of the optical fiber carrier plate 31 can provide stronger structural support to ensure that the optical fiber assembly 30 maintains a stable position and shape during installation and use. And the thicker carrier plate can resist the influence of external pressure and force to prevent the optical fiber 32 from being damaged or displaced. In addition, the optical fiber 32 is generally fragile and easily damaged, and the thicker carrier plate can reduce the risk of the optical fiber 32 being subjected to external impact or bending, thereby helping to extend the life of the optical fiber 32 and improve the reliability of the system. For example, in some embodiments, the thickness of the optical fiber carrier plate 31 is greater than or equal to 500 microns, and the thickness of the cover plate 33 is greater than or equal to 200 microns.
[0048] For example, in the embodiment of the present application, aligning the end face of the optical fiber carrier plate 31 and the end face of the optical fiber 32 by grinding helps to reduce the attenuation and reflection at the connection of the optical fiber 32, thereby improving the transmission efficiency of the optical fiber 32. In addition, by accurately aligning the end face of the optical fiber carrier plate 31 and the end face of the optical fiber 32, it is also possible to ensure physical contact and optical alignment at the connection, reduce the possibility of looseness or poor contact, and thus ensure the performance and durability of the connection of the optical fiber 32.
[0049] Considering that the rigidity of the substrate 10 is generally not large, if the optical fiber assembly 30 is directly mounted on the substrate 10 and the optical fiber 32 in the optical fiber assembly 30 is optically coupled and aligned with the photonic integrated circuit chip 20, since the substrate 10 is easily deformed during assembly and use, it is easy to cause relative displacement between the optical fiber 32 and the photonic integrated circuit chip 20, which greatly affects the optical path stability between the optical fiber 32 and the photonic integrated circuit chip 20, thereby reducing the optical coupling efficiency.
[0050] In some embodiments, the optical fiber carrier plate 31 of the optical fiber assembly 30 is located between the cover plate 33 and the substrate 10. Exemplarily, the chip package includes a fixing block 50, which connects the optical fiber assembly 30 and the photonic integrated circuit chip 20. Specifically, the cover plate 33 in the optical fiber assembly 30 is connected to the photonic integrated circuit chip 20 through the fixing block 50. The cover plate 33 is located between the fixing block 50 and the optical fiber carrier plate 31. Exemplarily, the optical fiber assembly 30 is fixed to the side of the photonic integrated circuit chip 20.
[0051] In some embodiments, considering that the thickness of the optical fiber carrier board 31 is greater than the thickness of the cover board 33, when the photonic integrated circuit chip 20 is mounted on the substrate 10, the installation space between the cover board 33 and the substrate 10 is limited. For example, if the end face of the substrate 10 extends too far beyond the end face of the photonic integrated circuit chip 20, the optical fiber carrier board 31 of the optical fiber assembly 30 cannot be accommodated. For this reason, the end face (or side face) of the substrate 10 of the chip package faces the end face (or side face) of the optical fiber carrier board 31, and the optical fiber carrier board 31 is arranged on the side of the substrate 10. There is enough space on the side of the photonic integrated circuit chip 20 and the substrate 10 to place the optical fiber carrier board 31. This arrangement can make the chip package more compact.
[0052] For example, Figure 1 As shown, in the embodiment of the present application, the photonic integrated circuit chip 20 includes a substrate 21 and a semiconductor structure 22 located on the substrate 21, the substrate 21 is, for example, a silicon substrate 21, and the semiconductor structure 22 includes an edge coupler 23. The semiconductor structure 22 is located between the substrate 21 and the base plate 10. That is, the photonic integrated circuit chip 20 is mounted upside down on one side of the base plate 10.
[0053] In some examples, reference Figure 2 In the photonic integrated circuit, the semiconductor structure 22 has an end face that is indented into the substrate 21, and the end face of the semiconductor structure 22 that is indented into the substrate 21 and the end face of the substrate 21 form a indentation area 25 of the photonic integrated circuit chip 20. By arranging the optical fiber assembly, the optical fiber 32 extends into the indentation area 25 of the photonic integrated circuit chip 20. Specifically, the indentation distance of the indentation area 25 can be, for example, between tens and hundreds of microns.
[0054] In some embodiments, the chip package includes an electronic integrated circuit chip 40, which is electrically connected to the photonic integrated circuit chip 20. The electronic integrated circuit chip 40 uses electrons as information carriers to process information and transmit data, such as a silicon-based electronic integrated circuit chip 40, a germanium-based electronic integrated circuit chip 40, or a compound semiconductor electronic integrated circuit chip 40. The integration of the photonic integrated circuit chip 20 and the electronic integrated circuit chip 40 can be achieved by stacking the photonic integrated circuit chip 20 and the electronic integrated circuit chip 40.
[0055] In some embodiments, Figure 1 , Figure 2 As shown, the electronic integrated circuit chip 40 is located between the photonic integrated circuit chip 20 and the substrate 10 , and two sides of the electronic integrated circuit chip 40 are fixedly connected to the photonic integrated circuit chip 20 and the substrate 10 respectively.
[0056] In some embodiments, Figure 3 As shown, the electronic integrated circuit chip 40 may also be located on the first surface 201 of the photonic integrated circuit chip 20, that is, the electronic integrated circuit chip 40 is located on the side of the photonic integrated circuit chip 20 facing away from the substrate 10. Exemplarily, one or more conductive holes may be provided in the photonic integrated circuit chip 20, and the electronic integrated circuit chip 40 is electrically connected to the substrate 10 through the one or more conductive holes.
[0057] In some embodiments, the end face of the substrate 10 faces the end face of the optical fiber carrier board 31 of the optical fiber assembly 30, and there is a gap between the end face of the substrate 10 and the end face of the optical fiber carrier board 31 of the optical fiber assembly 30. In actual application, the gap can ensure that the deformation of the substrate 10 will not affect the coupling alignment of the optical fiber assembly 30.
[0058] The technical solution provided by the utility model can optimize the packaging or fixation between the optical fiber and the photonic integrated circuit chip, avoid deformation of the substrate on which the photonic integrated circuit chip is mounted during assembly or use, reduce relative displacement between the optical fiber and the photonic integrated circuit chip, and improve the accuracy of optical coupling. It can also simplify the chip packaging structure for coupling the optical fiber in the optical fiber assembly to the photonic integrated circuit chip, saving the process steps and costs of chip packaging manufacturing.
[0059] The above is only a preferred embodiment of the present invention and is not intended to limit the scope of implementation of the present invention. All equivalent changes and modifications to the shape, structure, characteristics and spirit described in the claims of the present invention should be included in the scope of the claims of the present invention.
Claims
1. A chip package, characterized in that: include: substrate; A photonic integrated circuit chip, comprising a first surface and a second surface opposite to the first surface, wherein the second surface is used for fixed connection with the substrate; An optical fiber assembly, the optical fiber assembly comprising an optical fiber carrier plate and a cover plate, and an optical fiber located between the optical fiber carrier plate and the cover plate; The optical fiber in the optical fiber assembly is coupled to the photonic integrated circuit chip; The end surface of the substrate faces the end surface of the optical fiber carrier plate of the optical fiber assembly.
2. The chip package according to claim 1, characterized in that: The optical fiber carrier plate has a limiting groove for accommodating the optical fiber, and the optical fiber is arranged in the corresponding limiting groove.
3. The chip package according to claim 1, characterized in that: It also includes electronic integrated circuit chips, The electronic integrated circuit chip is electrically connected to the photonic integrated circuit chip.
4. The chip package according to claim 3, characterized in that: The electronic integrated circuit chip is located between the photonic integrated circuit chip and the substrate, and two sides of the electronic integrated circuit chip are fixedly connected to the second surface and the substrate respectively.
5. The chip package according to claim 3, characterized in that: The electronic integrated circuit chip is located on the first surface of the photonic integrated circuit chip.
6. The chip package according to claim 1, wherein: The photonic integrated circuit chip includes a substrate and a semiconductor structure, wherein the semiconductor structure includes an edge coupler; The substrate is located between the semiconductor structure and the base plate.
7. The chip package according to claim 6, characterized in that: The semiconductor structure has an end face that is indented into the substrate, and the end face of the semiconductor structure that is indented into the substrate and the end face of the substrate constitute an indented area of the photonic integrated circuit chip. The optical fiber extends into the indented area of the photonic integrated circuit chip.
8. The chip package according to claim 1, wherein: The chip package includes a fixing block, and the fixing block connects the optical fiber assembly and the photonic integrated circuit chip.
9. The chip package according to claim 8, characterized in that: The fixing block is connected to the cover plate in the optical fiber assembly and the first surface of the photonic integrated circuit chip.
10. The chip package according to claim 9, wherein: The cover plate is located between the fixing block and the optical fiber carrying plate.
11. The chip package according to claim 1, wherein: There is a gap between the end surface of the substrate and the end surface of the optical fiber supporting plate of the optical fiber assembly.