Chip packaging structure and integrated circuit board

Abstract

The utility model provides a chip packaging structure and an integrated circuit board. The chip packaging structure comprises a first packaging piece, a second packaging piece, a first chip and a second chip, the first packaging piece is made of a high-thermal-conductivity material; the second packaging piece comprises a heat conduction part and a heat insulation part; the first packaging piece and the second packaging piece are oppositely arranged, the heat insulation parts of the first packaging piece and the second packaging piece are connected, and a packaging space is formed based on the first packaging inner surface of the first packaging piece and the second packaging inner surface of the second packaging piece; the first chip and the second chip are respectively positioned in the packaging space; the first chip is arranged on the heat insulation part, and the second chip is arranged on the heat conduction part. According to the chip packaging structure, the first chip is arranged on the heat insulation part, the second chip is arranged on the heat conduction part, and the heat insulation part insulates heat of the first chip and the second chip, so that heat conduction between the first chip and the second chip is limited to a certain extent, and the heat conduction efficiency of the first chip and the second chip in the working process of the chips is further reduced. And the temperature of the working chip is increased or heat dissipation of the working chip is facilitated.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a chip packaging structure and an integrated circuit board. Background Art

[0002] The chip packaging structure usually refers to encapsulating the chip in a shell. For example, using a series of technologies, the chip is laid out, glued, fixed and connected on the frame, the wiring terminals are led out and fixed by encapsulating with a plastic insulating medium, and the final overall structure is the chip packaging structure.

[0003] At present, when the chip or device is used in a harsh environment, the commonly used packaging form is mainly airtight packaging. However, this type of packaging leads to limited heat dissipation of the internal chip. When some chips have high power consumption and generate a certain amount of heat, heat radiation and heat conduction between chips usually cause the chip temperature to rise further, thus affecting the normal operation of the chip.

[0004] That is to say, when the current chip is working, the temperature of the working chip is easily too high or the working chip has poor heat dissipation. Utility Model Content

[0005] The purpose of the present application is to provide a chip packaging structure and an integrated circuit board. By installing different chips on a heat-conducting part and a heat-insulating part respectively, the heat conduction between chips can be limited to a certain extent, and ultimately the temperature of the working chip can be reduced during the chip operation process or the heat dissipation of the working chip can be facilitated.

[0006] In the first aspect, the present application provides a chip packaging structure, including a first package, a second package, a first chip and a second chip; the first package is made of a high thermal conductivity material; the second package includes a heat conducting part and a heat insulating part; the first package and the second package are arranged opposite to each other, the first package and the heat insulating part of the second package are connected, and a packaging space is formed based on the first packaging inner surface of the first package and the second packaging inner surface of the second package; the first chip and the second chip are respectively located in the packaging space; the first chip is arranged on the heat insulating part, and the second chip is arranged on the heat conducting part.

[0007] The above chip packaging structure, by setting the first chip on the insulation part and the second chip on the heat conducting part, the insulation part is used to thermally insulate the first chip from the second chip, thereby limiting the heat conduction between the first chip and the second chip to a certain extent, thereby reducing the temperature of the working chip during chip operation or facilitating the heat dissipation of the working chip.

[0008] In combination with the first aspect, optionally, the first chip includes a low-heat-generating chip, and the second chip includes a high-heat-generating chip; the first package includes a cover plate and a surrounding plate; the second package includes a base plate, the heat insulating portion is located in the middle of the base plate, and the heat conducting portion is located at an edge portion relative to the middle portion of the base plate; one end of the surrounding plate is connected to the cover plate and surrounds the middle portion of the cover plate; the other end of the surrounding plate is connected to the heat conducting portion of the base plate and surrounds the middle portion of the base plate.

[0009] The above chip packaging structure, by setting the low-heat-generating chip on the heat-insulating part and the high-heat-generating chip on the heat-conducting part, limits the heat generated by the high-heat-generating chip to be transmitted to the low-heat-generating chip to a certain extent, thereby reducing the temperature of the low-heat-generating chip during the operation of the chip. In addition, since the heat-conducting part is connected to the first packaging part made of a high-thermal-conducting material, the heat generated by the high-heat-generating chip can be more easily transmitted to the outside through the high-thermal-conducting material. That is, the heat dissipation efficiency of the high-heat-generating chip is improved. Furthermore, the temperature of the internal chip during the operation of the chip is further reduced.

[0010] In combination with the first aspect, optionally, one end of the enclosure is sealed and connected to the cover plate; and the other end of the enclosure is sealed and connected to the heat conducting portion of the bottom plate.

[0011] The chip packaging structure improves the airtightness of the packaging space through the sealed connection between the enclosure and the cover plate, and between the enclosure and the bottom plate, thereby better protecting the chip inside the chip packaging structure.

[0012] In combination with the first aspect, optionally, an outer surface of the heat conducting portion that is not in contact with the heat insulating portion and the second chip matches the end surface shape of the other end of the enclosure.

[0013] The chip packaging structure described above can have an outer surface of the heat-conducting part used for connection with the enclosure plate whose shape and size can be consistent with the end face of the other end of the enclosure plate. Under certain size restrictions, the two can be in full contact with each other, thereby improving the thermal conductivity between the heat-conducting part and the enclosure plate while reducing the space occupied by the chip packaging structure.

[0014] In combination with the first aspect, optionally, an outer surface of the heat conducting portion facing away from the packaging space and an outer surface of the heat insulating portion facing away from the packaging space do not intersect in vertical projection on a plane where the first chip is located.

[0015] The above chip packaging structure has the outer surface of the heat-conducting part facing away from the packaging space completely exposed to the space outside the chip packaging structure, so that the heat received by the heat-conducting part from the second chip can be better dissipated to the space outside the chip packaging structure, thereby further improving the heat dissipation efficiency of the second chip.

[0016] In combination with the first aspect, optionally, an outer surface of the heat conducting portion that is not in contact with the heat insulating portion and is not in contact with the first packaging component is located within the packaging space.

[0017] In the chip packaging structure, part of the outer surface of the heat-conducting portion that can directly contact the space outside the chip packaging structure will be oriented toward the printed circuit board for mounting the chip packaging structure, and will transfer heat to the printed circuit board. Therefore, the design that there is no part on the outer surface of the heat-conducting portion that directly contacts the space outside the chip packaging structure reduces the amount of heat transferred from the chip packaging structure to the printed circuit board.

[0018] In combination with the first aspect, optionally, the heat conducting portion comprises a metal heat conducting portion; and an outer surface of the heat conducting portion located within the packaging space matches the shape of the second chip.

[0019] The chip packaging structure described above is designed such that the outer surface of the heat-conducting part exposed to the packaging space is consistent with the shape and size of the second chip, so that the second chip fully utilizes the outer surface of the heat-conducting part exposed to the packaging space, and accordingly reduces the overall size of the heat-conducting part, thereby reducing the influence of the heat-conducting part on the chip packaging structure and the layout of the chip interconnection lines.

[0020] In combination with the first aspect, optionally, the difference in thermal expansion coefficients between the heat conducting part and the heat insulating part does not exceed a preset difference; wherein the preset difference is related to the contact area between the heat conducting part and the heat insulating part.

[0021] The chip packaging structure limits the difference in thermal expansion coefficient between the heat-conducting part and the heat-insulating part, so that when the chip packaging structure is working and generating heat, the deformation difference between the heat-conducting part and the heat-insulating part is reduced, thereby reducing the influence of the deformation difference on the connection stability between them.

[0022] In combination with the first aspect, optionally, the structure further includes a welding piece; the welding piece is located on the outer surface of the insulation part facing away from the packaging space; the welding piece is used to connect the base plate to the printed circuit board by hot melting.

[0023] The chip packaging structure, by arranging all welding parts on the heat insulating part, prevents the heat conducting part from transmitting the received heat to the printed circuit board to a certain extent.

[0024] In a second aspect, the present application provides an integrated circuit board, including a printed circuit board and the chip packaging structure described in the first aspect.

[0025] The above-mentioned integrated circuit board has the same beneficial effects as the supporting member provided in the first aspect and any optional implementation manner of the first aspect, and will not be described in detail here.

[0026] In summary, the chip packaging structure and integrated circuit board provided by each embodiment of the present application, by installing different chips on the heat conducting part and the heat insulating part respectively, the heat insulating part isolates the heat of the first chip and the second chip, and limits the heat conduction between the first chip and the second chip to a certain extent, thereby reducing the temperature of the working chip or facilitating the heat dissipation of the working chip during the operation of the chip. Specifically, by setting the low-heat chip on the heat insulating part and the high-heat chip on the heat conducting part, the heat generated by the high-heat chip is limited to a certain extent. The transmission to the low-heat chip, thereby reducing the temperature of the low-heat chip during the operation of the chip. The heat generated by the high-heat chip can be more easily transmitted to the outside through the high thermal conductivity material, thereby improving the heat dissipation efficiency of the high-heat chip. Finally, the temperature of the internal chip during the operation of the chip is further reduced. The shape and size of an outer surface on the heat conducting part used to connect to the enclosure can be consistent with the end face of the other end of the enclosure, so that the two are fully in contact, thereby improving the heat conduction efficiency between the heat conducting part and the enclosure, and also reducing the space occupied by the chip packaging structure. The outer surface of the heat conducting portion facing away from the packaging space is completely exposed to the space outside the chip packaging structure, which further improves the heat dissipation efficiency of the second chip. The design of no portion on the outer surface of the heat conducting portion directly contacting the space outside the chip packaging structure reduces the amount of heat transmitted from the chip packaging structure to the printed circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 A schematic diagram of a first structure of a chip packaging structure provided in an embodiment of the present application;

[0029] Figure 2 A second structural schematic diagram of a chip packaging structure provided in an embodiment of the present application;

[0030] Figure 3 A schematic diagram of the structure of an integrated circuit board provided in an embodiment of the present application.

[0031] Icons: 100, chip packaging structure; 110, first package; 111, cover plate; 112, enclosure; 120, second package; 121, bottom plate; 1211, heat conducting part; 1212, heat insulating part; 130, first chip; 140, second chip; 150, welding part; 10, integrated circuit board; 200, printed circuit board. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0033] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0034] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0035] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the utility model product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0036] In addition, the terms "horizontal", "vertical" and the like do not mean that the components are required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0037] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0038] Please refer to Figure 1 , Figure 1 1 is a schematic diagram of the first structure of the chip packaging structure 100 provided in an embodiment of the present application. The chip packaging structure 100 provided in an embodiment of the present application may include a first package 110, a second package 120, a first chip 130 and a second chip 140. The first package 110 may be made of a high thermal conductivity material. The second package 120 may include a heat conducting portion 1211 and a heat insulating portion 1212. The first package 110 and the second package 120 may be arranged relative to each other, the first package 110 may be connected to the heat insulating portion 1212 of the second package 120, and a packaging space may be formed based on the first packaging inner surface of the first package 110 and the second packaging inner surface of the second package 120. The first chip 130 and the second chip 140 may be located in the packaging space respectively. The first chip 130 may be arranged on the heat insulating portion 1212, and the second chip 140 may be arranged on the heat conducting portion 1211.

[0039] The first package 110 may be in the shape of a flat plate, and the second package 120 may be in the shape of a flat plate with a depression in the middle. A packaging space can be formed by the depression in the middle of the second package 120 and the surface of the first package 110 facing the second package 120. Alternatively, the first package 110 is in the shape of a flat plate with a depression in the middle, and the second package 120 is in the shape of a flat plate. Alternatively, both the first package 110 and the second package 120 are in the shape of a flat plate with a depression in the middle, and a packaging space is formed by the depressions of the two. The first package 110 and the second package 120 may also be in other shapes, for example, the first package 110 and the second package 120 are in the shape of a hemispherical shell.

[0040] The first package 110 and the second package 120 may be sealed and connected, for example, by bonding materials, welding, etc. A sealed packaging space may be formed by the sealed connection between the first package 110 and the second package 120 .

[0041] The heat insulating portion 1212 of the second package 120 may be located in the middle of the second package 120, and accordingly, the heat conducting portion 1211 of the second package 120 may be located at an edge relative to the middle of the second package 120. Of course, the heat conducting portion 1211 of the second package 120 may be located in the middle of the second package 120, and accordingly, the heat insulating portion 1212 of the second package 120 may be located at an edge relative to the middle of the second package 120.

[0042] The heat conducting portion 1211 may be made of a material with a relatively high thermal conductivity, and the heat insulating portion 1212 may be made of a material with a relatively low thermal conductivity. The power of the first chip 130 and the power of the second chip 140 may be different.

[0043] In the above implementation process, the first chip 130 is set on the insulation part 1212, and the second chip 140 is set on the heat conducting part 1211. The insulation part 1212 is used to isolate the first chip 130 from the heat, which limits the heat conduction between the first chip 130 and the second chip 140 to a certain extent, thereby reducing the temperature of the internal chip during the operation of the chip packaging structure 100.

[0044] Please continue to refer to Figure 1 In some optional embodiments, the first chip 130 may include a low-heat-generating chip, and the second chip 140 may include a high-heat-generating chip. The first package 110 may include a cover plate 111 and a surrounding plate 112. The second package 120 may include a base plate 121, a heat insulating portion 1212 may be located in the middle of the base plate 121, and a heat conducting portion 1211 may be located at an edge portion relative to the middle of the base plate 121. One end of the surrounding plate 112 may be connected to the cover plate 111 and may surround the middle of the cover plate 111. The other end of the surrounding plate 112 may be connected to the heat conducting portion 1211 of the base plate 121 and may surround the middle of the base plate 121.

[0045] A low-heat chip may be a chip with a lower power. Since the power is lower, the heat generation rate of the chip during operation is usually lower. Correspondingly, a high-heat chip may be a chip with a higher power. Since the power is higher, the heat generation rate of the chip during operation is usually higher.

[0046] The cover plate 111 of the first package 110 is in the shape of a flat plate. The bottom plate 121 is also usually in the shape of a flat plate. The cover plate 111 and the enclosure 112 can be formed in one piece, or they can be connected together by some connection method. For example, when the cover plate 111 and the enclosure 112 are both made of metal materials, the connection method between them can be welding. When the second substrate and the enclosure 112 are both made of non-metallic materials, the connection between them can be bonded by an adhesive material, such as epoxy resin, silicone, and hot melt adhesive.

[0047] In the above implementation process, by setting the low-heat-generating chip on the heat-insulating part 1212 and the high-heat-generating chip on the heat-conducting part 1211, the heat generated by the high-heat-generating chip is limited to be transmitted to the low-heat-generating chip to a certain extent, thereby reducing the temperature of the low-heat-generating chip during the operation of the chip packaging structure 100. In addition, since the heat-conducting part 1211 is connected to the first package 110 made of a high thermal conductivity material, the heat generated by the high-heat-generating chip can be more easily transmitted to the outside through the high thermal conductivity material. That is, the heat dissipation efficiency of the high-heat-generating chip is improved. Furthermore, the temperature of the internal chip during the operation of the chip packaging structure 100 is further reduced.

[0048] Please continue to refer to Figure 1 In some optional embodiments, one end of the enclosure 112 may be sealed and connected to the cover plate 111 . The other end of the enclosure 112 may be sealed and connected to the heat conducting portion 1211 of the bottom plate 121 .

[0049] The sealed connection can be achieved by using sealing adhesive materials such as epoxy resin, hot melt adhesive, polyurethane, etc. It is also possible that either the enclosure 112 and the cover plate 111 or the enclosure 112 and the bottom plate 121 are integrally formed, and the other is sealed and connected by other methods known to those skilled in the art.

[0050] In the above implementation process, the airtightness of the packaging space is improved through the sealed connection between the enclosure 112 and the cover plate 111 and between the enclosure 112 and the bottom plate 121, thereby better protecting the chip inside the chip packaging structure 100.

[0051] Please continue to refer to Figure 1 In some optional embodiments, the outer surface of the heat conducting portion 1211 that is not in contact with the heat insulating portion 1212 and the second chip 140 may match the end surface shape of the other end of the enclosure 112 .

[0052] In other words, the shape and size of an outer surface of the heat conducting portion 1211 used for connecting with the enclosure 112 can be consistent with the end surface of the other end of the enclosure 112 .

[0053] During the above implementation process, the shape and size of an outer surface of the heat-conducting part 1211 used for connecting with the enclosure 112 can be consistent with the end face of the other end of the enclosure 112. Under a certain size limit, the two can be fully in contact with each other, thereby improving the thermal conductivity between the heat-conducting part 1211 and the enclosure 112, and reducing the space occupied by the chip packaging structure 100.

[0054] Please continue to refer to Figure 1In some optional embodiments, the vertical projections of the outer surface of the heat conducting portion 1211 facing away from the packaging space and the outer surface of the heat insulating portion 1212 facing away from the packaging space on the plane where the first chip 130 is located may not intersect.

[0055] In other words, since the projections of the outer surface of the heat conducting part 1211 facing away from the packaging space and the outer surface of the heat insulating part 1212 facing away from the packaging space do not intersect, it usually means that in the direction perpendicular to the plane where the first chip 130 is located, the outer surface of the heat conducting part 1211 facing away from the packaging space will not block the outer surface of the heat insulating part 1212 facing away from the packaging space, and vice versa. In other words, the outer surface of the heat conducting part 1211 facing away from the packaging space is completely exposed to the space outside the chip packaging structure 100.

[0056] During the above implementation process, the outer surface of the heat-conducting portion 1211 facing away from the packaging space is completely exposed to the space outside the chip packaging structure 100, so that the heat received by the heat-conducting portion 1211 from the second chip 140 can be better dissipated to the space outside the chip packaging structure 100, thereby further improving the heat dissipation efficiency of the second chip 140.

[0057] Please refer to Figure 2 , Figure 2 This is a second structural diagram of the chip packaging structure 100 provided in an embodiment of the present application. In some optional implementations, the outer surface of the heat conducting portion 1211 that is not in contact with the heat insulating portion 1212 and the first package 110 may be located within the packaging space.

[0058] In other words, a portion of the outer surface of the heat conducting portion 1211 contacts the heat insulating portion 1212, a portion contacts the first package 110 (specifically, the enclosure 112), and all other portions are located inside the packaging space. In other words, there is no portion on the outer surface of the heat conducting portion 1211 that directly contacts the space outside the chip packaging structure 100.

[0059] In the above implementation process, among the portions of the outer surface of the heat conducting portion 1211 that can originally directly contact the space outside the chip packaging structure 100, part of the outer surface will be oriented toward the printed circuit board 200 for mounting the chip packaging structure 100, and will transfer heat to the printed circuit board 200. Therefore, by designing that there is no portion of the outer surface of the heat conducting portion 1211 that directly contacts the space outside the chip packaging structure 100, the amount of heat transferred from the chip packaging structure 100 to the printed circuit board 200 is reduced.

[0060] Please continue to refer to Figure 1 In some optional implementations, the heat conducting portion 1211 may include a metal heat conducting portion 1211. The outer surface of the heat conducting portion 1211 located within the packaging space may match the shape of the second chip 140.

[0061] In other words, the outer surface of the heat conducting portion 1211 exposed to the packaging space is usually used to mount the second chip 140 , so the shape and size of this portion of the outer surface may be consistent with those of the second chip 140 .

[0062] In the above implementation process, the outer surface of the heat conducting part 1211 exposed to the packaging space is designed to be consistent with the shape and size of the second chip 140, so that the second chip 140 fully utilizes the outer surface of the heat conducting part 1211 exposed to the packaging space, and accordingly, the overall size of the heat conducting part 1211 is reduced, thereby reducing the influence of the heat conducting part 1211 on the layout of the chip interconnection lines on the chip packaging structure 100.

[0063] Please continue to refer to Figure 1 and Figure 2 In some optional embodiments, the difference in thermal expansion coefficient between the heat conducting portion 1211 and the heat insulating portion 1212 may not exceed a preset difference, wherein the preset difference may be related to the contact area between the heat conducting portion 1211 and the heat insulating portion 1212 .

[0064] Generally, the larger the contact area between the heat conducting part 1211 and the heat insulating part 1212, the greater the difference in deformation due to the difference in thermal expansion coefficient, and the greater the impact on the bonding between them. Therefore, those skilled in the art determine the specific value of the preset difference based on actual application requirements.

[0065] In the above implementation process, by limiting the difference in thermal expansion coefficients between the heat conducting part 1211 and the heat insulating part 1212, the deformation difference between the heat conducting part 1211 and the heat insulating part 1212 is reduced when the chip packaging structure 100 is working and generating heat, thereby reducing the influence of the deformation difference on the connection stability therebetween.

[0066] Please continue to refer to Figure 1 and Figure 2 In some optional embodiments, the structure may further include a welding member 150. The welding member 150 may be located on the outer surface of the insulation portion 1212 facing away from the packaging space. The welding member 150 may be used to connect to the printed circuit board 200 through the hot melt base plate 121.

[0067] That is, no soldering member 150 is disposed on the heat conducting portion 1211. The soldering member 150 may be a solder ball or a solder pad used to fix the chip packaging structure 100 on the printed circuit board 200.

[0068] In the above implementation process, by arranging all the welding parts 150 on the heat insulating part 1212 , the heat conducting part 1211 is prevented from transmitting the received heat to the printed circuit board 200 to a certain extent.

[0069] Please continue to refer to Figure 3 , Figure 3 2 is a schematic diagram of the structure of the integrated circuit board 10 provided in the embodiment of the present application. Based on the same concept, the embodiment of the present application provides an integrated circuit board 10, which may include a printed circuit board 200 and the chip packaging structure 100 described above.

[0070] The above implementation process may be the same as the chip packaging structure 100 described above, and will not be repeated here.

[0071] In summary, the chip packaging structure 100 and the integrated circuit board 10 provided in each embodiment of the present application, by installing different chips on the heat-conducting part 1211 and the heat-insulating part 1212 respectively, the heat-insulating part 1212 isolates the first chip 130 from the heat, and limits the heat conduction between the first chip 130 and the second chip 140 to a certain extent, thereby reducing the temperature of the internal chip during the operation of the chip packaging structure 100. Specifically, by arranging the low-heat-generating chip on the heat-insulating part 1212 and the high-heat-generating chip on the heat-conducting part 1211, the high-heat-generating chip is limited to a certain extent to transmit the heat generated by the high-heat-generating chip to the low-heat-generating chip, thereby reducing the temperature of the low-heat-generating chip during the operation of the chip packaging structure 100. The heat generated by the high-heat-generating chip can be more easily transmitted to the outside through the high thermal conductivity material, thereby improving the heat dissipation efficiency of the high-heat-generating chip. Finally, the temperature of the internal chip during the operation of the chip packaging structure 100 is further reduced. The shape and size of an outer surface of the heat conducting part 1211 for connecting with the enclosure 112 can be consistent with the end surface of the other end of the enclosure 112, so that the two are fully in contact with each other, thereby improving the heat conduction efficiency between the heat conducting part 1211 and the enclosure 112, and reducing the space occupied by the chip packaging structure 100. The outer surface of the heat conducting part 1211 facing away from the packaging space is completely exposed to the space outside the chip packaging structure 100, further improving the heat dissipation efficiency of the second chip 140. The design of no part on the outer surface of the heat conducting part 1211 directly contacting the space outside the chip packaging structure 100 reduces the heat transmitted from the chip packaging structure 100 to the printed circuit board 200.

[0072] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A chip packaging structure, characterized in that: comprising a first package, a second package, a first chip and a second chip; The first package is made of a high thermal conductivity material; The second packaging member includes a heat conducting portion and a heat insulating portion; The first package is arranged opposite to the second package, the first package is connected to the heat insulation part of the second package, and a packaging space is formed based on a first packaging inner surface of the first package and a second packaging inner surface of the second package; The first chip and the second chip are respectively located in the packaging space; The first chip is disposed on the heat insulating portion, and the second chip is disposed on the heat conducting portion.

2. The chip packaging structure according to claim 1, characterized in that: in, The first chip includes a low heat generation chip, and the second chip includes a high heat generation chip; The first packaging component includes a cover plate and a surrounding plate; The second packaging member includes a bottom plate, the heat insulating portion is located in the middle of the bottom plate, and the heat conducting portion is located at an edge portion of the bottom plate relative to the middle; One end of the enclosure is connected to the cover plate and surrounds the middle portion of the cover plate; The other end of the enclosure is connected to the heat conducting portion of the bottom plate and surrounds the middle portion of the bottom plate.

3. The chip packaging structure according to claim 2, characterized in that: One end of the enclosure plate is sealed and connected to the cover plate; The other end of the enclosure is sealed and connected to the heat conducting portion of the bottom plate.

4. The chip packaging structure according to claim 2, characterized in that: The outer surface of the heat-conducting portion that is not in contact with the heat-insulating portion and the second chip matches the end surface shape of the other end of the enclosure.

5. The chip packaging structure according to claim 1, characterized in that: The outer surface of the heat conducting portion facing away from the packaging space and the outer surface of the heat insulating portion facing away from the packaging space do not intersect in their vertical projections on the plane where the first chip is located.

6. The chip packaging structure according to claim 1, characterized in that: An outer surface of the heat-conducting portion that is not in contact with the heat-insulating portion and the first packaging component is located within the packaging space.

7. The chip packaging structure according to claim 6, characterized in that: in, The heat conducting part comprises a metal heat conducting part; An outer surface of the heat conducting portion within the packaging space matches the shape of the second chip.

8. The chip packaging structure according to claim 1, characterized in that: The difference in thermal expansion coefficient between the heat-conducting portion and the heat-insulating portion does not exceed a preset difference; The preset difference is related to the contact area between the heat conducting part and the heat insulating part.

9. The chip packaging structure according to claim 2, characterized in that: The structure also includes a weldment; The welding piece is located on the outer surface of the heat insulation part facing away from the packaging space; The welding piece is used to connect the bottom plate to the printed circuit board through hot melting.

10. An integrated circuit board, characterized in that: The invention comprises a printed circuit board and a chip packaging structure according to any one of claims 1 to 9.

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