Lead frame structure for improving QFN packaging heat dissipation performance of SLIC chip and chip
By designing the lead frame structure of the SLIC chip's QFN packaging, including the heat dissipation bottom plate and heat dissipation groove, the problem of insufficient cooling performance of the chip has been solved, and it has significantly improved the heat dissipation efficiency and product reliability.
Patent Information
- Application Number
- CN202422974181.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-04
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2034-12-04
AI Technical Summary
The QFN package of existing SLIC chips lacks heat dissipation performance, resulting in excessive chip temperature, which may cause chip failure or burnout, and there is a risk of reliability.
A leading frame structure is designed, including chips, heat dissipation bottom plates, semiconductor key alloy lines, packaging body and packaging pins. The cooling groove is set on the heat dissipation bottom plate to increase the heat dissipation area and improve the heat dissipation efficiency.
It has significantly improved the heat dissipation performance of the SLIC chip, reduced the fatigue aging and ion migration caused by high temperature caused by the internal materials of the chip, extended the service life of the product, and improved the reliability of the product under the premise of controlling the cost.
Smart Images

Figure CN222421964U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of chip heat dissipation, in particular to a lead frame structure and a chip for improving the heat dissipation performance of a SLIC chip QFN package. Background Art
[0002] Usually SLIC (Subscriber line IC) chips are used for high voltage applications. During the application process, due to the high power consumption of the chip itself, a large amount of heat will be generated. If the heat dissipation is not timely or sufficient, it will lead to the accumulation of heat. The accumulated heat may cause the SLIC chip Ta (chip ambient temperature) and Tj (chip junction temperature) to be too high, resulting in chip failure. More seriously, it may cause the chip to burn out or even cause serious safety accidents such as lighter explosion.
[0003] At present, the SLIC chips in large-scale batch production on the market basically adopt QFN (a packaging form, four-sided flat no-lead packaging, mainly composed of a frame and plastic packaging material as the basic structure) or LGA (Land Grid Array, grid array packaging, mainly composed of a substrate and plastic packaging material as the basic structure). In terms of appearance, it belongs to the conventional QFN, that is, the flat heat sink frame is wrapped with the lead frame through the plastic packaging process, and the heat sink on the back is exposed. The lead frame has one function as a carrier to support the chip, and another function is to export the heat inside the chip and act as a heat sink. The pad form is all flat structure. Figure 1 shown.
[0004] When encountering abnormally large current and high heat accumulation, this product has certain reliability risks, including: various raw materials inside the chip, such as plastic packaging materials, mounting glue, etc. may melt, the frame may be fatigued and aged, metal ion migration is more active, and high voltage may cause chip short circuit, leakage and other abnormalities. Due to the untimely release of individual chip heat, the components or plastic parts on the system board and around the chip will be affected, thereby reducing the life of the module.
[0005] To solve this problem, the conventional approach is to consider replacing higher-end materials, but higher-end materials often mean higher costs and higher production requirements, or adding some heat dissipation devices to the periphery of the chip, which will also cause a significant increase in costs. Therefore, it becomes more necessary to improve the product's heat dissipation capacity and reliability while controlling costs. Utility Model Content
[0006] In view of the defects in the prior art, the purpose of the utility model is to provide a lead frame structure and a chip for improving the heat dissipation performance of the SLIC chip QFN package.
[0007] According to the utility model, a lead frame structure for improving the heat dissipation performance of a SLIC chip QFN package is provided, comprising: a chip, a heat dissipation base plate, a semiconductor bonding gold wire, a package body and a package pin;
[0008] The chip contacts one surface of the heat sink, the other surface of the heat sink is a heat dissipation surface, the package pins are used for welding, the chip and the package pins are electrically connected through semiconductor bonding gold wires, the package body wraps the chip, the heat sink, the semiconductor bonding gold wires and the package pins; the heat dissipation surface is exposed on the outer surface of the package body, and the heat dissipation surface is located on the welding surface at the bottom of the package body.
[0009] Preferably, the heat dissipation base plate is arranged close to the bottom surface of the packaging body.
[0010] Preferably, a heat dissipation structure with a concave-convex distribution is provided on the heat dissipation surface.
[0011] Preferably, the heat dissipation structure is a heat dissipation groove opened on the heat dissipation bottom plate.
[0012] Preferably, the cross-section of the heat dissipation groove is rectangular, circular or semicircular.
[0013] Preferably, the heat dissipation grooves are distributed along strips, grids or circles on the heat dissipation base plate.
[0014] Preferably, the surface of the heat dissipation groove is set to be a rough surface.
[0015] A SLIC chip provided by the utility model comprises the lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package.
[0016] Compared with the prior art, the utility model has the following beneficial effects:
[0017] 1. The utility model innovatively proposes a lead frame structure, in which a heat dissipation structure is arranged on the welding surface, which greatly increases the effective area of the bottom heat dissipation surface, and the area is increased to more than twice the original area, thereby accelerating the heat dissipation efficiency.
[0018] 2. The structure disclosed by the utility model can transfer the internal heat of the chip to the outside of the shell in time, reduce the fatigue aging of the internal materials of the chip caused by high temperature, ion migration and other failures, and extend the service life of the product.
[0019] 3. The structure disclosed by the utility model can maintain low costs and increase profits while ensuring that the process does not change significantly and the cost is maintained at a low level or does not increase the cost.
[0020] 4. The structure disclosed in the utility model can be used in the SMT (surface mounting technology, which is a circuit assembly technology that mounts pinless or short-lead surface-mounted components on the surface of a printed circuit board or other substrate, and assembles them by soldering through reflow soldering or dip soldering) process. Due to the increased contact area, the welding between the chip and the PCB is more firmly, thereby improving the system reliability of the overall module. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Other features, objects and advantages of the present invention will become more apparent by reading the detailed description of non-limiting embodiments with reference to the following drawings:
[0022] Figure 1 The lead frame structure diagram in the prior art
[0023] Figure 2 The utility model discloses a cross-sectional view of the lead wire condition;
[0024] Figure 3 It is a partial schematic diagram of the heat dissipation base plate in the utility model.
[0025] Description of reference numerals:
[0026] Chip 1; heat dissipation base plate 2; heat dissipation groove 21; semiconductor bonding gold wire 3; package body 4; package pin 5; PCB board 6; pad 7. DETAILED DESCRIPTION
[0027] The utility model is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the utility model, but do not limit the utility model in any form. It should be pointed out that for those of ordinary skill in the art, several changes and improvements can be made without departing from the concept of the utility model. These all belong to the protection scope of the utility model.
[0028] The utility model discloses a lead frame structure for improving the heat dissipation performance of SLIC chip QFN package. Figure 2 As shown, it includes a chip 1, a heat dissipation base plate 2, semiconductor bonding gold wires 3 (Bonding wires, used for chip bonding in semiconductor packaging technology), a packaging body 4 and packaging pins 5.
[0029] The chip 1 is in surface contact with the heat dissipation base plate 2, and the heat conduction and heat dissipation of the chip 1 are completed through the heat dissipation base plate 2. The package pins 5 are used to be soldered with the pads 7 on the PCB board 6. The package pins 5 and the chip 1 are electrically connected through the semiconductor bonding gold wires 3. The package body 4 wraps the chip 1, the package base plate, the semiconductor bonding gold wires 3 and the package pins 5.
[0030] One surface of the heat dissipation base plate 2 is in surface contact with the chip 1, and the other surface of the heat dissipation base plate 2 is exposed to the outer surface of the package body 4, and the heat dissipation base plate 2 is located on the bottom surface of the package body 4. When the SLIC chip 1 is soldered to the PCB board 6, the heat dissipation base plate 2 is in surface contact with the PCB board 6. The other surface of the heat dissipation base plate 2 is directly in contact with the outside world, which further improves the heat dissipation capacity of the chip 1. Compared with the traditional chip packaging structure, the heat of the chip 1 is mainly dissipated from the top of the package body 4. In the present application scheme, the heat of the chip 1 can not only be dissipated from the top and surroundings of the package body 4, but also quickly dissipated from the bottom through the heat dissipation base plate 2, which speeds up the heat dissipation speed of the chip 1.
[0031] A heat dissipation structure is arranged on the exposed outer surface of the heat dissipation base plate 2 , and the heat dissipation structure further increases the heat dissipation area of the heat dissipation base plate 2 , thereby further improving the heat dissipation effect.
[0032] In a preferred embodiment, referring to Figure 3 As shown, the heat dissipation structure is a heat dissipation groove 21 opened on the heat dissipation base plate 2. The heat dissipation groove 21 can not only further increase the heat dissipation area, but also the air on the bottom surface of the heat dissipation base plate 2 is more circulated due to the existence of the groove, thereby improving the heat dissipation capacity.
[0033] In a preferred embodiment, the heat dissipation grooves 21 are rectangular, circular or semicircular grooves evenly distributed on the bottom surface of the heat dissipation base plate 2, and the shape of the groove cross section is not limited thereto, and the depth of the rectangular groove can be adjusted according to the power consumption level of the chip 1. The heat dissipation grooves 21 on the heat dissipation base plate 2 are distributed along strips, grids, circles or other special shapes.
[0034] In a preferred embodiment, the surface of the heat dissipation groove 21 is roughened to further increase the heat dissipation area and improve the heat dissipation effect.
[0035] In the description of the present application, it should be understood that the terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.
[0036] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other at will.
Claims
1. A lead frame structure for improving the heat dissipation performance of a SLIC chip QFN package, characterized in that: include: Chip (1), heat dissipation base plate (2), semiconductor bonding wire (3), package body (4) and package pin (5); The chip (1) contacts one surface of a heat dissipation base plate (2); the other surface of the heat dissipation base plate (2) is a heat dissipation surface; the package pins (5) are used for welding; the chip (1) and the package pins (5) are electrically connected via semiconductor bonding wires (3); the package body (4) encapsulates the chip (1), the heat dissipation base plate (2), the semiconductor bonding wires (3) and the package pins (5); the heat dissipation surface is exposed on the outer surface of the package body (4), and the heat dissipation surface is located on the welding surface at the bottom of the package body (4).
2. The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package according to claim 1, characterized in that: The heat dissipation base plate (2) is arranged close to the bottom surface of the packaging body (4).
3. The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package according to claim 1, characterized in that: The heat dissipation surface is provided with a heat dissipation structure with a concave-convex distribution.
4. The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package according to claim 3, characterized in that: The heat dissipation structure is a heat dissipation groove (21) opened on the heat dissipation bottom plate (2).
5. The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package according to claim 4, characterized in that: The cross section of the heat dissipation groove (21) is rectangular, circular or semicircular.
6. The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package according to claim 4, characterized in that: The heat dissipation grooves (21) are distributed on the heat dissipation base plate (2) in a strip shape, a grid shape, or a circle shape.
7. The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package according to claim 4, characterized in that: The surface of the heat dissipation groove (21) is configured as a rough surface.
8. A chip, characterized in that: The lead frame structure for improving the heat dissipation performance of the SLIC chip QFN package comprises the lead frame structure as described in any one of claims 1 to 7.