90-degree phase shift pulse generator based on D flip-flop

Abstract

The utility model discloses a 90-degree phase shift pulse generator based on D flip-flops, which comprises a frequency-adjustable multivibrator circuit, a phase inversion buffer stage circuit, an external pulse source, a double-D flip-flop circuit, an exclusive-OR gate circuit and an exclusive-OR gate A3 which form the phase inversion buffer stage circuit, an output signal of the frequency-adjustable multivibrator circuit enters a pin 9 of the A3, a pin 8 of the A3 is connected with a power supply Vcc, an integrated circuit IC2 forms a double-D trigger circuit, a pin 10 of the A3 is connected with a CLK end of the IC2 through a switch K, a D end of the IC2 is connected with a 0 # end of # imgabs, an asynchronous setting end S and an asynchronous reset end R of the IC2 are in short circuit and are connected with a working ground, a logic positive output end Q of the IC2 is connected with a pin 12 of an exclusive-OR gate A4, the CLK end of the IC2 is connected with a pin 13 of the A4, a Q of the IC2 outputs a U1 signal, and the U1 signal is connected with a power supply Vcc. A pin 11 of the A4 outputs a signal U2, and the phase difference between the signal U1 and the signal U2 is 90 degrees.

Description

Technical Field

[0001] The utility model relates to a technology of a phase-shift pulse generator, in particular to a pulse generator capable of 90° phase shift. The pulse signals with two phases differing by 90° can accurately drive a two-phase stepping motor. Background Art

[0002] The interior of a two-phase stepper motor is composed of two groups of coils, which is equivalent to one-phase winding occupying two poles. The two poles of phase A differ by 180° in space, and the two poles of phase B also differ by 180° in space. The working current flows positively and negatively in one-phase winding (this driving method is called bipolar drive). The phase difference between the working current of phase A and phase B is 90°, and the rectangular wave current flows alternately in the two-phase winding.

[0003] In other words, two-phase stepper motors often require pulse signals with an accurate 90° phase shift, and some electronic automatic equipment also require pulse signals with an accurate 90° phase shift.

[0004] Generally, a pulse signal with a 90° phase shift can be obtained by performing phase shift through a resistor-capacitor circuit (at least two levels) and intercepting it with a comparator. However, to achieve this accurate phase shift requirement, the resistor-capacitor components must have sufficient accuracy.

[0005] In addition, there is the regeneration signal method, that is, the output signal is not a continuation of the input signal, but is similar to and related to the input signal. For example, if the input signal waveform is a sine wave, a new sine wave with a phase advance or lag of 90° is obtained through a phase-locked loop and a voltage-controlled oscillator VCO. Although this method can accurately achieve the 90° phase shift requirement, the circuit structure is relatively complex and the cost performance is insufficient.

[0006] For example, a square wave with a duty cycle of 50% can be quadrupled and then ANDed with the original signal to obtain a pulse signal with a 90-degree phase shift. This method usually requires a dedicated integrated circuit for quadrupling the frequency. For example, the integrated circuit SJ0210 can be used. This circuit is a variety of the 4-piece U-level grating digital display circuit series developed by the Beijing Institute of Automation of the Machinery Industry. Therefore, the circuit structure of this method is also relatively complex.

[0007] Based on the above situation, a simpler and more precise 90° phase-shifted pulse generator can be designed. A 90° phase-shifted pulse generator is designed using a general four-XOR gate circuit and a general dual D flip-flop. Two of the four XOR gates plus a resistor-capacitor circuit are used to generate a frequency-adjustable multivibrator. The third XOR gate is used as an inverting buffer stage so that it can output square wave pulses with steeper edges. The dual D flip-flop is connected to a flip-flop state, in which case it has the function of a frequency divider, and its output frequency is half of the input frequency. The fourth XOR gate works in the XOR gate mode.

[0008] At this time, the output u1 pulse of the dual D flip-flop and the output u2 pulse of the fourth XOR gate form two pulse signals with a phase shift of 90°, and u1 leads u2. These two pulse signals with a phase difference of 90° can accurately drive the two-phase stepper motor, with excellent versatility and cost-effectiveness.

[0009] Of course, an external precise pulse source can be used to replace the multivibrator mentioned above, making the circuit structure simpler, with the same performance and higher precision. Summary of the invention

[0010] The technical problem to be solved by the utility model is to provide a 90° phase shift pulse technology which has a simple structure, reliable use and engineering practical value.

[0011] To achieve the above-mentioned purpose, the utility model provides a 90° phase-shifted pulse generator based on a D flip-flop, which includes a power supply Vcc, a frequency-adjustable multivibrator circuit, an inverting buffer stage circuit, an external precise pulse source, a dual D flip-flop circuit, an XOR gate circuit, an output pulse U1 signal, and an output pulse U2 signal. The XOR gate A3 constitutes the inverting buffer stage circuit, which can invert, buffer, and amplify the pulse signal generated by the frequency-adjustable multivibrator circuit. The output signal of the frequency-adjustable multivibrator circuit enters the 9th pin of the XOR gate A3, and the 8th pin of the XOR gate A3 is connected to the power supply Vcc; the integrated circuit IC2 constitutes the dual D flip-flop circuit, the output end 10th pin of the XOR gate A3 is connected to the clock CLK end of the dual D flip-flop circuit through the normally closed terminal of the switching switch K, and the data input end D of the dual D flip-flop circuit is connected to the logic negative output end , the asynchronous set terminal S and the asynchronous reset terminal R of the dual D flip-flop circuit are short-circuited and connected to the working ground; the XOR gate A4 constitutes the XOR gate circuit, the logic positive output terminal Q of the dual D flip-flop circuit is connected to the 12th pin of the XOR gate A4, the clock CLK terminal of the dual D flip-flop circuit is connected to the 13th pin of the XOR gate A4, the logic positive output terminal Q of the dual D flip-flop circuit outputs the output pulse U1 signal, and the output terminal 11th pin of the XOR gate A4 outputs the output pulse U2 signal, and the phase difference between the output pulse U1 signal and the output pulse U2 signal is 90°; the external pulse source signal is connected to the normally open terminal of the switching switch K.

[0012] The frequency-adjustable multivibrator circuit is composed of an XOR gate A1, an XOR gate A2, a resistor R, a resistor R1, a potentiometer P1, and a capacitor C1. Pin 1 of the XOR gate A1 is connected to the power supply Vcc, pin 5 of the XOR gate A2 is connected to the power supply Vcc, pin 2 of the XOR gate A1 is connected to pin 6 of the XOR gate A2 through resistor R, potentiometer P1, and resistor R1 in sequence, and pin 2 of the XOR gate A1 is connected to pin 4 of the output terminal of the XOR gate A2 through resistor R and capacitor C1 in sequence, pin 3 of the output terminal of the XOR gate A1 is connected to pin 6 of the XOR gate A2, and pin 4 of the output terminal of the XOR gate A2 is connected to pin 9 of the XOR gate A3.

[0013] The external precise pulse source, if the normally closed terminal of the switch K is disconnected and the normally open terminal is closed, can convert the pulse signal output by the inverting buffer stage circuit into the external pulse source, and then divide the frequency by two by the dual D flip-flop circuit and form a U1 signal with a phase difference of 90° with the external precise pulse source after the frequency division by two by the XOR gate circuit. o The pulse signal sequence U2. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Attached Figure 1 , Attachment Figure 2 , Attachment Figure 3 , Attachment Figure 4 , Attachment Figure 5 It is used to provide a further understanding of the utility model and constitutes a part of this application. Figure 1 This is the principle diagram of realizing 0~90° phase shift based on RC phase shift network; Figure 2 It is a 90° phase-shift pulse generator based on a dual D flip-flop; Figure 3 It is a two-way frequency divider circuit based on D flip-flop; Figure 4 It is the input and output waveform diagram of the D flip-flop divider circuit; Figure 5 The phase difference is 90 O Schematic diagram of two-phase pulse signal formation. DETAILED DESCRIPTION

[0015] The embodiments of the present utility model are further described below in conjunction with the accompanying drawings.

[0016] 0~90° phase shift based on RC phase shift network

[0017] We can briefly introduce the phase shifting through the resistor-capacitor circuit, such as Figure 1 As shown, through analysis it can be found that this phase shifting method has low accuracy and low practical value.

[0018] Figure 1 The transfer function is: H(jw)=1 / (jwRC+1), the phase shift is: -arctan(wRC), and the range is 0~90°.

[0019] If you want to improve the phase shift accuracy, you must select high-precision resistors and capacitors. Capacitors are different from resistors. The resistor accuracy can be higher than 0.1%, while the capacitor accuracy is very high at 5%, generally 5%, 10%, 25%, etc. Figure 1 The phase shift circuit is not applicable in practical applications.

[0020] 90° Phase-Shifted Pulse Generator Based on Dual D Flip-Flops

[0021] The electrical principle of this 90° phase-shifted pulse generator based on dual D flip-flops is as follows: Figure 2 As shown, it can be seen that the 90° phase-shifted pulse generator includes a power supply Vcc, a frequency-adjustable multivibrator circuit, an inverting buffer stage circuit, an external precision pulse source, a dual D flip-flop circuit, an XOR gate circuit, an output pulse U1, and an output pulse U2.

[0022] The above multivibrator circuit, inverting buffer stage circuit, and XOR gate circuit are all composed of a quad XOR gate circuit IC1 (CD4070). CD4070 is a chip integrating 4 XOR gates to realize logical XOR operation. Figure 1 A1, A2, A3, and A4 are all XOR gate circuits of CD4070.

[0023] The dual D flip-flop circuit is composed of a dual D flip-flop circuit IC2 (CD4013). CD4013 is composed of two identical and independent data-type flip-flops (only half of them are used in this design). Each flip-flop has an independent data input terminal D, an asynchronous set terminal S, an asynchronous reset terminal R, a clock input terminal CLK, a logic positive output terminal Q, and a logic negative output terminal. , this device can be used as a shift register by The output is connected to the data input D. The trigger can be used as a counter or a frequency divider. When triggered by the rising edge of the clock, the frequency of the output signal at the Q end is half the frequency of the clock CLK end. The asynchronous set and asynchronous reset of the trigger are independent of the clock and are completed by a high level on the set line S or the reset line R respectively. If the R and S lines are connected to the working ground, the trigger does not have the set and reset functions, so the initial state of the trigger is random. However, no matter whether the initial state of the trigger is "0" or "1", it does not affect the technical effect of the present invention.

[0024] The following is a brief introduction to the frequency divider function of integrated circuit IC2.

[0025] Frequency divider circuit based on D flip-flop

[0026] The D flip-flop is built on the basis of the SR flip-flop. The SR flip-flop adds a NOT gate to form a D flip-flop. The characteristic of the D flip-flop is that it has only one data input terminal D, which becomes a complementary data input after being inverted by the inverter and sent to the SR flip-flop, thus avoiding the SR flip-flop (low level is effective) The SR flip-flop has an uncertain output. Since the D flip-flop has only one data input terminal, it is very convenient to use.

[0027] The working principle of the D flip-flop is: when the data input D=1, and at the rising edge of the clock pulse, the flip-flop is set (1 state); when the data input D=0, and at the rising edge of the clock pulse, the flip-flop is reset (0 state). The function table of the D flip-flop is shown in Table 1, where Q' represents .

[0028] Table 1

[0029]

[0030] If CLK represents the clock, and CLK=1, the characteristic equation of the D flip-flop is

[0031]

[0032] If the data input terminal D of the D flip-flop is connected to the Output short circuit, such as Figure 3 As shown, the D flip-flop forms a two-frequency divider circuit, that is, the signal frequency at the output end Q of the D flip-flop is half of the clock signal frequency CLK.

[0033] one.

[0034] The D flip-flop next state output Qn+1 and The waveform diagram is as follows Figure 4 As shown, it is assumed that the initial state of the D flip-flop is "0".

[0035] As can be seen from the figure above, if the frequency of the clock CLK is 1KHz, the output terminal Q (second state, Q n+1 ) The frequency of the signal is 0.5KHz, that is Figure 3 The circuit constitutes a divide-by-two frequency divider circuit.

[0036] Detailed explanation of the working principle of the 90° phase-shifted pulse generator based on dual D flip-flops

[0037] Figure 2 The circuit can generate two phase difference of 90 o The pulse signal, whose pulse frequency can be adjusted by potentiometer P1, resistor R1, and capacitor C1.

[0038] One of the input terminals of the first three XOR gates A1, A2, A3 of XOR gate circuit IC1 is always connected to the positive terminal of power supply Vcc, so they all work equivalently in NOT gate state. XOR gates A1, A2 and peripheral components capacitor C1, potentiometer P1, resistor R1 form a frequency-adjustable multivibrator. The principle is briefly described as follows.

[0039] Assuming that the output of XOR gate A2 is low, the input of A2 is high. Capacitor C1 is charged through resistor R1 and potentiometer P1, and the voltage at the lower end of C1 gradually rises until the voltage at the input of XOR gate A1 reaches the reversal voltage (high). At this time, the output of XOR gate A1 becomes low and the output of A2 becomes high.

[0040] At the moment when the output of XOR gate A2 becomes high level, based on the characteristic that the voltage at the capacitor terminal cannot change suddenly, the voltage at the lower end of capacitor C1 suddenly changes to twice the high level voltage, ensuring that the output of XOR gate A1 maintains a low level. At the same time, the voltage at the lower end of capacitor C1 discharges to the low level of the output terminal of A1 through P1 and R1.

[0041] The voltage at the lower end of C1 gradually decreases until the voltage at the input of XOR gate A1 reaches the inversion voltage (low level). At this time, the output of XOR gate A1 inverts to a high level, and the output of XOR gate A2 becomes a low level.

[0042] This cycle forms a multivibrator and outputs a square wave at the output of the XOR gate A2. If the reverse voltage of the XOR gate is 1 / 2 of the power supply voltage, the oscillation period is: T≈2.2·(R1+P1)·C1. The resistor R is used to stabilize the oscillation frequency.

[0043] XOR gate A3 is used as an inverting buffer stage, enabling it to output a square wave pulse with a steeper edge.

[0044] The dual D flip-flop IC2 is connected to the flip-flop state, and it has the function of a frequency divider, such as Figure 4 As shown, its output frequency is 1 / 2 of the input frequency.

[0045] XOR gate A4 works in the XOR gate mode itself, that is, when its two input terminals are both "1" or "0" at the same time, its output is "0". Only when its two input terminals have different logic levels, the output is "1".

[0046] In this way, relying on Figure 2 The electrical schematic diagram can draw the relationship between the input signal and the output signal acting on the XOR gate A4. Figure 5 As shown, one of the two output signals is taken from the Q terminal u1 of the dual D flip-flop IC2, and the other is taken from the output terminal u2 of the XOR gate A4.

[0047] from Figure 5It can be seen that the two signals u1 and u2 have exactly 90 o are different, and the phase of u1 leads the phase of u2.

[0048] Figure 2 The switch K in the figure can transfer the input pulse from the oscillator shown in the figure to an external pulse source and act on it to form two corresponding phase shifts of 90 o pulse signal sequence.

[0049] So, if Figure 2 The accuracy of the pulse signal generated by the frequency-adjustable multivibrator circuit in the example is questionable. We can directly use a high-precision pulse signal to enter the dual D flip-flop through the switch K, and finally generate two high-precision phase-shifted 90 o The pulse signal sequence is very suitable for application in engineering practice.

[0050] It should be noted that the frequency of the output pulse signal u1 and u2 is half of the oscillator frequency or the external pulse generator frequency, so this 90 o In practical applications, such as driving a two-phase stepper motor, we should first understand that the frequency of the stepper motor refers to the frequency of the driving pulses u1 and u2, which determines the running speed of the motor. For example, if the step angle of the motor is 1.8 degrees, 200 pulses are required for one rotation (1.8*200=360 degrees). If the motor is to rotate one rotation per second, the frequency is set to 200HZ. Similarly, the oscillator frequency or the external pulse generator frequency is 400HZ.

[0051] If the power of the driven two-phase stepper motor is large and the u1 and u2 signals cannot drive the motor, then the u1 and u2 signals can be used to drive a solid-state relay or power tube respectively. The stepper motor is driven by the power tube, realizing industrial control or application of the stepper motor.

[0052] This 90 o The phase-shifted pulse generator uses only two general-purpose ICs, three resistors, a potentiometer, and a capacitor. It has a simple circuit structure and very low cost, but high precision. Compared with the current common 90-degree phase-shifted pulse generator solution, it has a higher cost-effectiveness and a certain degree of creativity.

[0053] Therefore, in order to improve Figure 2 The accuracy of the pulse signal generated by the frequency-adjustable multivibrator circuit in the circuit shown, whether it is the peripheral resistors R, R1, potentiometer P1, capacitor C1, try to use high-precision components, especially the screening of capacitor C1. In actual production, the highest precision capacitor is given priority. The precision of the three commonly used capacitors in the circuit is from low to high: aluminum capacitor < tantalum capacitor < ceramic capacitor, so the ceramic capacitor has higher precision.

[0054] The above embodiments are only used to illustrate rather than limit the technical solutions of the present invention. Although the present invention is described in detail with reference to the above embodiments, those skilled in the art should understand that the present invention can still be modified or replaced by equivalents. Any modification or partial replacement that does not depart from the spirit and scope of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A 90° phase-shifted pulse generator based on a D flip-flop, characterized in that: The 90° phase-shift pulse generator includes a power supply Vcc, a frequency-adjustable multivibrator circuit, an inverting buffer stage circuit, an external pulse source, a dual D flip-flop circuit, an XOR gate circuit, an output pulse U1 signal, and an output pulse U2 signal. XOR gates A1, A2, resistor R, resistor R1, potentiometer P1, and capacitor C1 constitute the frequency-adjustable multivibrator circuit. XOR gate A3 constitutes the inverting buffer stage circuit, which can invert, buffer, and amplify the pulse signal generated by the frequency-adjustable multivibrator circuit. The output signal of the frequency-adjustable multivibrator circuit enters pin 9 of XOR gate A3, and pin 8 of XOR gate A3 is connected to the power supply Vcc; integrated circuit IC2 constitutes the dual D flip-flop circuit, and pin 10 of the output terminal of XOR gate A3 is connected to the clock CLK terminal of the dual D flip-flop circuit through the normally closed terminal of switch K, and the data input terminal D of the dual D flip-flop circuit is connected to the logic negative output terminal , the asynchronous set terminal S and the asynchronous reset terminal R of the dual D flip-flop circuit are short-circuited and connected to the working ground; the XOR gate A4 constitutes the XOR gate circuit, the logic positive output terminal Q of the dual D flip-flop circuit is connected to the 12th pin of the XOR gate A4, the clock CLK terminal of the dual D flip-flop circuit is connected to the 13th pin of the XOR gate A4, the logic positive output terminal Q of the dual D flip-flop circuit outputs the output pulse U1 signal, and the output terminal 11th pin of the XOR gate A4 outputs the output pulse U2 signal, and the output pulse U1 signal and the output pulse U2 signal are 90° out of phase.

2. A 90° phase-shifted pulse generator based on a D flip-flop according to claim 1, characterized in that: The external pulse source, if the normally closed terminal of the switch K is disconnected and the normally open terminal is closed, can convert the pulse signal output by the inverting buffer stage circuit into the external pulse source, and then divide the frequency by two by the dual D flip-flop circuit and form a U1 signal with a phase difference of 90 degrees with the external pulse source after the frequency division by two by the XOR gate circuit. o The pulse signal sequence U2.

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