Multilayer ceramic capacitor

Abstract

The utility model provides a laminated ceramic capacitor which can inhibit reduction of moisture-proof reliability and realize miniaturization at the same time. A laminated ceramic capacitor (1) is provided with: a laminated body (2) having an inner layer section (11) including dielectric layers (14) and internal electrodes (15) that are alternately laminated, and a pair of outer layer sections (12) provided so as to sandwich the inner layer section in the lamination direction (T); a pair of main surfaces (A) facing each other in the stacking direction, a pair of side surfaces (B) facing each other in the width direction (W), and a pair of end surfaces (C) facing each other in the length direction (L); and a pair of external electrodes (3) disposed on the pair of end surfaces (C), respectively. The external electrode (3) has a base electrode layer (31) disposed so as to be in contact with the surface of the laminate. The base electrode layer is connected to the internal electrode, and a portion of the base electrode layer is disposed on the outer layer portion. The thickness of a portion of the base electrode layer disposed on the outer layer portion is 2.3 [mu] m or less.

Description

Technical Field

[0001] The utility model relates to a stacked ceramic capacitor. Background Art

[0002] As electronic devices such as mobile phones and digital devices are becoming smaller, miniaturization is also desired for laminated ceramic capacitors, which are electronic components thereof. For example, according to the laminated ceramic capacitor of Patent Document 1, miniaturization is achieved while ensuring capacitor capacity by attempting to thin its dielectric layer and increase its dielectric constant.

[0003] Prior Art Literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2016-127120

[0006] To further reduce the size of the multilayer ceramic capacitor, for example, the thickness of the external electrodes may be reduced. However, if the thickness of the external electrodes is reduced, moisture or the like can easily penetrate into the multilayer ceramic capacitor, and the moisture resistance reliability may be reduced. Utility Model Content

[0007] Problems to be solved by utility models

[0008] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a multilayer ceramic capacitor capable of achieving miniaturization while suppressing a decrease in moisture-resistant reliability.

[0009] Technical solutions to solve problems

[0010] In order to solve the above-mentioned problems, the multilayer ceramic capacitor of the utility model comprises: a multilayer body, having an inner layer portion including alternately stacked dielectric layers and internal electrodes, and a pair of outer layer portions arranged to sandwich the inner layer portion in the stacking direction, and having a pair of main surfaces opposite to each other in the stacking direction, a pair of side surfaces opposite to each other in the width direction orthogonal to the stacking direction, and a pair of end surfaces opposite to each other in the length direction orthogonal to the stacking direction and the width direction; and a pair of external electrodes, respectively arranged on the pair of end surfaces, in the multilayer ceramic capacitor, the external electrodes have a base electrode layer arranged to be in contact with the surface of the multilayer body, the base electrode layer is connected to the internal electrode and a portion is arranged on the outer layer portion, and the thickness of the portion of the base electrode layer arranged on the outer layer portion is less than 2.3 μm.

[0011] Utility Model Effect

[0012] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can be miniaturized while suppressing a decrease in moisture-resistant reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic perspective view of the multilayer ceramic capacitor 1 .

[0014] Figure 2 is Figure 1 A cross-sectional view taken along the II-II direction.

[0015] Figure 3 1 is a flowchart for explaining a method for manufacturing the multilayer ceramic capacitor 1 .

[0016] Description of Reference Numerals

[0017] 1: Multilayer ceramic capacitor;

[0018] 2: laminate;

[0019] 3: External electrode;

[0020] 11: inner layer;

[0021] 12: outer layer;

[0022] 14: dielectric layer;

[0023] 15: internal electrode;

[0024] 31: base electrode layer;

[0025] 31a: communication part;

[0026] 32: 1st plating layer;

[0027] 33: second plating layer;

[0028] A: Main side;

[0029] B: side view;

[0030] C: End face. DETAILED DESCRIPTION

[0031] Hereinafter, a multilayer ceramic capacitor 1 according to an embodiment of the present invention will be described. Figure 1 It is a schematic perspective view of the multilayer ceramic capacitor 1 . Figure 2 is a multilayer ceramic capacitor 1 in Figure 1 A cross-sectional view cut along the II-II direction in FIG. Figure 2 In FIG. 1 , one side of the multilayer ceramic capacitor 1 in the longitudinal direction L is shown, and the other side is not shown.

[0032] (Multilayer Ceramic Capacitor 1)

[0033] like Figure 1 As shown, the laminated ceramic capacitor 1 is in a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2. The laminate 2 includes an inner layer portion 11 on which a dielectric layer 14 and an internal electrode 15 are stacked. The laminate 2 is in a substantially rectangular parallelepiped shape and has six outer surfaces. In addition, the pair of external electrodes 3 is sometimes referred to as "each external electrode 3".

[0034] In this specification, the direction in which the dielectric layers 14 and the internal electrodes 15 are stacked in the multilayer ceramic capacitor 1 is referred to as a stacking direction T. A direction perpendicular to the stacking direction T and in which a pair of external electrodes 3 are arranged is referred to as a length direction L. A direction perpendicular to either the length direction L or the stacking direction T is referred to as a width direction W.

[0035] In the following description, among the six outer surfaces of the stacked body 2, a pair of outer surfaces provided on both sides in the stacking direction T is referred to as a pair of principal surfaces A, a pair of outer surfaces extending in the stacking direction T and provided on both sides in the width direction W is referred to as a pair of side surfaces B, and a pair of outer surfaces extending in the stacking direction T and provided on both sides in the length direction L is referred to as a pair of end surfaces C. In addition, the pair of principal surfaces A, the pair of side surfaces B, and the pair of end surfaces C are sometimes referred to as "each principal surface A", "each side surface B", and "each end surface C", respectively.

[0036] (Laminate 2)

[0037] The laminate 2 has an inner layer portion 11 and a pair of outer layer portions 12 arranged to sandwich the inner layer portion 11 in the lamination direction T. The laminate 2 is generally rectangular as a whole. The laminate 2 preferably has rounded corners and ridges. In addition, the so-called corner is a portion where three faces of the laminate intersect, and the so-called ridge is a portion where two faces of the laminate intersect.

[0038] (Inner layer portion 11)

[0039] like Figure 2 As shown, the inner layer portion 11 includes a plurality of dielectric layers 14 and a plurality of internal electrodes 15. The dielectric layers 14 and the internal electrodes 15 are alternately stacked.

[0040] The dielectric layer 14 is made of, for example, BaTiO 3 The dielectric ceramic may contain Mn compounds, Fe compounds, Cr compounds, C o Compounds, Ni compounds, etc.

[0041] The internal electrode 15 is formed of a metal material such as Ni, Cu, Ag, Pd, Ag-Pd alloy, Au, etc. The internal electrode 15 includes a first internal electrode 15A exposed only at one of the end faces C and a second internal electrode 15B exposed only at the other end face C. The first internal electrode 15A and the second internal electrode 15B are alternately arranged. In addition, when it is not necessary to distinguish them in particular and explain, the first internal electrode 15A and the second internal electrode 15B are collectively explained as "internal electrode 15". In addition, the internal electrode 15 is not exposed at the side surface B.

[0042] (Outer layer 12)

[0043] The outer layer portion 12 is made of the same material as the dielectric layer 14 of the inner layer portion 11. The outer layer portion 12 is formed to be thicker than the dielectric layer 14. In addition, the outer layer portion 12 is not provided with the internal electrode 15.

[0044] (External electrode 3)

[0045] The external electrodes 3 are disposed on each end surface C. Either the first internal electrode 15A or the second internal electrode 15B is connected to each external electrode 3. The external electrodes 3 cover not only each end surface C but also a part of each main surface A and a part of each side surface B.

[0046] The external electrode 3 includes a base electrode layer 31 formed in contact with the surface of the laminate 2 , a first plating layer 32 disposed on the base electrode layer 31 , and a second plating layer 33 disposed on the first plating layer 32 .

[0047] The base electrode layer 31 preferably contains a metal having Cu (copper) as a main component. Thus, the base electrode layer 31 is relatively cheap and can improve the conductivity. The base electrode layer 31 can improve the moisture resistance reliability of the multilayer ceramic capacitor 1. The base electrode layer 31 is, for example, a sintered layer. The base electrode layer 31 is arranged on each end face C. A portion of the base electrode layer 31 is arranged on the outer layer 12. The thickness of the portion of the base electrode layer 31 arranged on each main face A is smaller than the portion of the base electrode layer 31 arranged on each end face C and the portion arranged on each side face B. Thus, the size of the multilayer ceramic capacitor 1 in the stacking direction T can be reduced. In addition, in this specification, the so-called "main component metal" is set to be the metal with the largest weight % among the metals contained in the object. In addition, the base electrode layer 31 can also be a Cu plating layer. However, in terms of excellent moisture resistance reliability, the base electrode layer is preferably a sintered layer.

[0048] The first plating layer 32 is preferably a Ni (nickel) plating layer. Thus, the first plating layer 32 can prevent the base electrode layer 31 from being corroded by solder when the multilayer ceramic capacitor 1 is mounted.

[0049] The second plating layer 33 is preferably a Sn (tin) plating layer. Thus, the second plating layer 33 can improve the wettability of solder when mounting the multilayer ceramic capacitor 1 .

[0050] Here, the thickness of the portion of the base electrode layer 31 disposed on the outer layer portion 12 is 2.3 μm or less. Thus, the thickness of the portion of the external electrode 3 disposed on the outer layer portion 12 can be reduced, so that the size of the laminated ceramic capacitor 1 in the stacking direction T and the size in the width direction W can be reduced. Thus, the laminated ceramic capacitor 1 can be miniaturized. In addition, the thickness of the portion of the base electrode layer 31 disposed on the outer layer portion 12 is preferably set to 0.1 μm or more. Thus, the function of the base electrode layer 31 can be reliably exerted.

[0051] In addition, the thickness of the outer layer portion 12 is formed to be greater than that of the dielectric layer 14. Therefore, even if moisture or the like reaches the laminated body 2 through the portion of the base electrode layer 31 disposed on the outer layer portion 12, the outer layer portion 12 can suppress the moisture or the like from reaching the internal electrode 15 disposed inside the outer layer portion 12. Thus, a decrease in the moisture resistance reliability of the laminated ceramic capacitor 1 can be suppressed.

[0052] Therefore, it is possible to provide a multilayer ceramic capacitor that can be miniaturized while suppressing a decrease in moisture resistance reliability.

[0053] The thickness of the base electrode layer 31 other than the portion disposed on the outer layer portion 12 is 11 times or more the thickness of the base electrode layer 31 disposed on the outer layer portion 12. Thus, the multilayer ceramic capacitor 1 can be miniaturized while suppressing a decrease in moisture resistance reliability.

[0054] The portion of the base electrode layer 31 disposed on the outer layer portion 12 has a connecting portion 31a that connects the first plating layer 32 side and the outer layer portion 12 side. A portion of the first plating layer 32 enters the connecting portion 31a, and more specifically, enters the connecting portion 31a and reaches the outer layer portion 12. As a result, the adhesion between the first plating layer 32, the base electrode layer 31, and the laminate 2 can be improved, so that the decrease in moisture resistance reliability can be more appropriately suppressed. In addition, the so-called "reaching the outer layer portion 12" means "contacting the outer layer portion 12".

[0055] (Method for measuring thickness of base electrode layer)

[0056] The thickness of the base electrode layer is set to be a dimension in a direction perpendicular to a tangent line to the surface of the laminate in a cross section parallel to the lamination direction and the longitudinal direction and passing through the center of the laminate in the width direction.

[0057] As a method for measuring the thickness of the base electrode layer, for example, a method of observing the cross section of the laminate exposed by polishing with a scanning electron microscope is mentioned. In this case, the thickness value can be set as the average value of the measured values ​​at a plurality of locations.

[0058] (Method for Manufacturing Multilayer Ceramic Capacitor 1)

[0059] Next, a method for manufacturing the multilayer ceramic capacitor 1 will be described. Figure 3 1 is a flowchart for explaining a method for manufacturing the multilayer ceramic capacitor 1 .

[0060] (Internal Electrode Pattern Forming Step S1)

[0061] like Figure 3 As shown, a conductive paste that becomes the internal electrode 15 is printed (applied) on a ceramic green sheet that becomes the dielectric layer 14. The conductive paste is printed, for example, by screen printing, gravure printing, relief printing, etc. Thus, a ceramic green sheet that becomes the dielectric layer 14 configured with the first internal electrode 15A and a ceramic green sheet that becomes the dielectric layer 14 configured with the second internal electrode 15B are manufactured. In addition, the ceramic green sheet is a sheet or strip-shaped sheet formed by molding a ceramic slurry containing ceramic powder, a binder, and a solvent on a carrier film using a die coater, a gravure coater, a micro gravure coater, etc.

[0062] (Lamination Step S2)

[0063] The ceramic green sheets to be the dielectric layers 14 provided with the first internal electrodes 15A and the ceramic green sheets to be the dielectric layers 14 provided with the second internal electrodes 15B are alternately stacked. Next, the ceramic green sheets for the outer layer 12 are arranged between them in the stacking direction T and are thermocompressed. Thus, a mother block is manufactured.

[0064] (Master Block Cutting Step S3)

[0065] The mother block is cut (divided) in the longitudinal direction L and the width direction W. Thus, a plurality of rectangular parallelepiped laminated bodies 2 are manufactured.

[0066] (External Electrode Forming Step S4)

[0067] A base electrode layer 31 is formed on each end face C of the stack 2. When the base electrode layer 31 is a sintered layer, each end face C of the stack 2 is sequentially immersed in a conductive paste as an electrode material for the base electrode. Thus, a conductive paste is applied to each end face C of the stack 2. The conductive paste is applied so that the base electrode layer 31 is also arranged on the outer layer 12. At this time, by adjusting the amount of conductive paste applied to each part, the thickness of the base electrode layer 31 can be adjusted to each part. Then, these conductive pastes are fired together with the stack 2. Thus, a base electrode layer 31 is formed on each end face C of the stack 2. In addition, the conductive paste for the base electrode contains metal and glass. In addition, when the base electrode layer 31 is a plating layer, it is formed, for example, by an electrolytic plating method.

[0068] The first plating layer 32 is formed on the surface of the base electrode layer 31. Next, the second plating layer 33 is formed on the surface of the first plating layer 32. The first plating layer 32 and the second plating layer 33 are formed in sequence, for example, by electrolytic plating. Thus, the external electrodes 3 are formed on each end surface C of the laminate 2.

[0069] (Firing Step S5)

[0070] The laminate 2 with the external electrodes 3 formed thereon is heated at a set firing temperature for a given time in a nitrogen atmosphere. Thus, the external electrodes 3 are fired and attached to the laminate 2, and a Figure 1 The multilayer ceramic capacitor 1 is shown.

[0071] (Effects of Embodiments)

[0072] According to this embodiment, the following effects can be obtained.

[0073] According to the present embodiment, the thickness of the portion of the base electrode layer 31 disposed on the outer layer portion 12 is 2.3 μm or less. As a result, the thickness of the portion of the external electrode 3 disposed on the outer layer portion 12 can be reduced, so that the size of the multilayer ceramic capacitor 1 in the stacking direction T and the size in the width direction W can be reduced. As a result, the multilayer ceramic capacitor 1 can be miniaturized.

[0074] Even if moisture or the like reaches the laminated body 2 through the portion of the base electrode layer 31 disposed on the outer layer portion 12, the outer layer portion 12 can prevent moisture or the like from reaching the internal electrode 15. This can prevent the moisture resistance reliability of the laminated ceramic capacitor 1 from being reduced.

[0075] Therefore, it is possible to provide a multilayer ceramic capacitor 1 that can be miniaturized while suppressing a decrease in moisture resistance reliability.

[0076] According to the present embodiment, the thickness of the portion of the base electrode layer 31 other than the portion disposed on the outer layer portion 12 is 11 times or more relative to the thickness of the portion of the base electrode layer 31 disposed on the outer layer portion 12. Thus, the multilayer ceramic capacitor 1 can be miniaturized while suppressing the decrease in moisture resistance reliability more appropriately. In addition, the thickness of the portion of the base electrode layer 31 other than the portion disposed on the outer layer portion 12 is preferably 30 times or less relative to the thickness of the portion of the base electrode layer 31 disposed on the outer layer portion 12.

[0077] According to the present embodiment, the portion of the base electrode layer 31 disposed on the outer layer portion 12 has a connecting portion 31a that connects the first plating layer 32 side and the outer layer portion 12 side. A portion of the first plating layer 32 enters the connecting portion 31a, and more specifically, enters the connecting portion 31a and reaches the outer layer portion 12. Thus, the adhesion between the first plating layer 32, the base electrode layer 31, and the laminate 2 can be improved, and thus the decrease in moisture resistance reliability can be more appropriately suppressed.

[0078] According to the present embodiment, the foundation electrode layer 31 preferably contains a metal including Cu as a main component. This can improve the conductivity of the foundation electrode layer 31 at a relatively low cost.

[0079] According to the present embodiment, the first plating layer 32 is preferably a Ni plating layer. This can prevent the base electrode layer 31 from being corroded by solder when the multilayer ceramic capacitor 1 is mounted.

[0080] According to the present embodiment, the second plating layer 33 is preferably a Sn plating layer. This can improve the wettability of solder when mounting the multilayer ceramic capacitor 1 .

[0081] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various changes and modifications can be made. In addition, the present invention includes the following combinations.

[0082] <1> A laminated ceramic capacitor comprises: a laminate having an inner layer portion including alternately stacked dielectric layers and internal electrodes, and a pair of outer layer portions arranged to sandwich the inner layer portion in a stacking direction, and having a pair of main surfaces opposite to each other in the stacking direction, a pair of side surfaces opposite to each other in a width direction orthogonal to the stacking direction, and a pair of end surfaces opposite to each other in a length direction orthogonal to the stacking direction and the width direction; and a pair of external electrodes respectively arranged on the pair of end surfaces, wherein in the laminated ceramic capacitor, the external electrodes have a base electrode layer arranged in contact with a surface of the laminate, the base electrode layer is connected to the internal electrode and a portion is arranged on the outer layer portion, and the thickness of a portion of the base electrode layer arranged on the outer layer portion is 2.3 μm or less.

[0083] <2> according to <1> In the multilayer ceramic capacitor, the thickness of the portion of the base electrode layer other than the portion disposed on the outer layer portion is 11 times or more the thickness of the portion of the base electrode layer disposed on the outer layer portion.

[0084] <3> according to <1> or <2> The stacked ceramic capacitor, wherein the external electrodes respectively have a first plating layer arranged on the base electrode layer and a second plating layer arranged on the first plating layer, and the portion of the base electrode layer arranged on the outer layer portion has a connecting portion that connects the first plating layer side and the outer layer portion side, and a portion of the first plating layer enters the connecting portion and reaches the outer layer portion.

[0085] <4> according to <1> ~ <3> The multilayer ceramic capacitor according to any one of claims , wherein the base electrode layer contains a metal having Cu as a main component.

[0086] <5> according to <1> ~ <4> The multilayer ceramic capacitor according to any one of claims , wherein the first plating layer contains a metal whose main component is Ni, and the second plating layer contains a metal whose main component is Sn.

Claims

1. A multilayer ceramic capacitor comprising: A laminate having an inner layer portion including alternately stacked dielectric layers and internal electrodes, and a pair of outer layer portions disposed to sandwich the inner layer portion in a stacking direction, and having a pair of main surfaces opposed in the stacking direction, a pair of side surfaces opposed in a width direction orthogonal to the stacking direction, and a pair of end surfaces opposed in a length direction orthogonal to the stacking direction and the width direction; and a pair of external electrodes, respectively arranged on the pair of end surfaces, The laminated ceramic capacitor is characterized in that The external electrode includes a base electrode layer disposed in contact with the surface of the stacked body. The base electrode layer is connected to the internal electrode and a portion of the base electrode layer is disposed on the outer layer portion. A portion of the base electrode layer disposed on the outer layer portion has a thickness of 2.3 μm or less.

2. The multilayer ceramic capacitor according to claim 1, wherein: The thickness of a portion of the foundation electrode layer other than a portion disposed on the outer layer portion is 11 times or more the thickness of a portion of the foundation electrode layer disposed on the outer layer portion.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein: The external electrodes each include a first plating layer disposed on the base electrode layer and a second plating layer disposed on the first plating layer. The portion of the base electrode layer disposed on the outer layer portion has a connecting portion that connects the first plating layer side and the outer layer portion side. A portion of the first plating layer enters the communicating portion and reaches the outer layer portion.

4. The multilayer ceramic capacitor according to claim 1 or 2, wherein: The base electrode layer is a sintered layer.

5. The multilayer ceramic capacitor according to claim 3, wherein: The first plating layer is a Ni plating layer, The second plating layer is a Sn plating layer.

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