Transient voltage suppression circuit and inversion device
By adding nonlinear devices to the transient voltage suppression circuit of the inverter and using fast sampling and detection circuits, the problem of slow response speed of the inverter transient voltage suppression in the prior art is solved, and efficient transient voltage is achieved clamp and response.
Patent Information
- Application Number
- CN202420511332.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-15
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2034-03-15
AI Technical Summary
In the prior art, the transient voltage suppression response speed is slow and the suppression effect is poor, making it difficult to meet strict regulatory requirements.
A transient voltage suppression circuit is designed to generate a driving signal to drive the bleed circuit and the inverter unit adjustment switch by adding nonlinear devices to the bleed circuit and using the sampling circuit and detection circuit to quickly sample and compare the transient voltage. state.
The transient voltage is instantly clamped in nanoseconds, which improves the inverter's response speed and suppression effect to the transient voltage, and meets the situations where the requirements for transient voltage are high.
Smart Images
Figure CN222484546U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of inverter transient voltage suppression, and in particular to a transient voltage suppression circuit and an inverter device. Background Art
[0002] As the global demand for renewable energy grows, inverters, as an important power electronic device, are increasingly used in new energy power generation systems. However, when the inverter is connected to the grid, transient voltages may be generated due to grid failures, operating overvoltages, and other reasons. This not only threatens the safe and stable operation of the inverter, but also poses a hidden danger to subsequent household electrical appliances. Therefore, various countries have introduced regulations on inverter grid connection to ensure the safe and stable operation of the power grid. Among them, some countries have extremely strict requirements on transient voltages at the grid-connected port. How to suppress transient voltages is an urgent problem that needs to be solved.
[0003] Figure 1 Schematic diagram of a transient voltage suppression circuit in the prior art, such as Figure 1 As shown in FIG. 1 , the scheme adopts a transient voltage suppression circuit composed of a discharge circuit and a transient voltage test circuit (composed of a DC bridge stack, a capacitor, and a resistor). The scheme adopts a MOS tube + resistor method, and uses a resistor to consume and discharge transient energy. This method has the disadvantages of slow consumption speed and large resistor volume, and is difficult to apply in actual engineering and occasions with high transient voltage requirements.
[0004] Figure 2 FIG. 1 is a schematic diagram of another transient voltage suppression circuit in the prior art, such as Figure 2 As shown in FIG. 1 , the scheme adopts a transient voltage suppression circuit composed of a sampling circuit, a DSP processor, a driving circuit and a discharge circuit. The scheme uses software to sample transient voltages, and when the voltage exceeds the limit, the discharge circuit is turned on and the drive is turned off. Although this method can suppress transient voltages and reduce power loss, software sampling has a delay time and a slow response problem, which is not ideal for suppressing transient voltages.
[0005] With regard to the problems of slow response speed and poor suppression effect of transient voltage suppression solutions in the prior art, no effective solution has been proposed yet. Utility Model Content
[0006] The embodiments of the present application provide a transient voltage suppression circuit and an inverter device to at least solve the technical problems of slow response speed and poor suppression effect of transient voltage suppression solutions in the prior art.
[0007] According to one aspect of an embodiment of the present application, a transient voltage suppression circuit is provided, comprising: a sampling circuit connected to an inverter unit and used to sample a transient voltage appearing at a grid-connected port of the inverter unit; a detection circuit connected to the sampling circuit and used to compare the transient voltage with a set voltage threshold to generate a first level signal; a level flipping circuit connected to the detection circuit and used to convert the first level signal into a second level signal; a first driving circuit connected to the level flipping circuit and a discharge circuit connected with a nonlinear device, respectively, and used to convert the second level signal into a first driving signal to drive the discharge circuit to adjust a switch state; a buffer unit connected to the level flipping circuit and used to convert the second level signal into an enable signal; a second driving circuit connected to the buffer unit and the inverter unit, respectively, and used to convert the enable signal into a second driving signal to drive the inverter unit to adjust an operating state; wherein the discharge circuit is connected to the inverter unit; and the nonlinear device is used to suppress the transient voltage appearing at the grid-connected port of the inverter unit when the switch state is on.
[0008] Optionally, the discharge circuit includes: a first resistor, a second resistor, a MOS tube and the nonlinear device; wherein: the first end of the first resistor is connected to the first drive circuit, the second end of the first resistor is respectively connected to the first end of the second resistor and the gate of the MOS tube, the second end of the second resistor is respectively connected to the first drive circuit, the drain of the MOS tube and the first end of the nonlinear device, and the source of the MOS tube and the second end of the nonlinear device are respectively connected to the inverter unit.
[0009] Optionally, the sampling circuit includes: a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a third capacitor, a fourth capacitor, a fifth capacitor and a first comparator; wherein: the first end of the third resistor and the first end of the fourth resistor are respectively used as the input end of the sampling circuit, the second end of the third resistor is connected to the first end of the sixth resistor, the first end of the sixth resistor is respectively connected to the first end of the eighth resistor, the first end of the fourth capacitor and the non-inverting input end of the first comparator, the second end of the eighth resistor, the second end of the fourth capacitor and the first end of the fifth capacitor are connected to access the auxiliary power supply, the second end of the fifth capacitor is used to be grounded, the second end of the fourth resistor is connected to the first end of the fifth resistor, the second end of the fifth resistor is respectively connected to the first end of the seventh resistor, the first end of the third capacitor and the inverting input end of the first comparator, the first end of the ninth resistor is respectively connected to the second end of the seventh resistor, the second end of the third capacitor and the output end of the first comparator, and the first end of the ninth resistor is used as the output end of the sampling circuit.
[0010] Optionally, the detection circuit includes a first detection circuit, and the first detection circuit includes: a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a seventh capacitor and a second comparator; wherein: the first end of the tenth resistor is connected to the first end of the sixth capacitor and is used as the input end of the first detection circuit, the second end of the tenth resistor is connected to the inverting input end of the second comparator, the first end of the eleventh resistor, the first end of the twelfth resistor, the first end of the thirteenth resistor and the first end of the seventh capacitor are connected to access an auxiliary power supply, the second end of the eleventh resistor is connected to the non-inverting input end of the second comparator, the second end of the twelfth resistor, the second end of the sixth capacitor and the second end of the seventh capacitor are connected to grounding, the output end of the second comparator, the second end of the thirteenth resistor and the second end of the fourteenth resistor are connected to serve as the output end of the first detection circuit, and the first end of the fourteenth resistor is used to access an auxiliary power supply.
[0011] Optionally, the detection circuit also includes a second detection circuit, and the second detection circuit includes: a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, an eighth capacitor, a ninth capacitor and a third comparator; wherein: the first end of the sixteenth resistor is connected to the first end of the eighth capacitor and is used as the input end of the second detection circuit, the second end of the sixteenth resistor is connected to the inverting input end of the third comparator, the first end of the seventeenth resistor, the first end of the eighteenth resistor, the first end of the nineteenth resistor and the first end of the ninth capacitor are connected to access an auxiliary power supply, the second end of the seventeenth resistor is connected to the non-inverting input end of the third comparator, the second end of the eighteenth resistor, the second end of the eighth capacitor and the second end of the ninth capacitor are connected to grounding, the output end of the third comparator, the second end of the fifteenth resistor and the second end of the nineteenth resistor are connected to serve as the output end of the second detection circuit, and the first end of the fifteenth resistor is used to access an auxiliary power supply.
[0012] Optionally, the level flipping circuit includes: a first diode, a second diode, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a tenth capacitor and a fourth comparator; wherein: the cathode of the first diode and the cathode of the second diode are respectively used as the input end of the level flipping circuit, the anode of the first diode, the anode of the second diode and the second end of the twenty-second resistor are respectively connected to the inverting input end of the fourth comparator, the first end of the twenty-second resistor and the first end of the twenty-th resistor are respectively used to access an auxiliary power supply, the second end of the twentieth resistor, the first end of the twenty-first resistor and the first end of the tenth capacitor are respectively connected to the non-inverting input end of the fourth comparator, the second end of the twenty-first resistor is connected to the second end of the tenth capacitor and is used for grounding, and the output end of the fourth comparator is used as the output end of the level flipping circuit.
[0013] Optionally, the first driving circuit includes: a twenty-third resistor, a twenty-fourth resistor, an eleventh capacitor and a first driving chip; wherein: the first end of the twenty-third resistor is connected to the second end of the twenty-fourth resistor and is used as the input end of the first driving circuit, the first end of the twenty-fourth resistor is used for an external auxiliary power supply, the second end of the twenty-third resistor and the first end of the eleventh capacitor are respectively connected to the first input end of the first driving chip, the second end of the eleventh capacitor is connected to the second input end of the first driving chip, the second end of the eleventh capacitor is also used for grounding, and the first output end and the second output end of the first driving chip are used as the output ends of the first driving circuit respectively.
[0014] Optionally, the second driving circuit includes: a thirty-fourth resistor, a thirty-fifth resistor, a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a fortieth resistor, a forty-first resistor and a second driving chip; wherein: the first end of the thirty-fourth resistor, the first end of the thirty-fifth resistor, the first end of the thirty-sixth resistor, the first end of the thirty-seventh resistor, the first end of the thirty-eighth resistor, the first end of the thirty-ninth resistor, the first end of the fortieth resistor and the first end of the forty-first resistor are respectively used as input ends of the second driving circuit, the second end of the thirty-fourth resistor, the second end of the thirty-fifth resistor, the second end of the thirty-sixth resistor, the second end of the thirty-seventh resistor, the second end of the thirty-eighth resistor, the second end of the thirty-ninth resistor, the second end of the fortieth resistor and the second end of the forty-first resistor are respectively connected to multiple input ends of the second driving chip, and the multiple output ends of the second driving chip are respectively used as output ends of the second driving circuit.
[0015] Optionally, it also includes: a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor and a digital signal processing unit; wherein: the first end of the twenty-sixth resistor, the first end of the twenty-seventh resistor, the first end of the twenty-eighth resistor, the first end of the twenty-ninth resistor, the first end of the thirtieth resistor, the first end of the thirty-first resistor, the first end of the thirty-second resistor and the first end of the thirty-third resistor are respectively connected to the digital signal processing unit; the first end of the twenty-fifth resistor is connected to the first port of the buffer unit and is used to access the auxiliary power supply, the second end of the twenty-fifth resistor is connected to the second port of the buffer unit, the second end of the thirty-third resistor is connected to the third port of the buffer unit, the second end of the thirty-second resistor is connected to the fourth port of the buffer unit, the second end of the thirty-first resistor is connected to the fifth port of the buffer unit, and the The second end of the twenty-ninth resistor is connected to the sixth port of the buffer unit, the second end of the twenty-eighth resistor is connected to the eighth port of the buffer unit, the second end of the twenty-seventh resistor is connected to the ninth port of the buffer unit, the second end of the twenty-sixth resistor is connected to the tenth port of the buffer unit, the eleventh port of the buffer unit is connected to the twelfth port of the buffer unit and is used for grounding, the thirteenth port of the buffer unit is connected to the fourteenth port of the buffer unit and is used for connecting to an auxiliary power supply, the fifteenth port of the buffer unit is used as the input end of the buffer unit, the sixteenth port of the buffer unit, the seventeenth port of the buffer unit, the eighteenth port of the buffer unit, the nineteenth port of the buffer unit, the twentieth port of the buffer unit, the twenty-first port of the buffer unit, the twenty-second port of the buffer unit and the twenty-third port of the buffer unit are respectively used as the output end of the buffer unit, and the twenty-fourth port of the buffer unit is used for grounding.
[0016] According to another aspect of an embodiment of the present application, an inverter device is provided, wherein the inverter device includes the transient voltage suppression circuit described above.
[0017] In the embodiment of the present application, a nonlinear device is added to the discharge circuit of the transient voltage suppression circuit, which can clamp the transient voltage at a low voltage in nanoseconds to meet the occasions with high requirements for transient voltage; in addition, the transient voltage suppression circuit can sample the transient voltage appearing at the grid-connected port of the inverter unit, and use the fast response advantage of the hardware to drive the discharge circuit to adjust the switch state and the inverter unit to adjust the operating state, thereby solving the technical problems of slow response speed and poor suppression effect of the transient voltage suppression scheme in the prior art, and achieving the technical effect of improving the transient voltage suppression response speed and greatly reducing the transient voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0019] Figure 1 A schematic diagram of a transient voltage suppression circuit in the prior art;
[0020] Figure 2 is a schematic diagram of another transient voltage suppression circuit in the prior art;
[0021] Figure 3 A schematic diagram of a transient voltage suppression circuit provided in an embodiment of the present application;
[0022] Figure 4 A schematic diagram of another transient voltage suppression circuit provided in an embodiment of the present application;
[0023] Figure 5 A schematic diagram of a transient voltage suppression circuit provided in an optional embodiment of the present application. DETAILED DESCRIPTION
[0024] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0025] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.
[0026] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, methods and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.
[0027] According to one aspect of an embodiment of the present application, a transient voltage suppression circuit is provided. Figure 3 A schematic diagram of a transient voltage suppression circuit provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, the transient voltage suppression circuit includes:
[0028] The sampling circuit 12 is connected to the inverter unit 11 and is used to sample the transient voltage appearing at the grid-connected port of the inverter unit 11;
[0029] The detection circuit 13 is connected to the sampling circuit 12 and is used to compare the transient voltage with a set voltage threshold to generate a first level signal;
[0030] Among them, the voltage threshold includes an overvoltage protection threshold and a recovery voltage threshold. When the transient voltage exceeds the overvoltage protection threshold, the first level signal is a low level; when the transient voltage is lower than the recovery voltage threshold, the first level signal is a high level.
[0031] The level flipping circuit 14 is connected to the detection circuit 13 and is used to convert the first level signal into a second level signal;
[0032] The first driving circuit 15 is respectively connected to the level flipping circuit 14 and the discharge circuit 18 connected with a nonlinear device, and is used to convert the second level signal into a first driving signal to drive the discharge circuit 18 to adjust the switch state;
[0033] Among them, nonlinear devices include but are not limited to: varistors and gas discharge tubes.
[0034] A buffer unit 16, connected to the level flip circuit 14, for converting the second level signal into an enable signal;
[0035] The second driving circuit 17 is connected to the buffer unit 16 and the inverter unit 11 respectively, and is used to convert the enable signal into a second driving signal to drive the inverter unit 11 to adjust the operating state;
[0036] The discharge circuit 18 is connected to the inverter unit 11; the nonlinear device is used to suppress the transient voltage appearing on the grid-connected port of the inverter unit 11 when the switch state is on.
[0037] In the embodiment of the present application, a nonlinear device is added to the discharge circuit of the transient voltage suppression circuit, which can clamp the transient voltage at a low voltage in nanoseconds to meet the occasions with high requirements for transient voltage; in addition, the transient voltage suppression circuit can sample the transient voltage appearing at the grid-connected port of the inverter unit, and use the fast response advantage of the hardware to drive the discharge circuit to adjust the switch state and the inverter unit to adjust the operating state, thereby solving the technical problems of slow response speed and poor suppression effect of the transient voltage suppression scheme in the prior art, and achieving the technical effect of improving the transient voltage suppression response speed and greatly reducing the transient voltage.
[0038] It should be noted that the first level signal and the second level signal are different level signals; for example, if the first level signal is low level, the second level signal is high level; if the first level signal is high level, the second level signal is low level.
[0039] Figure 4 A schematic diagram of another transient voltage suppression circuit provided in an embodiment of the present application is shown as follows: Figure 4 As shown, the detection circuit 13 of the transient voltage suppression circuit includes: a first detection circuit 1301 and a second detection circuit 1302; wherein: the input end of the first detection circuit 1301 and the input end of the second detection circuit 1302 are respectively used as the input end of the detection circuit 13, and the output end of the first detection circuit 1301 and the output end of the second detection circuit 1302 are respectively used as the output end of the detection circuit 13.
[0040] Figure 5 A schematic diagram of a transient voltage suppression circuit provided by an optional embodiment of the present application is shown in FIG. Figure 5 As shown, the discharge circuit 18 of the transient voltage suppression circuit includes: a first resistor R1, a second resistor R2, a MOS tube Q1 and a nonlinear device X.
[0041] Further, a first end of the first resistor R1 is connected to the first drive circuit 15, a second end of the first resistor R1 is respectively connected to a first end of the second resistor R2 and a gate of the MOS tube Q1, a second end of the second resistor R2 is respectively connected to the first drive circuit 15, a drain of the MOS tube Q1 and a first end of the nonlinear device X, and a source of the MOS tube Q1 and a second end of the nonlinear device X are respectively connected to the inverter unit 11.
[0042] like Figure 5 As shown, the sampling circuit 12 of the transient voltage suppression circuit includes: a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5 and a first comparator U1.
[0043] Further, the first end of the third resistor R3 and the first end of the fourth resistor R4 are respectively used as the input end of the sampling circuit 12, the second end of the third resistor R3 is connected to the first end of the sixth resistor R6, the first end of the sixth resistor R6 is respectively connected to the first end of the eighth resistor R8, the first end of the fourth capacitor C4 and the non-inverting input end of the first comparator U1, the second end of the eighth resistor R8, the second end of the fourth capacitor C4 and the first end of the fifth capacitor C5 are connected to access the auxiliary power supply, the second end of the fifth capacitor C5 is used to be grounded, the second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is respectively connected to the first end of the seventh resistor R7, the first end of the third capacitor C3 and the inverting input end of the first comparator U1, the first end of the ninth resistor R9 is respectively connected to the second end of the seventh resistor R7, the second end of the third capacitor C3 and the output end of the first comparator U1, and the first end of the ninth resistor R9 is used as the output end of the sampling circuit 12.
[0044] In the embodiment of the present application, a differential sampling circuit composed of U1 and surrounding resistors and capacitors is used to sample the grid-connected port voltage in real time.
[0045] like Figure 5 As shown, the first detection circuit 1301 of the transient voltage suppression circuit includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a sixth capacitor C6, a seventh capacitor C7 and a second comparator U2.
[0046] Further, the first end of the tenth resistor R10 is connected to the first end of the sixth capacitor C6 and is used as the input end of the first detection circuit 1301, the second end of the tenth resistor R10 is connected to the inverting input end of the second comparator U2, the first end of the eleventh resistor R11, the first end of the twelfth resistor R12, the first end of the thirteenth resistor R13 and the first end of the seventh capacitor C7 are connected to access the auxiliary power supply, the second end of the eleventh resistor R11 is connected to the non-inverting input end of the second comparator U2, the second end of the twelfth resistor R12, the second end of the sixth capacitor C6 and the second end of the seventh capacitor C7 are connected to grounding, the output end of the second comparator U2, the second end of the thirteenth resistor R13 and the second end of the fourteenth resistor R14 are connected to serve as the output end of the first detection circuit 1301, and the first end of the fourteenth resistor R14 is used to access the auxiliary power supply.
[0047] like Figure 5 As shown, the second detection circuit 1302 of the transient voltage suppression circuit includes: a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, an eighth capacitor C8, a ninth capacitor C9 and a third comparator U3.
[0048] Further, the first end of the sixteenth resistor R16 is connected to the first end of the eighth capacitor C8 and is used as the input end of the second detection circuit 1302, the second end of the sixteenth resistor R16 is connected to the inverting input end of the third comparator U3, the first end of the seventeenth resistor R17, the first end of the eighteenth resistor R18, the first end of the nineteenth resistor R19 and the first end of the ninth capacitor C9 are connected to access the auxiliary power supply, the second end of the seventeenth resistor R17 is connected to the non-inverting input end of the third comparator U3, the second end of the eighteenth resistor R18, the second end of the eighth capacitor C8 and the second end of the ninth capacitor C9 are connected to grounding, the output end of the third comparator U3, the second end of the fifteenth resistor R15 and the second end of the nineteenth resistor R19 are connected to serve as the output end of the second detection circuit 1302, and the first end of the fifteenth resistor R15 is used to access the auxiliary power supply.
[0049] In the embodiment of the present application, U2 and U3 are used to form a hysteresis comparator, and the overvoltage protection point of the positive and negative half cycles is set to Uac_p max With Uac_n max , the recovery voltage is Uac_p min With Uac_n min ; When the transient voltage is detected to be greater than Uac_p max With Uac_n maxWhen one of them occurs, the level signal of Grid_OVP_P or Grid_OVP_N changes from high level to low level; when the transient voltage drops to Uac_p min With Uac_n min When the level of Grid_OVP_P or Grid_OVP_N is changed from low level to high level.
[0050] like Figure 5 As shown, the level flipping circuit 14 of the transient voltage suppression circuit includes: a first diode D1, a second diode D2, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a tenth capacitor C10 and a fourth comparator U4.
[0051] Further, the cathode of the first diode D1 and the cathode of the second diode D2 are respectively used as the input end of the level flipping circuit 14, the anode of the first diode D1, the anode of the second diode D2 and the second end of the twenty-second resistor R22 are respectively connected to the inverting input end of the fourth comparator U4, the first end of the twenty-second resistor R22 and the first end of the twentieth resistor R20 are respectively used to connect to the auxiliary power supply, the second end of the twentieth resistor R20, the first end of the twenty-first resistor R21 and the first end of the tenth capacitor C10 are respectively connected to the non-inverting input end of the fourth comparator U4, the second end of the twenty-first resistor R21 is connected to the second end of the tenth capacitor C10 and is used for grounding, and the output end of the fourth comparator U4 is used as the output end of the level flipping circuit 14.
[0052] In the embodiment of the present application, when Grid_OVP_P or Grid_OVP_N is at a low level, D1 or D2 is turned on, the negative input voltage of the comparator U4 is less than the positive voltage, and U4 outputs a high level, that is, EN_PWM is at a high level; when the transient voltage drops to Uac_p min With Uac_n min When the voltage is below 0.05, Grid_OVP_P or Grid_OVP_N changes from low level to high level, D1 or D2 is turned off, and the EN_PWM signal outputs a low level.
[0053] like Figure 5 As shown, the first driving circuit 15 of the transient voltage suppression circuit includes: a twenty-third resistor R23, a twenty-fourth resistor R24, an eleventh capacitor C11 and a first driving chip U5.
[0054] Furthermore, the first end of the twenty-third resistor R23 is connected to the second end of the twenty-fourth resistor R24 and is used as the input end of the first drive circuit 15. The first end of the twenty-fourth resistor R24 is used for an external auxiliary power supply. The second end of the twenty-third resistor R23 and the first end of the eleventh capacitor C11 are respectively connected to the first input end of the first drive chip U5. The second end of the eleventh capacitor C11 is connected to the second input end of the first drive chip U5. The second end of the eleventh capacitor C11 is also used for grounding. The first output end and the second output end of the first drive chip U5 are used as the output ends of the first drive circuit 15 respectively.
[0055] like Figure 5 As shown, the second driving circuit 17 of the transient voltage suppression circuit includes: a thirty-fourth resistor R34, a thirty-fifth resistor R35, a thirty-sixth resistor R36, a thirty-seventh resistor R37, a thirty-eighth resistor R38, a thirty-ninth resistor R39, a fortieth resistor R40, a forty-first resistor R41 and a second driving chip U6.
[0056] Further, the first end of the thirty-fourth resistor R34, the first end of the thirty-fifth resistor R35, the first end of the thirty-sixth resistor R36, the first end of the thirty-seventh resistor R37, the first end of the thirty-eighth resistor R38, the first end of the thirty-ninth resistor R39, the first end of the fortieth resistor R40 and the first end of the forty-first resistor R41 are respectively used as input ends of the second drive circuit 17, and the second end of the thirty-fourth resistor R34, the second end of the thirty-fifth resistor R35, the second end of the thirty-sixth resistor R36, the second end of the thirty-seventh resistor R37, the second end of the thirty-eighth resistor R38, the second end of the thirty-ninth resistor R39, the second end of the fortieth resistor R40 and the second end of the forty-first resistor R41 are respectively connected to multiple input ends of the second drive chip U6, and multiple output ends of the second drive chip U6 are respectively used as output ends of the second drive circuit 17.
[0057] like Figure 5As shown, the transient voltage suppression circuit also includes: a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a thirtieth resistor R30, a thirty-first resistor R31, a thirty-second resistor R32, a thirty-third resistor R33 and a digital signal processing unit U7; wherein: the first end of the twenty-sixth resistor R26, the first end of the twenty-seventh resistor R27, the first end of the twenty-eighth resistor R28, the first end of the twenty-ninth resistor R29, the first end of the thirtieth resistor R30 , a first end of the thirty-first resistor R31, a first end of the thirty-second resistor R32, and a first end of the thirty-third resistor R33 are respectively connected to the digital signal processing unit U7; a first end of the twenty-fifth resistor R25 is connected to the first port of the buffer unit 16 and is used to access the auxiliary power supply; a second end of the twenty-fifth resistor R25 is connected to the second port of the buffer unit 16, a second end of the thirty-third resistor R33 is connected to the third port of the buffer unit 16, a second end of the thirty-second resistor R32 is connected to the fourth port of the buffer unit 16, and a first end of the thirty-first resistor R31 is connected to the fourth port of the buffer unit 16. The second end of the 30th resistor R30 is connected to the fifth port of the buffer unit 16, the second end of the 29th resistor R29 is connected to the seventh port of the buffer unit 16, the second end of the 28th resistor R28 is connected to the eighth port of the buffer unit 16, the second end of the 27th resistor R27 is connected to the ninth port of the buffer unit 16, the second end of the 26th resistor R26 is connected to the tenth port of the buffer unit 16, the eleventh port of the buffer unit 16 is connected to the twelfth port of the buffer unit 16 and is used for grounding. The thirteenth port of the impulse unit 16 is connected to the fourteenth port of the buffer unit 16 for accessing the auxiliary power supply, the fifteenth port of the buffer unit 16 is used as the input end of the buffer unit, the sixteenth port of the buffer unit 16, the seventeenth port of the buffer unit 16, the eighteenth port of the buffer unit 16, the nineteenth port of the buffer unit 16, the twentieth port of the buffer unit 16, the twenty-first port of the buffer unit 16, the twenty-second port of the buffer unit 16 and the twenty-third port of the buffer unit 16 are respectively used as the output ends of the buffer unit, and the twenty-fourth port of the buffer unit 16 is used for grounding.
[0058] In the embodiment of the present application, since the enable signal of the buffer unit is valid at a low level, when the OE pin of the buffer unit detects a high level, the drive signal of the inverter unit is immediately turned off. At the same time, U5 receives a high level signal, Q1 is turned on, and a transient voltage is applied to both ends of the varistor or the gas discharge tube. Since the varistor or the gas discharge tube is a nonlinear device and the response time is in the nanosecond level, when the transient voltage value is greater than its own clamping voltage, the nonlinear device is turned on and its own impedance will drop sharply, while absorbing the energy of the transient voltage and suppressing the transient voltage to a lower level.
[0059] When the transient voltage drops to Uac_p min With Uac_n min When the voltage drops below 0.05, Grid_OVP_P or Grid_OVP_N changes from low level to high level, D1 or D2 is turned off, EN_PWM signal outputs low level, and then the buffer unit is enabled, the drive signal returns to normal, Q1 is turned off, and the inverter unit resumes normal operation.
[0060] Further, in an optional embodiment of the present application, the working process of the transient voltage suppression circuit is as follows:
[0061] Step 1: When the photovoltaic PV is turned on, the auxiliary power supply of the transient voltage suppression circuit works. At this time, the power supply of each electrical device in the circuit is provided by the auxiliary power supply.
[0062] Step 2: After connecting to the power grid AC, the system enters the normal working state, and the MOS tube Q1 is turned off; the EN_PWM signal is at a low level, and the buffer unit enables the output of the inverter side drive signal (corresponding to the above-mentioned enable signal).
[0063] Step 3: When the grid-connected port voltage is suddenly disconnected and a transient voltage appears, U1 samples the transient voltage, and U2 and U3 compare and judge the transient voltage. When the transient voltage exceeds the limit value, Grid_OVP_P and Grid_OVP_N output a low level, and EN_PWM outputs a high level. The enable signal of the buffer unit is set high to directly turn off the inverter side drive signal, and at the same time turn on the MOS tube Q1. The transient voltage is directly applied to the varistor or the gas discharge tube. By using the nonlinear characteristics of the device and the nanosecond response capability, the transient voltage can be instantly clamped to meet the grid-connected requirements.
[0064] Step 4: Using the hysteresis comparator composed of U2 and U3, when the transient voltage is less than the set value, the EN_PWM signal is set low, the enable signal of the buffer unit is normal, the MOS tube Q1 is turned off, and the inverter unit returns to normal.
[0065] In combination with the transient voltage suppression circuit and its working process of the embodiment of the present application, it can be seen that the transient voltage suppression solution provided by the present application has the following technical advantages or effects compared with the prior art:
[0066] 1. This application adds nonlinear devices, such as varistors or gas discharge tubes, to the discharge circuit, which can greatly improve the response speed and clamp the transient voltage at a low voltage in nanoseconds, thus meeting the strict requirements of some countries on the transient voltage of the grid-connected port.
[0067] 2. This application samples the transient voltage of the grid-connected port, and uses the fast response advantage of the hardware to shut down the inverter-side drive, and promptly disconnects the bus energy from the path to the grid-connected port, further reducing the transient voltage and improving the safe and stable operation of the inverter unit.
[0068] 3. The present application adopts a combination of the first detection circuit and the second detection circuit, which can greatly reduce the transient voltage, while also avoiding the problem of equipment damage that may be caused by adding nonlinear devices.
[0069] 4. The technical solution of this application is relatively simple, does not require complex control logic and high-precision sensors, reduces the complexity and cost of the system, and has high practical value and broad application prospects.
[0070] According to another aspect of the embodiment of the present application, an inverter device is provided, the inverter device includes the above-mentioned transient voltage suppression circuit, so the inverter device includes all the technical effects of the above-mentioned transient voltage suppression circuit. Since the technical effects of the transient voltage suppression circuit have been described in detail above, they will not be repeated here.
[0071] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.
[0072] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of this application.
[0073] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A transient voltage suppression circuit, characterized in that: include: A sampling circuit, connected to the inverter unit, for sampling the transient voltage appearing at the grid-connected port of the inverter unit; A detection circuit, connected to the sampling circuit, for comparing the transient voltage with a set voltage threshold to generate a first level signal; A level flipping circuit, connected to the detection circuit, and configured to convert the first level signal into a second level signal; A first driving circuit is connected to the level flipping circuit and the discharge circuit connected with a nonlinear device, respectively, and is used to convert the second level signal into a first driving signal to drive the discharge circuit to adjust the switch state; a buffer unit, connected to the level flipping circuit, and configured to convert the second level signal into an enable signal; A second driving circuit is connected to the buffer unit and the inverter unit respectively, and is used to convert the enable signal into a second driving signal to drive the inverter unit to adjust the operating state; Wherein, the discharge circuit is connected to the inverter unit; the nonlinear device is used to suppress the transient voltage appearing on the grid-connected port of the inverter unit when the switch state is on.
2. The transient voltage suppression circuit according to claim 1, characterized in that: The discharge circuit comprises: a first resistor, a second resistor, a MOS tube and the nonlinear device; wherein: The first end of the first resistor is connected to the first drive circuit, the second end of the first resistor is respectively connected to the first end of the second resistor and the gate of the MOS tube, the second end of the second resistor is respectively connected to the first drive circuit, the drain of the MOS tube and the first end of the nonlinear device, and the source of the MOS tube and the second end of the nonlinear device are respectively connected to the inverter unit.
3. The transient voltage suppression circuit according to claim 1, characterized in that: The sampling circuit includes: a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a third capacitor, a fourth capacitor, a fifth capacitor and a first comparator; wherein: The first end of the third resistor and the first end of the fourth resistor are respectively used as the input end of the sampling circuit, the second end of the third resistor is connected to the first end of the sixth resistor, the first end of the sixth resistor is respectively connected to the first end of the eighth resistor, the first end of the fourth capacitor and the non-inverting input end of the first comparator, the second end of the eighth resistor, the second end of the fourth capacitor and the first end of the fifth capacitor are connected to access the auxiliary power supply, the second end of the fifth capacitor is used for grounding, the second end of the fourth resistor is connected to the first end of the fifth resistor, the second end of the fifth resistor is respectively connected to the first end of the seventh resistor, the first end of the third capacitor and the inverting input end of the first comparator, the first end of the ninth resistor is respectively connected to the second end of the seventh resistor, the second end of the third capacitor and the output end of the first comparator, and the first end of the ninth resistor is used as the output end of the sampling circuit.
4. The circuit according to claim 1, characterized in that The detection circuit includes a first detection circuit, and the first detection circuit includes: a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a sixth capacitor, a seventh capacitor and a second comparator; wherein: The first end of the tenth resistor is connected to the first end of the sixth capacitor and is used as the input end of the first detection circuit. The second end of the tenth resistor is connected to the inverting input end of the second comparator. The first end of the eleventh resistor, the first end of the twelfth resistor, the first end of the thirteenth resistor and the first end of the seventh capacitor are connected to access an auxiliary power supply. The second end of the eleventh resistor is connected to the non-inverting input end of the second comparator. The second end of the twelfth resistor, the second end of the sixth capacitor and the second end of the seventh capacitor are connected to ground. The output end of the second comparator, the second end of the thirteenth resistor and the second end of the fourteenth resistor are connected to serve as the output end of the first detection circuit. The first end of the fourteenth resistor is used to access an auxiliary power supply.
5. The transient voltage suppression circuit according to claim 4, characterized in that: The detection circuit further includes a second detection circuit, and the second detection circuit includes: a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, an eighth capacitor, a ninth capacitor and a third comparator; wherein: The first end of the sixteenth resistor is connected to the first end of the eighth capacitor and is used as the input end of the second detection circuit. The second end of the sixteenth resistor is connected to the inverting input end of the third comparator. The first end of the seventeenth resistor, the first end of the eighteenth resistor, the first end of the nineteenth resistor and the first end of the ninth capacitor are connected to access an auxiliary power supply. The second end of the seventeenth resistor is connected to the non-inverting input end of the third comparator. The second end of the eighteenth resistor, the second end of the eighth capacitor and the second end of the ninth capacitor are connected to grounding. The output end of the third comparator, the second end of the fifteenth resistor and the second end of the nineteenth resistor are connected to serve as the output end of the second detection circuit. The first end of the fifteenth resistor is used to access an auxiliary power supply.
6. The transient voltage suppression circuit according to claim 1, characterized in that: The level flipping circuit comprises: a first diode, a second diode, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a tenth capacitor and a fourth comparator; wherein: The cathode of the first diode and the cathode of the second diode are respectively used as the input end of the level flipping circuit, the anode of the first diode, the anode of the second diode and the second end of the twenty-second resistor are respectively connected to the inverting input end of the fourth comparator, the first end of the twenty-second resistor and the first end of the twenty-third resistor are respectively used to connect to the auxiliary power supply, the second end of the twentieth resistor, the first end of the twenty-first resistor and the first end of the tenth capacitor are respectively connected to the non-inverting input end of the fourth comparator, the second end of the twenty-first resistor is connected to the second end of the tenth capacitor and is grounded, and the output end of the fourth comparator is used as the output end of the level flipping circuit.
7. The transient voltage suppression circuit according to claim 1, characterized in that: The first driving circuit includes: a twenty-third resistor, a twenty-fourth resistor, an eleventh capacitor and a first driving chip; wherein: The first end of the twenty-third resistor is connected to the second end of the twenty-fourth resistor and is used as the input end of the first drive circuit. The first end of the twenty-fourth resistor is used for an external auxiliary power supply. The second end of the twenty-third resistor and the first end of the eleventh capacitor are respectively connected to the first input end of the first drive chip. The second end of the eleventh capacitor is connected to the second input end of the first drive chip. The second end of the eleventh capacitor is also used for grounding. The first output end and the second output end of the first drive chip are respectively used as output ends of the first drive circuit.
8. The transient voltage suppression circuit according to claim 1, characterized in that: The second driving circuit includes: a thirty-fourth resistor, a thirty-fifth resistor, a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a fortieth resistor, a forty-first resistor and a second driving chip; wherein: The first end of the thirty-fourth resistor, the first end of the thirty-fifth resistor, the first end of the thirty-sixth resistor, the first end of the thirty-seventh resistor, the first end of the thirty-eighth resistor, the first end of the thirty-ninth resistor, the first end of the fortieth resistor and the first end of the forty-first resistor are respectively used as input ends of the second drive circuit, the second end of the thirty-fourth resistor, the second end of the thirty-fifth resistor, the second end of the thirty-sixth resistor, the second end of the thirty-seventh resistor, the second end of the thirty-eighth resistor, the second end of the thirty-ninth resistor, the second end of the fortieth resistor and the second end of the forty-first resistor are respectively connected to multiple input ends of the second drive chip, and the multiple output ends of the second drive chip are respectively used as output ends of the second drive circuit.
9. The circuit according to any one of claims 1 to 8, characterized in that: Also includes: a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, and a digital signal processing unit; wherein: The first end of the twenty-sixth resistor, the first end of the twenty-seventh resistor, the first end of the twenty-eighth resistor, the first end of the twenty-ninth resistor, the first end of the thirtieth resistor, the first end of the thirty-first resistor, the first end of the thirty-second resistor, and the first end of the thirty-third resistor are respectively connected to the digital signal processing unit; the first end of the twenty-fifth resistor is connected to the first port of the buffer unit and is used to access the auxiliary power supply; the second end of the twenty-fifth resistor is connected to the second port of the buffer unit, the second end of the thirty-third resistor is connected to the third port of the buffer unit, the second end of the thirty-second resistor is connected to the fourth port of the buffer unit, the second end of the thirty-first resistor is connected to the fifth port of the buffer unit, the second end of the 30th resistor is connected to the sixth port of the buffer unit, and the second end of the 20th resistor is connected to the sixth port of the buffer unit. The second end of the ninth resistor is connected to the seventh port of the buffer unit, the second end of the twenty-eighth resistor is connected to the eighth port of the buffer unit, the second end of the twenty-seventh resistor is connected to the ninth port of the buffer unit, the second end of the twenty-sixth resistor is connected to the tenth port of the buffer unit, the eleventh port of the buffer unit is connected to the twelfth port of the buffer unit and is used for grounding, the thirteenth port of the buffer unit is connected to the fourteenth port of the buffer unit and is used for connecting to an auxiliary power supply, the fifteenth port of the buffer unit is used as the input end of the buffer unit, the sixteenth port of the buffer unit, the seventeenth port of the buffer unit, the eighteenth port of the buffer unit, the nineteenth port of the buffer unit, the twentieth port of the buffer unit, the twenty-first port of the buffer unit, the twenty-second port of the buffer unit and the second The thirteen ports are respectively used as output ends of the buffer unit, and the twenty-fourth port of the buffer unit is used for grounding.
10. An inverter device, characterized in that: The inverter device includes the transient voltage suppression circuit according to any one of claims 1 to 9.