Testing device based on single board quality inspection

Abstract

The utility model aims to provide the testing device based on the single board quality inspection, which is low in cost, good in compatibility, wide in function coverage, capable of being repeatedly used and capable of improving the research and development efficiency. The device comprises a test base plate, the test base plate comprises an FPGA control module, a power supply module, an audio output measurement module, a channel switching module, a ripple measurement module, a GPIO control module and a test interface, the power supply module, the audio output measurement module, the ripple measurement module and the GPIO control module are all connected with the FPGA control module, and the channel switching module is connected with the test interface. The FPGA control module is connected with an external upper computer, the channel switching module is connected with the GPIO control module, and the test interface is connected with a single board to be tested. The board card testing device is applied to the technical field of board card testing.

Description

Technical Field

[0001] The utility model is applied to the technical field of board card testing, and particularly relates to a testing device based on single board quality inspection. Background Art

[0002] OQC refers to the quality inspection before product shipment. OQC is a very important link in modern manufacturing. Before shipment, the company needs to inspect the products or equipment shipped. In order to ensure the quality of shipped boards and equipment and control design risks in advance, each project independently designs its own test boards for boards and equipment before shipment. As the company's projects gradually increase, more problems are exposed at the OQC level:

[0003] However, the OQC testing technology in the prior art has the following disadvantages: a large number of test boards, with more than 400 test boards developed each year; tight design time, after engineers have designed the functional boards of the equipment, they have no time to design the test boards due to the tight delivery time, which affects the delivery quality; high cost, each functional board needs to be redesigned with a new test baseboard, the cost of a single set is high, and the reuse rate is low; high error rate, repeated design of test boards easily increases the risk of circuit error rate; long debugging time, each time it is necessary to reorganize the control logic script and rewrite the OQC test program. Therefore, it is necessary to provide a test device based on single-board quality inspection that is low-cost, has good compatibility, covers a wide range of functions, can be reused, and can improve R&D efficiency. Utility Model Content

[0004] The technical problem to be solved by the utility model is to overcome the deficiencies of the prior art and provide a test device based on single board quality inspection which has low cost, good compatibility, wide functional coverage, can be reused, and can improve research and development efficiency.

[0005] The technical solution adopted by the utility model is: the utility model includes a test baseboard, the test baseboard includes an FPGA control module, a power module, an audio output measurement module, a channel switching module, a ripple measurement module, a GPIO control module and a test interface, the power module, the audio output measurement module, the ripple measurement module, and the GPIO control module are all connected to the FPGA control module, the FPGA control module is connected to an external host computer, the channel switching module is connected to the GPIO control module, and the test interface is connected to a single board to be tested.

[0006] It can be seen from the above scheme that the present application has the following advantages:

[0007] 1. Wide versatility: This test system is highly flexible and configurable, and can adapt to the test requirements of a variety of different products or projects, without the need to customize a new test solution for each individual project;

[0008] 2. Reusable: The standardized design enables the test system to be easily applied to other projects after completing one project, avoiding waste of resources while ensuring the consistency and reliability of the test process;

[0009] 3. Wide coverage of functions: The system comprehensively considers and summarizes various testing requirements for the company's finished product quality control, thereby developing a solution that can meet the basic and extended testing requirements of most projects;

[0010] 4. Reduce costs: By centrally developing and maintaining a universal test system, the material cost, labor cost and equipment procurement cost of making dedicated test boards for each independent project can be significantly reduced;

[0011] 5. Improve R&D efficiency: Due to the high degree of standardization and automation of the test system, engineers no longer need to spend a lot of time on test hardware design, test program writing and debugging for each new project, which greatly improves the work efficiency of the entire R&D team and allows them to focus more on the R&D of core product technologies.

[0012] A preferred solution is that the power module includes a first B2B connector, and the POWER_MCU_TX pin and the POWER_MCU_RX pin of the first B2B connector are connected to corresponding pins of the FPGA control module.

[0013] A preferred solution is that the audio output measurement module includes a second B2B connector, and the STARLORD_ pin of the second B2B connector is connected to the corresponding pin of the FPGA control module.

[0014] A preferred solution is that the channel switching module includes a third B2B connector, and a BIT pin of the third B2B connector is connected to a corresponding pin of the GPIO control module.

[0015] A preferred solution is that the ripple measurement module includes a fourth B2B connector, and the RIPPLE_ pin of the fourth B2B connector is connected to the corresponding pin of the FPGA control module.

[0016] A preferred solution is that the GPIO control module includes a fifth B2B connector, and the I0_DRIVER_I2C_SCL pin and the I0_DRIVER_I2C_SDA pin of the fifth B2B connector are connected to corresponding pins of the FPGA control module. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural block diagram of the utility model;

[0018] Figure 2 is a circuit schematic diagram of the first part of the FPGA control module;

[0019] Figure 3 is a circuit schematic diagram of the second part of the FPGA control module;

[0020] Figure 4 is a circuit schematic diagram of the power module;

[0021] Figure 5 is a circuit schematic diagram of the audio output measurement module;

[0022] Figure 6 is a circuit schematic diagram of the channel switching module;

[0023] Figure 7 is a circuit schematic diagram of the ripple measurement module;

[0024] Figure 8 is a circuit schematic diagram of the GPIO control module;

[0025] Fig. 9 is a circuit schematic diagram of the test interface. DETAILED DESCRIPTION

[0026] like Figures 1 to 3 As shown, in this embodiment, the utility model includes a test baseboard 1, which includes an FPGA control module 2, a power module 3, an audio output measurement module 4, a channel switching module 5, a ripple measurement module 6, a GPIO control module 7 and a test interface 8. The power module 3, the audio output measurement module 4, the ripple measurement module 6, and the GPIO control module 7 are all connected to the FPGA control module 2, the FPGA control module 2 is connected to an external host computer, the channel switching module 5 is connected to the GPIO control module 7, and the test interface 8 is connected to the board to be tested.

[0027] The FPGA control module 2 is mainly used to control the digital signal processing of the entire system, such as controlling the operation of each module through IIc and SPI; performing frequency output and measurement of different duty cycles; having II2 and SPI master-slave simulation functions; communicating with an external host computer through a network port; communicating with the single board to be tested and the fixture system to be tested; having TDM master-slave simulation functions; having PDM master-slave simulation functions;

[0028] The power module 3 can provide two adjustable power supplies to the single board to be tested; provide an electronic load interface to measure the power load capacity of the single board to be tested; provide an ADC to measure the voltage of the single board to be tested and the fixture system to be tested; provide an adjustable DAC to provide different voltage excitation sources for the single board to be tested;

[0029] The main function of the audio output measurement module 4 is to provide various test signal sources and excitation sources to the single board to be tested, and can measure the audio signal of the single board to be tested, and analyze the peak-to-peak value, voltage effective value and frequency of the audio signal;

[0030] The channel switching module 5 switches 32 channels of signals to be tested into 1 channel of output through the MUX chip, and measures the voltage for the ADC module;

[0031] The ripple measurement module 6 is used to measure the ripple parameters of the voltage rails on the board to be tested and the system;

[0032] The GPIO control module 7 provides multiple I / O ports through the GPIO expansion chip, and controls the MUX and relays to perform logic switching;

[0033] The test interface 8 integrates various modules and supplies power to the entire system; performs logic switching on various input and output signals; undertakes USB test functions and PD test functions; and provides a test interface for the board to be tested and the system.

[0034] like Figure 4 As shown, in this embodiment, the power module 3 includes a first B2B connector, and the POWER_MCU_TX pin and the POWER_MCU_RX pin of the first B2B connector are connected to the corresponding pins of the FPGA control module 2. The model of the first B2B connector is BCM2571-4001B01B1BB.

[0035] like Figure 5 As shown, in this embodiment, the audio output measurement module 4 includes a second B2B connector, and the STARLORD_ pin of the second B2B connector is connected to the corresponding pin of the FPGA control module 2. The model of the second B2B connector is Audio-005-002.

[0036] like Figure 6 As shown, in this embodiment, the channel switching module 5 includes a third B2B connector, and the BIT pin of the third B2B connector is connected to the corresponding pin of the GPIO control module 7. The model of the third B2B connector is CYG_MUX_32TO1_A01.

[0037] like Figure 7As shown, in this embodiment, the ripple measurement module 6 includes a fourth B2B connector, and the RIPPLE_ pin of the fourth B2B connector is connected to the corresponding pin of the FPGA control module 2. The model of the fourth B2B connector is S_MODULE_TIB.

[0038] like Figure 8 As shown, in this embodiment, the GPIO control module 7 includes a fifth B2B connector, and the I0_DRIVER_I2C_SCL pin and the I0_DRIVER_I2C_SDA pin of the fifth B2B connector are connected to the corresponding pins of the FPGA control module 2. The model of the fifth B2B connector is CYG_IO_DRIVER_A01.

Claims

1. A test device based on single board quality inspection, characterized in that: The invention comprises a test baseboard (1), wherein the test baseboard (1) comprises an FPGA control module (2), a power module (3), an audio output measurement module (4), a channel switching module (5), a ripple measurement module (6), a GPIO control module (7) and a test interface (8), wherein the power module (3), the audio output measurement module (4), the ripple measurement module (6) and the GPIO control module (7) are all connected to the FPGA control module (2), the FPGA control module (2) is connected to an external host computer, the channel switching module (5) is connected to the GPIO control module (7), and the test interface (8) is connected to a single board to be tested.

2. A test device based on single board quality inspection according to claim 1, characterized in that: The power module (3) comprises a first B2B connector, and a POWER_MCU_TX pin and a POWER_MCU_RX pin of the first B2B connector are connected to corresponding pins of the FPGA control module (2).

3. The test device based on single board quality inspection according to claim 1, characterized in that: The audio output measurement module (4) comprises a second B2B connector, and a STARLORD_ pin of the second B2B connector is connected to a corresponding pin of the FPGA control module (2).

4. The test device based on single board quality inspection according to claim 1, characterized in that: The channel switching module (5) comprises a third B2B connector, and a BIT pin of the third B2B connector is connected to a corresponding pin of the GPIO control module (7).

5. The test device based on single board quality inspection according to claim 1, characterized in that: The ripple measurement module (6) comprises a fourth B2B connector, and a RIPPLE_ pin of the fourth B2B connector is connected to a corresponding pin of the FPGA control module (2).

6. The test device based on single board quality inspection according to claim 1, characterized in that: The GPIO control module (7) comprises a fifth B2B connector, and an I0_DRIVER_I2C_SCL pin and an I0_DRIVER_I2C_SDA pin of the fifth B2B connector are connected to corresponding pins of the FPGA control module (2).

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