Communication daughter card shared by multiple hosts and host system

Abstract

The utility model relates to a communication daughter card shared by multiple hosts and a host system. The communication daughter card comprises an FPGA (Field Programmable Gate Array) chip, an MCU (Microprogrammed Control Unit) chip, a connector, a first communication module, an IIC (Inter-Integrated Circuit) module, a first storage unit, a second storage unit, an Ethernet module and a PCIE (Peripheral Component Interconnect Express) communication module, the FPGA chip and the MCU chip are in communication connection through an SPI; the FPAG chip is connected with the second storage unit, and the FPGA chip is connected with the connector through the PCIE communication module, the first communication module and the Ethernet module; the MCU chip is connected with the first storage unit, the MCU chip is connected with the connector through the IIC interface module, and the MCU chip is connected with the connector through the first communication module. The communication daughter card shared by the multiple hosts and the host system have the beneficial effects that the communication daughter card shared by the multiple hosts and the host system which are highly integrated and space-saving are provided, and the problem that network card communication equipment occupies space is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of communication, in particular to a communication sub-card and a host system shared by multiple hosts. Background Art

[0002] The current standard communication network card is used in the form of one network card for each host. The number of network cards required is equal to the number of hosts that need to communicate, and all of them are inserted into the host in the form of a single PCIE gold finger for use.

[0003] The usage of "one host, one network card" requires users to have enough space to accommodate the network card device. It can be barely used when the space requirement is not strict. However, in the fields of aviation and aerospace, which are more sensitive to space, this usage mode occupies the precious space of the equipment, limits the structural design, and cannot add new equipment, which in turn affects the overall design of the aircraft.

[0004] To this end, the utility model provides a communication daughter card and a host system for sharing by multiple hosts. Utility Model Content

[0005] The purpose of the utility model is to overcome the shortcomings of the prior art, provide a highly integrated and space-saving communication daughter card and host system for multiple hosts to share, and solve the problem of space occupation by network card communication equipment.

[0006] The purpose of the utility model is achieved through the following technical solutions:

[0007] In a first aspect of the utility model, a communication daughter card for sharing by multiple hosts comprises an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an Ethernet module and a PCIE communication module;

[0008] The FPGA chip and the MCU chip are connected via SPI communication;

[0009] The FPGA chip is connected to the second storage unit through communication, the FPGA chip is connected to the connector through the PCIE communication module, the FPGA chip is connected to the connector through the first communication module, and the FPGA chip is connected to the connector through the Ethernet module;

[0010] The MCU chip is communicatively connected to the first storage unit, the MCU chip is communicatively connected to the connector via the IIC module, and the MCU chip is communicatively connected to the connector via the first communication module.

[0011] Furthermore, the first communication module is a RS232 serial port communication module or a RS485 serial port communication module.

[0012] Furthermore, the first storage unit is an NVRAM storage chip.

[0013] Furthermore, the second storage unit includes a DDR3 memory and a FLASH memory; the FPGA chip is plugged into the DDR3 memory via a GPIO port, and the FPGA chip is connected to the FLASH memory via a QSPI interface.

[0014] Furthermore, the PCIE communication module at least includes a first PCIE interface and a second PCIE interface; the FPGA chip is connected to the connector via the first PCIE interface; the FPGA chip is connected to the connector via the second PCIE interface, for use.

[0015] Furthermore, the IIC module includes a first IIC interface and a second IIC interface; the MCU chip is connected to the connector through the first IIC interface for sending management signals to the carrier board; the MCU chip is connected to the connector through the second IIC interface for collecting information on the carrier board.

[0016] Furthermore, the carrier board includes a temperature acquisition module and a voltage acquisition module.

[0017] The second aspect of the utility model is a host system shared by multiple hosts, wherein the communication sub-card is plugged and installed on a carrier board, the carrier board is connected to host one through a serial port, an optical port or a USB, and host two is connected to the carrier board through a cable interface; host one, host two and the communication sub-card are communicatively connected, and host one and host two share a network by connecting to the communication sub-card.

[0018] Furthermore, the carrier board also includes a DC-DC&LD0 module, a temperature acquisition module and a voltage acquisition module;

[0019] The DC-DC&LD0 module is connected to the connector; the temperature acquisition module is connected to the MCU chip through the IIC module; and the voltage acquisition module is connected to the MCU chip through the IIC module.

[0020] The utility model has the following advantages:

[0021] The utility model designs a communication daughter card, which is plug-connected with the carrier board and can be detachably installed on the carrier board, so that the communication daughter card can be separately repaired in the form of a unit module; or between the standard parts of the mass-produced equipment, it is avoided that the other parts that can still work normally cannot work due to the damage of one of them, and the parts can be replaced with each other to save costs;

[0022] (2) The utility model adopts a shared network card, i.e., a communication sub-card, which is used by multiple hosts to connect to multiple hosts, and enables multiple hosts to share the network through hardware connection. According to the prior art, if multiple hosts need to share a network, a network card needs to be installed on each host, and then the hosts are connected to a public switch through optical fiber to share the network. In the utility model, host 1 and host 2 directly share a communication sub-card, and can be connected to a network without another network card or an additional switch connection, which reduces the expenditure on network cards, switches and optical fiber cables, and at the same time reduces the space occupied by host equipment, saves the space occupied by equipment, and meets the requirements for special structural space in the aviation and aerospace fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a schematic diagram of the structure of the communication daughter card of the utility model;

[0024] Figure 2 It is a structural schematic diagram of the host system of the utility model. DETAILED DESCRIPTION

[0025] The present invention is further described below in conjunction with the accompanying drawings, but the protection scope of the present invention is not limited to the following description.

[0026] It should be noted that the directions or positional relationships indicated by "left", "right", etc. are based on the directions or positional relationships shown in the accompanying drawings, or are the directions or positional relationships in which the inventive product is usually placed when in use, or are the directions or positional relationships commonly understood by those skilled in the art. Such terms are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0027] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features and technical solutions in the embodiments may be combined with each other.

[0028] like Figure 1-2 As shown, this embodiment proposes a communication daughter card and a host system for multiple hosts to share;

[0029] A first aspect of the present embodiment provides a communication daughter card for sharing by multiple hosts, including an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an Ethernet module, and a PCIE communication module;

[0030] The FPGA chip and the MCU chip are connected via SPI communication; the FPGA chip is connected to the second storage unit, the FPGA chip is connected to the connector via a PCIE communication module, the FPGA chip is connected to the connector via a first communication module, and the FPGA chip is connected to the connector via an Ethernet module; the MCU chip is connected to the first storage unit, and in some preferred embodiments, the first storage unit is an NVRAM storage chip; the MCU chip is connected to the connector via an IIC module, and the MCU chip is connected to the connector via a first communication module, and in some preferred embodiments, the first communication module is an RS232 serial communication module or an RS485 serial communication module, and the Ethernet module uses a 10G Ethernet interface, which is used for the FPGA chip to realize photoelectric signal conversion with the carrier board through the connector.

[0031] The second storage unit includes a DDR3 memory and a FLASH memory; the FPGA chip is plugged into the DDR3 memory via a GPIO port, and the FPGA chip is connected to the FLASH memory via a QSPI interface.

[0032] In some specific embodiments, the PCIE communication module includes a first PCIE interface and a second PCIE interface. The first PCIE interface is controlled by the IP hard core of the FPGA chip, and the FPGA chip is connected to the connector through the first PCIE interface, and is used to realize network communication and data forwarding with the host one; the second PCIE interface is controlled by the IP soft core of the FPGA chip, and the FPGA chip is connected to the connector through the second PCIE interface, and is used to realize network communication and data forwarding with the host two.

[0033] In some specific embodiments, the IIC module includes a first IIC interface and a second IIC interface. The MCU chip is connected to the connector through the first IIC interface and is used to send management signals to the carrier through the connector; the MCU chip is connected to the connector through the second IIC interface and is used to collect electrical signals on the carrier through the connector.

[0034] When working, the communication sub-card is installed on the carrier board; the communication sub-card is designed with unit modules, and the chip and connector, as well as the connector and the carrier board are not fixedly connected, and can be detachably installed on the carrier board, so that the communication sub-card can be separately inspected and repaired in the form of unit modules; or between standard parts equipment produced in batches, in order to avoid that damage to one of them will cause other parts that can still work normally to stop working, they can be installed interchangeably to save costs.

[0035] A second aspect of this embodiment provides a host system for multiple hosts to share, such as Figure 2As shown, the host system includes host 1, host 2, a carrier board and the communication sub-card shared by multiple hosts as described in the first aspect of this embodiment; the communication sub-card is plugged and installed on the carrier board, the carrier board is connected to host 1 through a serial port, an optical port or a USB, and the host 2 is connected to the carrier board through a cable interface. In some implementations, the carrier board is connected to host 2 by leading out a slim Sas interface; host 1, host 2 and the communication sub-card are communicatively connected, and host 1 and host 2 share a network by connecting to the communication sub-card.

[0036] In some embodiments, the carrier includes a DC-DC&LD0 module, a temperature acquisition module and a voltage acquisition module; the DC-DC&LD0 module is connected to the connector, and the DC-DC&LD0 module is used to step down and stabilize the power supply voltage, and provide a stable operating voltage for the FPGA through the connector; the temperature acquisition module is connected to the MCU chip through the IIC module; the voltage acquisition module is connected to the MCU chip through the IIC module, and the MCU chip obtains information from the temperature acquisition module and the voltage acquisition module through XX, which is used to monitor the working status of the carrier.

[0037] When working, this embodiment connects multiple hosts through the communication daughter card, such as Figure 2 As shown, the communication daughter card is installed on the carrier board, and the carrier board is installed on the host one through a serial port, optical port or USB plug-in, which is used to realize network communication for the host one; the carrier board is connected to the host two by leading out a slim Sas interface, which is used to provide network communication for the host two; at this time, both the host one and the host two are connected to the communication daughter card through the carrier board, and share the network through the communication daughter card. For the prior art, Figure 2 As shown, a common network card 1 is installed on host three, and a common network card 2 is installed on host four. Host three and host four are connected to the switch through optical fiber cables. At this time, host three and host four are connected to the same network, but host three and host four each use a network card. With the utility model, host one and host two directly share a communication daughter card, and can be connected to a network without another network card or an additional switch connection, that is, the expenditure on network cards, switches and optical fiber cables is reduced, and the cost is reduced. A simple structure is achieved, and the space occupied by the equipment is reduced.

[0038] The above embodiments only express the preferred implementation modes, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent of the utility model. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the utility model, and these all belong to the protection scope of the utility model.

Claims

1. A communication daughter card for sharing by multiple hosts, characterized in that: It includes an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an Ethernet module and a PCIE communication module; The FPGA chip and the MCU chip are connected via SPI communication; The FPGA chip is connected to the second storage unit through communication, the FPGA chip is connected to the connector through the PCIE communication module, the FPGA chip is connected to the connector through the first communication module, and the FPAGA chip is connected to the connector through the Ethernet module; The MCU chip is communicatively connected to the first storage unit, the MCU chip is communicatively connected to the connector via the IIC module, and the MCU chip is communicatively connected to the connector via the first communication module.

2. A communication daughter card for sharing by multiple hosts according to claim 1, characterized in that: The first communication module is an RS232 serial communication module or an RS485 serial communication module.

3. A communication daughter card for sharing by multiple hosts according to claim 1, characterized in that: The first storage unit is an NVRAM storage chip.

4. A communication daughter card for sharing by multiple hosts according to claim 1, characterized in that: The second storage unit includes a DDR3 memory and a FLASH memory; the FPGA chip is plugged into the DDR3 memory via a GPIO port, and the FPGA chip is connected to the FLASH memory via a QSPI interface.

5. The communication daughter card for sharing by multiple hosts according to claim 1, characterized in that: The PCIE communication module includes a first PCIE interface and a second PCIE interface; the FPGA chip is connected to the connector via the first PCIE interface; and the FPGA chip is connected to the connector via the second PCIE interface.

6. A communication daughter card for sharing by multiple hosts according to claim 1, characterized in that: The IIC module includes a first IIC interface and a second IIC interface; the MCU chip is connected to the connector via the first IIC interface; and the MCU chip is connected to the connector via the second IIC interface.

7. A host system for sharing by multiple hosts, characterized in that: It comprises a host 1, a host 2, a carrier board and a communication sub-card for sharing by multiple hosts as described in any one of claims 1 to 6; the communication sub-card is plugged and installed on the carrier board, the carrier board is connected to the host 1, and the host 2 is connected to the carrier board through a cable interface; the host 1, the host 2 and the communication sub-card are in communication connection.

8. A host system for sharing among multiple hosts according to claim 7, characterized in that: The carrier board includes a DC-DC&LD0 module, a temperature acquisition module and a voltage acquisition module; The DC-DC&LD0 module is connected to the connector; the temperature acquisition module is connected to the MCU chip; and the voltage acquisition module is connected to the MCU chip.

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