Surge voltage suppression circuit with under-voltage protection function

Abstract

The utility model provides a surge voltage suppression circuit with an under-voltage protection function, the surge voltage suppression circuit with the under-voltage protection function comprises a comparison circuit, a reference circuit and a control circuit, the comparison circuit comprises a comparator U1, and a normal phase input end of the comparator U1 is electrically connected with a sampling circuit; the inverting input end of the comparator U1 is electrically connected with the reference circuit; the output end of the comparator U1 is electrically connected with the control circuit. According to the technical scheme, by arranging the comparison circuit, the reference circuit and the control circuit, under-voltage protection of the surge suppression circuit is achieved, and the surge suppression circuit is protected from being burnt out when the input voltage is under-voltage.

Description

Background Art

[0002] In a complete system, the power input of the surge suppressor is 8V~32V, the output voltage is required to be 8V~32V, and the output current is 10A. The original design uses the chip LT4363 to control four N-type MOS tubes to achieve surge protection. However, in actual applications, it is found that the input undervoltage protection point of the DC / DC converter at the rear stage is 6V, and the surge suppressor does not have the undervoltage protection function. The rear stage DC / DC works at the low end of 6V. At this time, the input current is large, and it is easy to overcurrent and burn the main clamping MOS tube of the surge suppressor. The main reason for this phenomenon is that the surge suppressor has no undervoltage protection function. At the same time, the actual requirement is that the surge suppressor starts working when the input low end is at least 8V. Summary of the invention

[0003] The present application provides a surge voltage suppression circuit with an undervoltage protection function, which is used to protect the surge suppression circuit from being burned out when the input voltage is undervoltage.

[0004] The present application provides a surge voltage suppression circuit with undervoltage protection function, including a comparison circuit, a reference circuit and a control circuit, wherein:

[0005] The comparison circuit includes a comparator U1, wherein:

[0006] The non-inverting input terminal of the comparator U1 is electrically connected to the sampling circuit;

[0007] The inverting input terminal of the comparator U1 is electrically connected to the reference circuit;

[0008] The output end of the comparator U1 is electrically connected to the control circuit.

[0009] In the above technical solution, undervoltage protection of the surge suppression circuit is achieved, and the surge suppression circuit is protected from being burned out when the input voltage is undervoltage.

[0010] In a specific implementation scheme, the control circuit includes a first transistor Q1, wherein:

[0011] The output end of the comparator U1 is electrically connected to the base of the first transistor Q1.

[0012] In a specific implementation scheme, the control circuit further includes a diode D1 and a third voltage regulator tube Z3, wherein:

[0013] The conducting end of the diode D1 is electrically connected to the collector of the first transistor Q1, and the cutting-off end of the diode D1 is electrically connected to the base of the first transistor Q1;

[0014] One end of the third voltage regulator tube Z3 is electrically connected to the emitter of the first transistor Q1, and the other end of the third voltage regulator tube Z3 is grounded.

[0015] In a specific implementation scheme, the reference circuit includes a reference source U2, wherein:

[0016] The inverting input terminal of the comparator U1 is electrically connected to the reference source U2.

[0017] In a specific implementation scheme, the reference circuit further includes a fifth resistor R5, wherein:

[0018] One end of the fifth resistor R5 is electrically connected to the inverting input terminal of the comparator U1 , and the other end of the fifth resistor R5 is electrically connected to the voltage input terminal +Vin.

[0019] In a specific implementation scheme, the reference source U2 adopts TL431.

[0020] In a specific implementation scheme, the comparison circuit further includes a sixth resistor R6 and a seventh resistor R7, wherein:

[0021] The sixth resistor R6 is electrically connected between the non-inverting input terminal of the comparator U1 and the output terminal of the comparator U1;

[0022] One end of the seventh resistor R7 is electrically connected to the output end of the comparator U1 , and the other end of the seventh resistor R7 is electrically connected to the VCC input end of the comparator U1 .

[0023] In a specific implementation scheme, the sampling circuit includes a third resistor R3, a fourth resistor R4, a third capacitor C3 and a second voltage regulator Z2, wherein:

[0024] The first end of the third resistor R3 is electrically connected to the voltage input terminal +Vin, the second end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is grounded;

[0025] The third capacitor C3 and the second voltage regulator Z2 are both connected in parallel with the fourth resistor R4.

[0026] In a specific embodiment, it also includes a power supply circuit, wherein,

[0027] The power supply circuit is electrically connected to the VCC input terminal of the comparator U1.

[0028] In a specific embodiment, it also includes a startup delay circuit, wherein,

[0029] The startup delay circuit is connected in parallel with the third voltage regulator tube Z3. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A circuit diagram of a surge voltage suppression circuit with undervoltage protection function provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The present application is further described in detail below through the accompanying drawings and embodiments. Through these descriptions, the characteristics and advantages of the present application will become clearer and more specific.

[0032] The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. Although various aspects of the embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless otherwise noted.

[0033] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0034] To facilitate understanding of the surge voltage suppression circuit with undervoltage protection function provided in the embodiment of the present application, its application scenario is first explained. The surge voltage suppression circuit with undervoltage protection function provided in the embodiment of the present application is used to protect the surge suppression circuit from being burned when the input voltage is undervoltage, and it is applied to the surge suppression circuit. In a complete system, the power input of the surge suppressor is 8V~32V, the output voltage is required to be 8V~32V, and the output current is 10A. The original design is to use the chip LT4363 to control four N-type MOS tubes to achieve surge protection. However, it is found in actual applications that the input undervoltage protection point of the DC / DC converter of the rear stage is 6V, and the surge suppressor does not have an undervoltage protection function. The rear stage DC / DC works at the low end of 6V. At this time, the input current is large, and it is easy to overcurrent and burn the main clamping MOS tube of the surge suppressor. The main reason for this phenomenon is that the surge suppressor has no undervoltage protection function, and the actual demand is that the surge suppressor starts to work when the input low end is at least 8V. To this end, the embodiment of the present application provides a surge voltage suppression circuit with an undervoltage protection function to protect the surge suppression circuit from being burned out when the input voltage is undervoltage. The following is a detailed description of the embodiment in conjunction with specific drawings.

[0035] refer to Figure 1 , Figure 1 A circuit diagram of a surge voltage suppression circuit with undervoltage protection function provided in an embodiment of the present application. Figure 1 In the embodiment of the present application, a surge voltage suppression circuit with an undervoltage protection function is provided, including a comparison circuit, a reference circuit and a control circuit, wherein:

[0036] The comparison circuit includes a comparator U1, wherein:

[0037] The non-inverting input terminal of the comparator U1 is electrically connected to the sampling circuit;

[0038] The inverting input terminal of the comparator U1 is electrically connected to the reference circuit;

[0039] The output end of the comparator U1 is electrically connected to the control circuit.

[0040] In the above technical solution, by setting a comparison circuit, a reference circuit and a control circuit, wherein the comparison circuit includes a comparator U1, the non-phase input terminal of the comparator U1 is electrically connected to the sampling circuit; the inverting input terminal of the comparator U1 is electrically connected to the reference circuit; the output terminal of the comparator U1 is electrically connected to the control circuit. Undervoltage protection of the surge suppression circuit is achieved, and the surge suppression circuit is protected from being burned when the input voltage is undervoltage.

[0041] In a specific implementation scheme, the control circuit includes a first transistor Q1, wherein:

[0042] The output end of the comparator U1 is electrically connected to the base of the first transistor Q1.

[0043] In a specific implementation scheme, the control circuit further includes a diode D1 and a third voltage regulator tube Z3, wherein:

[0044] The conducting end of the diode D1 is electrically connected to the collector of the first transistor Q1, and the cutting-off end of the diode D1 is electrically connected to the base of the first transistor Q1;

[0045] One end of the third voltage regulator tube Z3 is electrically connected to the emitter of the first transistor Q1, and the other end of the third voltage regulator tube Z3 is grounded.

[0046] In the above technical solution, the control circuit includes a first transistor Q1, a diode D1 and a third voltage regulator Z3. When the comparator U1 outputs a high level, the first transistor Q1 is turned off, at which time the voltage of the undervoltage protection pin of the subsequent chip is at a high level, and the chip works normally; when the comparator U1 outputs a low level, the first transistor Q1 is turned on, at which time the voltage of the undervoltage protection pin of the subsequent chip is pulled to the ground, and the chip is turned off. The diode D1 accelerates the saturation of the first transistor Q1 and enters the off state. The third voltage regulator Z3 serves to stabilize the voltage of the undervoltage pin of the subsequent chip to prevent overvoltage from damaging the pin.

[0047] In the above technical solution, the peripheral circuit of the undervoltage protection pin of the surge suppressor is modified, and the peripheral control circuit of the chip undervoltage protection pin is formed by using resistors, capacitors, comparators and voltage reference sources, forming a complete undervoltage protection circuit with feedback regulation; when the input voltage is lower than 8V, the control chip of the surge suppressor is turned off, thereby achieving the purpose of protecting the surge suppressor from being burned out.

[0048] In a specific implementation scheme, the reference circuit includes a reference source U2, wherein:

[0049] The inverting input terminal of the comparator U1 is electrically connected to the reference source U2.

[0050] In a specific implementation scheme, the reference circuit further includes a fifth resistor R5, wherein:

[0051] One end of the fifth resistor R5 is electrically connected to the inverting input terminal of the comparator U1 , and the other end of the fifth resistor R5 is electrically connected to the voltage input terminal +Vin.

[0052] In a specific implementation scheme, the reference source U2 adopts TL431.

[0053] In the above technical solution, the reference source U2 adopts TL431, whose accuracy can reach up to 0.5%, and will generate a 2.495V regulated voltage reference, which is provided to the inverting input terminal of the comparator U1, thereby realizing precise control of the startup threshold voltage.

[0054] It should be noted that TL431 is a three-terminal adjustable shunt reference source and a shunt regulator integrated circuit with good thermal stability. Its output voltage can be set arbitrarily with two resistors. In addition, the typical dynamic impedance of TL431 is 0.2Ω, so it can be used to replace the Zener diode in many applications.

[0055] The main features of TL431 include adjustable output voltage, high accuracy and good dynamic performance. Its output voltage accuracy can reach ±2% or higher, which can meet the needs of some power supply applications that require precise control. In addition, the dynamic response speed of TL431 is fast, and the output voltage can be adjusted quickly when the power load changes, thereby maintaining the stable output of the power supply. In practical applications, TL431 is often used as a reference voltage source or error amplifier for output voltage feedback control of power supply circuits to achieve stable output of the power supply. In addition, it can also be used in the design of overvoltage protection circuits.

[0056] In a specific implementation scheme, the comparison circuit further includes a sixth resistor R6 and a seventh resistor R7, wherein:

[0057] The sixth resistor R6 is electrically connected between the non-inverting input terminal of the comparator U1 and the output terminal of the comparator U1;

[0058] One end of the seventh resistor R7 is electrically connected to the output end of the comparator U1 , and the other end of the seventh resistor R7 is electrically connected to the VCC input end of the comparator U1 .

[0059] In the above technical solution, the comparison circuit includes a comparator U1, a sixth resistor R6 and a seventh resistor R7. The comparator U1 is a comparator with an open collector output. The voltage provided to the in-phase input terminal by the sampling circuit is compared with the reference voltage. When the input voltage is higher than the start threshold, the comparator U1 outputs a high level, the first transistor Q1 is turned on, the undervoltage protection pin of the subsequent chip is at a high level, and the subsequent chip is in a normal working state. The sixth resistor R6 serves as a feedback loop of the comparator. When the comparator U1 outputs a low level, the sixth resistor R6 is connected in parallel with the fourth resistor R4 to reduce the voltage division ratio of the third resistor R3 and the fourth resistor R4; when the comparator outputs a high level, the sixth resistor R6 is connected in parallel with the third resistor R3 to increase the voltage division ratio of the third resistor R3 and the fourth resistor R4. When the input voltage reaches the start threshold voltage, the comparator U1 outputs a high level, which acts on the in-phase input terminal through positive feedback, thereby avoiding the situation of false triggering and shutdown due to the jitter of the input voltage. In steady state, due to the increase in the voltage divider ratio of the third resistor R3 and the fourth resistor R4, the input voltage needs to reach a voltage value lower than the start threshold voltage, so that the comparator U1 will flip and output a low level, that is, the shutdown threshold is lower than the start threshold, and the hysteresis function is realized. The seventh resistor R7 is used as a pull-up resistor of the comparator U1, which is a pull-up resistor that must be provided at the output end of the open collector comparator.

[0060] In a specific implementation scheme, the sampling circuit includes a third resistor R3, a fourth resistor R4, a third capacitor C3 and a second voltage regulator Z2, wherein:

[0061] The first end of the third resistor R3 is electrically connected to the voltage input terminal +Vin, the second end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is grounded;

[0062] The third capacitor C3 and the second voltage regulator Z2 are both connected in parallel with the fourth resistor R4.

[0063] In the above technical solution, the sampling circuit sets the ratio of the third resistor R3 to the fourth resistor R4 so that when the comparator U1 works at the low end, the voltage at the in-phase input terminal is exactly equal to the voltage at the reverse input terminal; the third capacitor C3 is added to prevent the in-phase input terminal voltage from being unstable and causing output oscillation when the comparator U1 works at the low end, and can also be used to filter out noise and ensure the stability of the in-phase input terminal signal; the second voltage regulator Z2 is added to stabilize the voltage at this point during an overvoltage surge.

[0064] In a specific implementation scheme, a power supply circuit is further included, wherein the power supply circuit is electrically connected to the VCC input terminal of the comparator U1.

[0065] Specifically, the power supply circuit includes a first resistor R1, a second resistor R2, an eleventh resistor R11, a second capacitor C2 and a first voltage regulator tube Z1, wherein:

[0066] The first end of the first resistor R1 is electrically connected to the voltage input terminal +Vin, the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded;

[0067] The second capacitor C2 and the first voltage regulator Z1 are both connected in parallel with the second resistor R2;

[0068] One end of the eleventh resistor R11 is electrically connected to a common connection point of the first resistor R1 and the second resistor R2 , and the other end of the eleventh resistor R11 is electrically connected to a VCC input terminal of the comparator U1 .

[0069] In the above technical solution, the power supply circuit provides a stable VCC voltage by setting the ratio of the first resistor R1 and the second resistor R2, provides power for the comparator U1, and serves as a pull-up VCC for the first transistor Q1; the second capacitor C2 is added to filter out noise to better stabilize the VCC voltage; the first voltage regulator Z1 is added to stabilize the voltage at this point during an overvoltage surge, and the resistor R11 mainly functions to limit the current to protect the comparator U1, the first transistor Q1 and the undervoltage protection pin of the subsequent chip.

[0070] In a specific embodiment, it also includes a startup delay circuit, wherein,

[0071] The startup delay circuit is connected in parallel with the third voltage regulator tube Z3.

[0072] Specifically, the startup delay circuit includes a fourth capacitor C4 and a tenth resistor R10, wherein:

[0073] The fourth capacitor C4 is connected in series with the tenth resistor R10 and then connected in parallel with the third voltage regulator tube Z3.

[0074] In the above technical solution, the startup delay circuit includes a fourth capacitor C4 and a tenth resistor R10. When the comparator U1 outputs a high level, the VCC voltage charges the fourth capacitor C4, so that the undervoltage foot voltage of the subsequent chip rises slowly. When the voltage rises to the undervoltage foot startup voltage, the subsequent chip starts to work. The period of time during which the fourth capacitor C4 is charged is the startup delay time of the circuit.

[0075] Specifically, a ninth resistor R9 is further included, wherein one end of the ninth resistor R9 is electrically connected to the emitter of the first transistor Q1 , and the other end of the ninth resistor R9 is electrically connected to the VCC input terminal of the comparator U1 .

[0076] The surge voltage suppression circuit with undervoltage protection function provided in the embodiment of the present application can be widely used in various surge suppressor circuits. The emitter of the first transistor Q1 can be connected to the enable pin and undervoltage pin of the chip, and can also be connected to the power supply of the subsequent circuit, so as to achieve undervoltage shutdown protection and avoid overcurrent burning of power devices.

[0077] Those skilled in the art will appreciate that the present application may be implemented as a system, method or computer program product.

[0078] Therefore, the present disclosure may be specifically implemented in the following forms, namely: it may be completely hardware, it may be completely software (including firmware, resident software, microcode, etc.), or it may be a combination of hardware and software, generally referred to herein as a "circuit", "module" or "system". In addition, in some embodiments, the present application may also be implemented in the form of a computer program product in one or more computer-readable media, and the computer-readable medium may contain computer-readable program code.

[0079] Any combination of one or more computer-readable media can be used. Computer-readable media can be computer-readable signal media or computer-readable storage media. Computer-readable storage media can be, for example, but not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or devices, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: electrical connections with one or more wires, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above. In this document, computer-readable storage media can be any tangible medium containing or storing a program, which can be used by an instruction execution system, device or device or used in combination with it.

[0080] Although the embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art can change, modify, replace and modify the above embodiments within the scope of the present application. On this basis, a variety of replacements and improvements can be made to the present application, all of which fall within the scope of protection of the present application.

Claims

1. A surge voltage suppression circuit with undervoltage protection function, characterized in that: It includes a comparison circuit, a reference circuit and a control circuit, wherein: The comparison circuit includes a comparator U1, wherein: The non-inverting input terminal of the comparator U1 is electrically connected to the sampling circuit; The inverting input terminal of the comparator U1 is electrically connected to the reference circuit; The output end of the comparator U1 is electrically connected to the control circuit.

2. The surge voltage suppression circuit with undervoltage protection function according to claim 1, characterized in that: The control circuit includes a first transistor Q1, wherein: The output end of the comparator U1 is electrically connected to the base of the first transistor Q1.

3. The surge voltage suppression circuit with undervoltage protection function according to claim 2, characterized in that: The control circuit also includes a diode D1 and a third voltage regulator tube Z3, wherein: The conducting end of the diode D1 is electrically connected to the collector of the first transistor Q1, and the cutting-off end of the diode D1 is electrically connected to the base of the first transistor Q1; One end of the third voltage regulator tube Z3 is electrically connected to the emitter of the first transistor Q1, and the other end of the third voltage regulator tube Z3 is grounded.

4. The surge voltage suppression circuit with undervoltage protection function according to claim 1, characterized in that: The reference circuit includes a reference source U2, wherein: The inverting input terminal of the comparator U1 is electrically connected to the reference source U2.

5. The surge voltage suppression circuit with undervoltage protection function according to claim 4, characterized in that: The reference circuit further includes a fifth resistor R5, wherein: One end of the fifth resistor R5 is electrically connected to the inverting input terminal of the comparator U1 , and the other end of the fifth resistor R5 is electrically connected to the voltage input terminal +Vin.

6. The surge voltage suppression circuit with undervoltage protection function according to claim 4, characterized in that: The reference source U2 adopts TL431.

7. The surge voltage suppression circuit with undervoltage protection function according to claim 1, characterized in that: The comparison circuit further includes a sixth resistor R6 and a seventh resistor R7, wherein: The sixth resistor R6 is electrically connected between the non-inverting input terminal of the comparator U1 and the output terminal of the comparator U1; One end of the seventh resistor R7 is electrically connected to the output end of the comparator U1 , and the other end of the seventh resistor R7 is electrically connected to the VCC input end of the comparator U1 .

8. The surge voltage suppression circuit with undervoltage protection function according to claim 1, characterized in that: The sampling circuit includes a third resistor R3, a fourth resistor R4, a third capacitor C3 and a second voltage regulator Z2, wherein: The first end of the third resistor R3 is electrically connected to the voltage input terminal +Vin, the second end of the third resistor R3 is electrically connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is grounded; The third capacitor C3 and the second voltage regulator Z2 are both connected in parallel with the fourth resistor R4.

9. The surge voltage suppression circuit with undervoltage protection function according to claim 1, characterized in that: Also included is a power supply circuit, wherein The power supply circuit is electrically connected to the VCC input terminal of the comparator U1.

10. The surge voltage suppression circuit with undervoltage protection function according to claim 3, characterized in that: Also included is a startup delay circuit, wherein The startup delay circuit is connected in parallel with the third voltage regulator tube Z3.

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