Oscillation circuit, chip and electronic device

Abstract

The utility model relates to the technical field of circuits, in particular to an oscillating circuit, a chip and electronic equipment. The circuit comprises a main inductor, a first cross coupling differential circuit and a second cross coupling differential circuit, the main inductor is connected in parallel with the first cross-coupling differential circuit and the second cross-coupling differential circuit. The main inductor comprises four single-circle inductors which are connected in parallel, and the effects of reducing power consumption and improving phase noise are achieved under the condition that the quality factor of the main inductor is not affected.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, and in particular to an oscillating circuit, a chip and an electronic device. Background Art

[0002] The current 5G high-speed mobile Internet era has put forward strict requirements on the phase noise, power consumption and layout area of ​​wireless communication systems. Since the oscillation circuit is an important part of the wireless communication system, it determines the phase noise level of the entire communication system. Therefore, it is very important to design an oscillation circuit with low power consumption and low noise at high frequency.

[0003] At present, the size of phase noise is proportional to the inductance value and inversely proportional to the quality factor value of the inductor. Therefore, the inductor in the oscillation circuit needs to be designed in the direction of smaller inductance and higher quality factor. Most of the related technologies reduce the inductance value by reducing the area of ​​the inductor to meet the demand for improving phase noise, but reducing the area of ​​the inductor will greatly deteriorate the quality factor of the inductor. At the same time, in the oscillation circuit in the related technology at twice the resonant frequency, the current will flow from the differential pair tube to the ground, which will lead to a decrease in the quality factor of the inductor and worsen the phase noise. In addition, the efficiency of the oscillation circuit in converting DC current to the first-order resonant frequency current is low, which will also lead to higher power consumption. Utility Model Content

[0004] The utility model provides an oscillating circuit, a chip and an electronic device, the main purpose of which is to reduce the power consumption of the oscillating circuit and improve the phase noise without affecting the inductor quality factor.

[0005] According to a first aspect of the utility model, an oscillation circuit is provided, the oscillation circuit comprising: a main inductor, a first cross-coupled differential circuit and a second cross-coupled differential circuit;

[0006] The main inductor is connected in parallel with the first cross-coupled differential circuit and the second cross-coupled differential circuit respectively;

[0007] The main inductor consists of four single-turn inductors connected in parallel.

[0008] Optionally, the oscillation circuit further includes a first common-mode resonant circuit and a second common-mode resonant circuit, the first common-mode resonant circuit is connected to the first cross-coupled differential circuit through a first common-mode connection port, and the second common-mode resonant circuit is connected to the second cross-coupled differential circuit through a second common-mode connection port;

[0009] The first common mode resonant circuit includes a first common mode inductor, the second common mode resonant circuit includes a second common mode inductor, the first common mode inductor and / or the second common mode inductor includes two single-turn inductors, and the electromagnetic waves generated by the two single-turn inductors cancel each other out.

[0010] Optionally, the first common-mode inductor and / or the second common-mode inductor is an 8-shaped common-mode inductor.

[0011] Optionally, the first common-mode inductor and the second common-mode inductor are symmetrically arranged in a closed area formed by four single-turn inductors of the main inductor.

[0012] Optionally, the first common-mode resonant circuit further includes a first capacitor, and the first common-mode inductor is connected to the first capacitor;

[0013] The second common mode resonant circuit also includes a second capacitor, and the second common mode inductor is connected to the second capacitor;

[0014] The first ends of the first common-mode inductor and the first capacitor are connected to the first common-mode connection port, and the second ends of the first common-mode inductor and the first capacitor are connected to the voltage port;

[0015] The first ends of the second common-mode inductor and the second capacitor are connected to the second common-mode connection port, and the second ends of the second common-mode inductor and the second capacitor are grounded.

[0016] Optionally, the oscillation circuit further includes an adjustable transistor;

[0017] The source of the adjustable transistor is connected to the voltage port, and the gate of the adjustable transistor is connected to the power supply voltage.

[0018] Optionally, the first cross-coupled differential circuit includes a first transistor of a first type and a second transistor of a first type;

[0019] a second cross-coupled differential circuit comprising a third transistor of the second type and a fourth transistor of the second type;

[0020] Sources of the first transistor and the second transistor are connected to the first common mode connection port, and sources of the third transistor and the fourth transistor are connected to the second common mode connection port.

[0021] Optionally, the gate of the first transistor is connected to the second end of the main inductor, and the drain of the first transistor is connected to the first end of the main inductor;

[0022] The gate of the fourth transistor is connected to the first end of the main inductor, and the drain of the third transistor is connected to the second end of the main inductor.

[0023] Optionally, the oscillation circuit further includes a parameter adjustment circuit, and the parameter adjustment circuit is connected in parallel with the main inductor.

[0024] Optionally, the parameter adjustment circuit includes a first branch, and the first branch includes a first diode and a second diode connected in series;

[0025] a second branch, the second branch comprising a third diode and a fourth diode connected in series;

[0026] A third branch, the third branch includes a first resistor and a second resistor connected in series;

[0027] The first branch, the second branch and the third branch are connected in parallel and in series with the first capacitor and the second capacitor.

[0028] Optionally, the oscillation circuit further includes a capacitor switch array;

[0029] The capacitive switch array includes at least one capacitive switch circuit, and two ends of the at least one capacitive switch circuit are respectively connected to the parameter adjustment circuit and the second cross-coupling differential circuit.

[0030] Optionally, at least one capacitor switch circuit includes a third capacitor, a fourth capacitor and a fifth transistor;

[0031] The third capacitor is connected to the source of the fifth transistor, and the fourth capacitor is connected to the gate of the fifth transistor;

[0032] The third capacitor is connected to the first capacitor, and the fourth capacitor is connected to the drains of the third transistor and the fourth transistor.

[0033] According to a second aspect of the present invention, a chip is provided. The chip includes the oscillation circuit described in any one of the first aspects.

[0034] According to a third aspect of the present invention, a chip is provided, the chip comprising a first region and a second region,

[0035] The first area is used to arrange the main inductor composed of four single-turn inductors connected in parallel, and the first area is an octagonal closed area;

[0036] The second region is used to arrange the first cross-coupled differential circuit and the second cross-coupled differential circuit. The main inductor is connected in parallel with the first cross-coupled differential circuit and the second cross-coupled differential circuit respectively. The second region is chain-shaped in the first direction and is centrally arranged in the first region.

[0037] Optionally, the chip also includes a third area, the third area is used to arrange the first common-mode resonant circuit and the second common-mode resonant circuit, the third area is symmetrically arranged in the first area in the second direction, the first common-mode resonant circuit includes a first common-mode inductor, the second common-mode resonant circuit includes a second common-mode inductor, the first common-mode inductor and the second common-mode inductor include two single-turn inductors, and the electromagnetics generated by the two single-turn inductors cancel each other out.

[0038] According to a fourth aspect of the utility model, an electronic device is provided, comprising the oscillation circuit described in any one of the first aspects, or the chip described in any one of the second aspects, or the chip described in any one of the third aspects.

[0039] In summary, in one or more embodiments of the utility model, through the main inductor, the first cross-coupled differential circuit and the second cross-coupled differential circuit in the oscillation circuit structure disclosed in the present invention; the main inductor is respectively connected in parallel with the first cross-coupled differential circuit and the second cross-coupled differential circuit; the main inductor includes four single-turn inductors connected in parallel, so as to achieve the effect of reducing power consumption and improving phase noise without affecting the quality factor of the main inductor.

[0040] Additional aspects and advantages of the present invention will be given in part in the following description and in part will become apparent from the following description or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0042] Figure 1 A schematic diagram of a radio frequency transceiver is provided for a specific application scenario of the embodiment of the utility model;

[0043] Figure 2 A schematic diagram of the structure of an oscillation circuit provided by an embodiment of the utility model;

[0044] Figure 3 A schematic diagram of a main inductor provided by an embodiment of the utility model as a flower-shaped inductor;

[0045] Figure 4 A schematic diagram of a specific oscillation circuit provided in an embodiment of the utility model;

[0046] Figure 5 A schematic diagram of a chip provided by an embodiment of the utility model;

[0047] Figure 6 A schematic diagram of a chip provided by an embodiment of the utility model;

[0048] Figure 7 A schematic diagram of a specific chip provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0049] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. On the contrary, the embodiments of the present invention include all changes, modifications and equivalents that fall within the spirit and connotation of the appended claims.

[0050] The current 5G high-speed mobile Internet era has put forward strict requirements on the phase noise, power consumption and layout area of ​​wireless communication systems. As an important part of the wireless communication system, the oscillation circuit determines the phase noise level of the entire communication system. Therefore, it is crucial to design an oscillation circuit with low power consumption and low noise at high frequency.

[0051] At present, the size of phase noise is proportional to the inductance value and inversely proportional to the quality factor value of the inductor. Therefore, the inductor in the oscillation circuit needs to be designed in the direction of smaller inductance and higher quality factor. Most of the related technologies reduce the inductance value by reducing the area of ​​the inductor to meet the demand for improving phase noise, but reducing the area of ​​the inductor will greatly deteriorate the quality factor of the inductor. At the same time, in the oscillation circuit in the related technology at twice the resonant frequency, the current will flow from the differential pair tube to the ground, which will lead to a decrease in the quality factor of the inductor and worsen the phase noise. In addition, the efficiency of the oscillation circuit in converting DC current to the first-order resonant frequency current is low, which will also lead to higher power consumption.

[0052] In order to solve the problems in the related art, the present invention provides an oscillation circuit, in which the main inductor includes four single-turn inductors connected in parallel, so as to achieve the effect of reducing power consumption and improving phase noise without affecting the quality factor of the inductor. At the same time, a common-mode resonant circuit is connected to both the power supply end and the ground end to provide high impedance at twice the resonant frequency, and at the same time suppress the 2 times frequency current from the power supply to the first type transistor and the second type transistor to the ground, thereby improving the efficiency of converting direct current (DC current) to the first-order resonant frequency current, thereby further reducing power consumption and effectively improving phase noise.

[0053] The resonant circuit and electronic device provided in the present disclosure can be applied to the field of radio frequency communication, and specifically, can also be applied to the inductance design of LC-VCO (Inductor and Capacitor based Voltage Controlled Oscillator) in PLL (Phase-Locked Loops) in 5G NR radio frequency chips. In addition, the oscillation circuit and electronic device in the present disclosure can also be used in the field of radio frequency chip design such as WIFI, Bluetooth, GPS, etc., which is not limited in the embodiments of the present disclosure.

[0054] like Figure 1 A specific application scenario shown is a schematic diagram of a radio frequency transceiver. Figure 1, RF transceivers are usually composed of transceiver antennas, low noise amplifiers, mixers, voltage-controlled oscillators, power amplifiers, and modulators / demodulators. When the receiving antenna receives electromagnetic waves, it passes the signal to the low noise amplifier for amplification and converts it into a lower frequency signal through the mixer. This signal is then sent to the voltage-controlled oscillator to generate a lower intermediate frequency signal, which is then sent to the demodulator to be converted into a digital signal to complete the data decoding.

[0055] For the transmission process, the digital signal is first modulated and sent to the power amplifier, and then transmitted to the receiving end through the RF antenna. During the transmission process, the RF transceiver plays a key role in converting the digital signal into an electromagnetic signal and modulating it.

[0056] The inductor mentioned in the present disclosure is used in the oscillation circuit of the voltage-controlled oscillator. The voltage-controlled oscillator is used to generate high-frequency signals in the radio frequency transceiver, and its frequency is adjusted by changing the value of the input voltage. In the phase-locked loop of the voltage-controlled oscillator in the radio frequency transceiver, the phase-locked loop detects the phase difference between the input signal and the output signal, and converts the detected phase difference signal into a voltage signal output through a phase detector, and forms a control voltage of the voltage-controlled oscillator after filtering by a low-pass filter, controls the frequency of the oscillator output signal, and then feeds back the frequency and phase of the oscillator output signal to the phase detector through a feedback path. Finally, the frequency and phase of the voltage-controlled oscillator maintain a definite relationship with the input signal.

[0057] The utility model is described in detail below in conjunction with specific embodiments.

[0058] Figure 2 A schematic diagram of the structure of an oscillation circuit provided in an embodiment of the utility model.

[0059] like Figure 2 As shown, the oscillation circuit comprises:

[0060] A main inductor 23, a first cross-coupled differential circuit 24 and a second cross-coupled differential circuit 25;

[0061] The main inductor 23 is connected in parallel with the first cross-coupled differential circuit 24 and the second cross-coupled differential circuit 25 respectively;

[0062] The main inductor 23 includes four single-turn inductors connected in parallel.

[0063] The main inductor may specifically be a flower-shaped inductor.

[0064] like Figure 3 The schematic diagram of a main inductor as a flower-shaped inductor is shown in FIG. Figure 3The current in the flower-shaped inductor flows in four circles 1, 2, 3, and 4, so the overall flower-shaped inductor can be equivalent to the parallel connection of four single-circuit inductors. The quality factor of the flower-shaped inductor is equivalent to that of the single-circuit inductor, but the inductance value of the flower-shaped inductor is one-fourth of that of the single-circuit inductor. Therefore, the main inductor in the present disclosure adopts the structure of the flower-shaped inductor, which can achieve the requirements of low inductance value and high quality factor, thereby achieving the effect of reducing power consumption and improving phase noise without affecting the quality factor of the main inductor in the present disclosure.

[0065] The oscillation circuit also includes a first common-mode resonant circuit 21 and a second common-mode resonant circuit 22. The first common-mode resonant circuit 21 is connected to the first cross-coupled differential circuit 24 via the first common-mode connection port 10, and the second common-mode resonant circuit 22 is connected to the second cross-coupled differential circuit 25 via the second common-mode connection port 11. The present disclosure adds a common-mode resonant circuit to the above-mentioned oscillation circuit to further reduce power consumption and improve phase noise.

[0066] Among them, the oscillation circuit structure in the present disclosure can adopt a CMOS (Complementary Metal Oxide Semiconductor) differential amplifier structure. The efficiency of the DC current to first-order resonant current of the oscillation circuit structure disclosed in the present disclosure is twice that of the NMOS structure, and the CMOS differential amplifier structure can add common-mode resonant circuits on both sides, both resonating at 2 times the oscillator circuit frequency, so that the common-mode point presents high impedance, reducing the periodic reduction of the quality factor (Q value) of the overall inductance of the oscillation circuit. Thereby reducing the power consumption and phase noise of the oscillation circuit.

[0067] Optional, such as Figure 4 As shown in the structural schematic diagram of a specific oscillation circuit, the first common-mode resonant circuit 21 includes a first common-mode inductor 211, the second common-mode resonant circuit 22 includes a second common-mode inductor 221, the first common-mode inductor 211 and / or the second common-mode inductor 221 includes two single-turn inductors and the electromagnetic waves generated by the two single-turn inductors cancel each other out.

[0068] The first common-mode inductor 211 and / or the second common-mode inductor 221 is an 8-shaped common-mode inductor.

[0069] In the present disclosure, the first common-mode inductor and the second common-mode inductor are both 8-shaped inductors, and are symmetrically connected to the main inductor, so that the induced currents generated by the two 8-shaped inductors on adjacent traces can cancel each other out, and thus have a strong anti-interference capability; and the two 8-shaped inductors will cancel each other out because the magnetic fields generated by the current changes are in opposite directions, and thus the electromagnetic interference generated by them to the main inductor and the oscillation circuit is also very low.

[0070] At the same time, the first common-mode inductor 211 and the second common-mode inductor 221 are symmetrically arranged in a closed area formed by four single-loop inductors of the main inductor 23 , so as to achieve the effect of not increasing the additional layout area in actual layout.

[0071] The first common-mode resonant circuit 21 further includes a first capacitor 212 , and the first common-mode inductor 211 is connected to the first capacitor 212 ; the second common-mode resonant circuit 22 further includes a second capacitor 222 , and the second common-mode inductor 221 is connected to the second capacitor 222 .

[0072] Optional, see Figure 4 The first ends of the first common-mode inductor 211 and the first capacitor 212 are connected to the first common-mode connection port 10, and the second ends of the first common-mode inductor 211 and the first capacitor 212 are connected to the voltage port 12; the first ends of the second common-mode inductor 221 and the second capacitor 222 are connected to the second common-mode connection port 11, and the second ends of the second common-mode inductor 221 and the second capacitor 222 are grounded.

[0073] Optionally, to adjust the supply voltage VDD, refer to Figure 4 The oscillation circuit further includes an adjustable transistor 26; a source of the adjustable transistor 26 is connected to the voltage port 12, and a gate of the adjustable transistor 26 is connected to the power supply voltage VDD.

[0074] The adjustable transistor in the present disclosure is a PMOS transistor.

[0075] Optional, see Figure 4 The first cross-coupled differential circuit 24 includes a first type first transistor 241 and a first type second transistor 242; the second cross-coupled differential circuit 25 includes a second type third transistor 251 and a second type fourth transistor 252; the sources of the first transistor 241 and the second transistor 242 are connected to the first common-mode connection port 10, and the sources of the third transistor 251 and the fourth transistor 252 are connected to the second common-mode connection port 11.

[0076] Among them, the first type of transistor in the present disclosure may be a PMOS transistor, and the second type of transistor in the present disclosure may be an NMOS transistor, that is, the first transistor 241 and the second transistor 242 are PMOS transistors, and the third transistor 251 and the fourth transistor 252 are NMOS transistors.

[0077] In the present disclosure, the combination of the first cross-coupled differential circuit 24 and the second cross-coupled differential circuit 25 is a complementary cross-coupled structure, that is, two NMOS tubes and two PMOS tubes are used to form a differential pair respectively. This structure adds two transistors, increases thermal noise, and increases parasitic capacitance, affecting the tuning range.

[0078] Optional, see Figure 4 The gate of the first transistor 241 is connected to the second end of the main inductor 23, and the drain of the first transistor 241 is connected to the first end of the main inductor 23; the gate of the fourth transistor 252 is connected to the first end of the main inductor 23, and the drain of the third transistor 251 is connected to the second end of the main inductor 23.

[0079] In the present disclosure, since the main inductor includes four single-turn inductors connected in parallel, reference is made to Figure 3 , the main inductor has four inductor arms, wherein P1 is the first inductor arm, P2 is the second inductor arm, P3 is the third inductor arm, and P4 is the fourth inductor arm. The four inductor arms of the main inductor can be cross-connected through the transistors of the first cross-coupled differential circuit and the second cross-coupled differential circuit in the oscillation circuit, that is, the first inductor arm P1 of the main inductor can be connected to the gate of the second transistor 242, the second inductor arm P2 of the main inductor can be connected to the gate of the first transistor 241, the third inductor arm P3 of the main inductor can be connected to the gate of the fourth transistor 252, and the fourth inductor arm P4 of the main inductor can be connected to the gate of the third transistor 251. Therefore, the four single-turn inductors in the main inductor are connected in parallel, which can present a smaller inductance value (the main inductor is 90pH).

[0080] Optional, see Figure 4 The oscillation circuit also includes a parameter adjustment circuit 27, and the parameter adjustment circuit 27 is connected in parallel with the main inductor 13.

[0081] Optionally, the parameter adjustment circuit includes a first branch, the first branch includes a first diode 273 and a second diode 274 connected in series; a second branch, the second branch includes a third diode 275 and a fourth diode 276 connected in series; a third branch, the third branch includes a first resistor 277 and a second resistor 278 connected in series; wherein the first branch, the second branch, and the third branch are connected in parallel and in series with the first capacitor 271 and the second capacitor 272.

[0082] Specifically, the parameter adjustment circuit 27 includes a first capacitor 271, a second capacitor 272, a first diode 273, a second diode 274, a third diode 275, a fourth diode 276, a first resistor 277 and a second resistor 278; the anode of the first diode 273 is connected to the anode of the second diode 274; the anode of the third diode 275 is connected to the anode of the fourth diode 276; the first resistor 277 is connected to the second resistor 278; the cathode of the first diode 273, the cathode of the third diode 275 and the first resistor 277 are respectively connected to the first capacitor 271; the cathode of the second diode 274, the cathode of the fourth diode 276 and the second resistor 278 are respectively connected to the second capacitor 272; the first capacitor 271 is connected to the first end of the main inductor 23; and the second capacitor is connected to the second end of the main inductor 23.

[0083] The loop composed of the first capacitor 271, the third diode 275, the fourth diode 276 and the second capacitor 272 can adjust the output frequency of the oscillation circuit according to the control voltage in the PLL loop, such as Kvco var; the loop composed of the first capacitor 271, the first diode 273, the second diode 274 and the second capacitor 272 can adjust the temperature parameters in the oscillation circuit to achieve temperature compensation, such as V - The loop composed of the first capacitor 271, the first resistor 277, the second resistor 278 and the second capacitor 272 can adjust the bias voltage in the oscillation circuit, for example, V - bias.

[0084] Optional, see Figure 4 The oscillation circuit further includes a capacitor switch array 28 ; the capacitor switch array 28 includes at least one capacitor switch circuit 281 , and two ends of at least one capacitor switch circuit 281 are respectively connected to the parameter adjustment circuit 27 and the second cross-coupling differential circuit 25 .

[0085] The capacitor switch array 28 is used to adjust the capacitance value of the oscillation circuit. Since the frequency in the oscillation circuit is determined by the capacitance and the inductance, the capacitance value of the oscillation circuit can be adjusted by the capacitor switch array 28 to adjust the frequency of the oscillation circuit. The number of capacitor switch circuits 281 in the capacitor switch array 28 can be set according to the actual required capacitance size, which is not limited in the embodiment of the present disclosure.

[0086] Optional, see Figure 4 , at least one capacitor switching circuit 281 includes a third capacitor 2811, a fourth capacitor 2812 and a fifth transistor 2813; the third capacitor 2811 is connected to the source of the fifth transistor 2813, and the fourth capacitor 2812 is connected to the gate of the fifth transistor 2813; the third capacitor 2811 is connected to the first capacitor 271, and the fourth capacitor 2812 is connected to the drain of the third transistor 251 and the fourth transistor 252.

[0087] In the present disclosure, the fifth transistor 2813 may be a first type transistor, that is, an NMOS transistor is used as the fifth transistor.

[0088] In summary, the oscillation circuit provided in the embodiment of the utility model realizes the main inductor, the first cross-coupled differential circuit and the second cross-coupled differential circuit; the main inductor is respectively connected in parallel with the first cross-coupled differential circuit and the second cross-coupled differential circuit, and the main inductor includes four parallel single-turn inductors, thereby achieving the effect of reducing power consumption and improving phase noise without affecting the quality factor of the main inductor.

[0089] An embodiment of the utility model further provides a chip, which includes the oscillation circuit described in the above embodiment.

[0090] like Figure 5 The schematic diagram of a chip shown in FIG. 1 is specifically a layout of an oscillating circuit on a chip. The present utility model embodiment also provides a chip, referring to Figure 5 , the chip includes a first region 51 and a second region 52,

[0091] The first area 51 is used to arrange the main inductor 23 composed of four single-turn inductors connected in parallel, and the first area 51 is an octagonal closed area;

[0092] Reference Figure 5 In the dotted part in FIG. 5 , the second region 52 is used to arrange the first cross-coupled differential circuit 24 and the second cross-coupled differential circuit 25 , the main inductor 23 is respectively connected in parallel with the first cross-coupled differential circuit 24 and the second cross-coupled differential circuit 25 , and the second region 52 is chain-shaped in the first direction and is centrally arranged in the first region 51 .

[0093] Optional, such as Figure 6 A schematic diagram of a chip is shown, the chip also includes a third area 53, the third area 53 is used to arrange the first common mode resonant circuit 21 and the second common mode resonant circuit 22, the third area 53 is symmetrically arranged in the first area 51 in the second direction, the first common mode resonant circuit 21 includes a first common mode inductor 211, the second common mode resonant circuit 22 includes a second common mode inductor 221, the first common mode inductor 211 and the second common mode inductor 221 include two single-turn inductors and the electromagnetic waves generated by the two single-turn inductors cancel each other out.

[0094] In an optional embodiment of the present disclosure, Figure 7 As shown, the present disclosure also provides a schematic diagram of a specific chip.

[0095] Among them, refer to Figure 7 The main inductor is a flower-shaped inductor shown by a black thick line. The left dashed line box symmetrically placed in the main inductor represents the first common-mode inductor in the first common-mode resonant circuit and the right dashed line box represents the second common-mode inductor in the second common-mode resonant circuit. The first common-mode inductor and the second common-mode inductor are 8-shaped inductors. GM represents the first cross-coupled differential circuit and the second cross-coupled differential circuit, and SCA represents the capacitor switch array. Among them, SCA - C means the capacitance adjustment level is low and the adjustment effect is rough; SCA - M means the capacitance adjustment level is the middle level, and the adjustment effect is moderate; SCA -F indicates that the capacitance adjustment level is higher and the adjustment effect is more delicate. Kvco and TC both represent parameter adjustment circuits. Kvco indicates the ability of the oscillation circuit to adjust the output frequency according to the control voltage in the PLL loop; TC indicates the temperature compensation of the entire oscillation circuit.

[0096] In summary, the present disclosure provides a low-power and low-phase noise oscillation circuit. The oscillation circuit uses a flower-shaped main inductor with a low inductance and a high quality factor as the main inductor, and uses an 8-shaped inductor as the first common-mode inductor and the second common-mode inductor. This can achieve the introduction of common-mode inductors without affecting the quality factor of the main inductors, increasing the layout area of ​​the chip, and increasing mutual electromagnetic interference, thereby further optimizing the power consumption and phase noise of the oscillation circuit.

[0097] An embodiment of the utility model also provides an electronic device.

[0098] Specifically, the electronic device includes: an oscillation circuit as described in any one of the above embodiments.

[0099] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the above terms may be for different embodiments or examples. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0100] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0101] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. An oscillator circuit, characterized in that: The oscillator circuit comprises: a main inductor, a first cross-coupled differential circuit, and a second cross-coupled differential circuit; The main inductor is connected in parallel with the first cross-coupled differential circuit and the second cross-coupled differential circuit respectively; The main inductor includes four single-turn inductors connected in parallel.

2. The oscillation circuit according to claim 1, characterized in that: The oscillation circuit further includes a first common-mode resonant circuit and a second common-mode resonant circuit, wherein the first common-mode resonant circuit is connected to the first cross-coupled differential circuit via a first common-mode connection port, and the second common-mode resonant circuit is connected to the second cross-coupled differential circuit via a second common-mode connection port; The first common-mode resonant circuit includes a first common-mode inductor, the second common-mode resonant circuit includes a second common-mode inductor, the first common-mode inductor and / or the second common-mode inductor include two single-turn inductors, and the electromagnetic waves generated by the two single-turn inductors cancel each other out.

3. The oscillation circuit according to claim 2, characterized in that: The first common-mode inductor and / or the second common-mode inductor is an 8-shaped common-mode inductor.

4. The oscillator circuit according to claim 2 or 3, characterized in that: The first common-mode inductor and the second common-mode inductor are symmetrically arranged in a closed area formed by four single-turn inductors of the main inductor.

5. The oscillator circuit according to claim 2 or 3, characterized in that: The first common mode resonant circuit further includes a first capacitor, and the first common mode inductor is connected to the first capacitor; The second common mode resonant circuit further includes a second capacitor, and the second common mode inductor is connected to the second capacitor; The first ends of the first common-mode inductor and the first capacitor are connected to the first common-mode connection port, and the second ends of the first common-mode inductor and the first capacitor are connected to the voltage port; The first ends of the second common-mode inductor and the second capacitor are connected to the second common-mode connection port, and the second ends of the second common-mode inductor and the second capacitor are grounded.

6. The oscillation circuit according to claim 5, characterized in that: The oscillator circuit also includes an adjustable transistor; The source of the adjustable transistor is connected to the voltage port, and the gate of the adjustable transistor is connected to a power supply voltage.

7. The oscillation circuit according to claim 2, characterized in that: The first cross-coupled differential circuit includes a first transistor of a first type and a second transistor of a first type; The second cross-coupled differential circuit includes a third transistor of a second type and a fourth transistor of a second type; Sources of the first transistor and the second transistor are connected to the first common mode connection port, and sources of the third transistor and the fourth transistor are connected to the second common mode connection port.

8. The oscillation circuit according to claim 7, characterized in that: The gate of the first transistor is connected to the second end of the main inductor, and the drain of the first transistor is connected to the first end of the main inductor; A gate of the fourth transistor is connected to a first end of the main inductor, and a drain of the third transistor is connected to a second end of the main inductor.

9. The oscillation circuit according to claim 8, characterized in that: The oscillation circuit further includes a parameter adjustment circuit, and the parameter adjustment circuit is connected in parallel with the main inductor.

10. The oscillation circuit according to claim 9, characterized in that: The parameter adjustment circuit includes a first branch, wherein the first branch includes a first diode and a second diode connected in series; a second branch, the second branch comprising a third diode and a fourth diode connected in series; A third branch, the third branch comprising a first resistor and a second resistor connected in series; The first branch, the second branch, and the third branch are connected in parallel and in series with the first capacitor and the second capacitor.

11. The oscillation circuit according to claim 10, characterized in that: The oscillation circuit also includes a capacitive switch array; The capacitive switch array includes at least one capacitive switch circuit, and two ends of the at least one capacitive switch circuit are respectively connected to the parameter adjustment circuit and the second cross-coupled differential circuit.

12. The oscillation circuit according to claim 11, characterized in that: The at least one capacitor switch circuit includes a third capacitor, a fourth capacitor and a fifth transistor; The third capacitor is connected to the source of the fifth transistor, and the fourth capacitor is connected to the gate of the fifth transistor; The third capacitor is connected to the first capacitor, and the fourth capacitor is connected to drains of the third transistor and the fourth transistor.

13. A chip, characterized in that: The chip includes the oscillation circuit according to any one of claims 1 to 10.

14. A chip, characterized in that: The chip includes a first region and a second region, The first area is used to arrange a main inductor consisting of four single-turn inductors connected in parallel, and the first area is an octagonal closed area; The second region is used to arrange a first cross-coupled differential circuit and a second cross-coupled differential circuit. The main inductor is connected in parallel with the first cross-coupled differential circuit and the second cross-coupled differential circuit respectively. The second region is chain-shaped in a first direction and is centrally arranged in the first region.

15. The chip according to claim 14, characterized in that: The chip also includes a third area, the third area is used to arrange a first common-mode resonant circuit and a second common-mode resonant circuit, the third area is symmetrically arranged in the first area in a second direction, the first common-mode resonant circuit includes a first common-mode inductor, the second common-mode resonant circuit includes a second common-mode inductor, the first common-mode inductor and the second common-mode inductor include two single-turn inductors, and the electromagnetics generated by the two single-turn inductors cancel each other out.

16. An electronic device, characterized in that: The device comprises the oscillating circuit according to any one of claims 1 to 12, or comprises the chip according to claim 13, or comprises the chip according to any one of claims 14 to 15.

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